target-ppc/timebase_helper.c

   1 /*
   2  *  PowerPC emulation helpers for QEMU.
   3  *
   4  *  Copyright (c) 2003-2007 Jocelyn Mayer
   5  *
   6  * This library is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU Lesser General Public
   8  * License as published by the Free Software Foundation; either
   9  * version 2 of the License, or (at your option) any later version.
  10  *
  11  * This library is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  * Lesser General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU Lesser General Public
  17  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  18  */
  19 #include "cpu.h"
  20 #include "exec/helper-proto.h"
  21
  22 /*****************************************************************************/
  23 /* SPR accesses */
  24
  25 target_ulong helper_load_tbl(CPUPPCState *env)
  26 {
  27     return (target_ulong)cpu_ppc_load_tbl(env);
  28 }
  29
  30 target_ulong helper_load_tbu(CPUPPCState *env)
  31 {
  32     return cpu_ppc_load_tbu(env);
  33 }
  34
  35 target_ulong helper_load_atbl(CPUPPCState *env)
  36 {
  37     return (target_ulong)cpu_ppc_load_atbl(env);
  38 }
  39
  40 target_ulong helper_load_atbu(CPUPPCState *env)
  41 {
  42     return cpu_ppc_load_atbu(env);
  43 }
  44
  45 #if defined(TARGET_PPC64) && !defined(CONFIG_USER_ONLY)
  46 target_ulong helper_load_purr(CPUPPCState *env)
  47 {
  48     return (target_ulong)cpu_ppc_load_purr(env);
  49 }
  50 #endif
  51
  52 target_ulong helper_load_601_rtcl(CPUPPCState *env)
  53 {
  54     return cpu_ppc601_load_rtcl(env);
  55 }
  56
  57 target_ulong helper_load_601_rtcu(CPUPPCState *env)
  58 {
  59     return cpu_ppc601_load_rtcu(env);
  60 }
  61
  62 #if !defined(CONFIG_USER_ONLY)
  63 void helper_store_tbl(CPUPPCState *env, target_ulong val)
  64 {
  65     cpu_ppc_store_tbl(env, val);
  66 }
  67
  68 void helper_store_tbu(CPUPPCState *env, target_ulong val)
  69 {
  70     cpu_ppc_store_tbu(env, val);
  71 }
  72
  73 void helper_store_atbl(CPUPPCState *env, target_ulong val)
  74 {
  75     cpu_ppc_store_atbl(env, val);
  76 }
  77
  78 void helper_store_atbu(CPUPPCState *env, target_ulong val)
  79 {
  80     cpu_ppc_store_atbu(env, val);
  81 }
  82
  83 void helper_store_601_rtcl(CPUPPCState *env, target_ulong val)
  84 {
  85     cpu_ppc601_store_rtcl(env, val);
  86 }
  87
  88 void helper_store_601_rtcu(CPUPPCState *env, target_ulong val)
  89 {
  90     cpu_ppc601_store_rtcu(env, val);
  91 }
  92
  93 target_ulong helper_load_decr(CPUPPCState *env)
  94 {
  95     return cpu_ppc_load_decr(env);
  96 }
  97
  98 void helper_store_decr(CPUPPCState *env, target_ulong val)
  99 {
 100     cpu_ppc_store_decr(env, val);
 101 }
 102
 103 target_ulong helper_load_40x_pit(CPUPPCState *env)
 104 {
 105     return load_40x_pit(env);
 106 }
 107
 108 void helper_store_40x_pit(CPUPPCState *env, target_ulong val)
 109 {
 110     store_40x_pit(env, val);
 111 }
 112
 113 void helper_store_booke_tcr(CPUPPCState *env, target_ulong val)
 114 {
 115     store_booke_tcr(env, val);
 116 }
 117
 118 void helper_store_booke_tsr(CPUPPCState *env, target_ulong val)
 119 {
 120     store_booke_tsr(env, val);
 121 }
 122 #endif
 123
 124 /*****************************************************************************/
 125 /* Embedded PowerPC specific helpers */
 126
 127 /* XXX: to be improved to check access rights when in user-mode */
 128 target_ulong helper_load_dcr(CPUPPCState *env, target_ulong dcrn)
 129 {
 130     uint32_t val = 0;
 131
 132     if (unlikely(env->dcr_env == NULL)) {
 133         qemu_log_mask(LOG_GUEST_ERROR, "No DCR environment\n");
 134         helper_raise_exception_err(env, POWERPC_EXCP_PROGRAM,
 135                                    POWERPC_EXCP_INVAL |
 136                                    POWERPC_EXCP_INVAL_INVAL);
 137     } else if (unlikely(ppc_dcr_read(env->dcr_env,
 138                                      (uint32_t)dcrn, &val) != 0)) {
 139         qemu_log_mask(LOG_GUEST_ERROR, "DCR read error %d %03x\n",
 140                       (uint32_t)dcrn, (uint32_t)dcrn);
 141         helper_raise_exception_err(env, POWERPC_EXCP_PROGRAM,
 142                                    POWERPC_EXCP_INVAL | POWERPC_EXCP_PRIV_REG);
 143     }
 144     return val;
 145 }
 146
 147 void helper_store_dcr(CPUPPCState *env, target_ulong dcrn, target_ulong val)
 148 {
 149     if (unlikely(env->dcr_env == NULL)) {
 150         qemu_log_mask(LOG_GUEST_ERROR, "No DCR environment\n");
 151         helper_raise_exception_err(env, POWERPC_EXCP_PROGRAM,
 152                                    POWERPC_EXCP_INVAL |
 153                                    POWERPC_EXCP_INVAL_INVAL);
 154     } else if (unlikely(ppc_dcr_write(env->dcr_env, (uint32_t)dcrn,
 155                                       (uint32_t)val) != 0)) {
 156         qemu_log_mask(LOG_GUEST_ERROR, "DCR write error %d %03x\n",
 157                       (uint32_t)dcrn, (uint32_t)dcrn);
 158         helper_raise_exception_err(env, POWERPC_EXCP_PROGRAM,
 159                                    POWERPC_EXCP_INVAL | POWERPC_EXCP_PRIV_REG);
 160     }
 161 }