2 * Inter-VM Shared Memory PCI device.
5 * Cam Macdonell <cam@cs.ualberta.ca>
7 * Based On: cirrus_vga.c
8 * Copyright (c) 2004 Fabrice Bellard
9 * Copyright (c) 2004 Makoto Suzuki (suzu)
12 * Copyright (c) 2006 Igor Kovalenko
14 * This code is licensed under the GNU GPL v2.
16 * Contributions after 2012-01-13 are licensed under the terms of the
17 * GNU GPL, version 2 or (at your option) any later version.
19 #include "qemu/osdep.h"
20 #include "qapi/error.h"
21 #include "qemu/cutils.h"
23 #include "hw/i386/pc.h"
24 #include "hw/pci/pci.h"
25 #include "hw/pci/msi.h"
26 #include "hw/pci/msix.h"
27 #include "sysemu/kvm.h"
28 #include "migration/migration.h"
29 #include "qemu/error-report.h"
30 #include "qemu/event_notifier.h"
31 #include "qom/object_interfaces.h"
32 #include "sysemu/char.h"
33 #include "sysemu/hostmem.h"
34 #include "sysemu/qtest.h"
35 #include "qapi/visitor.h"
37 #include "hw/misc/ivshmem.h"
41 #define PCI_VENDOR_ID_IVSHMEM PCI_VENDOR_ID_REDHAT_QUMRANET
42 #define PCI_DEVICE_ID_IVSHMEM 0x1110
44 #define IVSHMEM_MAX_PEERS UINT16_MAX
45 #define IVSHMEM_IOEVENTFD 0
48 #define IVSHMEM_REG_BAR_SIZE 0x100
50 #define IVSHMEM_DEBUG 0
51 #define IVSHMEM_DPRINTF(fmt, ...) \
53 if (IVSHMEM_DEBUG) { \
54 printf("IVSHMEM: " fmt, ## __VA_ARGS__); \
58 #define TYPE_IVSHMEM_COMMON "ivshmem-common"
59 #define IVSHMEM_COMMON(obj) \
60 OBJECT_CHECK(IVShmemState, (obj), TYPE_IVSHMEM_COMMON)
62 #define TYPE_IVSHMEM_PLAIN "ivshmem-plain"
63 #define IVSHMEM_PLAIN(obj) \
64 OBJECT_CHECK(IVShmemState, (obj), TYPE_IVSHMEM_PLAIN)
66 #define TYPE_IVSHMEM_DOORBELL "ivshmem-doorbell"
67 #define IVSHMEM_DOORBELL(obj) \
68 OBJECT_CHECK(IVShmemState, (obj), TYPE_IVSHMEM_DOORBELL)
70 #define TYPE_IVSHMEM "ivshmem"
71 #define IVSHMEM(obj) \
72 OBJECT_CHECK(IVShmemState, (obj), TYPE_IVSHMEM)
76 EventNotifier
*eventfds
;
79 typedef struct MSIVector
{
84 typedef struct IVShmemState
{
91 /* exactly one of these two may be set */
92 HostMemoryBackend
*hostmem
; /* with interrupts */
93 CharDriverState
*server_chr
; /* without interrupts */
101 MemoryRegion ivshmem_mmio
; /* BAR 0 (registers) */
102 MemoryRegion
*ivshmem_bar2
; /* BAR 2 (shared memory) */
103 MemoryRegion server_bar2
; /* used with server_chr */
105 /* interrupt support */
107 int nb_peers
; /* space in @peers[] */
109 MSIVector
*msi_vectors
;
110 uint64_t msg_buf
; /* buffer for receiving server messages */
111 int msg_buffered_bytes
; /* #bytes in @msg_buf */
113 /* migration stuff */
115 Error
*migration_blocker
;
122 uint32_t not_legacy_32bit
;
125 /* registers for the Inter-VM shared memory device */
126 enum ivshmem_registers
{
133 static inline uint32_t ivshmem_has_feature(IVShmemState
*ivs
,
134 unsigned int feature
) {
135 return (ivs
->features
& (1 << feature
));
138 static inline bool ivshmem_is_master(IVShmemState
*s
)
140 assert(s
->master
!= ON_OFF_AUTO_AUTO
);
141 return s
->master
== ON_OFF_AUTO_ON
;
144 static void ivshmem_update_irq(IVShmemState
*s
)
146 PCIDevice
*d
= PCI_DEVICE(s
);
147 uint32_t isr
= s
->intrstatus
& s
->intrmask
;
150 * Do nothing unless the device actually uses INTx. Here's how
151 * the device variants signal interrupts, what they put in PCI
153 * Device variant Interrupt Interrupt Pin MSI-X cap.
154 * ivshmem-plain none 0 no
155 * ivshmem-doorbell MSI-X 1 yes(1)
156 * ivshmem,msi=off INTx 1 no
157 * ivshmem,msi=on MSI-X 1(2) yes(1)
158 * (1) if guest enabled MSI-X
159 * (2) the device lies
160 * Leads to the condition for doing nothing:
162 if (ivshmem_has_feature(s
, IVSHMEM_MSI
)
163 || !d
->config
[PCI_INTERRUPT_PIN
]) {
167 /* don't print ISR resets */
169 IVSHMEM_DPRINTF("Set IRQ to %d (%04x %04x)\n",
170 isr
? 1 : 0, s
->intrstatus
, s
->intrmask
);
173 pci_set_irq(d
, isr
!= 0);
176 static void ivshmem_IntrMask_write(IVShmemState
*s
, uint32_t val
)
178 IVSHMEM_DPRINTF("IntrMask write(w) val = 0x%04x\n", val
);
181 ivshmem_update_irq(s
);
184 static uint32_t ivshmem_IntrMask_read(IVShmemState
*s
)
186 uint32_t ret
= s
->intrmask
;
188 IVSHMEM_DPRINTF("intrmask read(w) val = 0x%04x\n", ret
);
192 static void ivshmem_IntrStatus_write(IVShmemState
*s
, uint32_t val
)
194 IVSHMEM_DPRINTF("IntrStatus write(w) val = 0x%04x\n", val
);
197 ivshmem_update_irq(s
);
200 static uint32_t ivshmem_IntrStatus_read(IVShmemState
*s
)
202 uint32_t ret
= s
->intrstatus
;
204 /* reading ISR clears all interrupts */
206 ivshmem_update_irq(s
);
210 static void ivshmem_io_write(void *opaque
, hwaddr addr
,
211 uint64_t val
, unsigned size
)
213 IVShmemState
*s
= opaque
;
215 uint16_t dest
= val
>> 16;
216 uint16_t vector
= val
& 0xff;
220 IVSHMEM_DPRINTF("writing to addr " TARGET_FMT_plx
"\n", addr
);
224 ivshmem_IntrMask_write(s
, val
);
228 ivshmem_IntrStatus_write(s
, val
);
232 /* check that dest VM ID is reasonable */
233 if (dest
>= s
->nb_peers
) {
234 IVSHMEM_DPRINTF("Invalid destination VM ID (%d)\n", dest
);
238 /* check doorbell range */
239 if (vector
< s
->peers
[dest
].nb_eventfds
) {
240 IVSHMEM_DPRINTF("Notifying VM %d on vector %d\n", dest
, vector
);
241 event_notifier_set(&s
->peers
[dest
].eventfds
[vector
]);
243 IVSHMEM_DPRINTF("Invalid destination vector %d on VM %d\n",
248 IVSHMEM_DPRINTF("Unhandled write " TARGET_FMT_plx
"\n", addr
);
252 static uint64_t ivshmem_io_read(void *opaque
, hwaddr addr
,
256 IVShmemState
*s
= opaque
;
262 ret
= ivshmem_IntrMask_read(s
);
266 ret
= ivshmem_IntrStatus_read(s
);
274 IVSHMEM_DPRINTF("why are we reading " TARGET_FMT_plx
"\n", addr
);
281 static const MemoryRegionOps ivshmem_mmio_ops
= {
282 .read
= ivshmem_io_read
,
283 .write
= ivshmem_io_write
,
284 .endianness
= DEVICE_NATIVE_ENDIAN
,
286 .min_access_size
= 4,
287 .max_access_size
= 4,
291 static void ivshmem_vector_notify(void *opaque
)
293 MSIVector
*entry
= opaque
;
294 PCIDevice
*pdev
= entry
->pdev
;
295 IVShmemState
*s
= IVSHMEM_COMMON(pdev
);
296 int vector
= entry
- s
->msi_vectors
;
297 EventNotifier
*n
= &s
->peers
[s
->vm_id
].eventfds
[vector
];
299 if (!event_notifier_test_and_clear(n
)) {
303 IVSHMEM_DPRINTF("interrupt on vector %p %d\n", pdev
, vector
);
304 if (ivshmem_has_feature(s
, IVSHMEM_MSI
)) {
305 if (msix_enabled(pdev
)) {
306 msix_notify(pdev
, vector
);
309 ivshmem_IntrStatus_write(s
, 1);
313 static int ivshmem_vector_unmask(PCIDevice
*dev
, unsigned vector
,
316 IVShmemState
*s
= IVSHMEM_COMMON(dev
);
317 EventNotifier
*n
= &s
->peers
[s
->vm_id
].eventfds
[vector
];
318 MSIVector
*v
= &s
->msi_vectors
[vector
];
321 IVSHMEM_DPRINTF("vector unmask %p %d\n", dev
, vector
);
323 ret
= kvm_irqchip_update_msi_route(kvm_state
, v
->virq
, msg
, dev
);
328 return kvm_irqchip_add_irqfd_notifier_gsi(kvm_state
, n
, NULL
, v
->virq
);
331 static void ivshmem_vector_mask(PCIDevice
*dev
, unsigned vector
)
333 IVShmemState
*s
= IVSHMEM_COMMON(dev
);
334 EventNotifier
*n
= &s
->peers
[s
->vm_id
].eventfds
[vector
];
337 IVSHMEM_DPRINTF("vector mask %p %d\n", dev
, vector
);
339 ret
= kvm_irqchip_remove_irqfd_notifier_gsi(kvm_state
, n
,
340 s
->msi_vectors
[vector
].virq
);
342 error_report("remove_irqfd_notifier_gsi failed");
346 static void ivshmem_vector_poll(PCIDevice
*dev
,
347 unsigned int vector_start
,
348 unsigned int vector_end
)
350 IVShmemState
*s
= IVSHMEM_COMMON(dev
);
353 IVSHMEM_DPRINTF("vector poll %p %d-%d\n", dev
, vector_start
, vector_end
);
355 vector_end
= MIN(vector_end
, s
->vectors
);
357 for (vector
= vector_start
; vector
< vector_end
; vector
++) {
358 EventNotifier
*notifier
= &s
->peers
[s
->vm_id
].eventfds
[vector
];
360 if (!msix_is_masked(dev
, vector
)) {
364 if (event_notifier_test_and_clear(notifier
)) {
365 msix_set_pending(dev
, vector
);
370 static void watch_vector_notifier(IVShmemState
*s
, EventNotifier
*n
,
373 int eventfd
= event_notifier_get_fd(n
);
375 assert(!s
->msi_vectors
[vector
].pdev
);
376 s
->msi_vectors
[vector
].pdev
= PCI_DEVICE(s
);
378 qemu_set_fd_handler(eventfd
, ivshmem_vector_notify
,
379 NULL
, &s
->msi_vectors
[vector
]);
382 static void ivshmem_add_eventfd(IVShmemState
*s
, int posn
, int i
)
384 memory_region_add_eventfd(&s
->ivshmem_mmio
,
389 &s
->peers
[posn
].eventfds
[i
]);
392 static void ivshmem_del_eventfd(IVShmemState
*s
, int posn
, int i
)
394 memory_region_del_eventfd(&s
->ivshmem_mmio
,
399 &s
->peers
[posn
].eventfds
[i
]);
402 static void close_peer_eventfds(IVShmemState
*s
, int posn
)
406 assert(posn
>= 0 && posn
< s
->nb_peers
);
407 n
= s
->peers
[posn
].nb_eventfds
;
409 if (ivshmem_has_feature(s
, IVSHMEM_IOEVENTFD
)) {
410 memory_region_transaction_begin();
411 for (i
= 0; i
< n
; i
++) {
412 ivshmem_del_eventfd(s
, posn
, i
);
414 memory_region_transaction_commit();
417 for (i
= 0; i
< n
; i
++) {
418 event_notifier_cleanup(&s
->peers
[posn
].eventfds
[i
]);
421 g_free(s
->peers
[posn
].eventfds
);
422 s
->peers
[posn
].nb_eventfds
= 0;
425 static void resize_peers(IVShmemState
*s
, int nb_peers
)
427 int old_nb_peers
= s
->nb_peers
;
430 assert(nb_peers
> old_nb_peers
);
431 IVSHMEM_DPRINTF("bumping storage to %d peers\n", nb_peers
);
433 s
->peers
= g_realloc(s
->peers
, nb_peers
* sizeof(Peer
));
434 s
->nb_peers
= nb_peers
;
436 for (i
= old_nb_peers
; i
< nb_peers
; i
++) {
437 s
->peers
[i
].eventfds
= g_new0(EventNotifier
, s
->vectors
);
438 s
->peers
[i
].nb_eventfds
= 0;
442 static void ivshmem_add_kvm_msi_virq(IVShmemState
*s
, int vector
,
445 PCIDevice
*pdev
= PCI_DEVICE(s
);
446 MSIMessage msg
= msix_get_message(pdev
, vector
);
449 IVSHMEM_DPRINTF("ivshmem_add_kvm_msi_virq vector:%d\n", vector
);
450 assert(!s
->msi_vectors
[vector
].pdev
);
452 ret
= kvm_irqchip_add_msi_route(kvm_state
, msg
, pdev
);
454 error_setg(errp
, "kvm_irqchip_add_msi_route failed");
458 s
->msi_vectors
[vector
].virq
= ret
;
459 s
->msi_vectors
[vector
].pdev
= pdev
;
462 static void setup_interrupt(IVShmemState
*s
, int vector
, Error
**errp
)
464 EventNotifier
*n
= &s
->peers
[s
->vm_id
].eventfds
[vector
];
465 bool with_irqfd
= kvm_msi_via_irqfd_enabled() &&
466 ivshmem_has_feature(s
, IVSHMEM_MSI
);
467 PCIDevice
*pdev
= PCI_DEVICE(s
);
470 IVSHMEM_DPRINTF("setting up interrupt for vector: %d\n", vector
);
473 IVSHMEM_DPRINTF("with eventfd\n");
474 watch_vector_notifier(s
, n
, vector
);
475 } else if (msix_enabled(pdev
)) {
476 IVSHMEM_DPRINTF("with irqfd\n");
477 ivshmem_add_kvm_msi_virq(s
, vector
, &err
);
479 error_propagate(errp
, err
);
483 if (!msix_is_masked(pdev
, vector
)) {
484 kvm_irqchip_add_irqfd_notifier_gsi(kvm_state
, n
, NULL
,
485 s
->msi_vectors
[vector
].virq
);
486 /* TODO handle error */
489 /* it will be delayed until msix is enabled, in write_config */
490 IVSHMEM_DPRINTF("with irqfd, delayed until msix enabled\n");
494 static void process_msg_shmem(IVShmemState
*s
, int fd
, Error
**errp
)
500 if (s
->ivshmem_bar2
) {
501 error_setg(errp
, "server sent unexpected shared memory message");
506 if (fstat(fd
, &buf
) < 0) {
507 error_setg_errno(errp
, errno
,
508 "can't determine size of shared memory sent by server");
516 if (s
->legacy_size
!= SIZE_MAX
) {
517 if (size
< s
->legacy_size
) {
518 error_setg(errp
, "server sent only %zd bytes of shared memory",
519 (size_t)buf
.st_size
);
523 size
= s
->legacy_size
;
526 /* mmap the region and map into the BAR2 */
527 ptr
= mmap(0, size
, PROT_READ
| PROT_WRITE
, MAP_SHARED
, fd
, 0);
528 if (ptr
== MAP_FAILED
) {
529 error_setg_errno(errp
, errno
, "Failed to mmap shared memory");
533 memory_region_init_ram_ptr(&s
->server_bar2
, OBJECT(s
),
534 "ivshmem.bar2", size
, ptr
);
535 memory_region_set_fd(&s
->server_bar2
, fd
);
536 s
->ivshmem_bar2
= &s
->server_bar2
;
539 static void process_msg_disconnect(IVShmemState
*s
, uint16_t posn
,
542 IVSHMEM_DPRINTF("posn %d has gone away\n", posn
);
543 if (posn
>= s
->nb_peers
|| posn
== s
->vm_id
) {
544 error_setg(errp
, "invalid peer %d", posn
);
547 close_peer_eventfds(s
, posn
);
550 static void process_msg_connect(IVShmemState
*s
, uint16_t posn
, int fd
,
553 Peer
*peer
= &s
->peers
[posn
];
557 * The N-th connect message for this peer comes with the file
558 * descriptor for vector N-1. Count messages to find the vector.
560 if (peer
->nb_eventfds
>= s
->vectors
) {
561 error_setg(errp
, "Too many eventfd received, device has %d vectors",
566 vector
= peer
->nb_eventfds
++;
568 IVSHMEM_DPRINTF("eventfds[%d][%d] = %d\n", posn
, vector
, fd
);
569 event_notifier_init_fd(&peer
->eventfds
[vector
], fd
);
570 fcntl_setfl(fd
, O_NONBLOCK
); /* msix/irqfd poll non block */
572 if (posn
== s
->vm_id
) {
573 setup_interrupt(s
, vector
, errp
);
574 /* TODO do we need to handle the error? */
577 if (ivshmem_has_feature(s
, IVSHMEM_IOEVENTFD
)) {
578 ivshmem_add_eventfd(s
, posn
, vector
);
582 static void process_msg(IVShmemState
*s
, int64_t msg
, int fd
, Error
**errp
)
584 IVSHMEM_DPRINTF("posn is %" PRId64
", fd is %d\n", msg
, fd
);
586 if (msg
< -1 || msg
> IVSHMEM_MAX_PEERS
) {
587 error_setg(errp
, "server sent invalid message %" PRId64
, msg
);
593 process_msg_shmem(s
, fd
, errp
);
597 if (msg
>= s
->nb_peers
) {
598 resize_peers(s
, msg
+ 1);
602 process_msg_connect(s
, msg
, fd
, errp
);
604 process_msg_disconnect(s
, msg
, errp
);
608 static int ivshmem_can_receive(void *opaque
)
610 IVShmemState
*s
= opaque
;
612 assert(s
->msg_buffered_bytes
< sizeof(s
->msg_buf
));
613 return sizeof(s
->msg_buf
) - s
->msg_buffered_bytes
;
616 static void ivshmem_read(void *opaque
, const uint8_t *buf
, int size
)
618 IVShmemState
*s
= opaque
;
623 assert(size
>= 0 && s
->msg_buffered_bytes
+ size
<= sizeof(s
->msg_buf
));
624 memcpy((unsigned char *)&s
->msg_buf
+ s
->msg_buffered_bytes
, buf
, size
);
625 s
->msg_buffered_bytes
+= size
;
626 if (s
->msg_buffered_bytes
< sizeof(s
->msg_buf
)) {
629 msg
= le64_to_cpu(s
->msg_buf
);
630 s
->msg_buffered_bytes
= 0;
632 fd
= qemu_chr_fe_get_msgfd(s
->server_chr
);
633 IVSHMEM_DPRINTF("posn is %" PRId64
", fd is %d\n", msg
, fd
);
635 process_msg(s
, msg
, fd
, &err
);
637 error_report_err(err
);
641 static int64_t ivshmem_recv_msg(IVShmemState
*s
, int *pfd
, Error
**errp
)
648 ret
= qemu_chr_fe_read_all(s
->server_chr
, (uint8_t *)&msg
+ n
,
650 if (ret
< 0 && ret
!= -EINTR
) {
651 error_setg_errno(errp
, -ret
, "read from server failed");
655 } while (n
< sizeof(msg
));
657 *pfd
= qemu_chr_fe_get_msgfd(s
->server_chr
);
661 static void ivshmem_recv_setup(IVShmemState
*s
, Error
**errp
)
667 msg
= ivshmem_recv_msg(s
, &fd
, &err
);
669 error_propagate(errp
, err
);
672 if (msg
!= IVSHMEM_PROTOCOL_VERSION
) {
673 error_setg(errp
, "server sent version %" PRId64
", expecting %d",
674 msg
, IVSHMEM_PROTOCOL_VERSION
);
678 error_setg(errp
, "server sent invalid version message");
683 * ivshmem-server sends the remaining initial messages in a fixed
684 * order, but the device has always accepted them in any order.
685 * Stay as compatible as practical, just in case people use
686 * servers that behave differently.
690 * ivshmem_device_spec.txt has always required the ID message
691 * right here, and ivshmem-server has always complied. However,
692 * older versions of the device accepted it out of order, but
693 * broke when an interrupt setup message arrived before it.
695 msg
= ivshmem_recv_msg(s
, &fd
, &err
);
697 error_propagate(errp
, err
);
700 if (fd
!= -1 || msg
< 0 || msg
> IVSHMEM_MAX_PEERS
) {
701 error_setg(errp
, "server sent invalid ID message");
707 * Receive more messages until we got shared memory.
710 msg
= ivshmem_recv_msg(s
, &fd
, &err
);
712 error_propagate(errp
, err
);
715 process_msg(s
, msg
, fd
, &err
);
717 error_propagate(errp
, err
);
723 * This function must either map the shared memory or fail. The
724 * loop above ensures that: it terminates normally only after it
725 * successfully processed the server's shared memory message.
726 * Assert that actually mapped the shared memory:
728 assert(s
->ivshmem_bar2
);
731 /* Select the MSI-X vectors used by device.
732 * ivshmem maps events to vectors statically, so
733 * we just enable all vectors on init and after reset. */
734 static void ivshmem_msix_vector_use(IVShmemState
*s
)
736 PCIDevice
*d
= PCI_DEVICE(s
);
739 for (i
= 0; i
< s
->vectors
; i
++) {
740 msix_vector_use(d
, i
);
744 static void ivshmem_reset(DeviceState
*d
)
746 IVShmemState
*s
= IVSHMEM_COMMON(d
);
750 if (ivshmem_has_feature(s
, IVSHMEM_MSI
)) {
751 ivshmem_msix_vector_use(s
);
755 static int ivshmem_setup_interrupts(IVShmemState
*s
)
757 /* allocate QEMU callback data for receiving interrupts */
758 s
->msi_vectors
= g_malloc0(s
->vectors
* sizeof(MSIVector
));
760 if (ivshmem_has_feature(s
, IVSHMEM_MSI
)) {
761 if (msix_init_exclusive_bar(PCI_DEVICE(s
), s
->vectors
, 1)) {
765 IVSHMEM_DPRINTF("msix initialized (%d vectors)\n", s
->vectors
);
766 ivshmem_msix_vector_use(s
);
772 static void ivshmem_enable_irqfd(IVShmemState
*s
)
774 PCIDevice
*pdev
= PCI_DEVICE(s
);
777 for (i
= 0; i
< s
->peers
[s
->vm_id
].nb_eventfds
; i
++) {
780 ivshmem_add_kvm_msi_virq(s
, i
, &err
);
782 error_report_err(err
);
783 /* TODO do we need to handle the error? */
787 if (msix_set_vector_notifiers(pdev
,
788 ivshmem_vector_unmask
,
790 ivshmem_vector_poll
)) {
791 error_report("ivshmem: msix_set_vector_notifiers failed");
795 static void ivshmem_remove_kvm_msi_virq(IVShmemState
*s
, int vector
)
797 IVSHMEM_DPRINTF("ivshmem_remove_kvm_msi_virq vector:%d\n", vector
);
799 if (s
->msi_vectors
[vector
].pdev
== NULL
) {
803 /* it was cleaned when masked in the frontend. */
804 kvm_irqchip_release_virq(kvm_state
, s
->msi_vectors
[vector
].virq
);
806 s
->msi_vectors
[vector
].pdev
= NULL
;
809 static void ivshmem_disable_irqfd(IVShmemState
*s
)
811 PCIDevice
*pdev
= PCI_DEVICE(s
);
814 for (i
= 0; i
< s
->peers
[s
->vm_id
].nb_eventfds
; i
++) {
815 ivshmem_remove_kvm_msi_virq(s
, i
);
818 msix_unset_vector_notifiers(pdev
);
821 static void ivshmem_write_config(PCIDevice
*pdev
, uint32_t address
,
822 uint32_t val
, int len
)
824 IVShmemState
*s
= IVSHMEM_COMMON(pdev
);
825 int is_enabled
, was_enabled
= msix_enabled(pdev
);
827 pci_default_write_config(pdev
, address
, val
, len
);
828 is_enabled
= msix_enabled(pdev
);
830 if (kvm_msi_via_irqfd_enabled()) {
831 if (!was_enabled
&& is_enabled
) {
832 ivshmem_enable_irqfd(s
);
833 } else if (was_enabled
&& !is_enabled
) {
834 ivshmem_disable_irqfd(s
);
839 static void ivshmem_common_realize(PCIDevice
*dev
, Error
**errp
)
841 IVShmemState
*s
= IVSHMEM_COMMON(dev
);
844 uint8_t attr
= PCI_BASE_ADDRESS_SPACE_MEMORY
|
845 PCI_BASE_ADDRESS_MEM_PREFETCH
;
847 /* IRQFD requires MSI */
848 if (ivshmem_has_feature(s
, IVSHMEM_IOEVENTFD
) &&
849 !ivshmem_has_feature(s
, IVSHMEM_MSI
)) {
850 error_setg(errp
, "ioeventfd/irqfd requires MSI");
854 pci_conf
= dev
->config
;
855 pci_conf
[PCI_COMMAND
] = PCI_COMMAND_IO
| PCI_COMMAND_MEMORY
;
857 memory_region_init_io(&s
->ivshmem_mmio
, OBJECT(s
), &ivshmem_mmio_ops
, s
,
858 "ivshmem-mmio", IVSHMEM_REG_BAR_SIZE
);
860 /* region for registers*/
861 pci_register_bar(dev
, 0, PCI_BASE_ADDRESS_SPACE_MEMORY
,
864 if (!s
->not_legacy_32bit
) {
865 attr
|= PCI_BASE_ADDRESS_MEM_TYPE_64
;
868 if (s
->hostmem
!= NULL
) {
869 IVSHMEM_DPRINTF("using hostmem\n");
871 s
->ivshmem_bar2
= host_memory_backend_get_memory(s
->hostmem
,
874 assert(s
->server_chr
);
876 IVSHMEM_DPRINTF("using shared memory server (socket = %s)\n",
877 s
->server_chr
->filename
);
879 /* we allocate enough space for 16 peers and grow as needed */
883 * Receive setup messages from server synchronously.
884 * Older versions did it asynchronously, but that creates a
885 * number of entertaining race conditions.
887 ivshmem_recv_setup(s
, &err
);
889 error_propagate(errp
, err
);
893 if (s
->master
== ON_OFF_AUTO_ON
&& s
->vm_id
!= 0) {
895 "master must connect to the server before any peers");
899 qemu_chr_add_handlers(s
->server_chr
, ivshmem_can_receive
,
900 ivshmem_read
, NULL
, s
);
902 if (ivshmem_setup_interrupts(s
) < 0) {
903 error_setg(errp
, "failed to initialize interrupts");
908 vmstate_register_ram(s
->ivshmem_bar2
, DEVICE(s
));
909 pci_register_bar(PCI_DEVICE(s
), 2, attr
, s
->ivshmem_bar2
);
911 if (s
->master
== ON_OFF_AUTO_AUTO
) {
912 s
->master
= s
->vm_id
== 0 ? ON_OFF_AUTO_ON
: ON_OFF_AUTO_OFF
;
915 if (!ivshmem_is_master(s
)) {
916 error_setg(&s
->migration_blocker
,
917 "Migration is disabled when using feature 'peer mode' in device 'ivshmem'");
918 migrate_add_blocker(s
->migration_blocker
);
922 static void ivshmem_exit(PCIDevice
*dev
)
924 IVShmemState
*s
= IVSHMEM_COMMON(dev
);
927 if (s
->migration_blocker
) {
928 migrate_del_blocker(s
->migration_blocker
);
929 error_free(s
->migration_blocker
);
932 if (memory_region_is_mapped(s
->ivshmem_bar2
)) {
934 void *addr
= memory_region_get_ram_ptr(s
->ivshmem_bar2
);
937 if (munmap(addr
, memory_region_size(s
->ivshmem_bar2
) == -1)) {
938 error_report("Failed to munmap shared memory %s",
942 fd
= memory_region_get_fd(s
->ivshmem_bar2
);
946 vmstate_unregister_ram(s
->ivshmem_bar2
, DEVICE(dev
));
950 for (i
= 0; i
< s
->nb_peers
; i
++) {
951 close_peer_eventfds(s
, i
);
956 if (ivshmem_has_feature(s
, IVSHMEM_MSI
)) {
957 msix_uninit_exclusive_bar(dev
);
960 g_free(s
->msi_vectors
);
963 static int ivshmem_pre_load(void *opaque
)
965 IVShmemState
*s
= opaque
;
967 if (!ivshmem_is_master(s
)) {
968 error_report("'peer' devices are not migratable");
975 static int ivshmem_post_load(void *opaque
, int version_id
)
977 IVShmemState
*s
= opaque
;
979 if (ivshmem_has_feature(s
, IVSHMEM_MSI
)) {
980 ivshmem_msix_vector_use(s
);
985 static void ivshmem_common_class_init(ObjectClass
*klass
, void *data
)
987 DeviceClass
*dc
= DEVICE_CLASS(klass
);
988 PCIDeviceClass
*k
= PCI_DEVICE_CLASS(klass
);
990 k
->realize
= ivshmem_common_realize
;
991 k
->exit
= ivshmem_exit
;
992 k
->config_write
= ivshmem_write_config
;
993 k
->vendor_id
= PCI_VENDOR_ID_IVSHMEM
;
994 k
->device_id
= PCI_DEVICE_ID_IVSHMEM
;
995 k
->class_id
= PCI_CLASS_MEMORY_RAM
;
997 dc
->reset
= ivshmem_reset
;
998 set_bit(DEVICE_CATEGORY_MISC
, dc
->categories
);
999 dc
->desc
= "Inter-VM shared memory";
1002 static const TypeInfo ivshmem_common_info
= {
1003 .name
= TYPE_IVSHMEM_COMMON
,
1004 .parent
= TYPE_PCI_DEVICE
,
1005 .instance_size
= sizeof(IVShmemState
),
1007 .class_init
= ivshmem_common_class_init
,
1010 static void ivshmem_check_memdev_is_busy(Object
*obj
, const char *name
,
1011 Object
*val
, Error
**errp
)
1015 mr
= host_memory_backend_get_memory(MEMORY_BACKEND(val
), &error_abort
);
1016 if (memory_region_is_mapped(mr
)) {
1017 char *path
= object_get_canonical_path_component(val
);
1018 error_setg(errp
, "can't use already busy memdev: %s", path
);
1021 qdev_prop_allow_set_link_before_realize(obj
, name
, val
, errp
);
1025 static const VMStateDescription ivshmem_plain_vmsd
= {
1026 .name
= TYPE_IVSHMEM_PLAIN
,
1028 .minimum_version_id
= 0,
1029 .pre_load
= ivshmem_pre_load
,
1030 .post_load
= ivshmem_post_load
,
1031 .fields
= (VMStateField
[]) {
1032 VMSTATE_PCI_DEVICE(parent_obj
, IVShmemState
),
1033 VMSTATE_UINT32(intrstatus
, IVShmemState
),
1034 VMSTATE_UINT32(intrmask
, IVShmemState
),
1035 VMSTATE_END_OF_LIST()
1039 static Property ivshmem_plain_properties
[] = {
1040 DEFINE_PROP_ON_OFF_AUTO("master", IVShmemState
, master
, ON_OFF_AUTO_OFF
),
1041 DEFINE_PROP_END_OF_LIST(),
1044 static void ivshmem_plain_init(Object
*obj
)
1046 IVShmemState
*s
= IVSHMEM_PLAIN(obj
);
1048 object_property_add_link(obj
, "memdev", TYPE_MEMORY_BACKEND
,
1049 (Object
**)&s
->hostmem
,
1050 ivshmem_check_memdev_is_busy
,
1051 OBJ_PROP_LINK_UNREF_ON_RELEASE
,
1055 static void ivshmem_plain_realize(PCIDevice
*dev
, Error
**errp
)
1057 IVShmemState
*s
= IVSHMEM_COMMON(dev
);
1060 error_setg(errp
, "You must specify a 'memdev'");
1064 ivshmem_common_realize(dev
, errp
);
1067 static void ivshmem_plain_class_init(ObjectClass
*klass
, void *data
)
1069 DeviceClass
*dc
= DEVICE_CLASS(klass
);
1070 PCIDeviceClass
*k
= PCI_DEVICE_CLASS(klass
);
1072 k
->realize
= ivshmem_plain_realize
;
1073 dc
->props
= ivshmem_plain_properties
;
1074 dc
->vmsd
= &ivshmem_plain_vmsd
;
1077 static const TypeInfo ivshmem_plain_info
= {
1078 .name
= TYPE_IVSHMEM_PLAIN
,
1079 .parent
= TYPE_IVSHMEM_COMMON
,
1080 .instance_size
= sizeof(IVShmemState
),
1081 .instance_init
= ivshmem_plain_init
,
1082 .class_init
= ivshmem_plain_class_init
,
1085 static const VMStateDescription ivshmem_doorbell_vmsd
= {
1086 .name
= TYPE_IVSHMEM_DOORBELL
,
1088 .minimum_version_id
= 0,
1089 .pre_load
= ivshmem_pre_load
,
1090 .post_load
= ivshmem_post_load
,
1091 .fields
= (VMStateField
[]) {
1092 VMSTATE_PCI_DEVICE(parent_obj
, IVShmemState
),
1093 VMSTATE_MSIX(parent_obj
, IVShmemState
),
1094 VMSTATE_UINT32(intrstatus
, IVShmemState
),
1095 VMSTATE_UINT32(intrmask
, IVShmemState
),
1096 VMSTATE_END_OF_LIST()
1100 static Property ivshmem_doorbell_properties
[] = {
1101 DEFINE_PROP_CHR("chardev", IVShmemState
, server_chr
),
1102 DEFINE_PROP_UINT32("vectors", IVShmemState
, vectors
, 1),
1103 DEFINE_PROP_BIT("ioeventfd", IVShmemState
, features
, IVSHMEM_IOEVENTFD
,
1105 DEFINE_PROP_ON_OFF_AUTO("master", IVShmemState
, master
, ON_OFF_AUTO_OFF
),
1106 DEFINE_PROP_END_OF_LIST(),
1109 static void ivshmem_doorbell_init(Object
*obj
)
1111 IVShmemState
*s
= IVSHMEM_DOORBELL(obj
);
1113 s
->features
|= (1 << IVSHMEM_MSI
);
1114 s
->legacy_size
= SIZE_MAX
; /* whatever the server sends */
1117 static void ivshmem_doorbell_realize(PCIDevice
*dev
, Error
**errp
)
1119 IVShmemState
*s
= IVSHMEM_COMMON(dev
);
1121 if (!s
->server_chr
) {
1122 error_setg(errp
, "You must specify a 'chardev'");
1126 ivshmem_common_realize(dev
, errp
);
1129 static void ivshmem_doorbell_class_init(ObjectClass
*klass
, void *data
)
1131 DeviceClass
*dc
= DEVICE_CLASS(klass
);
1132 PCIDeviceClass
*k
= PCI_DEVICE_CLASS(klass
);
1134 k
->realize
= ivshmem_doorbell_realize
;
1135 dc
->props
= ivshmem_doorbell_properties
;
1136 dc
->vmsd
= &ivshmem_doorbell_vmsd
;
1139 static const TypeInfo ivshmem_doorbell_info
= {
1140 .name
= TYPE_IVSHMEM_DOORBELL
,
1141 .parent
= TYPE_IVSHMEM_COMMON
,
1142 .instance_size
= sizeof(IVShmemState
),
1143 .instance_init
= ivshmem_doorbell_init
,
1144 .class_init
= ivshmem_doorbell_class_init
,
1147 static int ivshmem_load_old(QEMUFile
*f
, void *opaque
, int version_id
)
1149 IVShmemState
*s
= opaque
;
1150 PCIDevice
*pdev
= PCI_DEVICE(s
);
1153 IVSHMEM_DPRINTF("ivshmem_load_old\n");
1155 if (version_id
!= 0) {
1159 ret
= ivshmem_pre_load(s
);
1164 ret
= pci_device_load(pdev
, f
);
1169 if (ivshmem_has_feature(s
, IVSHMEM_MSI
)) {
1171 ivshmem_msix_vector_use(s
);
1173 s
->intrstatus
= qemu_get_be32(f
);
1174 s
->intrmask
= qemu_get_be32(f
);
1180 static bool test_msix(void *opaque
, int version_id
)
1182 IVShmemState
*s
= opaque
;
1184 return ivshmem_has_feature(s
, IVSHMEM_MSI
);
1187 static bool test_no_msix(void *opaque
, int version_id
)
1189 return !test_msix(opaque
, version_id
);
1192 static const VMStateDescription ivshmem_vmsd
= {
1195 .minimum_version_id
= 1,
1196 .pre_load
= ivshmem_pre_load
,
1197 .post_load
= ivshmem_post_load
,
1198 .fields
= (VMStateField
[]) {
1199 VMSTATE_PCI_DEVICE(parent_obj
, IVShmemState
),
1201 VMSTATE_MSIX_TEST(parent_obj
, IVShmemState
, test_msix
),
1202 VMSTATE_UINT32_TEST(intrstatus
, IVShmemState
, test_no_msix
),
1203 VMSTATE_UINT32_TEST(intrmask
, IVShmemState
, test_no_msix
),
1205 VMSTATE_END_OF_LIST()
1207 .load_state_old
= ivshmem_load_old
,
1208 .minimum_version_id_old
= 0
1211 static Property ivshmem_properties
[] = {
1212 DEFINE_PROP_CHR("chardev", IVShmemState
, server_chr
),
1213 DEFINE_PROP_STRING("size", IVShmemState
, sizearg
),
1214 DEFINE_PROP_UINT32("vectors", IVShmemState
, vectors
, 1),
1215 DEFINE_PROP_BIT("ioeventfd", IVShmemState
, features
, IVSHMEM_IOEVENTFD
,
1217 DEFINE_PROP_BIT("msi", IVShmemState
, features
, IVSHMEM_MSI
, true),
1218 DEFINE_PROP_STRING("shm", IVShmemState
, shmobj
),
1219 DEFINE_PROP_STRING("role", IVShmemState
, role
),
1220 DEFINE_PROP_UINT32("use64", IVShmemState
, not_legacy_32bit
, 1),
1221 DEFINE_PROP_END_OF_LIST(),
1224 static void desugar_shm(IVShmemState
*s
)
1229 obj
= object_new("memory-backend-file");
1230 path
= g_strdup_printf("/dev/shm/%s", s
->shmobj
);
1231 object_property_set_str(obj
, path
, "mem-path", &error_abort
);
1233 object_property_set_int(obj
, s
->legacy_size
, "size", &error_abort
);
1234 object_property_set_bool(obj
, true, "share", &error_abort
);
1235 object_property_add_child(OBJECT(s
), "internal-shm-backend", obj
,
1237 user_creatable_complete(obj
, &error_abort
);
1238 s
->hostmem
= MEMORY_BACKEND(obj
);
1241 static void ivshmem_realize(PCIDevice
*dev
, Error
**errp
)
1243 IVShmemState
*s
= IVSHMEM_COMMON(dev
);
1245 if (!qtest_enabled()) {
1246 error_report("ivshmem is deprecated, please use ivshmem-plain"
1247 " or ivshmem-doorbell instead");
1250 if (!!s
->server_chr
+ !!s
->shmobj
!= 1) {
1251 error_setg(errp
, "You must specify either 'shm' or 'chardev'");
1255 if (s
->sizearg
== NULL
) {
1256 s
->legacy_size
= 4 << 20; /* 4 MB default */
1259 int64_t size
= qemu_strtosz(s
->sizearg
, &end
);
1260 if (size
< 0 || (size_t)size
!= size
|| *end
!= '\0'
1261 || !is_power_of_2(size
)) {
1262 error_setg(errp
, "Invalid size %s", s
->sizearg
);
1265 s
->legacy_size
= size
;
1268 /* check that role is reasonable */
1270 if (strncmp(s
->role
, "peer", 5) == 0) {
1271 s
->master
= ON_OFF_AUTO_OFF
;
1272 } else if (strncmp(s
->role
, "master", 7) == 0) {
1273 s
->master
= ON_OFF_AUTO_ON
;
1275 error_setg(errp
, "'role' must be 'peer' or 'master'");
1279 s
->master
= ON_OFF_AUTO_AUTO
;
1287 * Note: we don't use INTx with IVSHMEM_MSI at all, so this is a
1288 * bald-faced lie then. But it's a backwards compatible lie.
1290 pci_config_set_interrupt_pin(dev
->config
, 1);
1292 ivshmem_common_realize(dev
, errp
);
1295 static void ivshmem_class_init(ObjectClass
*klass
, void *data
)
1297 DeviceClass
*dc
= DEVICE_CLASS(klass
);
1298 PCIDeviceClass
*k
= PCI_DEVICE_CLASS(klass
);
1300 k
->realize
= ivshmem_realize
;
1302 dc
->desc
= "Inter-VM shared memory (legacy)";
1303 dc
->props
= ivshmem_properties
;
1304 dc
->vmsd
= &ivshmem_vmsd
;
1307 static const TypeInfo ivshmem_info
= {
1308 .name
= TYPE_IVSHMEM
,
1309 .parent
= TYPE_IVSHMEM_COMMON
,
1310 .instance_size
= sizeof(IVShmemState
),
1311 .class_init
= ivshmem_class_init
,
1314 static void ivshmem_register_types(void)
1316 type_register_static(&ivshmem_common_info
);
1317 type_register_static(&ivshmem_plain_info
);
1318 type_register_static(&ivshmem_doorbell_info
);
1319 type_register_static(&ivshmem_info
);
1322 type_init(ivshmem_register_types
)