target-arm/helper-a64.c

   1 /*
   2  *  AArch64 specific helpers
   3  *
   4  *  Copyright (c) 2013 Alexander Graf <agraf@suse.de>
   5  *
   6  * This library is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU Lesser General Public
   8  * License as published by the Free Software Foundation; either
   9  * version 2 of the License, or (at your option) any later version.
  10  *
  11  * This library is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  * Lesser General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU Lesser General Public
  17  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  18  */
  19
  20 #include "cpu.h"
  21 #include "exec/gdbstub.h"
  22 #include "helper.h"
  23 #include "qemu/host-utils.h"
  24 #include "sysemu/sysemu.h"
  25 #include "qemu/bitops.h"
  26
  27 /* C2.4.7 Multiply and divide */
  28 /* special cases for 0 and LLONG_MIN are mandated by the standard */
  29 uint64_t HELPER(udiv64)(uint64_t num, uint64_t den)
  30 {
  31     if (den == 0) {
  32         return 0;
  33     }
  34     return num / den;
  35 }
  36
  37 int64_t HELPER(sdiv64)(int64_t num, int64_t den)
  38 {
  39     if (den == 0) {
  40         return 0;
  41     }
  42     if (num == LLONG_MIN && den == -1) {
  43         return LLONG_MIN;
  44     }
  45     return num / den;
  46 }
  47
  48 uint64_t HELPER(clz64)(uint64_t x)
  49 {
  50     return clz64(x);
  51 }
  52
  53 uint64_t HELPER(cls64)(uint64_t x)
  54 {
  55     return clrsb64(x);
  56 }
  57
  58 uint32_t HELPER(cls32)(uint32_t x)
  59 {
  60     return clrsb32(x);
  61 }
  62
  63 uint64_t HELPER(rbit64)(uint64_t x)
  64 {
  65     /* assign the correct byte position */
  66     x = bswap64(x);
  67
  68     /* assign the correct nibble position */
  69     x = ((x & 0xf0f0f0f0f0f0f0f0ULL) >> 4)
  70         | ((x & 0x0f0f0f0f0f0f0f0fULL) << 4);
  71
  72     /* assign the correct bit position */
  73     x = ((x & 0x8888888888888888ULL) >> 3)
  74         | ((x & 0x4444444444444444ULL) >> 1)
  75         | ((x & 0x2222222222222222ULL) << 1)
  76         | ((x & 0x1111111111111111ULL) << 3);
  77
  78     return x;
  79 }
  80
  81 /* Convert a softfloat float_relation_ (as returned by
  82  * the float*_compare functions) to the correct ARM
  83  * NZCV flag state.
  84  */
  85 static inline uint32_t float_rel_to_flags(int res)
  86 {
  87     uint64_t flags;
  88     switch (res) {
  89     case float_relation_equal:
  90         flags = PSTATE_Z | PSTATE_C;
  91         break;
  92     case float_relation_less:
  93         flags = PSTATE_N;
  94         break;
  95     case float_relation_greater:
  96         flags = PSTATE_C;
  97         break;
  98     case float_relation_unordered:
  99     default:
 100         flags = PSTATE_C | PSTATE_V;
 101         break;
 102     }
 103     return flags;
 104 }
 105
 106 uint64_t HELPER(vfp_cmps_a64)(float32 x, float32 y, void *fp_status)
 107 {
 108     return float_rel_to_flags(float32_compare_quiet(x, y, fp_status));
 109 }
 110
 111 uint64_t HELPER(vfp_cmpes_a64)(float32 x, float32 y, void *fp_status)
 112 {
 113     return float_rel_to_flags(float32_compare(x, y, fp_status));
 114 }
 115
 116 uint64_t HELPER(vfp_cmpd_a64)(float64 x, float64 y, void *fp_status)
 117 {
 118     return float_rel_to_flags(float64_compare_quiet(x, y, fp_status));
 119 }
 120
 121 uint64_t HELPER(vfp_cmped_a64)(float64 x, float64 y, void *fp_status)
 122 {
 123     return float_rel_to_flags(float64_compare(x, y, fp_status));
 124 }
 125
 126 uint64_t HELPER(simd_tbl)(CPUARMState *env, uint64_t result, uint64_t indices,
 127                           uint32_t rn, uint32_t numregs)
 128 {
 129     /* Helper function for SIMD TBL and TBX. We have to do the table
 130      * lookup part for the 64 bits worth of indices we're passed in.
 131      * result is the initial results vector (either zeroes for TBL
 132      * or some guest values for TBX), rn the register number where
 133      * the table starts, and numregs the number of registers in the table.
 134      * We return the results of the lookups.
 135      */
 136     int shift;
 137
 138     for (shift = 0; shift < 64; shift += 8) {
 139         int index = extract64(indices, shift, 8);
 140         if (index < 16 * numregs) {
 141             /* Convert index (a byte offset into the virtual table
 142              * which is a series of 128-bit vectors concatenated)
 143              * into the correct vfp.regs[] element plus a bit offset
 144              * into that element, bearing in mind that the table
 145              * can wrap around from V31 to V0.
 146              */
 147             int elt = (rn * 2 + (index >> 3)) % 64;
 148             int bitidx = (index & 7) * 8;
 149             uint64_t val = extract64(env->vfp.regs[elt], bitidx, 8);
 150
 151             result = deposit64(result, shift, 8, val);
 152         }
 153     }
 154     return result;
 155 }