include/hw/misc/mps2-fpgaio.h

   1 /*
   2  * ARM MPS2 FPGAIO emulation
   3  *
   4  * Copyright (c) 2018 Linaro Limited
   5  * Written by Peter Maydell
   6  *
   7  *  This program is free software; you can redistribute it and/or modify
   8  *  it under the terms of the GNU General Public License version 2 or
   9  *  (at your option) any later version.
  10  */
  11
  12 /* This is a model of the FPGAIO register block in the AN505
  13  * FPGA image for the MPS2 dev board; it is documented in the
  14  * application note:
  15  * http://infocenter.arm.com/help/topic/com.arm.doc.dai0505b/index.html
  16  *
  17  * QEMU interface:
  18  *  + sysbus MMIO region 0: the register bank
  19  */
  20
  21 #ifndef MPS2_FPGAIO_H
  22 #define MPS2_FPGAIO_H
  23
  24 #include "hw/sysbus.h"
  25
  26 #define TYPE_MPS2_FPGAIO "mps2-fpgaio"
  27 #define MPS2_FPGAIO(obj) OBJECT_CHECK(MPS2FPGAIO, (obj), TYPE_MPS2_FPGAIO)
  28
  29 typedef struct {
  30     /*< private >*/
  31     SysBusDevice parent_obj;
  32
  33     /*< public >*/
  34     MemoryRegion iomem;
  35
  36     uint32_t led0;
  37     uint32_t prescale;
  38     uint32_t misc;
  39
  40     /* QEMU_CLOCK_VIRTUAL time at which counter and pscntr were last synced */
  41     int64_t pscntr_sync_ticks;
  42     /* Values of COUNTER and PSCNTR at time pscntr_sync_ticks */
  43     uint32_t counter;
  44     uint32_t pscntr;
  45
  46     uint32_t prescale_clk;
  47
  48     /* These hold the CLOCK_VIRTUAL ns tick when the CLK1HZ/CLK100HZ was zero */
  49     int64_t clk1hz_tick_offset;
  50     int64_t clk100hz_tick_offset;
  51 } MPS2FPGAIO;
  52
  53 #endif