switch vmware_vga to pci vgabios
[qemu/ar7.git] / hw / fw_cfg.c
blob72866aea95aca4de6b6d3ec906e56a131d09862c
1 /*
2 * QEMU Firmware configuration device emulation
4 * Copyright (c) 2008 Gleb Natapov
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
24 #include "hw.h"
25 #include "sysemu.h"
26 #include "isa.h"
27 #include "fw_cfg.h"
28 #include "sysbus.h"
30 /* debug firmware config */
31 //#define DEBUG_FW_CFG
33 #ifdef DEBUG_FW_CFG
34 #define FW_CFG_DPRINTF(fmt, ...) \
35 do { printf("FW_CFG: " fmt , ## __VA_ARGS__); } while (0)
36 #else
37 #define FW_CFG_DPRINTF(fmt, ...)
38 #endif
40 #define FW_CFG_SIZE 2
42 typedef struct FWCfgEntry {
43 uint32_t len;
44 uint8_t *data;
45 void *callback_opaque;
46 FWCfgCallback callback;
47 } FWCfgEntry;
49 struct FWCfgState {
50 SysBusDevice busdev;
51 uint32_t ctl_iobase, data_iobase;
52 FWCfgEntry entries[2][FW_CFG_MAX_ENTRY];
53 FWCfgFiles *files;
54 uint16_t cur_entry;
55 uint32_t cur_offset;
58 static void fw_cfg_write(FWCfgState *s, uint8_t value)
60 int arch = !!(s->cur_entry & FW_CFG_ARCH_LOCAL);
61 FWCfgEntry *e = &s->entries[arch][s->cur_entry & FW_CFG_ENTRY_MASK];
63 FW_CFG_DPRINTF("write %d\n", value);
65 if (s->cur_entry & FW_CFG_WRITE_CHANNEL && s->cur_offset < e->len) {
66 e->data[s->cur_offset++] = value;
67 if (s->cur_offset == e->len) {
68 e->callback(e->callback_opaque, e->data);
69 s->cur_offset = 0;
74 static int fw_cfg_select(FWCfgState *s, uint16_t key)
76 int ret;
78 s->cur_offset = 0;
79 if ((key & FW_CFG_ENTRY_MASK) >= FW_CFG_MAX_ENTRY) {
80 s->cur_entry = FW_CFG_INVALID;
81 ret = 0;
82 } else {
83 s->cur_entry = key;
84 ret = 1;
87 FW_CFG_DPRINTF("select key %d (%sfound)\n", key, ret ? "" : "not ");
89 return ret;
92 static uint8_t fw_cfg_read(FWCfgState *s)
94 int arch = !!(s->cur_entry & FW_CFG_ARCH_LOCAL);
95 FWCfgEntry *e = &s->entries[arch][s->cur_entry & FW_CFG_ENTRY_MASK];
96 uint8_t ret;
98 if (s->cur_entry == FW_CFG_INVALID || !e->data || s->cur_offset >= e->len)
99 ret = 0;
100 else
101 ret = e->data[s->cur_offset++];
103 FW_CFG_DPRINTF("read %d\n", ret);
105 return ret;
108 static uint32_t fw_cfg_io_readb(void *opaque, uint32_t addr)
110 return fw_cfg_read(opaque);
113 static void fw_cfg_io_writeb(void *opaque, uint32_t addr, uint32_t value)
115 fw_cfg_write(opaque, (uint8_t)value);
118 static void fw_cfg_io_writew(void *opaque, uint32_t addr, uint32_t value)
120 fw_cfg_select(opaque, (uint16_t)value);
123 static uint32_t fw_cfg_mem_readb(void *opaque, target_phys_addr_t addr)
125 return fw_cfg_read(opaque);
128 static void fw_cfg_mem_writeb(void *opaque, target_phys_addr_t addr,
129 uint32_t value)
131 fw_cfg_write(opaque, (uint8_t)value);
134 static void fw_cfg_mem_writew(void *opaque, target_phys_addr_t addr,
135 uint32_t value)
137 fw_cfg_select(opaque, (uint16_t)value);
140 static CPUReadMemoryFunc * const fw_cfg_ctl_mem_read[3] = {
141 NULL,
142 NULL,
143 NULL,
146 static CPUWriteMemoryFunc * const fw_cfg_ctl_mem_write[3] = {
147 NULL,
148 fw_cfg_mem_writew,
149 NULL,
152 static CPUReadMemoryFunc * const fw_cfg_data_mem_read[3] = {
153 fw_cfg_mem_readb,
154 NULL,
155 NULL,
158 static CPUWriteMemoryFunc * const fw_cfg_data_mem_write[3] = {
159 fw_cfg_mem_writeb,
160 NULL,
161 NULL,
164 static void fw_cfg_reset(DeviceState *d)
166 FWCfgState *s = DO_UPCAST(FWCfgState, busdev.qdev, d);
168 fw_cfg_select(s, 0);
171 /* Save restore 32 bit int as uint16_t
172 This is a Big hack, but it is how the old state did it.
173 Or we broke compatibility in the state, or we can't use struct tm
176 static int get_uint32_as_uint16(QEMUFile *f, void *pv, size_t size)
178 uint32_t *v = pv;
179 *v = qemu_get_be16(f);
180 return 0;
183 static void put_unused(QEMUFile *f, void *pv, size_t size)
185 fprintf(stderr, "uint32_as_uint16 is only used for backward compatibility.\n");
186 fprintf(stderr, "This functions shouldn't be called.\n");
189 static const VMStateInfo vmstate_hack_uint32_as_uint16 = {
190 .name = "int32_as_uint16",
191 .get = get_uint32_as_uint16,
192 .put = put_unused,
195 #define VMSTATE_UINT16_HACK(_f, _s, _t) \
196 VMSTATE_SINGLE_TEST(_f, _s, _t, 0, vmstate_hack_uint32_as_uint16, uint32_t)
199 static bool is_version_1(void *opaque, int version_id)
201 return version_id == 1;
204 static const VMStateDescription vmstate_fw_cfg = {
205 .name = "fw_cfg",
206 .version_id = 2,
207 .minimum_version_id = 1,
208 .minimum_version_id_old = 1,
209 .fields = (VMStateField []) {
210 VMSTATE_UINT16(cur_entry, FWCfgState),
211 VMSTATE_UINT16_HACK(cur_offset, FWCfgState, is_version_1),
212 VMSTATE_UINT32_V(cur_offset, FWCfgState, 2),
213 VMSTATE_END_OF_LIST()
217 int fw_cfg_add_bytes(FWCfgState *s, uint16_t key, uint8_t *data, uint32_t len)
219 int arch = !!(key & FW_CFG_ARCH_LOCAL);
221 key &= FW_CFG_ENTRY_MASK;
223 if (key >= FW_CFG_MAX_ENTRY)
224 return 0;
226 s->entries[arch][key].data = data;
227 s->entries[arch][key].len = len;
229 return 1;
232 int fw_cfg_add_i16(FWCfgState *s, uint16_t key, uint16_t value)
234 uint16_t *copy;
236 copy = qemu_malloc(sizeof(value));
237 *copy = cpu_to_le16(value);
238 return fw_cfg_add_bytes(s, key, (uint8_t *)copy, sizeof(value));
241 int fw_cfg_add_i32(FWCfgState *s, uint16_t key, uint32_t value)
243 uint32_t *copy;
245 copy = qemu_malloc(sizeof(value));
246 *copy = cpu_to_le32(value);
247 return fw_cfg_add_bytes(s, key, (uint8_t *)copy, sizeof(value));
250 int fw_cfg_add_i64(FWCfgState *s, uint16_t key, uint64_t value)
252 uint64_t *copy;
254 copy = qemu_malloc(sizeof(value));
255 *copy = cpu_to_le64(value);
256 return fw_cfg_add_bytes(s, key, (uint8_t *)copy, sizeof(value));
259 int fw_cfg_add_callback(FWCfgState *s, uint16_t key, FWCfgCallback callback,
260 void *callback_opaque, uint8_t *data, size_t len)
262 int arch = !!(key & FW_CFG_ARCH_LOCAL);
264 if (!(key & FW_CFG_WRITE_CHANNEL))
265 return 0;
267 key &= FW_CFG_ENTRY_MASK;
269 if (key >= FW_CFG_MAX_ENTRY || len > 65535)
270 return 0;
272 s->entries[arch][key].data = data;
273 s->entries[arch][key].len = len;
274 s->entries[arch][key].callback_opaque = callback_opaque;
275 s->entries[arch][key].callback = callback;
277 return 1;
280 int fw_cfg_add_file(FWCfgState *s, const char *dir, const char *filename,
281 uint8_t *data, uint32_t len)
283 const char *basename;
284 int i, index;
286 if (!s->files) {
287 int dsize = sizeof(uint32_t) + sizeof(FWCfgFile) * FW_CFG_FILE_SLOTS;
288 s->files = qemu_mallocz(dsize);
289 fw_cfg_add_bytes(s, FW_CFG_FILE_DIR, (uint8_t*)s->files, dsize);
292 index = be32_to_cpu(s->files->count);
293 if (index == FW_CFG_FILE_SLOTS) {
294 fprintf(stderr, "fw_cfg: out of file slots\n");
295 return 0;
298 fw_cfg_add_bytes(s, FW_CFG_FILE_FIRST + index, data, len);
300 basename = strrchr(filename, '/');
301 if (basename) {
302 basename++;
303 } else {
304 basename = filename;
307 snprintf(s->files->f[index].name, sizeof(s->files->f[index].name),
308 "%s/%s", dir, basename);
309 for (i = 0; i < index; i++) {
310 if (strcmp(s->files->f[index].name, s->files->f[i].name) == 0) {
311 FW_CFG_DPRINTF("%s: skip duplicate: %s\n", __FUNCTION__,
312 s->files->f[index].name);
313 return 1;
317 s->files->f[index].size = cpu_to_be32(len);
318 s->files->f[index].select = cpu_to_be16(FW_CFG_FILE_FIRST + index);
319 FW_CFG_DPRINTF("%s: #%d: %s (%d bytes)\n", __FUNCTION__,
320 index, s->files->f[index].name, len);
322 s->files->count = cpu_to_be32(index+1);
323 return 1;
326 FWCfgState *fw_cfg_init(uint32_t ctl_port, uint32_t data_port,
327 target_phys_addr_t ctl_addr, target_phys_addr_t data_addr)
329 DeviceState *dev;
330 SysBusDevice *d;
331 FWCfgState *s;
333 dev = qdev_create(NULL, "fw_cfg");
334 qdev_prop_set_uint32(dev, "ctl_iobase", ctl_port);
335 qdev_prop_set_uint32(dev, "data_iobase", data_port);
336 qdev_init_nofail(dev);
337 d = sysbus_from_qdev(dev);
339 s = DO_UPCAST(FWCfgState, busdev.qdev, dev);
341 if (ctl_addr) {
342 sysbus_mmio_map(d, 0, ctl_addr);
344 if (data_addr) {
345 sysbus_mmio_map(d, 1, data_addr);
347 fw_cfg_add_bytes(s, FW_CFG_SIGNATURE, (uint8_t *)"QEMU", 4);
348 fw_cfg_add_bytes(s, FW_CFG_UUID, qemu_uuid, 16);
349 fw_cfg_add_i16(s, FW_CFG_NOGRAPHIC, (uint16_t)(display_type == DT_NOGRAPHIC));
350 fw_cfg_add_i16(s, FW_CFG_NB_CPUS, (uint16_t)smp_cpus);
351 fw_cfg_add_i16(s, FW_CFG_MAX_CPUS, (uint16_t)max_cpus);
352 fw_cfg_add_i16(s, FW_CFG_BOOT_MENU, (uint16_t)boot_menu);
354 return s;
357 static int fw_cfg_init1(SysBusDevice *dev)
359 FWCfgState *s = FROM_SYSBUS(FWCfgState, dev);
360 int io_ctl_memory, io_data_memory;
362 io_ctl_memory = cpu_register_io_memory(fw_cfg_ctl_mem_read,
363 fw_cfg_ctl_mem_write, s);
364 sysbus_init_mmio(dev, FW_CFG_SIZE, io_ctl_memory);
366 io_data_memory = cpu_register_io_memory(fw_cfg_data_mem_read,
367 fw_cfg_data_mem_write, s);
368 sysbus_init_mmio(dev, FW_CFG_SIZE, io_data_memory);
370 if (s->ctl_iobase) {
371 register_ioport_write(s->ctl_iobase, 2, 2, fw_cfg_io_writew, s);
373 if (s->data_iobase) {
374 register_ioport_read(s->data_iobase, 1, 1, fw_cfg_io_readb, s);
375 register_ioport_write(s->data_iobase, 1, 1, fw_cfg_io_writeb, s);
377 return 0;
380 static SysBusDeviceInfo fw_cfg_info = {
381 .init = fw_cfg_init1,
382 .qdev.name = "fw_cfg",
383 .qdev.size = sizeof(FWCfgState),
384 .qdev.vmsd = &vmstate_fw_cfg,
385 .qdev.reset = fw_cfg_reset,
386 .qdev.no_user = 1,
387 .qdev.props = (Property[]) {
388 DEFINE_PROP_HEX32("ctl_iobase", FWCfgState, ctl_iobase, -1),
389 DEFINE_PROP_HEX32("data_iobase", FWCfgState, data_iobase, -1),
390 DEFINE_PROP_END_OF_LIST(),
394 static void fw_cfg_register_devices(void)
396 sysbus_register_withprop(&fw_cfg_info);
399 device_init(fw_cfg_register_devices)