target/arm: Add a timer to predict PMU counter overflow
[qemu/ar7.git] / target / xtensa / win_helper.c
blob7d793d4f9cff1486ee4e97c1496ecd3e73cdfd87
1 /*
2 * Copyright (c) 2011 - 2019, Max Filippov, Open Source and Linux Lab.
3 * All rights reserved.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are met:
7 * * Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * * Redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution.
12 * * Neither the name of the Open Source and Linux Lab nor the
13 * names of its contributors may be used to endorse or promote products
14 * derived from this software without specific prior written permission.
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
17 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
20 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
21 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
23 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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25 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 #include "qemu/osdep.h"
29 #include "qemu/main-loop.h"
30 #include "cpu.h"
31 #include "exec/helper-proto.h"
32 #include "qemu/host-utils.h"
33 #include "exec/exec-all.h"
35 static void copy_window_from_phys(CPUXtensaState *env,
36 uint32_t window, uint32_t phys, uint32_t n)
38 assert(phys < env->config->nareg);
39 if (phys + n <= env->config->nareg) {
40 memcpy(env->regs + window, env->phys_regs + phys,
41 n * sizeof(uint32_t));
42 } else {
43 uint32_t n1 = env->config->nareg - phys;
44 memcpy(env->regs + window, env->phys_regs + phys,
45 n1 * sizeof(uint32_t));
46 memcpy(env->regs + window + n1, env->phys_regs,
47 (n - n1) * sizeof(uint32_t));
51 static void copy_phys_from_window(CPUXtensaState *env,
52 uint32_t phys, uint32_t window, uint32_t n)
54 assert(phys < env->config->nareg);
55 if (phys + n <= env->config->nareg) {
56 memcpy(env->phys_regs + phys, env->regs + window,
57 n * sizeof(uint32_t));
58 } else {
59 uint32_t n1 = env->config->nareg - phys;
60 memcpy(env->phys_regs + phys, env->regs + window,
61 n1 * sizeof(uint32_t));
62 memcpy(env->phys_regs, env->regs + window + n1,
63 (n - n1) * sizeof(uint32_t));
67 static inline unsigned windowbase_bound(unsigned a, const CPUXtensaState *env)
69 return a & (env->config->nareg / 4 - 1);
72 static inline unsigned windowstart_bit(unsigned a, const CPUXtensaState *env)
74 return 1 << windowbase_bound(a, env);
77 void xtensa_sync_window_from_phys(CPUXtensaState *env)
79 copy_window_from_phys(env, 0, env->sregs[WINDOW_BASE] * 4, 16);
82 void xtensa_sync_phys_from_window(CPUXtensaState *env)
84 copy_phys_from_window(env, env->sregs[WINDOW_BASE] * 4, 0, 16);
87 static void xtensa_rotate_window_abs(CPUXtensaState *env, uint32_t position)
89 xtensa_sync_phys_from_window(env);
90 env->sregs[WINDOW_BASE] = windowbase_bound(position, env);
91 xtensa_sync_window_from_phys(env);
94 void xtensa_rotate_window(CPUXtensaState *env, uint32_t delta)
96 xtensa_rotate_window_abs(env, env->sregs[WINDOW_BASE] + delta);
99 void HELPER(wsr_windowbase)(CPUXtensaState *env, uint32_t v)
101 xtensa_rotate_window_abs(env, v);
104 void HELPER(entry)(CPUXtensaState *env, uint32_t pc, uint32_t s, uint32_t imm)
106 int callinc = (env->sregs[PS] & PS_CALLINC) >> PS_CALLINC_SHIFT;
108 env->regs[(callinc << 2) | (s & 3)] = env->regs[s] - imm;
109 xtensa_rotate_window(env, callinc);
110 env->sregs[WINDOW_START] |=
111 windowstart_bit(env->sregs[WINDOW_BASE], env);
114 void HELPER(window_check)(CPUXtensaState *env, uint32_t pc, uint32_t w)
116 uint32_t windowbase = windowbase_bound(env->sregs[WINDOW_BASE], env);
117 uint32_t windowstart = xtensa_replicate_windowstart(env) >>
118 (env->sregs[WINDOW_BASE] + 1);
119 uint32_t n = ctz32(windowstart) + 1;
121 assert(n <= w);
123 xtensa_rotate_window(env, n);
124 env->sregs[PS] = (env->sregs[PS] & ~PS_OWB) |
125 (windowbase << PS_OWB_SHIFT) | PS_EXCM;
126 env->sregs[EPC1] = env->pc = pc;
128 switch (ctz32(windowstart >> n)) {
129 case 0:
130 HELPER(exception)(env, EXC_WINDOW_OVERFLOW4);
131 break;
132 case 1:
133 HELPER(exception)(env, EXC_WINDOW_OVERFLOW8);
134 break;
135 default:
136 HELPER(exception)(env, EXC_WINDOW_OVERFLOW12);
137 break;
141 void HELPER(test_ill_retw)(CPUXtensaState *env, uint32_t pc)
143 int n = (env->regs[0] >> 30) & 0x3;
144 int m = 0;
145 uint32_t windowbase = windowbase_bound(env->sregs[WINDOW_BASE], env);
146 uint32_t windowstart = env->sregs[WINDOW_START];
148 if (windowstart & windowstart_bit(windowbase - 1, env)) {
149 m = 1;
150 } else if (windowstart & windowstart_bit(windowbase - 2, env)) {
151 m = 2;
152 } else if (windowstart & windowstart_bit(windowbase - 3, env)) {
153 m = 3;
156 if (n == 0 || (m != 0 && m != n)) {
157 qemu_log_mask(LOG_GUEST_ERROR, "Illegal retw instruction(pc = %08x), "
158 "PS = %08x, m = %d, n = %d\n",
159 pc, env->sregs[PS], m, n);
160 HELPER(exception_cause)(env, pc, ILLEGAL_INSTRUCTION_CAUSE);
164 void HELPER(test_underflow_retw)(CPUXtensaState *env, uint32_t pc)
166 int n = (env->regs[0] >> 30) & 0x3;
168 if (!(env->sregs[WINDOW_START] &
169 windowstart_bit(env->sregs[WINDOW_BASE] - n, env))) {
170 uint32_t windowbase = windowbase_bound(env->sregs[WINDOW_BASE], env);
172 xtensa_rotate_window(env, -n);
173 /* window underflow */
174 env->sregs[PS] = (env->sregs[PS] & ~PS_OWB) |
175 (windowbase << PS_OWB_SHIFT) | PS_EXCM;
176 env->sregs[EPC1] = env->pc = pc;
178 if (n == 1) {
179 HELPER(exception)(env, EXC_WINDOW_UNDERFLOW4);
180 } else if (n == 2) {
181 HELPER(exception)(env, EXC_WINDOW_UNDERFLOW8);
182 } else if (n == 3) {
183 HELPER(exception)(env, EXC_WINDOW_UNDERFLOW12);
188 uint32_t HELPER(retw)(CPUXtensaState *env, uint32_t pc)
190 int n = (env->regs[0] >> 30) & 0x3;
191 uint32_t windowbase = windowbase_bound(env->sregs[WINDOW_BASE], env);
192 uint32_t ret_pc = (pc & 0xc0000000) | (env->regs[0] & 0x3fffffff);
194 xtensa_rotate_window(env, -n);
195 env->sregs[WINDOW_START] &= ~windowstart_bit(windowbase, env);
196 return ret_pc;
199 void HELPER(rotw)(CPUXtensaState *env, uint32_t imm4)
201 xtensa_rotate_window(env, imm4);
204 void xtensa_restore_owb(CPUXtensaState *env)
206 xtensa_rotate_window_abs(env, (env->sregs[PS] & PS_OWB) >> PS_OWB_SHIFT);
209 void HELPER(restore_owb)(CPUXtensaState *env)
211 xtensa_restore_owb(env);
214 void HELPER(movsp)(CPUXtensaState *env, uint32_t pc)
216 if ((env->sregs[WINDOW_START] &
217 (windowstart_bit(env->sregs[WINDOW_BASE] - 3, env) |
218 windowstart_bit(env->sregs[WINDOW_BASE] - 2, env) |
219 windowstart_bit(env->sregs[WINDOW_BASE] - 1, env))) == 0) {
220 HELPER(exception_cause)(env, pc, ALLOCA_CAUSE);