target/xtensa/gdbstub.c

   1 /*
   2  * Xtensa gdb server stub
   3  *
   4  * Copyright (c) 2003-2005 Fabrice Bellard
   5  * Copyright (c) 2013 SUSE LINUX Products GmbH
   6  *
   7  * This library is free software; you can redistribute it and/or
   8  * modify it under the terms of the GNU Lesser General Public
   9  * License as published by the Free Software Foundation; either
  10  * version 2 of the License, or (at your option) any later version.
  11  *
  12  * This library is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  15  * Lesser General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU Lesser General Public
  18  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  19  */
  20 #include "qemu/osdep.h"
  21 #include "qemu-common.h"
  22 #include "cpu.h"
  23 #include "exec/gdbstub.h"
  24 #include "qemu/log.h"
  25
  26 enum {
  27   xtRegisterTypeArRegfile = 1,  /* Register File ar0..arXX.  */
  28   xtRegisterTypeSpecialReg,     /* CPU states, such as PS, Booleans, (rsr).  */
  29   xtRegisterTypeUserReg,        /* User defined registers (rur).  */
  30   xtRegisterTypeTieRegfile,     /* User define register files.  */
  31   xtRegisterTypeTieState,       /* TIE States (mapped on user regs).  */
  32   xtRegisterTypeMapped,         /* Mapped on Special Registers.  */
  33   xtRegisterTypeUnmapped,       /* Special case of masked registers.  */
  34   xtRegisterTypeWindow,         /* Live window registers (a0..a15).  */
  35   xtRegisterTypeVirtual,        /* PC, FP.  */
  36   xtRegisterTypeUnknown
  37 };
  38
  39 #define XTENSA_REGISTER_FLAGS_PRIVILEGED        0x0001
  40 #define XTENSA_REGISTER_FLAGS_READABLE          0x0002
  41 #define XTENSA_REGISTER_FLAGS_WRITABLE          0x0004
  42 #define XTENSA_REGISTER_FLAGS_VOLATILE          0x0008
  43
  44 void xtensa_count_regs(const XtensaConfig *config,
  45                        unsigned *n_regs, unsigned *n_core_regs)
  46 {
  47     unsigned i;
  48     bool count_core_regs = true;
  49
  50     for (i = 0; config->gdb_regmap.reg[i].targno >= 0; ++i) {
  51         if (config->gdb_regmap.reg[i].type != xtRegisterTypeTieState &&
  52             config->gdb_regmap.reg[i].type != xtRegisterTypeMapped &&
  53             config->gdb_regmap.reg[i].type != xtRegisterTypeUnmapped) {
  54             ++*n_regs;
  55             if (count_core_regs) {
  56                 if ((config->gdb_regmap.reg[i].flags &
  57                      XTENSA_REGISTER_FLAGS_PRIVILEGED) == 0) {
  58                     ++*n_core_regs;
  59                 } else {
  60                     count_core_regs = false;
  61                 }
  62             }
  63         }
  64     }
  65 }
  66
  67 int xtensa_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n)
  68 {
  69     XtensaCPU *cpu = XTENSA_CPU(cs);
  70     CPUXtensaState *env = &cpu->env;
  71     const XtensaGdbReg *reg = env->config->gdb_regmap.reg + n;
  72 #ifdef CONFIG_USER_ONLY
  73     int num_regs = env->config->gdb_regmap.num_core_regs;
  74 #else
  75     int num_regs = env->config->gdb_regmap.num_regs;
  76 #endif
  77     unsigned i;
  78
  79     if (n < 0 || n >= num_regs) {
  80         return 0;
  81     }
  82
  83     switch (reg->type) {
  84     case xtRegisterTypeVirtual: /*pc*/
  85         return gdb_get_reg32(mem_buf, env->pc);
  86
  87     case xtRegisterTypeArRegfile: /*ar*/
  88         xtensa_sync_phys_from_window(env);
  89         return gdb_get_reg32(mem_buf, env->phys_regs[(reg->targno & 0xff)
  90                                                      % env->config->nareg]);
  91
  92     case xtRegisterTypeSpecialReg: /*SR*/
  93         return gdb_get_reg32(mem_buf, env->sregs[reg->targno & 0xff]);
  94
  95     case xtRegisterTypeUserReg: /*UR*/
  96         return gdb_get_reg32(mem_buf, env->uregs[reg->targno & 0xff]);
  97
  98     case xtRegisterTypeTieRegfile: /*f*/
  99         i = reg->targno & 0x0f;
 100         switch (reg->size) {
 101         case 4:
 102             return gdb_get_reg32(mem_buf,
 103                                  float32_val(env->fregs[i].f32[FP_F32_LOW]));
 104         case 8:
 105             return gdb_get_reg64(mem_buf, float64_val(env->fregs[i].f64));
 106         default:
 107             qemu_log_mask(LOG_UNIMP, "%s from reg %d of unsupported size %d\n",
 108                           __func__, n, reg->size);
 109             memset(mem_buf, 0, reg->size);
 110             return reg->size;
 111         }
 112
 113     case xtRegisterTypeWindow: /*a*/
 114         return gdb_get_reg32(mem_buf, env->regs[reg->targno & 0x0f]);
 115
 116     default:
 117         qemu_log_mask(LOG_UNIMP, "%s from reg %d of unsupported type %d\n",
 118                       __func__, n, reg->type);
 119         memset(mem_buf, 0, reg->size);
 120         return reg->size;
 121     }
 122 }
 123
 124 int xtensa_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
 125 {
 126     XtensaCPU *cpu = XTENSA_CPU(cs);
 127     CPUXtensaState *env = &cpu->env;
 128     uint32_t tmp;
 129     const XtensaGdbReg *reg = env->config->gdb_regmap.reg + n;
 130 #ifdef CONFIG_USER_ONLY
 131     int num_regs = env->config->gdb_regmap.num_core_regs;
 132 #else
 133     int num_regs = env->config->gdb_regmap.num_regs;
 134 #endif
 135
 136     if (n < 0 || n >= num_regs) {
 137         return 0;
 138     }
 139
 140     tmp = ldl_p(mem_buf);
 141
 142     switch (reg->type) {
 143     case xtRegisterTypeVirtual: /*pc*/
 144         env->pc = tmp;
 145         break;
 146
 147     case xtRegisterTypeArRegfile: /*ar*/
 148         env->phys_regs[(reg->targno & 0xff) % env->config->nareg] = tmp;
 149         xtensa_sync_window_from_phys(env);
 150         break;
 151
 152     case xtRegisterTypeSpecialReg: /*SR*/
 153         env->sregs[reg->targno & 0xff] = tmp;
 154         break;
 155
 156     case xtRegisterTypeUserReg: /*UR*/
 157         env->uregs[reg->targno & 0xff] = tmp;
 158         break;
 159
 160     case xtRegisterTypeTieRegfile: /*f*/
 161         switch (reg->size) {
 162         case 4:
 163             env->fregs[reg->targno & 0x0f].f32[FP_F32_LOW] = make_float32(tmp);
 164             return 4;
 165         case 8:
 166             env->fregs[reg->targno & 0x0f].f64 = make_float64(tmp);
 167             return 8;
 168         default:
 169             qemu_log_mask(LOG_UNIMP, "%s to reg %d of unsupported size %d\n",
 170                           __func__, n, reg->size);
 171             return reg->size;
 172         }
 173
 174     case xtRegisterTypeWindow: /*a*/
 175         env->regs[reg->targno & 0x0f] = tmp;
 176         break;
 177
 178     default:
 179         qemu_log_mask(LOG_UNIMP, "%s to reg %d of unsupported type %d\n",
 180                       __func__, n, reg->type);
 181         return reg->size;
 182     }
 183
 184     return 4;
 185 }