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[qemu/ar7.git] / include / hw / misc / auxbus.h
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1 /*
2 * auxbus.h
4 * Copyright (C)2014 : GreenSocs Ltd
5 * http://www.greensocs.com/ , email: info@greensocs.com
7 * Developed by :
8 * Frederic Konrad <fred.konrad@greensocs.com>
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation, either version 2 of the License, or
13 * (at your option)any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License along
21 * with this program; if not, see <http://www.gnu.org/licenses/>.
25 #ifndef HW_MISC_AUXBUS_H
26 #define HW_MISC_AUXBUS_H
28 #include "exec/memory.h"
29 #include "hw/qdev-core.h"
30 #include "qom/object.h"
32 typedef struct AUXSlave AUXSlave;
33 typedef enum AUXCommand AUXCommand;
34 typedef enum AUXReply AUXReply;
36 #define TYPE_AUXTOI2C "aux-to-i2c-bridge"
37 OBJECT_DECLARE_SIMPLE_TYPE(AUXTOI2CState, AUXTOI2C)
39 enum AUXCommand {
40 WRITE_I2C = 0,
41 READ_I2C = 1,
42 WRITE_I2C_STATUS = 2,
43 WRITE_I2C_MOT = 4,
44 READ_I2C_MOT = 5,
45 WRITE_AUX = 8,
46 READ_AUX = 9
49 enum AUXReply {
50 AUX_I2C_ACK = 0,
51 AUX_NACK = 1,
52 AUX_DEFER = 2,
53 AUX_I2C_NACK = 4,
54 AUX_I2C_DEFER = 8
57 #define TYPE_AUX_BUS "aux-bus"
58 OBJECT_DECLARE_SIMPLE_TYPE(AUXBus, AUX_BUS)
60 struct AUXBus {
61 /* < private > */
62 BusState qbus;
64 /* < public > */
65 AUXSlave *current_dev;
66 AUXSlave *dev;
67 uint32_t last_i2c_address;
68 AUXCommand last_transaction;
70 AUXTOI2CState *bridge;
72 MemoryRegion *aux_io;
73 AddressSpace aux_addr_space;
76 #define TYPE_AUX_SLAVE "aux-slave"
77 OBJECT_DECLARE_SIMPLE_TYPE(AUXSlave, AUX_SLAVE)
79 struct AUXSlave {
80 /* < private > */
81 DeviceState parent_obj;
83 /* < public > */
84 MemoryRegion *mmio;
87 /**
88 * aux_bus_init: Initialize an AUX bus.
90 * Returns the new AUX bus created.
92 * @parent The device where this bus is located.
93 * @name The name of the bus.
95 AUXBus *aux_bus_init(DeviceState *parent, const char *name);
97 /**
98 * aux_bus_realize: Realize an AUX bus.
100 * @bus: The AUX bus.
102 void aux_bus_realize(AUXBus *bus);
105 * aux_request: Make a request on the bus.
107 * Returns the reply of the request.
109 * @bus Ths bus where the request happen.
110 * @cmd The command requested.
111 * @address The 20bits address of the slave.
112 * @len The length of the read or write.
113 * @data The data array which will be filled or read during transfer.
115 AUXReply aux_request(AUXBus *bus, AUXCommand cmd, uint32_t address,
116 uint8_t len, uint8_t *data);
119 * aux_get_i2c_bus: Get the i2c bus for I2C over AUX command.
121 * Returns the i2c bus associated to this AUX bus.
123 * @bus The AUX bus.
125 I2CBus *aux_get_i2c_bus(AUXBus *bus);
128 * aux_init_mmio: Init an mmio for an AUX slave.
130 * @aux_slave The AUX slave.
131 * @mmio The mmio to be registered.
133 void aux_init_mmio(AUXSlave *aux_slave, MemoryRegion *mmio);
135 /* aux_map_slave: Map the mmio for an AUX slave on the bus.
137 * @dev The AUX slave.
138 * @addr The address for the slave's mmio.
140 void aux_map_slave(AUXSlave *dev, hwaddr addr);
142 #endif /* HW_MISC_AUXBUS_H */