s390x/pci: refactor list_pci
[qemu/ar7.git] / hw / s390x / s390-pci-bus.c
blobf930b04e995b0ac5fcc542ec152317eede4de8b3
1 /*
2 * s390 PCI BUS
4 * Copyright 2014 IBM Corp.
5 * Author(s): Frank Blaschka <frank.blaschka@de.ibm.com>
6 * Hong Bo Li <lihbbj@cn.ibm.com>
7 * Yi Min Zhao <zyimin@cn.ibm.com>
9 * This work is licensed under the terms of the GNU GPL, version 2 or (at
10 * your option) any later version. See the COPYING file in the top-level
11 * directory.
14 #include "qemu/osdep.h"
15 #include "qapi/error.h"
16 #include "qapi/visitor.h"
17 #include "qemu-common.h"
18 #include "cpu.h"
19 #include "s390-pci-bus.h"
20 #include "s390-pci-inst.h"
21 #include <hw/pci/pci_bus.h>
22 #include <hw/pci/msi.h>
23 #include <qemu/error-report.h>
25 /* #define DEBUG_S390PCI_BUS */
26 #ifdef DEBUG_S390PCI_BUS
27 #define DPRINTF(fmt, ...) \
28 do { fprintf(stderr, "S390pci-bus: " fmt, ## __VA_ARGS__); } while (0)
29 #else
30 #define DPRINTF(fmt, ...) \
31 do { } while (0)
32 #endif
34 static S390pciState *s390_get_phb(void)
36 static S390pciState *phb;
38 if (!phb) {
39 phb = S390_PCI_HOST_BRIDGE(
40 object_resolve_path(TYPE_S390_PCI_HOST_BRIDGE, NULL));
41 assert(phb != NULL);
44 return phb;
47 int chsc_sei_nt2_get_event(void *res)
49 ChscSeiNt2Res *nt2_res = (ChscSeiNt2Res *)res;
50 PciCcdfAvail *accdf;
51 PciCcdfErr *eccdf;
52 int rc = 1;
53 SeiContainer *sei_cont;
54 S390pciState *s = s390_get_phb();
56 sei_cont = QTAILQ_FIRST(&s->pending_sei);
57 if (sei_cont) {
58 QTAILQ_REMOVE(&s->pending_sei, sei_cont, link);
59 nt2_res->nt = 2;
60 nt2_res->cc = sei_cont->cc;
61 nt2_res->length = cpu_to_be16(sizeof(ChscSeiNt2Res));
62 switch (sei_cont->cc) {
63 case 1: /* error event */
64 eccdf = (PciCcdfErr *)nt2_res->ccdf;
65 eccdf->fid = cpu_to_be32(sei_cont->fid);
66 eccdf->fh = cpu_to_be32(sei_cont->fh);
67 eccdf->e = cpu_to_be32(sei_cont->e);
68 eccdf->faddr = cpu_to_be64(sei_cont->faddr);
69 eccdf->pec = cpu_to_be16(sei_cont->pec);
70 break;
71 case 2: /* availability event */
72 accdf = (PciCcdfAvail *)nt2_res->ccdf;
73 accdf->fid = cpu_to_be32(sei_cont->fid);
74 accdf->fh = cpu_to_be32(sei_cont->fh);
75 accdf->pec = cpu_to_be16(sei_cont->pec);
76 break;
77 default:
78 abort();
80 g_free(sei_cont);
81 rc = 0;
84 return rc;
87 int chsc_sei_nt2_have_event(void)
89 S390pciState *s = s390_get_phb();
91 return !QTAILQ_EMPTY(&s->pending_sei);
94 S390PCIBusDevice *s390_pci_find_next_avail_dev(S390PCIBusDevice *pbdev)
96 int idx = 0;
97 S390PCIBusDevice *dev = NULL;
98 S390pciState *s = s390_get_phb();
100 if (pbdev) {
101 idx = (pbdev->fh & FH_MASK_INDEX) + 1;
104 for (; idx < PCI_SLOT_MAX; idx++) {
105 dev = s->pbdev[idx];
106 if (dev && dev->state != ZPCI_FS_RESERVED) {
107 return dev;
111 return NULL;
114 S390PCIBusDevice *s390_pci_find_dev_by_fid(uint32_t fid)
116 S390PCIBusDevice *pbdev;
117 int i;
118 S390pciState *s = s390_get_phb();
120 for (i = 0; i < PCI_SLOT_MAX; i++) {
121 pbdev = s->pbdev[i];
122 if (pbdev && pbdev->fid == fid) {
123 return pbdev;
127 return NULL;
130 void s390_pci_sclp_configure(SCCB *sccb)
132 PciCfgSccb *psccb = (PciCfgSccb *)sccb;
133 S390PCIBusDevice *pbdev = s390_pci_find_dev_by_fid(be32_to_cpu(psccb->aid));
134 uint16_t rc;
136 if (be16_to_cpu(sccb->h.length) < 16) {
137 rc = SCLP_RC_INSUFFICIENT_SCCB_LENGTH;
138 goto out;
141 if (!pbdev) {
142 DPRINTF("sclp config no dev found\n");
143 rc = SCLP_RC_ADAPTER_ID_NOT_RECOGNIZED;
144 goto out;
147 switch (pbdev->state) {
148 case ZPCI_FS_RESERVED:
149 rc = SCLP_RC_ADAPTER_IN_RESERVED_STATE;
150 break;
151 case ZPCI_FS_STANDBY:
152 pbdev->state = ZPCI_FS_DISABLED;
153 rc = SCLP_RC_NORMAL_COMPLETION;
154 break;
155 default:
156 rc = SCLP_RC_NO_ACTION_REQUIRED;
158 out:
159 psccb->header.response_code = cpu_to_be16(rc);
162 void s390_pci_sclp_deconfigure(SCCB *sccb)
164 PciCfgSccb *psccb = (PciCfgSccb *)sccb;
165 S390PCIBusDevice *pbdev = s390_pci_find_dev_by_fid(be32_to_cpu(psccb->aid));
166 uint16_t rc;
168 if (be16_to_cpu(sccb->h.length) < 16) {
169 rc = SCLP_RC_INSUFFICIENT_SCCB_LENGTH;
170 goto out;
173 if (!pbdev) {
174 DPRINTF("sclp deconfig no dev found\n");
175 rc = SCLP_RC_ADAPTER_ID_NOT_RECOGNIZED;
176 goto out;
179 switch (pbdev->state) {
180 case ZPCI_FS_RESERVED:
181 rc = SCLP_RC_ADAPTER_IN_RESERVED_STATE;
182 break;
183 case ZPCI_FS_STANDBY:
184 rc = SCLP_RC_NO_ACTION_REQUIRED;
185 break;
186 default:
187 if (pbdev->summary_ind) {
188 pci_dereg_irqs(pbdev);
190 if (pbdev->iommu_enabled) {
191 pci_dereg_ioat(pbdev);
193 pbdev->state = ZPCI_FS_STANDBY;
194 rc = SCLP_RC_NORMAL_COMPLETION;
196 out:
197 psccb->header.response_code = cpu_to_be16(rc);
200 static S390PCIBusDevice *s390_pci_find_dev_by_uid(uint16_t uid)
202 int i;
203 S390PCIBusDevice *pbdev;
204 S390pciState *s = s390_get_phb();
206 for (i = 0; i < PCI_SLOT_MAX; i++) {
207 pbdev = s->pbdev[i];
208 if (!pbdev) {
209 continue;
212 if (pbdev->uid == uid) {
213 return pbdev;
217 return NULL;
220 static S390PCIBusDevice *s390_pci_find_dev_by_target(const char *target)
222 int i;
223 S390PCIBusDevice *pbdev;
224 S390pciState *s = s390_get_phb();
226 if (!target) {
227 return NULL;
230 for (i = 0; i < PCI_SLOT_MAX; i++) {
231 pbdev = s->pbdev[i];
232 if (!pbdev) {
233 continue;
236 if (!strcmp(pbdev->target, target)) {
237 return pbdev;
241 return NULL;
244 S390PCIBusDevice *s390_pci_find_dev_by_idx(uint32_t idx)
246 S390pciState *s = s390_get_phb();
248 return s->pbdev[idx & FH_MASK_INDEX];
251 S390PCIBusDevice *s390_pci_find_dev_by_fh(uint32_t fh)
253 S390pciState *s = s390_get_phb();
254 S390PCIBusDevice *pbdev;
256 pbdev = s->pbdev[fh & FH_MASK_INDEX];
257 if (pbdev && pbdev->fh == fh) {
258 return pbdev;
261 return NULL;
264 static void s390_pci_generate_event(uint8_t cc, uint16_t pec, uint32_t fh,
265 uint32_t fid, uint64_t faddr, uint32_t e)
267 SeiContainer *sei_cont;
268 S390pciState *s = s390_get_phb();
270 sei_cont = g_malloc0(sizeof(SeiContainer));
271 sei_cont->fh = fh;
272 sei_cont->fid = fid;
273 sei_cont->cc = cc;
274 sei_cont->pec = pec;
275 sei_cont->faddr = faddr;
276 sei_cont->e = e;
278 QTAILQ_INSERT_TAIL(&s->pending_sei, sei_cont, link);
279 css_generate_css_crws(0);
282 static void s390_pci_generate_plug_event(uint16_t pec, uint32_t fh,
283 uint32_t fid)
285 s390_pci_generate_event(2, pec, fh, fid, 0, 0);
288 void s390_pci_generate_error_event(uint16_t pec, uint32_t fh, uint32_t fid,
289 uint64_t faddr, uint32_t e)
291 s390_pci_generate_event(1, pec, fh, fid, faddr, e);
294 static void s390_pci_set_irq(void *opaque, int irq, int level)
296 /* nothing to do */
299 static int s390_pci_map_irq(PCIDevice *pci_dev, int irq_num)
301 /* nothing to do */
302 return 0;
305 static uint64_t s390_pci_get_table_origin(uint64_t iota)
307 return iota & ~ZPCI_IOTA_RTTO_FLAG;
310 static unsigned int calc_rtx(dma_addr_t ptr)
312 return ((unsigned long) ptr >> ZPCI_RT_SHIFT) & ZPCI_INDEX_MASK;
315 static unsigned int calc_sx(dma_addr_t ptr)
317 return ((unsigned long) ptr >> ZPCI_ST_SHIFT) & ZPCI_INDEX_MASK;
320 static unsigned int calc_px(dma_addr_t ptr)
322 return ((unsigned long) ptr >> PAGE_SHIFT) & ZPCI_PT_MASK;
325 static uint64_t get_rt_sto(uint64_t entry)
327 return ((entry & ZPCI_TABLE_TYPE_MASK) == ZPCI_TABLE_TYPE_RTX)
328 ? (entry & ZPCI_RTE_ADDR_MASK)
329 : 0;
332 static uint64_t get_st_pto(uint64_t entry)
334 return ((entry & ZPCI_TABLE_TYPE_MASK) == ZPCI_TABLE_TYPE_SX)
335 ? (entry & ZPCI_STE_ADDR_MASK)
336 : 0;
339 static uint64_t s390_guest_io_table_walk(uint64_t guest_iota,
340 uint64_t guest_dma_address)
342 uint64_t sto_a, pto_a, px_a;
343 uint64_t sto, pto, pte;
344 uint32_t rtx, sx, px;
346 rtx = calc_rtx(guest_dma_address);
347 sx = calc_sx(guest_dma_address);
348 px = calc_px(guest_dma_address);
350 sto_a = guest_iota + rtx * sizeof(uint64_t);
351 sto = address_space_ldq(&address_space_memory, sto_a,
352 MEMTXATTRS_UNSPECIFIED, NULL);
353 sto = get_rt_sto(sto);
354 if (!sto) {
355 pte = 0;
356 goto out;
359 pto_a = sto + sx * sizeof(uint64_t);
360 pto = address_space_ldq(&address_space_memory, pto_a,
361 MEMTXATTRS_UNSPECIFIED, NULL);
362 pto = get_st_pto(pto);
363 if (!pto) {
364 pte = 0;
365 goto out;
368 px_a = pto + px * sizeof(uint64_t);
369 pte = address_space_ldq(&address_space_memory, px_a,
370 MEMTXATTRS_UNSPECIFIED, NULL);
372 out:
373 return pte;
376 static IOMMUTLBEntry s390_translate_iommu(MemoryRegion *iommu, hwaddr addr,
377 bool is_write)
379 uint64_t pte;
380 uint32_t flags;
381 S390PCIBusDevice *pbdev = container_of(iommu, S390PCIBusDevice, iommu_mr);
382 S390pciState *s;
383 IOMMUTLBEntry ret = {
384 .target_as = &address_space_memory,
385 .iova = 0,
386 .translated_addr = 0,
387 .addr_mask = ~(hwaddr)0,
388 .perm = IOMMU_NONE,
391 switch (pbdev->state) {
392 case ZPCI_FS_ENABLED:
393 case ZPCI_FS_BLOCKED:
394 if (!pbdev->iommu_enabled) {
395 return ret;
397 break;
398 default:
399 return ret;
402 DPRINTF("iommu trans addr 0x%" PRIx64 "\n", addr);
404 s = S390_PCI_HOST_BRIDGE(pci_device_root_bus(pbdev->pdev)->qbus.parent);
405 /* s390 does not have an APIC mapped to main storage so we use
406 * a separate AddressSpace only for msix notifications
408 if (addr == ZPCI_MSI_ADDR) {
409 ret.target_as = &s->msix_notify_as;
410 ret.iova = addr;
411 ret.translated_addr = addr;
412 ret.addr_mask = 0xfff;
413 ret.perm = IOMMU_RW;
414 return ret;
417 if (addr < pbdev->pba || addr > pbdev->pal) {
418 return ret;
421 pte = s390_guest_io_table_walk(s390_pci_get_table_origin(pbdev->g_iota),
422 addr);
423 if (!pte) {
424 return ret;
427 flags = pte & ZPCI_PTE_FLAG_MASK;
428 ret.iova = addr;
429 ret.translated_addr = pte & ZPCI_PTE_ADDR_MASK;
430 ret.addr_mask = 0xfff;
432 if (flags & ZPCI_PTE_INVALID) {
433 ret.perm = IOMMU_NONE;
434 } else {
435 ret.perm = IOMMU_RW;
438 return ret;
441 static const MemoryRegionIOMMUOps s390_iommu_ops = {
442 .translate = s390_translate_iommu,
445 static AddressSpace *s390_pci_dma_iommu(PCIBus *bus, void *opaque, int devfn)
447 S390pciState *s = opaque;
449 return &s->iommu[PCI_SLOT(devfn)]->as;
452 static uint8_t set_ind_atomic(uint64_t ind_loc, uint8_t to_be_set)
454 uint8_t ind_old, ind_new;
455 hwaddr len = 1;
456 uint8_t *ind_addr;
458 ind_addr = cpu_physical_memory_map(ind_loc, &len, 1);
459 if (!ind_addr) {
460 s390_pci_generate_error_event(ERR_EVENT_AIRERR, 0, 0, 0, 0);
461 return -1;
463 do {
464 ind_old = *ind_addr;
465 ind_new = ind_old | to_be_set;
466 } while (atomic_cmpxchg(ind_addr, ind_old, ind_new) != ind_old);
467 cpu_physical_memory_unmap(ind_addr, len, 1, len);
469 return ind_old;
472 static void s390_msi_ctrl_write(void *opaque, hwaddr addr, uint64_t data,
473 unsigned int size)
475 S390PCIBusDevice *pbdev;
476 uint32_t io_int_word;
477 uint32_t fid = data >> ZPCI_MSI_VEC_BITS;
478 uint32_t vec = data & ZPCI_MSI_VEC_MASK;
479 uint64_t ind_bit;
480 uint32_t sum_bit;
481 uint32_t e = 0;
483 DPRINTF("write_msix data 0x%" PRIx64 " fid %d vec 0x%x\n", data, fid, vec);
485 pbdev = s390_pci_find_dev_by_fid(fid);
486 if (!pbdev) {
487 e |= (vec << ERR_EVENT_MVN_OFFSET);
488 s390_pci_generate_error_event(ERR_EVENT_NOMSI, 0, fid, addr, e);
489 return;
492 if (pbdev->state != ZPCI_FS_ENABLED) {
493 return;
496 ind_bit = pbdev->routes.adapter.ind_offset;
497 sum_bit = pbdev->routes.adapter.summary_offset;
499 set_ind_atomic(pbdev->routes.adapter.ind_addr + (ind_bit + vec) / 8,
500 0x80 >> ((ind_bit + vec) % 8));
501 if (!set_ind_atomic(pbdev->routes.adapter.summary_addr + sum_bit / 8,
502 0x80 >> (sum_bit % 8))) {
503 io_int_word = (pbdev->isc << 27) | IO_INT_WORD_AI;
504 s390_io_interrupt(0, 0, 0, io_int_word);
508 static uint64_t s390_msi_ctrl_read(void *opaque, hwaddr addr, unsigned size)
510 return 0xffffffff;
513 static const MemoryRegionOps s390_msi_ctrl_ops = {
514 .write = s390_msi_ctrl_write,
515 .read = s390_msi_ctrl_read,
516 .endianness = DEVICE_LITTLE_ENDIAN,
519 void s390_pci_iommu_enable(S390PCIBusDevice *pbdev)
521 memory_region_init_iommu(&pbdev->iommu_mr, OBJECT(&pbdev->iommu->mr),
522 &s390_iommu_ops, "iommu-s390", pbdev->pal + 1);
523 memory_region_add_subregion(&pbdev->iommu->mr, 0, &pbdev->iommu_mr);
524 pbdev->iommu_enabled = true;
527 void s390_pci_iommu_disable(S390PCIBusDevice *pbdev)
529 memory_region_del_subregion(&pbdev->iommu->mr, &pbdev->iommu_mr);
530 object_unparent(OBJECT(&pbdev->iommu_mr));
531 pbdev->iommu_enabled = false;
534 static void s390_pcihost_init_as(S390pciState *s)
536 int i;
537 S390PCIIOMMU *iommu;
539 for (i = 0; i < PCI_SLOT_MAX; i++) {
540 iommu = g_malloc0(sizeof(S390PCIIOMMU));
541 memory_region_init(&iommu->mr, OBJECT(s),
542 "iommu-root-s390", UINT64_MAX);
543 address_space_init(&iommu->as, &iommu->mr, "iommu-pci");
545 s->iommu[i] = iommu;
548 memory_region_init_io(&s->msix_notify_mr, OBJECT(s),
549 &s390_msi_ctrl_ops, s, "msix-s390", UINT64_MAX);
550 address_space_init(&s->msix_notify_as, &s->msix_notify_mr, "msix-pci");
553 static int s390_pcihost_init(SysBusDevice *dev)
555 PCIBus *b;
556 BusState *bus;
557 PCIHostState *phb = PCI_HOST_BRIDGE(dev);
558 S390pciState *s = S390_PCI_HOST_BRIDGE(dev);
560 DPRINTF("host_init\n");
562 b = pci_register_bus(DEVICE(dev), NULL,
563 s390_pci_set_irq, s390_pci_map_irq, NULL,
564 get_system_memory(), get_system_io(), 0, 64,
565 TYPE_PCI_BUS);
566 s390_pcihost_init_as(s);
567 pci_setup_iommu(b, s390_pci_dma_iommu, s);
569 bus = BUS(b);
570 qbus_set_hotplug_handler(bus, DEVICE(dev), NULL);
571 phb->bus = b;
573 s->bus = S390_PCI_BUS(qbus_create(TYPE_S390_PCI_BUS, DEVICE(s), NULL));
574 qbus_set_hotplug_handler(BUS(s->bus), DEVICE(s), NULL);
576 QTAILQ_INIT(&s->pending_sei);
577 return 0;
580 static int s390_pcihost_setup_msix(S390PCIBusDevice *pbdev)
582 uint8_t pos;
583 uint16_t ctrl;
584 uint32_t table, pba;
586 pos = pci_find_capability(pbdev->pdev, PCI_CAP_ID_MSIX);
587 if (!pos) {
588 pbdev->msix.available = false;
589 return 0;
592 ctrl = pci_host_config_read_common(pbdev->pdev, pos + PCI_MSIX_FLAGS,
593 pci_config_size(pbdev->pdev), sizeof(ctrl));
594 table = pci_host_config_read_common(pbdev->pdev, pos + PCI_MSIX_TABLE,
595 pci_config_size(pbdev->pdev), sizeof(table));
596 pba = pci_host_config_read_common(pbdev->pdev, pos + PCI_MSIX_PBA,
597 pci_config_size(pbdev->pdev), sizeof(pba));
599 pbdev->msix.table_bar = table & PCI_MSIX_FLAGS_BIRMASK;
600 pbdev->msix.table_offset = table & ~PCI_MSIX_FLAGS_BIRMASK;
601 pbdev->msix.pba_bar = pba & PCI_MSIX_FLAGS_BIRMASK;
602 pbdev->msix.pba_offset = pba & ~PCI_MSIX_FLAGS_BIRMASK;
603 pbdev->msix.entries = (ctrl & PCI_MSIX_FLAGS_QSIZE) + 1;
604 pbdev->msix.available = true;
605 return 0;
608 static S390PCIBusDevice *s390_pci_device_new(const char *target)
610 DeviceState *dev = NULL;
611 S390pciState *s = s390_get_phb();
613 dev = qdev_try_create(BUS(s->bus), TYPE_S390_PCI_DEVICE);
614 if (!dev) {
615 return NULL;
618 qdev_prop_set_string(dev, "target", target);
619 qdev_init_nofail(dev);
621 return S390_PCI_DEVICE(dev);
624 static void s390_pcihost_hot_plug(HotplugHandler *hotplug_dev,
625 DeviceState *dev, Error **errp)
627 PCIDevice *pdev = NULL;
628 S390PCIBusDevice *pbdev = NULL;
629 S390pciState *s = s390_get_phb();
631 if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) {
632 pdev = PCI_DEVICE(dev);
634 if (!dev->id) {
635 /* In the case the PCI device does not define an id */
636 /* we generate one based on the PCI address */
637 dev->id = g_strdup_printf("auto_%02x:%02x.%01x",
638 pci_bus_num(pdev->bus),
639 PCI_SLOT(pdev->devfn),
640 PCI_FUNC(pdev->devfn));
643 pbdev = s390_pci_find_dev_by_target(dev->id);
644 if (!pbdev) {
645 pbdev = s390_pci_device_new(dev->id);
646 if (!pbdev) {
647 error_setg(errp, "create zpci device failed");
651 if (object_dynamic_cast(OBJECT(dev), "vfio-pci")) {
652 pbdev->fh |= FH_SHM_VFIO;
653 } else {
654 pbdev->fh |= FH_SHM_EMUL;
657 pbdev->pdev = pdev;
658 pbdev->iommu = s->iommu[PCI_SLOT(pdev->devfn)];
659 pbdev->state = ZPCI_FS_STANDBY;
660 s390_pcihost_setup_msix(pbdev);
662 if (dev->hotplugged) {
663 s390_pci_generate_plug_event(HP_EVENT_RESERVED_TO_STANDBY,
664 pbdev->fh, pbdev->fid);
666 } else if (object_dynamic_cast(OBJECT(dev), TYPE_S390_PCI_DEVICE)) {
667 int idx;
669 pbdev = S390_PCI_DEVICE(dev);
670 for (idx = 0; idx < PCI_SLOT_MAX; idx++) {
671 if (!s->pbdev[idx]) {
672 s->pbdev[idx] = pbdev;
673 pbdev->fh = idx;
674 return;
678 error_setg(errp, "no slot for plugging zpci device");
682 static void s390_pcihost_hot_unplug(HotplugHandler *hotplug_dev,
683 DeviceState *dev, Error **errp)
685 int i;
686 PCIDevice *pci_dev = NULL;
687 S390PCIBusDevice *pbdev = NULL;
688 S390pciState *s = s390_get_phb();
690 if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) {
691 pci_dev = PCI_DEVICE(dev);
693 for (i = 0 ; i < PCI_SLOT_MAX; i++) {
694 if (s->pbdev[i]->pdev == pci_dev) {
695 pbdev = s->pbdev[i];
696 break;
700 if (!pbdev) {
701 object_unparent(OBJECT(pci_dev));
702 return;
704 } else if (object_dynamic_cast(OBJECT(dev), TYPE_S390_PCI_DEVICE)) {
705 pbdev = S390_PCI_DEVICE(dev);
706 pci_dev = pbdev->pdev;
709 switch (pbdev->state) {
710 case ZPCI_FS_RESERVED:
711 goto out;
712 case ZPCI_FS_STANDBY:
713 break;
714 default:
715 s390_pci_generate_plug_event(HP_EVENT_CONFIGURED_TO_STBRES,
716 pbdev->fh, pbdev->fid);
719 s390_pci_generate_plug_event(HP_EVENT_STANDBY_TO_RESERVED,
720 pbdev->fh, pbdev->fid);
721 object_unparent(OBJECT(pci_dev));
722 pbdev->pdev = NULL;
723 pbdev->state = ZPCI_FS_RESERVED;
724 out:
725 pbdev->fid = 0;
726 s->pbdev[pbdev->fh & FH_MASK_INDEX] = NULL;
727 object_unparent(OBJECT(pbdev));
730 static void s390_pcihost_class_init(ObjectClass *klass, void *data)
732 SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
733 DeviceClass *dc = DEVICE_CLASS(klass);
734 HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(klass);
736 dc->cannot_instantiate_with_device_add_yet = true;
737 k->init = s390_pcihost_init;
738 hc->plug = s390_pcihost_hot_plug;
739 hc->unplug = s390_pcihost_hot_unplug;
740 msi_nonbroken = true;
743 static const TypeInfo s390_pcihost_info = {
744 .name = TYPE_S390_PCI_HOST_BRIDGE,
745 .parent = TYPE_PCI_HOST_BRIDGE,
746 .instance_size = sizeof(S390pciState),
747 .class_init = s390_pcihost_class_init,
748 .interfaces = (InterfaceInfo[]) {
749 { TYPE_HOTPLUG_HANDLER },
754 static const TypeInfo s390_pcibus_info = {
755 .name = TYPE_S390_PCI_BUS,
756 .parent = TYPE_BUS,
757 .instance_size = sizeof(S390PCIBus),
760 static uint16_t s390_pci_generate_uid(void)
762 uint16_t uid = 0;
764 do {
765 uid++;
766 if (!s390_pci_find_dev_by_uid(uid)) {
767 return uid;
769 } while (uid < ZPCI_MAX_UID);
771 return UID_UNDEFINED;
774 static uint32_t s390_pci_generate_fid(Error **errp)
776 uint32_t fid = 0;
778 while (fid <= ZPCI_MAX_FID) {
779 if (!s390_pci_find_dev_by_fid(fid)) {
780 return fid;
783 if (fid == ZPCI_MAX_FID) {
784 break;
787 fid++;
790 error_setg(errp, "no free fid could be found");
791 return 0;
794 static void s390_pci_device_realize(DeviceState *dev, Error **errp)
796 S390PCIBusDevice *zpci = S390_PCI_DEVICE(dev);
798 if (!zpci->target) {
799 error_setg(errp, "target must be defined");
800 return;
803 if (s390_pci_find_dev_by_target(zpci->target)) {
804 error_setg(errp, "target %s already has an associated zpci device",
805 zpci->target);
806 return;
809 if (zpci->uid == UID_UNDEFINED) {
810 zpci->uid = s390_pci_generate_uid();
811 if (!zpci->uid) {
812 error_setg(errp, "no free uid could be found");
813 return;
815 } else if (s390_pci_find_dev_by_uid(zpci->uid)) {
816 error_setg(errp, "uid %u already in use", zpci->uid);
817 return;
820 if (!zpci->fid_defined) {
821 Error *local_error = NULL;
823 zpci->fid = s390_pci_generate_fid(&local_error);
824 if (local_error) {
825 error_propagate(errp, local_error);
826 return;
828 } else if (s390_pci_find_dev_by_fid(zpci->fid)) {
829 error_setg(errp, "fid %u already in use", zpci->fid);
830 return;
833 zpci->state = ZPCI_FS_RESERVED;
836 static void s390_pci_device_reset(DeviceState *dev)
838 S390PCIBusDevice *pbdev = S390_PCI_DEVICE(dev);
840 switch (pbdev->state) {
841 case ZPCI_FS_RESERVED:
842 return;
843 case ZPCI_FS_STANDBY:
844 break;
845 default:
846 pbdev->fh &= ~FH_MASK_ENABLE;
847 pbdev->state = ZPCI_FS_DISABLED;
848 break;
851 if (pbdev->summary_ind) {
852 pci_dereg_irqs(pbdev);
854 if (pbdev->iommu_enabled) {
855 pci_dereg_ioat(pbdev);
858 pbdev->fmb_addr = 0;
861 static void s390_pci_get_fid(Object *obj, Visitor *v, const char *name,
862 void *opaque, Error **errp)
864 Property *prop = opaque;
865 uint32_t *ptr = qdev_get_prop_ptr(DEVICE(obj), prop);
867 visit_type_uint32(v, name, ptr, errp);
870 static void s390_pci_set_fid(Object *obj, Visitor *v, const char *name,
871 void *opaque, Error **errp)
873 DeviceState *dev = DEVICE(obj);
874 S390PCIBusDevice *zpci = S390_PCI_DEVICE(obj);
875 Property *prop = opaque;
876 uint32_t *ptr = qdev_get_prop_ptr(dev, prop);
878 if (dev->realized) {
879 qdev_prop_set_after_realize(dev, name, errp);
880 return;
883 visit_type_uint32(v, name, ptr, errp);
884 zpci->fid_defined = true;
887 static PropertyInfo s390_pci_fid_propinfo = {
888 .name = "zpci_fid",
889 .get = s390_pci_get_fid,
890 .set = s390_pci_set_fid,
893 #define DEFINE_PROP_S390_PCI_FID(_n, _s, _f) \
894 DEFINE_PROP(_n, _s, _f, s390_pci_fid_propinfo, uint32_t)
896 static Property s390_pci_device_properties[] = {
897 DEFINE_PROP_UINT16("uid", S390PCIBusDevice, uid, UID_UNDEFINED),
898 DEFINE_PROP_S390_PCI_FID("fid", S390PCIBusDevice, fid),
899 DEFINE_PROP_STRING("target", S390PCIBusDevice, target),
900 DEFINE_PROP_END_OF_LIST(),
903 static void s390_pci_device_class_init(ObjectClass *klass, void *data)
905 DeviceClass *dc = DEVICE_CLASS(klass);
907 dc->desc = "zpci device";
908 dc->reset = s390_pci_device_reset;
909 dc->bus_type = TYPE_S390_PCI_BUS;
910 dc->realize = s390_pci_device_realize;
911 dc->props = s390_pci_device_properties;
914 static const TypeInfo s390_pci_device_info = {
915 .name = TYPE_S390_PCI_DEVICE,
916 .parent = TYPE_DEVICE,
917 .instance_size = sizeof(S390PCIBusDevice),
918 .class_init = s390_pci_device_class_init,
921 static void s390_pci_register_types(void)
923 type_register_static(&s390_pcihost_info);
924 type_register_static(&s390_pcibus_info);
925 type_register_static(&s390_pci_device_info);
928 type_init(s390_pci_register_types)