target/i386/hyperv-proto.h

   1 /*
   2  * Definitions for Hyper-V guest/hypervisor interaction
   3  *
   4  * Copyright (C) 2017 Parallels International GmbH
   5  *
   6  * This work is licensed under the terms of the GNU GPL, version 2 or later.
   7  * See the COPYING file in the top-level directory.
   8  */
   9
  10 #ifndef TARGET_I386_HYPERV_PROTO_H
  11 #define TARGET_I386_HYPERV_PROTO_H
  12
  13 #include "qemu/bitmap.h"
  14
  15 #define HV_CPUID_VENDOR_AND_MAX_FUNCTIONS     0x40000000
  16 #define HV_CPUID_INTERFACE                    0x40000001
  17 #define HV_CPUID_VERSION                      0x40000002
  18 #define HV_CPUID_FEATURES                     0x40000003
  19 #define HV_CPUID_ENLIGHTMENT_INFO             0x40000004
  20 #define HV_CPUID_IMPLEMENT_LIMITS             0x40000005
  21 #define HV_CPUID_MIN                          0x40000005
  22 #define HV_CPUID_MAX                          0x4000ffff
  23 #define HV_HYPERVISOR_PRESENT_BIT             0x80000000
  24
  25 /*
  26  * HV_CPUID_FEATURES.EAX bits
  27  */
  28 #define HV_VP_RUNTIME_AVAILABLE      (1u << 0)
  29 #define HV_TIME_REF_COUNT_AVAILABLE  (1u << 1)
  30 #define HV_SYNIC_AVAILABLE           (1u << 2)
  31 #define HV_SYNTIMERS_AVAILABLE       (1u << 3)
  32 #define HV_APIC_ACCESS_AVAILABLE     (1u << 4)
  33 #define HV_HYPERCALL_AVAILABLE       (1u << 5)
  34 #define HV_VP_INDEX_AVAILABLE        (1u << 6)
  35 #define HV_RESET_AVAILABLE           (1u << 7)
  36 #define HV_REFERENCE_TSC_AVAILABLE   (1u << 9)
  37 #define HV_ACCESS_FREQUENCY_MSRS     (1u << 11)
  38
  39
  40 /*
  41  * HV_CPUID_FEATURES.EDX bits
  42  */
  43 #define HV_MWAIT_AVAILABLE                      (1u << 0)
  44 #define HV_GUEST_DEBUGGING_AVAILABLE            (1u << 1)
  45 #define HV_PERF_MONITOR_AVAILABLE               (1u << 2)
  46 #define HV_CPU_DYNAMIC_PARTITIONING_AVAILABLE   (1u << 3)
  47 #define HV_HYPERCALL_PARAMS_XMM_AVAILABLE       (1u << 4)
  48 #define HV_GUEST_IDLE_STATE_AVAILABLE           (1u << 5)
  49 #define HV_FREQUENCY_MSRS_AVAILABLE             (1u << 8)
  50 #define HV_GUEST_CRASH_MSR_AVAILABLE            (1u << 10)
  51
  52 /*
  53  * HV_CPUID_ENLIGHTMENT_INFO.EAX bits
  54  */
  55 #define HV_AS_SWITCH_RECOMMENDED            (1u << 0)
  56 #define HV_LOCAL_TLB_FLUSH_RECOMMENDED      (1u << 1)
  57 #define HV_REMOTE_TLB_FLUSH_RECOMMENDED     (1u << 2)
  58 #define HV_APIC_ACCESS_RECOMMENDED          (1u << 3)
  59 #define HV_SYSTEM_RESET_RECOMMENDED         (1u << 4)
  60 #define HV_RELAXED_TIMING_RECOMMENDED       (1u << 5)
  61
  62 /*
  63  * Basic virtualized MSRs
  64  */
  65 #define HV_X64_MSR_GUEST_OS_ID                0x40000000
  66 #define HV_X64_MSR_HYPERCALL                  0x40000001
  67 #define HV_X64_MSR_VP_INDEX                   0x40000002
  68 #define HV_X64_MSR_RESET                      0x40000003
  69 #define HV_X64_MSR_VP_RUNTIME                 0x40000010
  70 #define HV_X64_MSR_TIME_REF_COUNT             0x40000020
  71 #define HV_X64_MSR_REFERENCE_TSC              0x40000021
  72 #define HV_X64_MSR_TSC_FREQUENCY              0x40000022
  73 #define HV_X64_MSR_APIC_FREQUENCY             0x40000023
  74
  75 /*
  76  * Virtual APIC MSRs
  77  */
  78 #define HV_X64_MSR_EOI                        0x40000070
  79 #define HV_X64_MSR_ICR                        0x40000071
  80 #define HV_X64_MSR_TPR                        0x40000072
  81 #define HV_X64_MSR_APIC_ASSIST_PAGE           0x40000073
  82
  83 /*
  84  * Synthetic interrupt controller MSRs
  85  */
  86 #define HV_X64_MSR_SCONTROL                   0x40000080
  87 #define HV_X64_MSR_SVERSION                   0x40000081
  88 #define HV_X64_MSR_SIEFP                      0x40000082
  89 #define HV_X64_MSR_SIMP                       0x40000083
  90 #define HV_X64_MSR_EOM                        0x40000084
  91 #define HV_X64_MSR_SINT0                      0x40000090
  92 #define HV_X64_MSR_SINT1                      0x40000091
  93 #define HV_X64_MSR_SINT2                      0x40000092
  94 #define HV_X64_MSR_SINT3                      0x40000093
  95 #define HV_X64_MSR_SINT4                      0x40000094
  96 #define HV_X64_MSR_SINT5                      0x40000095
  97 #define HV_X64_MSR_SINT6                      0x40000096
  98 #define HV_X64_MSR_SINT7                      0x40000097
  99 #define HV_X64_MSR_SINT8                      0x40000098
 100 #define HV_X64_MSR_SINT9                      0x40000099
 101 #define HV_X64_MSR_SINT10                     0x4000009A
 102 #define HV_X64_MSR_SINT11                     0x4000009B
 103 #define HV_X64_MSR_SINT12                     0x4000009C
 104 #define HV_X64_MSR_SINT13                     0x4000009D
 105 #define HV_X64_MSR_SINT14                     0x4000009E
 106 #define HV_X64_MSR_SINT15                     0x4000009F
 107
 108 /*
 109  * Synthetic timer MSRs
 110  */
 111 #define HV_X64_MSR_STIMER0_CONFIG               0x400000B0
 112 #define HV_X64_MSR_STIMER0_COUNT                0x400000B1
 113 #define HV_X64_MSR_STIMER1_CONFIG               0x400000B2
 114 #define HV_X64_MSR_STIMER1_COUNT                0x400000B3
 115 #define HV_X64_MSR_STIMER2_CONFIG               0x400000B4
 116 #define HV_X64_MSR_STIMER2_COUNT                0x400000B5
 117 #define HV_X64_MSR_STIMER3_CONFIG               0x400000B6
 118 #define HV_X64_MSR_STIMER3_COUNT                0x400000B7
 119
 120 /*
 121  * Guest crash notification MSRs
 122  */
 123 #define HV_X64_MSR_CRASH_P0                     0x40000100
 124 #define HV_X64_MSR_CRASH_P1                     0x40000101
 125 #define HV_X64_MSR_CRASH_P2                     0x40000102
 126 #define HV_X64_MSR_CRASH_P3                     0x40000103
 127 #define HV_X64_MSR_CRASH_P4                     0x40000104
 128 #define HV_CRASH_PARAMS    (HV_X64_MSR_CRASH_P4 - HV_X64_MSR_CRASH_P0 + 1)
 129 #define HV_X64_MSR_CRASH_CTL                    0x40000105
 130 #define HV_CRASH_CTL_NOTIFY                     (1ull << 63)
 131
 132 /*
 133  * Hypercall status code
 134  */
 135 #define HV_STATUS_SUCCESS                     0
 136 #define HV_STATUS_INVALID_HYPERCALL_CODE      2
 137 #define HV_STATUS_INVALID_HYPERCALL_INPUT     3
 138 #define HV_STATUS_INVALID_ALIGNMENT           4
 139 #define HV_STATUS_INVALID_PARAMETER           5
 140 #define HV_STATUS_INSUFFICIENT_MEMORY         11
 141 #define HV_STATUS_INVALID_CONNECTION_ID       18
 142 #define HV_STATUS_INSUFFICIENT_BUFFERS        19
 143
 144 /*
 145  * Hypercall numbers
 146  */
 147 #define HV_POST_MESSAGE                       0x005c
 148 #define HV_SIGNAL_EVENT                       0x005d
 149 #define HV_HYPERCALL_FAST                     (1u << 16)
 150
 151 /*
 152  * Hypercall MSR bits
 153  */
 154 #define HV_HYPERCALL_ENABLE                   (1u << 0)
 155
 156 /*
 157  * Synthetic interrupt controller definitions
 158  */
 159 #define HV_SYNIC_VERSION                      1
 160 #define HV_SINT_COUNT                         16
 161 #define HV_SYNIC_ENABLE                       (1u << 0)
 162 #define HV_SIMP_ENABLE                        (1u << 0)
 163 #define HV_SIEFP_ENABLE                       (1u << 0)
 164 #define HV_SINT_MASKED                        (1u << 16)
 165 #define HV_SINT_AUTO_EOI                      (1u << 17)
 166 #define HV_SINT_VECTOR_MASK                   0xff
 167
 168 #define HV_STIMER_COUNT                       4
 169
 170 /*
 171  * Message size
 172  */
 173 #define HV_MESSAGE_PAYLOAD_SIZE               240
 174
 175 /*
 176  * Message types
 177  */
 178 #define HV_MESSAGE_NONE                       0x00000000
 179 #define HV_MESSAGE_VMBUS                      0x00000001
 180 #define HV_MESSAGE_UNMAPPED_GPA               0x80000000
 181 #define HV_MESSAGE_GPA_INTERCEPT              0x80000001
 182 #define HV_MESSAGE_TIMER_EXPIRED              0x80000010
 183 #define HV_MESSAGE_INVALID_VP_REGISTER_VALUE  0x80000020
 184 #define HV_MESSAGE_UNRECOVERABLE_EXCEPTION    0x80000021
 185 #define HV_MESSAGE_UNSUPPORTED_FEATURE        0x80000022
 186 #define HV_MESSAGE_EVENTLOG_BUFFERCOMPLETE    0x80000040
 187 #define HV_MESSAGE_X64_IOPORT_INTERCEPT       0x80010000
 188 #define HV_MESSAGE_X64_MSR_INTERCEPT          0x80010001
 189 #define HV_MESSAGE_X64_CPUID_INTERCEPT        0x80010002
 190 #define HV_MESSAGE_X64_EXCEPTION_INTERCEPT    0x80010003
 191 #define HV_MESSAGE_X64_APIC_EOI               0x80010004
 192 #define HV_MESSAGE_X64_LEGACY_FP_ERROR        0x80010005
 193
 194 /*
 195  * Message flags
 196  */
 197 #define HV_MESSAGE_FLAG_PENDING               0x1
 198
 199 /*
 200  * Event flags number per SINT
 201  */
 202 #define HV_EVENT_FLAGS_COUNT                  (256 * 8)
 203
 204 /*
 205  * Connection id valid bits
 206  */
 207 #define HV_CONNECTION_ID_MASK                 0x00ffffff
 208
 209 /*
 210  * Input structure for POST_MESSAGE hypercall
 211  */
 212 struct hyperv_post_message_input {
 213     uint32_t connection_id;
 214     uint32_t _reserved;
 215     uint32_t message_type;
 216     uint32_t payload_size;
 217     uint8_t  payload[HV_MESSAGE_PAYLOAD_SIZE];
 218 };
 219
 220 /*
 221  * Input structure for SIGNAL_EVENT hypercall
 222  */
 223 struct hyperv_signal_event_input {
 224     uint32_t connection_id;
 225     uint16_t flag_number;
 226     uint16_t _reserved_zero;
 227 };
 228
 229 /*
 230  * SynIC message structures
 231  */
 232 struct hyperv_message_header {
 233     uint32_t message_type;
 234     uint8_t  payload_size;
 235     uint8_t  message_flags; /* HV_MESSAGE_FLAG_XX */
 236     uint8_t  _reserved[2];
 237     uint64_t sender;
 238 };
 239
 240 struct hyperv_message {
 241     struct hyperv_message_header header;
 242     uint8_t payload[HV_MESSAGE_PAYLOAD_SIZE];
 243 };
 244
 245 struct hyperv_message_page {
 246     struct hyperv_message slot[HV_SINT_COUNT];
 247 };
 248
 249 /*
 250  * SynIC event flags structures
 251  */
 252 struct hyperv_event_flags {
 253     DECLARE_BITMAP(flags, HV_EVENT_FLAGS_COUNT);
 254 };
 255
 256 struct hyperv_event_flags_page {
 257     struct hyperv_event_flags slot[HV_SINT_COUNT];
 258 };
 259
 260 #endif