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fdc: Deprecate configuring floppies with -global isa-fdc
[qemu/ar7.git] / hw / block / fdc.c
blob7e143cbab079e24e3e01241b61b733ead937d741
1 /*
2 * QEMU Floppy disk emulator (Intel 82078)
3 *
4 * Copyright (c) 2003, 2007 Jocelyn Mayer
5 * Copyright (c) 2008 Hervé Poussineau
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23 * THE SOFTWARE.
24 */
25 /*
26 * The controller is used in Sun4m systems in a slightly different
27 * way. There are changes in DOR register and DMA is not available.
28 */
29
30 #include "qemu/osdep.h"
31 #include "hw/block/fdc.h"
32 #include "qapi/error.h"
33 #include "qemu/error-report.h"
34 #include "qemu/timer.h"
35 #include "hw/irq.h"
36 #include "hw/isa/isa.h"
37 #include "hw/qdev-properties.h"
38 #include "hw/sysbus.h"
39 #include "migration/vmstate.h"
40 #include "hw/block/block.h"
41 #include "sysemu/block-backend.h"
42 #include "sysemu/blockdev.h"
43 #include "sysemu/sysemu.h"
44 #include "qemu/log.h"
45 #include "qemu/main-loop.h"
46 #include "qemu/module.h"
47 #include "trace.h"
48
49 /********************************************************/
50 /* debug Floppy devices */
51
52 #define DEBUG_FLOPPY 0
53
54 #define FLOPPY_DPRINTF(fmt, ...) \
55 do { \
56 if (DEBUG_FLOPPY) { \
57 fprintf(stderr, "FLOPPY: " fmt , ## __VA_ARGS__); \
58 } \
59 } while (0)
60
61
62 /********************************************************/
63 /* qdev floppy bus */
64
65 #define TYPE_FLOPPY_BUS "floppy-bus"
66 #define FLOPPY_BUS(obj) OBJECT_CHECK(FloppyBus, (obj), TYPE_FLOPPY_BUS)
67
68 typedef struct FDCtrl FDCtrl;
69 typedef struct FDrive FDrive;
70 static FDrive *get_drv(FDCtrl *fdctrl, int unit);
71
72 typedef struct FloppyBus {
73 BusState bus;
74 FDCtrl *fdc;
75 } FloppyBus;
76
77 static const TypeInfo floppy_bus_info = {
78 .name = TYPE_FLOPPY_BUS,
79 .parent = TYPE_BUS,
80 .instance_size = sizeof(FloppyBus),
81 };
82
83 static void floppy_bus_create(FDCtrl *fdc, FloppyBus *bus, DeviceState *dev)
84 {
85 qbus_create_inplace(bus, sizeof(FloppyBus), TYPE_FLOPPY_BUS, dev, NULL);
86 bus->fdc = fdc;
87 }
88
89
90 /********************************************************/
91 /* Floppy drive emulation */
92
93 typedef enum FDriveRate {
94 FDRIVE_RATE_500K = 0x00, /* 500 Kbps */
95 FDRIVE_RATE_300K = 0x01, /* 300 Kbps */
96 FDRIVE_RATE_250K = 0x02, /* 250 Kbps */
97 FDRIVE_RATE_1M = 0x03, /* 1 Mbps */
98 } FDriveRate;
99
100 typedef enum FDriveSize {
101 FDRIVE_SIZE_UNKNOWN,
102 FDRIVE_SIZE_350,
103 FDRIVE_SIZE_525,
104 } FDriveSize;
105
106 typedef struct FDFormat {
107 FloppyDriveType drive;
108 uint8_t last_sect;
109 uint8_t max_track;
110 uint8_t max_head;
111 FDriveRate rate;
112 } FDFormat;
113
114 /* In many cases, the total sector size of a format is enough to uniquely
115 * identify it. However, there are some total sector collisions between
116 * formats of different physical size, and these are noted below by
117 * highlighting the total sector size for entries with collisions. */
118 static const FDFormat fd_formats[] = {
119 /* First entry is default format */
120 /* 1.44 MB 3"1/2 floppy disks */
121 { FLOPPY_DRIVE_TYPE_144, 18, 80, 1, FDRIVE_RATE_500K, }, /* 3.5" 2880 */
122 { FLOPPY_DRIVE_TYPE_144, 20, 80, 1, FDRIVE_RATE_500K, }, /* 3.5" 3200 */
123 { FLOPPY_DRIVE_TYPE_144, 21, 80, 1, FDRIVE_RATE_500K, },
124 { FLOPPY_DRIVE_TYPE_144, 21, 82, 1, FDRIVE_RATE_500K, },
125 { FLOPPY_DRIVE_TYPE_144, 21, 83, 1, FDRIVE_RATE_500K, },
126 { FLOPPY_DRIVE_TYPE_144, 22, 80, 1, FDRIVE_RATE_500K, },
127 { FLOPPY_DRIVE_TYPE_144, 23, 80, 1, FDRIVE_RATE_500K, },
128 { FLOPPY_DRIVE_TYPE_144, 24, 80, 1, FDRIVE_RATE_500K, },
129 /* 2.88 MB 3"1/2 floppy disks */
130 { FLOPPY_DRIVE_TYPE_288, 36, 80, 1, FDRIVE_RATE_1M, },
131 { FLOPPY_DRIVE_TYPE_288, 39, 80, 1, FDRIVE_RATE_1M, },
132 { FLOPPY_DRIVE_TYPE_288, 40, 80, 1, FDRIVE_RATE_1M, },
133 { FLOPPY_DRIVE_TYPE_288, 44, 80, 1, FDRIVE_RATE_1M, },
134 { FLOPPY_DRIVE_TYPE_288, 48, 80, 1, FDRIVE_RATE_1M, },
135 /* 720 kB 3"1/2 floppy disks */
136 { FLOPPY_DRIVE_TYPE_144, 9, 80, 1, FDRIVE_RATE_250K, }, /* 3.5" 1440 */
137 { FLOPPY_DRIVE_TYPE_144, 10, 80, 1, FDRIVE_RATE_250K, },
138 { FLOPPY_DRIVE_TYPE_144, 10, 82, 1, FDRIVE_RATE_250K, },
139 { FLOPPY_DRIVE_TYPE_144, 10, 83, 1, FDRIVE_RATE_250K, },
140 { FLOPPY_DRIVE_TYPE_144, 13, 80, 1, FDRIVE_RATE_250K, },
141 { FLOPPY_DRIVE_TYPE_144, 14, 80, 1, FDRIVE_RATE_250K, },
142 /* 1.2 MB 5"1/4 floppy disks */
143 { FLOPPY_DRIVE_TYPE_120, 15, 80, 1, FDRIVE_RATE_500K, },
144 { FLOPPY_DRIVE_TYPE_120, 18, 80, 1, FDRIVE_RATE_500K, }, /* 5.25" 2880 */
145 { FLOPPY_DRIVE_TYPE_120, 18, 82, 1, FDRIVE_RATE_500K, },
146 { FLOPPY_DRIVE_TYPE_120, 18, 83, 1, FDRIVE_RATE_500K, },
147 { FLOPPY_DRIVE_TYPE_120, 20, 80, 1, FDRIVE_RATE_500K, }, /* 5.25" 3200 */
148 /* 720 kB 5"1/4 floppy disks */
149 { FLOPPY_DRIVE_TYPE_120, 9, 80, 1, FDRIVE_RATE_250K, }, /* 5.25" 1440 */
150 { FLOPPY_DRIVE_TYPE_120, 11, 80, 1, FDRIVE_RATE_250K, },
151 /* 360 kB 5"1/4 floppy disks */
152 { FLOPPY_DRIVE_TYPE_120, 9, 40, 1, FDRIVE_RATE_300K, }, /* 5.25" 720 */
153 { FLOPPY_DRIVE_TYPE_120, 9, 40, 0, FDRIVE_RATE_300K, },
154 { FLOPPY_DRIVE_TYPE_120, 10, 41, 1, FDRIVE_RATE_300K, },
155 { FLOPPY_DRIVE_TYPE_120, 10, 42, 1, FDRIVE_RATE_300K, },
156 /* 320 kB 5"1/4 floppy disks */
157 { FLOPPY_DRIVE_TYPE_120, 8, 40, 1, FDRIVE_RATE_250K, },
158 { FLOPPY_DRIVE_TYPE_120, 8, 40, 0, FDRIVE_RATE_250K, },
159 /* 360 kB must match 5"1/4 better than 3"1/2... */
160 { FLOPPY_DRIVE_TYPE_144, 9, 80, 0, FDRIVE_RATE_250K, }, /* 3.5" 720 */
161 /* end */
162 { FLOPPY_DRIVE_TYPE_NONE, -1, -1, 0, 0, },
163 };
164
165 static FDriveSize drive_size(FloppyDriveType drive)
166 {
167 switch (drive) {
168 case FLOPPY_DRIVE_TYPE_120:
169 return FDRIVE_SIZE_525;
170 case FLOPPY_DRIVE_TYPE_144:
171 case FLOPPY_DRIVE_TYPE_288:
172 return FDRIVE_SIZE_350;
173 default:
174 return FDRIVE_SIZE_UNKNOWN;
175 }
176 }
177
178 #define GET_CUR_DRV(fdctrl) ((fdctrl)->cur_drv)
179 #define SET_CUR_DRV(fdctrl, drive) ((fdctrl)->cur_drv = (drive))
180
181 /* Will always be a fixed parameter for us */
182 #define FD_SECTOR_LEN 512
183 #define FD_SECTOR_SC 2 /* Sector size code */
184 #define FD_RESET_SENSEI_COUNT 4 /* Number of sense interrupts on RESET */
185
186 /* Floppy disk drive emulation */
187 typedef enum FDiskFlags {
188 FDISK_DBL_SIDES = 0x01,
189 } FDiskFlags;
190
191 struct FDrive {
192 FDCtrl *fdctrl;
193 BlockBackend *blk;
194 BlockConf *conf;
195 /* Drive status */
196 FloppyDriveType drive; /* CMOS drive type */
197 uint8_t perpendicular; /* 2.88 MB access mode */
198 /* Position */
199 uint8_t head;
200 uint8_t track;
201 uint8_t sect;
202 /* Media */
203 FloppyDriveType disk; /* Current disk type */
204 FDiskFlags flags;
205 uint8_t last_sect; /* Nb sector per track */
206 uint8_t max_track; /* Nb of tracks */
207 uint16_t bps; /* Bytes per sector */
208 uint8_t ro; /* Is read-only */
209 uint8_t media_changed; /* Is media changed */
210 uint8_t media_rate; /* Data rate of medium */
211
212 bool media_validated; /* Have we validated the media? */
213 };
214
215
216 static FloppyDriveType get_fallback_drive_type(FDrive *drv);
217
218 /* Hack: FD_SEEK is expected to work on empty drives. However, QEMU
219 * currently goes through some pains to keep seeks within the bounds
220 * established by last_sect and max_track. Correcting this is difficult,
221 * as refactoring FDC code tends to expose nasty bugs in the Linux kernel.
222 *
223 * For now: allow empty drives to have large bounds so we can seek around,
224 * with the understanding that when a diskette is inserted, the bounds will
225 * properly tighten to match the geometry of that inserted medium.
226 */
227 static void fd_empty_seek_hack(FDrive *drv)
228 {
229 drv->last_sect = 0xFF;
230 drv->max_track = 0xFF;
231 }
232
233 static void fd_init(FDrive *drv)
234 {
235 /* Drive */
236 drv->perpendicular = 0;
237 /* Disk */
238 drv->disk = FLOPPY_DRIVE_TYPE_NONE;
239 drv->last_sect = 0;
240 drv->max_track = 0;
241 drv->ro = true;
242 drv->media_changed = 1;
243 }
244
245 #define NUM_SIDES(drv) ((drv)->flags & FDISK_DBL_SIDES ? 2 : 1)
246
247 static int fd_sector_calc(uint8_t head, uint8_t track, uint8_t sect,
248 uint8_t last_sect, uint8_t num_sides)
249 {
250 return (((track * num_sides) + head) * last_sect) + sect - 1;
251 }
252
253 /* Returns current position, in sectors, for given drive */
254 static int fd_sector(FDrive *drv)
255 {
256 return fd_sector_calc(drv->head, drv->track, drv->sect, drv->last_sect,
257 NUM_SIDES(drv));
258 }
259
260 /* Returns current position, in bytes, for given drive */
261 static int fd_offset(FDrive *drv)
262 {
263 g_assert(fd_sector(drv) < INT_MAX >> BDRV_SECTOR_BITS);
264 return fd_sector(drv) << BDRV_SECTOR_BITS;
265 }
266
267 /* Seek to a new position:
268 * returns 0 if already on right track
269 * returns 1 if track changed
270 * returns 2 if track is invalid
271 * returns 3 if sector is invalid
272 * returns 4 if seek is disabled
273 */
274 static int fd_seek(FDrive *drv, uint8_t head, uint8_t track, uint8_t sect,
275 int enable_seek)
276 {
277 uint32_t sector;
278 int ret;
279
280 if (track > drv->max_track ||
281 (head != 0 && (drv->flags & FDISK_DBL_SIDES) == 0)) {
282 FLOPPY_DPRINTF("try to read %d %02x %02x (max=%d %d %02x %02x)\n",
283 head, track, sect, 1,
284 (drv->flags & FDISK_DBL_SIDES) == 0 ? 0 : 1,
285 drv->max_track, drv->last_sect);
286 return 2;
287 }
288 if (sect > drv->last_sect) {
289 FLOPPY_DPRINTF("try to read %d %02x %02x (max=%d %d %02x %02x)\n",
290 head, track, sect, 1,
291 (drv->flags & FDISK_DBL_SIDES) == 0 ? 0 : 1,
292 drv->max_track, drv->last_sect);
293 return 3;
294 }
295 sector = fd_sector_calc(head, track, sect, drv->last_sect, NUM_SIDES(drv));
296 ret = 0;
297 if (sector != fd_sector(drv)) {
298 #if 0
299 if (!enable_seek) {
300 FLOPPY_DPRINTF("error: no implicit seek %d %02x %02x"
301 " (max=%d %02x %02x)\n",
302 head, track, sect, 1, drv->max_track,
303 drv->last_sect);
304 return 4;
305 }
306 #endif
307 drv->head = head;
308 if (drv->track != track) {
309 if (drv->blk != NULL && blk_is_inserted(drv->blk)) {
310 drv->media_changed = 0;
311 }
312 ret = 1;
313 }
314 drv->track = track;
315 drv->sect = sect;
316 }
317
318 if (drv->blk == NULL || !blk_is_inserted(drv->blk)) {
319 ret = 2;
320 }
321
322 return ret;
323 }
324
325 /* Set drive back to track 0 */
326 static void fd_recalibrate(FDrive *drv)
327 {
328 FLOPPY_DPRINTF("recalibrate\n");
329 fd_seek(drv, 0, 0, 1, 1);
330 }
331
332 /**
333 * Determine geometry based on inserted diskette.
334 * Will not operate on an empty drive.
335 *
336 * @return: 0 on success, -1 if the drive is empty.
337 */
338 static int pick_geometry(FDrive *drv)
339 {
340 BlockBackend *blk = drv->blk;
341 const FDFormat *parse;
342 uint64_t nb_sectors, size;
343 int i;
344 int match, size_match, type_match;
345 bool magic = drv->drive == FLOPPY_DRIVE_TYPE_AUTO;
346
347 /* We can only pick a geometry if we have a diskette. */
348 if (!drv->blk || !blk_is_inserted(drv->blk) ||
349 drv->drive == FLOPPY_DRIVE_TYPE_NONE)
350 {
351 return -1;
352 }
353
354 /* We need to determine the likely geometry of the inserted medium.
355 * In order of preference, we look for:
356 * (1) The same drive type and number of sectors,
357 * (2) The same diskette size and number of sectors,
358 * (3) The same drive type.
359 *
360 * In all cases, matches that occur higher in the drive table will take
361 * precedence over matches that occur later in the table.
362 */
363 blk_get_geometry(blk, &nb_sectors);
364 match = size_match = type_match = -1;
365 for (i = 0; ; i++) {
366 parse = &fd_formats[i];
367 if (parse->drive == FLOPPY_DRIVE_TYPE_NONE) {
368 break;
369 }
370 size = (parse->max_head + 1) * parse->max_track * parse->last_sect;
371 if (nb_sectors == size) {
372 if (magic || parse->drive == drv->drive) {
373 /* (1) perfect match -- nb_sectors and drive type */
374 goto out;
375 } else if (drive_size(parse->drive) == drive_size(drv->drive)) {
376 /* (2) size match -- nb_sectors and physical medium size */
377 match = (match == -1) ? i : match;
378 } else {
379 /* This is suspicious -- Did the user misconfigure? */
380 size_match = (size_match == -1) ? i : size_match;
381 }
382 } else if (type_match == -1) {
383 if ((parse->drive == drv->drive) ||
384 (magic && (parse->drive == get_fallback_drive_type(drv)))) {
385 /* (3) type match -- nb_sectors mismatch, but matches the type
386 * specified explicitly by the user, or matches the fallback
387 * default type when using the drive autodetect mechanism */
388 type_match = i;
389 }
390 }
391 }
392
393 /* No exact match found */
394 if (match == -1) {
395 if (size_match != -1) {
396 parse = &fd_formats[size_match];
397 FLOPPY_DPRINTF("User requested floppy drive type '%s', "
398 "but inserted medium appears to be a "
399 "%"PRId64" sector '%s' type\n",
400 FloppyDriveType_str(drv->drive),
401 nb_sectors,
402 FloppyDriveType_str(parse->drive));
403 }
404 assert(type_match != -1 && "misconfigured fd_format");
405 match = type_match;
406 }
407 parse = &(fd_formats[match]);
408
409 out:
410 if (parse->max_head == 0) {
411 drv->flags &= ~FDISK_DBL_SIDES;
412 } else {
413 drv->flags |= FDISK_DBL_SIDES;
414 }
415 drv->max_track = parse->max_track;
416 drv->last_sect = parse->last_sect;
417 drv->disk = parse->drive;
418 drv->media_rate = parse->rate;
419 return 0;
420 }
421
422 static void pick_drive_type(FDrive *drv)
423 {
424 if (drv->drive != FLOPPY_DRIVE_TYPE_AUTO) {
425 return;
426 }
427
428 if (pick_geometry(drv) == 0) {
429 drv->drive = drv->disk;
430 } else {
431 drv->drive = get_fallback_drive_type(drv);
432 }
433
434 g_assert(drv->drive != FLOPPY_DRIVE_TYPE_AUTO);
435 }
436
437 /* Revalidate a disk drive after a disk change */
438 static void fd_revalidate(FDrive *drv)
439 {
440 int rc;
441
442 FLOPPY_DPRINTF("revalidate\n");
443 if (drv->blk != NULL) {
444 drv->ro = blk_is_read_only(drv->blk);
445 if (!blk_is_inserted(drv->blk)) {
446 FLOPPY_DPRINTF("No disk in drive\n");
447 drv->disk = FLOPPY_DRIVE_TYPE_NONE;
448 fd_empty_seek_hack(drv);
449 } else if (!drv->media_validated) {
450 rc = pick_geometry(drv);
451 if (rc) {
452 FLOPPY_DPRINTF("Could not validate floppy drive media");
453 } else {
454 drv->media_validated = true;
455 FLOPPY_DPRINTF("Floppy disk (%d h %d t %d s) %s\n",
456 (drv->flags & FDISK_DBL_SIDES) ? 2 : 1,
457 drv->max_track, drv->last_sect,
458 drv->ro ? "ro" : "rw");
459 }
460 }
461 } else {
462 FLOPPY_DPRINTF("No drive connected\n");
463 drv->last_sect = 0;
464 drv->max_track = 0;
465 drv->flags &= ~FDISK_DBL_SIDES;
466 drv->drive = FLOPPY_DRIVE_TYPE_NONE;
467 drv->disk = FLOPPY_DRIVE_TYPE_NONE;
468 }
469 }
470
471 static void fd_change_cb(void *opaque, bool load, Error **errp)
472 {
473 FDrive *drive = opaque;
474
475 if (!load) {
476 blk_set_perm(drive->blk, 0, BLK_PERM_ALL, &error_abort);
477 } else {
478 if (!blkconf_apply_backend_options(drive->conf,
479 blk_is_read_only(drive->blk), false,
480 errp)) {
481 return;
482 }
483 }
484
485 drive->media_changed = 1;
486 drive->media_validated = false;
487 fd_revalidate(drive);
488 }
489
490 static const BlockDevOps fd_block_ops = {
491 .change_media_cb = fd_change_cb,
492 };
493
494
495 #define TYPE_FLOPPY_DRIVE "floppy"
496 #define FLOPPY_DRIVE(obj) \
497 OBJECT_CHECK(FloppyDrive, (obj), TYPE_FLOPPY_DRIVE)
498
499 typedef struct FloppyDrive {
500 DeviceState qdev;
501 uint32_t unit;
502 BlockConf conf;
503 FloppyDriveType type;
504 } FloppyDrive;
505
506 static Property floppy_drive_properties[] = {
507 DEFINE_PROP_UINT32("unit", FloppyDrive, unit, -1),
508 DEFINE_BLOCK_PROPERTIES(FloppyDrive, conf),
509 DEFINE_PROP_SIGNED("drive-type", FloppyDrive, type,
510 FLOPPY_DRIVE_TYPE_AUTO, qdev_prop_fdc_drive_type,
511 FloppyDriveType),
512 DEFINE_PROP_END_OF_LIST(),
513 };
514
515 static void floppy_drive_realize(DeviceState *qdev, Error **errp)
516 {
517 FloppyDrive *dev = FLOPPY_DRIVE(qdev);
518 FloppyBus *bus = FLOPPY_BUS(qdev->parent_bus);
519 FDrive *drive;
520 bool read_only;
521 int ret;
522
523 if (dev->unit == -1) {
524 for (dev->unit = 0; dev->unit < MAX_FD; dev->unit++) {
525 drive = get_drv(bus->fdc, dev->unit);
526 if (!drive->blk) {
527 break;
528 }
529 }
530 }
531
532 if (dev->unit >= MAX_FD) {
533 error_setg(errp, "Can't create floppy unit %d, bus supports "
534 "only %d units", dev->unit, MAX_FD);
535 return;
536 }
537
538 drive = get_drv(bus->fdc, dev->unit);
539 if (drive->blk) {
540 error_setg(errp, "Floppy unit %d is in use", dev->unit);
541 return;
542 }
543
544 if (!dev->conf.blk) {
545 /* Anonymous BlockBackend for an empty drive */
546 dev->conf.blk = blk_new(qemu_get_aio_context(), 0, BLK_PERM_ALL);
547 ret = blk_attach_dev(dev->conf.blk, qdev);
548 assert(ret == 0);
549
550 /* Don't take write permissions on an empty drive to allow attaching a
551 * read-only node later */
552 read_only = true;
553 } else {
554 read_only = !blk_bs(dev->conf.blk) || blk_is_read_only(dev->conf.blk);
555 }
556
557 if (!blkconf_blocksizes(&dev->conf, errp)) {
558 return;
559 }
560
561 if (dev->conf.logical_block_size != 512 ||
562 dev->conf.physical_block_size != 512)
563 {
564 error_setg(errp, "Physical and logical block size must "
565 "be 512 for floppy");
566 return;
567 }
568
569 /* rerror/werror aren't supported by fdc and therefore not even registered
570 * with qdev. So set the defaults manually before they are used in
571 * blkconf_apply_backend_options(). */
572 dev->conf.rerror = BLOCKDEV_ON_ERROR_AUTO;
573 dev->conf.werror = BLOCKDEV_ON_ERROR_AUTO;
574
575 if (!blkconf_apply_backend_options(&dev->conf, read_only, false, errp)) {
576 return;
577 }
578
579 /* 'enospc' is the default for -drive, 'report' is what blk_new() gives us
580 * for empty drives. */
581 if (blk_get_on_error(dev->conf.blk, 0) != BLOCKDEV_ON_ERROR_ENOSPC &&
582 blk_get_on_error(dev->conf.blk, 0) != BLOCKDEV_ON_ERROR_REPORT) {
583 error_setg(errp, "fdc doesn't support drive option werror");
584 return;
585 }
586 if (blk_get_on_error(dev->conf.blk, 1) != BLOCKDEV_ON_ERROR_REPORT) {
587 error_setg(errp, "fdc doesn't support drive option rerror");
588 return;
589 }
590
591 drive->conf = &dev->conf;
592 drive->blk = dev->conf.blk;
593 drive->fdctrl = bus->fdc;
594
595 fd_init(drive);
596 blk_set_dev_ops(drive->blk, &fd_block_ops, drive);
597
598 /* Keep 'type' qdev property and FDrive->drive in sync */
599 drive->drive = dev->type;
600 pick_drive_type(drive);
601 dev->type = drive->drive;
602
603 fd_revalidate(drive);
604 }
605
606 static void floppy_drive_class_init(ObjectClass *klass, void *data)
607 {
608 DeviceClass *k = DEVICE_CLASS(klass);
609 k->realize = floppy_drive_realize;
610 set_bit(DEVICE_CATEGORY_STORAGE, k->categories);
611 k->bus_type = TYPE_FLOPPY_BUS;
612 device_class_set_props(k, floppy_drive_properties);
613 k->desc = "virtual floppy drive";
614 }
615
616 static const TypeInfo floppy_drive_info = {
617 .name = TYPE_FLOPPY_DRIVE,
618 .parent = TYPE_DEVICE,
619 .instance_size = sizeof(FloppyDrive),
620 .class_init = floppy_drive_class_init,
621 };
622
623 /********************************************************/
624 /* Intel 82078 floppy disk controller emulation */
625
626 static void fdctrl_reset(FDCtrl *fdctrl, int do_irq);
627 static void fdctrl_to_command_phase(FDCtrl *fdctrl);
628 static int fdctrl_transfer_handler (void *opaque, int nchan,
629 int dma_pos, int dma_len);
630 static void fdctrl_raise_irq(FDCtrl *fdctrl);
631 static FDrive *get_cur_drv(FDCtrl *fdctrl);
632
633 static uint32_t fdctrl_read_statusA(FDCtrl *fdctrl);
634 static uint32_t fdctrl_read_statusB(FDCtrl *fdctrl);
635 static uint32_t fdctrl_read_dor(FDCtrl *fdctrl);
636 static void fdctrl_write_dor(FDCtrl *fdctrl, uint32_t value);
637 static uint32_t fdctrl_read_tape(FDCtrl *fdctrl);
638 static void fdctrl_write_tape(FDCtrl *fdctrl, uint32_t value);
639 static uint32_t fdctrl_read_main_status(FDCtrl *fdctrl);
640 static void fdctrl_write_rate(FDCtrl *fdctrl, uint32_t value);
641 static uint32_t fdctrl_read_data(FDCtrl *fdctrl);
642 static void fdctrl_write_data(FDCtrl *fdctrl, uint32_t value);
643 static uint32_t fdctrl_read_dir(FDCtrl *fdctrl);
644 static void fdctrl_write_ccr(FDCtrl *fdctrl, uint32_t value);
645
646 enum {
647 FD_DIR_WRITE = 0,
648 FD_DIR_READ = 1,
649 FD_DIR_SCANE = 2,
650 FD_DIR_SCANL = 3,
651 FD_DIR_SCANH = 4,
652 FD_DIR_VERIFY = 5,
653 };
654
655 enum {
656 FD_STATE_MULTI = 0x01, /* multi track flag */
657 FD_STATE_FORMAT = 0x02, /* format flag */
658 };
659
660 enum {
661 FD_REG_SRA = 0x00,
662 FD_REG_SRB = 0x01,
663 FD_REG_DOR = 0x02,
664 FD_REG_TDR = 0x03,
665 FD_REG_MSR = 0x04,
666 FD_REG_DSR = 0x04,
667 FD_REG_FIFO = 0x05,
668 FD_REG_DIR = 0x07,
669 FD_REG_CCR = 0x07,
670 };
671
672 enum {
673 FD_CMD_READ_TRACK = 0x02,
674 FD_CMD_SPECIFY = 0x03,
675 FD_CMD_SENSE_DRIVE_STATUS = 0x04,
676 FD_CMD_WRITE = 0x05,
677 FD_CMD_READ = 0x06,
678 FD_CMD_RECALIBRATE = 0x07,
679 FD_CMD_SENSE_INTERRUPT_STATUS = 0x08,
680 FD_CMD_WRITE_DELETED = 0x09,
681 FD_CMD_READ_ID = 0x0a,
682 FD_CMD_READ_DELETED = 0x0c,
683 FD_CMD_FORMAT_TRACK = 0x0d,
684 FD_CMD_DUMPREG = 0x0e,
685 FD_CMD_SEEK = 0x0f,
686 FD_CMD_VERSION = 0x10,
687 FD_CMD_SCAN_EQUAL = 0x11,
688 FD_CMD_PERPENDICULAR_MODE = 0x12,
689 FD_CMD_CONFIGURE = 0x13,
690 FD_CMD_LOCK = 0x14,
691 FD_CMD_VERIFY = 0x16,
692 FD_CMD_POWERDOWN_MODE = 0x17,
693 FD_CMD_PART_ID = 0x18,
694 FD_CMD_SCAN_LOW_OR_EQUAL = 0x19,
695 FD_CMD_SCAN_HIGH_OR_EQUAL = 0x1d,
696 FD_CMD_SAVE = 0x2e,
697 FD_CMD_OPTION = 0x33,
698 FD_CMD_RESTORE = 0x4e,
699 FD_CMD_DRIVE_SPECIFICATION_COMMAND = 0x8e,
700 FD_CMD_RELATIVE_SEEK_OUT = 0x8f,
701 FD_CMD_FORMAT_AND_WRITE = 0xcd,
702 FD_CMD_RELATIVE_SEEK_IN = 0xcf,
703 };
704
705 enum {
706 FD_CONFIG_PRETRK = 0xff, /* Pre-compensation set to track 0 */
707 FD_CONFIG_FIFOTHR = 0x0f, /* FIFO threshold set to 1 byte */
708 FD_CONFIG_POLL = 0x10, /* Poll enabled */
709 FD_CONFIG_EFIFO = 0x20, /* FIFO disabled */
710 FD_CONFIG_EIS = 0x40, /* No implied seeks */
711 };
712
713 enum {
714 FD_SR0_DS0 = 0x01,
715 FD_SR0_DS1 = 0x02,
716 FD_SR0_HEAD = 0x04,
717 FD_SR0_EQPMT = 0x10,
718 FD_SR0_SEEK = 0x20,
719 FD_SR0_ABNTERM = 0x40,
720 FD_SR0_INVCMD = 0x80,
721 FD_SR0_RDYCHG = 0xc0,
722 };
723
724 enum {
725 FD_SR1_MA = 0x01, /* Missing address mark */
726 FD_SR1_NW = 0x02, /* Not writable */
727 FD_SR1_EC = 0x80, /* End of cylinder */
728 };
729
730 enum {
731 FD_SR2_SNS = 0x04, /* Scan not satisfied */
732 FD_SR2_SEH = 0x08, /* Scan equal hit */
733 };
734
735 enum {
736 FD_SRA_DIR = 0x01,
737 FD_SRA_nWP = 0x02,
738 FD_SRA_nINDX = 0x04,
739 FD_SRA_HDSEL = 0x08,
740 FD_SRA_nTRK0 = 0x10,
741 FD_SRA_STEP = 0x20,
742 FD_SRA_nDRV2 = 0x40,
743 FD_SRA_INTPEND = 0x80,
744 };
745
746 enum {
747 FD_SRB_MTR0 = 0x01,
748 FD_SRB_MTR1 = 0x02,
749 FD_SRB_WGATE = 0x04,
750 FD_SRB_RDATA = 0x08,
751 FD_SRB_WDATA = 0x10,
752 FD_SRB_DR0 = 0x20,
753 };
754
755 enum {
756 #if MAX_FD == 4
757 FD_DOR_SELMASK = 0x03,
758 #else
759 FD_DOR_SELMASK = 0x01,
760 #endif
761 FD_DOR_nRESET = 0x04,
762 FD_DOR_DMAEN = 0x08,
763 FD_DOR_MOTEN0 = 0x10,
764 FD_DOR_MOTEN1 = 0x20,
765 FD_DOR_MOTEN2 = 0x40,
766 FD_DOR_MOTEN3 = 0x80,
767 };
768
769 enum {
770 #if MAX_FD == 4
771 FD_TDR_BOOTSEL = 0x0c,
772 #else
773 FD_TDR_BOOTSEL = 0x04,
774 #endif
775 };
776
777 enum {
778 FD_DSR_DRATEMASK= 0x03,
779 FD_DSR_PWRDOWN = 0x40,
780 FD_DSR_SWRESET = 0x80,
781 };
782
783 enum {
784 FD_MSR_DRV0BUSY = 0x01,
785 FD_MSR_DRV1BUSY = 0x02,
786 FD_MSR_DRV2BUSY = 0x04,
787 FD_MSR_DRV3BUSY = 0x08,
788 FD_MSR_CMDBUSY = 0x10,
789 FD_MSR_NONDMA = 0x20,
790 FD_MSR_DIO = 0x40,
791 FD_MSR_RQM = 0x80,
792 };
793
794 enum {
795 FD_DIR_DSKCHG = 0x80,
796 };
797
798 /*
799 * See chapter 5.0 "Controller phases" of the spec:
800 *
801 * Command phase:
802 * The host writes a command and its parameters into the FIFO. The command
803 * phase is completed when all parameters for the command have been supplied,
804 * and execution phase is entered.
805 *
806 * Execution phase:
807 * Data transfers, either DMA or non-DMA. For non-DMA transfers, the FIFO
808 * contains the payload now, otherwise it's unused. When all bytes of the
809 * required data have been transferred, the state is switched to either result
810 * phase (if the command produces status bytes) or directly back into the
811 * command phase for the next command.
812 *
813 * Result phase:
814 * The host reads out the FIFO, which contains one or more result bytes now.
815 */
816 enum {
817 /* Only for migration: reconstruct phase from registers like qemu 2.3 */
818 FD_PHASE_RECONSTRUCT = 0,
819
820 FD_PHASE_COMMAND = 1,
821 FD_PHASE_EXECUTION = 2,
822 FD_PHASE_RESULT = 3,
823 };
824
825 #define FD_MULTI_TRACK(state) ((state) & FD_STATE_MULTI)
826 #define FD_FORMAT_CMD(state) ((state) & FD_STATE_FORMAT)
827
828 struct FDCtrl {
829 MemoryRegion iomem;
830 qemu_irq irq;
831 /* Controller state */
832 QEMUTimer *result_timer;
833 int dma_chann;
834 uint8_t phase;
835 IsaDma *dma;
836 /* Controller's identification */
837 uint8_t version;
838 /* HW */
839 uint8_t sra;
840 uint8_t srb;
841 uint8_t dor;
842 uint8_t dor_vmstate; /* only used as temp during vmstate */
843 uint8_t tdr;
844 uint8_t dsr;
845 uint8_t msr;
846 uint8_t cur_drv;
847 uint8_t status0;
848 uint8_t status1;
849 uint8_t status2;
850 /* Command FIFO */
851 uint8_t *fifo;
852 int32_t fifo_size;
853 uint32_t data_pos;
854 uint32_t data_len;
855 uint8_t data_state;
856 uint8_t data_dir;
857 uint8_t eot; /* last wanted sector */
858 /* States kept only to be returned back */
859 /* precompensation */
860 uint8_t precomp_trk;
861 uint8_t config;
862 uint8_t lock;
863 /* Power down config (also with status regB access mode */
864 uint8_t pwrd;
865 /* Floppy drives */
866 FloppyBus bus;
867 uint8_t num_floppies;
868 FDrive drives[MAX_FD];
869 struct {
870 BlockBackend *blk;
871 FloppyDriveType type;
872 } qdev_for_drives[MAX_FD];
873 int reset_sensei;
874 uint32_t check_media_rate;
875 FloppyDriveType fallback; /* type=auto failure fallback */
876 /* Timers state */
877 uint8_t timer0;
878 uint8_t timer1;
879 PortioList portio_list;
880 };
881
882 static FloppyDriveType get_fallback_drive_type(FDrive *drv)
883 {
884 return drv->fdctrl->fallback;
885 }
886
887 #define TYPE_SYSBUS_FDC "base-sysbus-fdc"
888 #define SYSBUS_FDC(obj) OBJECT_CHECK(FDCtrlSysBus, (obj), TYPE_SYSBUS_FDC)
889
890 typedef struct FDCtrlSysBus {
891 /*< private >*/
892 SysBusDevice parent_obj;
893 /*< public >*/
894
895 struct FDCtrl state;
896 } FDCtrlSysBus;
897
898 #define ISA_FDC(obj) OBJECT_CHECK(FDCtrlISABus, (obj), TYPE_ISA_FDC)
899
900 typedef struct FDCtrlISABus {
901 ISADevice parent_obj;
902
903 uint32_t iobase;
904 uint32_t irq;
905 uint32_t dma;
906 struct FDCtrl state;
907 int32_t bootindexA;
908 int32_t bootindexB;
909 } FDCtrlISABus;
910
911 static uint32_t fdctrl_read (void *opaque, uint32_t reg)
912 {
913 FDCtrl *fdctrl = opaque;
914 uint32_t retval;
915
916 reg &= 7;
917 switch (reg) {
918 case FD_REG_SRA:
919 retval = fdctrl_read_statusA(fdctrl);
920 break;
921 case FD_REG_SRB:
922 retval = fdctrl_read_statusB(fdctrl);
923 break;
924 case FD_REG_DOR:
925 retval = fdctrl_read_dor(fdctrl);
926 break;
927 case FD_REG_TDR:
928 retval = fdctrl_read_tape(fdctrl);
929 break;
930 case FD_REG_MSR:
931 retval = fdctrl_read_main_status(fdctrl);
932 break;
933 case FD_REG_FIFO:
934 retval = fdctrl_read_data(fdctrl);
935 break;
936 case FD_REG_DIR:
937 retval = fdctrl_read_dir(fdctrl);
938 break;
939 default:
940 retval = (uint32_t)(-1);
941 break;
942 }
943 trace_fdc_ioport_read(reg, retval);
944
945 return retval;
946 }
947
948 static void fdctrl_write (void *opaque, uint32_t reg, uint32_t value)
949 {
950 FDCtrl *fdctrl = opaque;
951
952 reg &= 7;
953 trace_fdc_ioport_write(reg, value);
954 switch (reg) {
955 case FD_REG_DOR:
956 fdctrl_write_dor(fdctrl, value);
957 break;
958 case FD_REG_TDR:
959 fdctrl_write_tape(fdctrl, value);
960 break;
961 case FD_REG_DSR:
962 fdctrl_write_rate(fdctrl, value);
963 break;
964 case FD_REG_FIFO:
965 fdctrl_write_data(fdctrl, value);
966 break;
967 case FD_REG_CCR:
968 fdctrl_write_ccr(fdctrl, value);
969 break;
970 default:
971 break;
972 }
973 }
974
975 static uint64_t fdctrl_read_mem (void *opaque, hwaddr reg,
976 unsigned ize)
977 {
978 return fdctrl_read(opaque, (uint32_t)reg);
979 }
980
981 static void fdctrl_write_mem (void *opaque, hwaddr reg,
982 uint64_t value, unsigned size)
983 {
984 fdctrl_write(opaque, (uint32_t)reg, value);
985 }
986
987 static const MemoryRegionOps fdctrl_mem_ops = {
988 .read = fdctrl_read_mem,
989 .write = fdctrl_write_mem,
990 .endianness = DEVICE_NATIVE_ENDIAN,
991 };
992
993 static const MemoryRegionOps fdctrl_mem_strict_ops = {
994 .read = fdctrl_read_mem,
995 .write = fdctrl_write_mem,
996 .endianness = DEVICE_NATIVE_ENDIAN,
997 .valid = {
998 .min_access_size = 1,
999 .max_access_size = 1,
1000 },
1001 };
1002
1003 static bool fdrive_media_changed_needed(void *opaque)
1004 {
1005 FDrive *drive = opaque;
1006
1007 return (drive->blk != NULL && drive->media_changed != 1);
1008 }
1009
1010 static const VMStateDescription vmstate_fdrive_media_changed = {
1011 .name = "fdrive/media_changed",
1012 .version_id = 1,
1013 .minimum_version_id = 1,
1014 .needed = fdrive_media_changed_needed,
1015 .fields = (VMStateField[]) {
1016 VMSTATE_UINT8(media_changed, FDrive),
1017 VMSTATE_END_OF_LIST()
1018 }
1019 };
1020
1021 static bool fdrive_media_rate_needed(void *opaque)
1022 {
1023 FDrive *drive = opaque;
1024
1025 return drive->fdctrl->check_media_rate;
1026 }
1027
1028 static const VMStateDescription vmstate_fdrive_media_rate = {
1029 .name = "fdrive/media_rate",
1030 .version_id = 1,
1031 .minimum_version_id = 1,
1032 .needed = fdrive_media_rate_needed,
1033 .fields = (VMStateField[]) {
1034 VMSTATE_UINT8(media_rate, FDrive),
1035 VMSTATE_END_OF_LIST()
1036 }
1037 };
1038
1039 static bool fdrive_perpendicular_needed(void *opaque)
1040 {
1041 FDrive *drive = opaque;
1042
1043 return drive->perpendicular != 0;
1044 }
1045
1046 static const VMStateDescription vmstate_fdrive_perpendicular = {
1047 .name = "fdrive/perpendicular",
1048 .version_id = 1,
1049 .minimum_version_id = 1,
1050 .needed = fdrive_perpendicular_needed,
1051 .fields = (VMStateField[]) {
1052 VMSTATE_UINT8(perpendicular, FDrive),
1053 VMSTATE_END_OF_LIST()
1054 }
1055 };
1056
1057 static int fdrive_post_load(void *opaque, int version_id)
1058 {
1059 fd_revalidate(opaque);
1060 return 0;
1061 }
1062
1063 static const VMStateDescription vmstate_fdrive = {
1064 .name = "fdrive",
1065 .version_id = 1,
1066 .minimum_version_id = 1,
1067 .post_load = fdrive_post_load,
1068 .fields = (VMStateField[]) {
1069 VMSTATE_UINT8(head, FDrive),
1070 VMSTATE_UINT8(track, FDrive),
1071 VMSTATE_UINT8(sect, FDrive),
1072 VMSTATE_END_OF_LIST()
1073 },
1074 .subsections = (const VMStateDescription*[]) {
1075 &vmstate_fdrive_media_changed,
1076 &vmstate_fdrive_media_rate,
1077 &vmstate_fdrive_perpendicular,
1078 NULL
1079 }
1080 };
1081
1082 /*
1083 * Reconstructs the phase from register values according to the logic that was
1084 * implemented in qemu 2.3. This is the default value that is used if the phase
1085 * subsection is not present on migration.
1086 *
1087 * Don't change this function to reflect newer qemu versions, it is part of
1088 * the migration ABI.
1089 */
1090 static int reconstruct_phase(FDCtrl *fdctrl)
1091 {
1092 if (fdctrl->msr & FD_MSR_NONDMA) {
1093 return FD_PHASE_EXECUTION;
1094 } else if ((fdctrl->msr & FD_MSR_RQM) == 0) {
1095 /* qemu 2.3 disabled RQM only during DMA transfers */
1096 return FD_PHASE_EXECUTION;
1097 } else if (fdctrl->msr & FD_MSR_DIO) {
1098 return FD_PHASE_RESULT;
1099 } else {
1100 return FD_PHASE_COMMAND;
1101 }
1102 }
1103
1104 static int fdc_pre_save(void *opaque)
1105 {
1106 FDCtrl *s = opaque;
1107
1108 s->dor_vmstate = s->dor | GET_CUR_DRV(s);
1109
1110 return 0;
1111 }
1112
1113 static int fdc_pre_load(void *opaque)
1114 {
1115 FDCtrl *s = opaque;
1116 s->phase = FD_PHASE_RECONSTRUCT;
1117 return 0;
1118 }
1119
1120 static int fdc_post_load(void *opaque, int version_id)
1121 {
1122 FDCtrl *s = opaque;
1123
1124 SET_CUR_DRV(s, s->dor_vmstate & FD_DOR_SELMASK);
1125 s->dor = s->dor_vmstate & ~FD_DOR_SELMASK;
1126
1127 if (s->phase == FD_PHASE_RECONSTRUCT) {
1128 s->phase = reconstruct_phase(s);
1129 }
1130
1131 return 0;
1132 }
1133
1134 static bool fdc_reset_sensei_needed(void *opaque)
1135 {
1136 FDCtrl *s = opaque;
1137
1138 return s->reset_sensei != 0;
1139 }
1140
1141 static const VMStateDescription vmstate_fdc_reset_sensei = {
1142 .name = "fdc/reset_sensei",
1143 .version_id = 1,
1144 .minimum_version_id = 1,
1145 .needed = fdc_reset_sensei_needed,
1146 .fields = (VMStateField[]) {
1147 VMSTATE_INT32(reset_sensei, FDCtrl),
1148 VMSTATE_END_OF_LIST()
1149 }
1150 };
1151
1152 static bool fdc_result_timer_needed(void *opaque)
1153 {
1154 FDCtrl *s = opaque;
1155
1156 return timer_pending(s->result_timer);
1157 }
1158
1159 static const VMStateDescription vmstate_fdc_result_timer = {
1160 .name = "fdc/result_timer",
1161 .version_id = 1,
1162 .minimum_version_id = 1,
1163 .needed = fdc_result_timer_needed,
1164 .fields = (VMStateField[]) {
1165 VMSTATE_TIMER_PTR(result_timer, FDCtrl),
1166 VMSTATE_END_OF_LIST()
1167 }
1168 };
1169
1170 static bool fdc_phase_needed(void *opaque)
1171 {
1172 FDCtrl *fdctrl = opaque;
1173
1174 return reconstruct_phase(fdctrl) != fdctrl->phase;
1175 }
1176
1177 static const VMStateDescription vmstate_fdc_phase = {
1178 .name = "fdc/phase",
1179 .version_id = 1,
1180 .minimum_version_id = 1,
1181 .needed = fdc_phase_needed,
1182 .fields = (VMStateField[]) {
1183 VMSTATE_UINT8(phase, FDCtrl),
1184 VMSTATE_END_OF_LIST()
1185 }
1186 };
1187
1188 static const VMStateDescription vmstate_fdc = {
1189 .name = "fdc",
1190 .version_id = 2,
1191 .minimum_version_id = 2,
1192 .pre_save = fdc_pre_save,
1193 .pre_load = fdc_pre_load,
1194 .post_load = fdc_post_load,
1195 .fields = (VMStateField[]) {
1196 /* Controller State */
1197 VMSTATE_UINT8(sra, FDCtrl),
1198 VMSTATE_UINT8(srb, FDCtrl),
1199 VMSTATE_UINT8(dor_vmstate, FDCtrl),
1200 VMSTATE_UINT8(tdr, FDCtrl),
1201 VMSTATE_UINT8(dsr, FDCtrl),
1202 VMSTATE_UINT8(msr, FDCtrl),
1203 VMSTATE_UINT8(status0, FDCtrl),
1204 VMSTATE_UINT8(status1, FDCtrl),
1205 VMSTATE_UINT8(status2, FDCtrl),
1206 /* Command FIFO */
1207 VMSTATE_VARRAY_INT32(fifo, FDCtrl, fifo_size, 0, vmstate_info_uint8,
1208 uint8_t),
1209 VMSTATE_UINT32(data_pos, FDCtrl),
1210 VMSTATE_UINT32(data_len, FDCtrl),
1211 VMSTATE_UINT8(data_state, FDCtrl),
1212 VMSTATE_UINT8(data_dir, FDCtrl),
1213 VMSTATE_UINT8(eot, FDCtrl),
1214 /* States kept only to be returned back */
1215 VMSTATE_UINT8(timer0, FDCtrl),
1216 VMSTATE_UINT8(timer1, FDCtrl),
1217 VMSTATE_UINT8(precomp_trk, FDCtrl),
1218 VMSTATE_UINT8(config, FDCtrl),
1219 VMSTATE_UINT8(lock, FDCtrl),
1220 VMSTATE_UINT8(pwrd, FDCtrl),
1221 VMSTATE_UINT8_EQUAL(num_floppies, FDCtrl, NULL),
1222 VMSTATE_STRUCT_ARRAY(drives, FDCtrl, MAX_FD, 1,
1223 vmstate_fdrive, FDrive),
1224 VMSTATE_END_OF_LIST()
1225 },
1226 .subsections = (const VMStateDescription*[]) {
1227 &vmstate_fdc_reset_sensei,
1228 &vmstate_fdc_result_timer,
1229 &vmstate_fdc_phase,
1230 NULL
1231 }
1232 };
1233
1234 static void fdctrl_external_reset_sysbus(DeviceState *d)
1235 {
1236 FDCtrlSysBus *sys = SYSBUS_FDC(d);
1237 FDCtrl *s = &sys->state;
1238
1239 fdctrl_reset(s, 0);
1240 }
1241
1242 static void fdctrl_external_reset_isa(DeviceState *d)
1243 {
1244 FDCtrlISABus *isa = ISA_FDC(d);
1245 FDCtrl *s = &isa->state;
1246
1247 fdctrl_reset(s, 0);
1248 }
1249
1250 static void fdctrl_handle_tc(void *opaque, int irq, int level)
1251 {
1252 //FDCtrl *s = opaque;
1253
1254 if (level) {
1255 // XXX
1256 FLOPPY_DPRINTF("TC pulsed\n");
1257 }
1258 }
1259
1260 /* Change IRQ state */
1261 static void fdctrl_reset_irq(FDCtrl *fdctrl)
1262 {
1263 fdctrl->status0 = 0;
1264 if (!(fdctrl->sra & FD_SRA_INTPEND))
1265 return;
1266 FLOPPY_DPRINTF("Reset interrupt\n");
1267 qemu_set_irq(fdctrl->irq, 0);
1268 fdctrl->sra &= ~FD_SRA_INTPEND;
1269 }
1270
1271 static void fdctrl_raise_irq(FDCtrl *fdctrl)
1272 {
1273 if (!(fdctrl->sra & FD_SRA_INTPEND)) {
1274 qemu_set_irq(fdctrl->irq, 1);
1275 fdctrl->sra |= FD_SRA_INTPEND;
1276 }
1277
1278 fdctrl->reset_sensei = 0;
1279 FLOPPY_DPRINTF("Set interrupt status to 0x%02x\n", fdctrl->status0);
1280 }
1281
1282 /* Reset controller */
1283 static void fdctrl_reset(FDCtrl *fdctrl, int do_irq)
1284 {
1285 int i;
1286
1287 FLOPPY_DPRINTF("reset controller\n");
1288 fdctrl_reset_irq(fdctrl);
1289 /* Initialise controller */
1290 fdctrl->sra = 0;
1291 fdctrl->srb = 0xc0;
1292 if (!fdctrl->drives[1].blk) {
1293 fdctrl->sra |= FD_SRA_nDRV2;
1294 }
1295 fdctrl->cur_drv = 0;
1296 fdctrl->dor = FD_DOR_nRESET;
1297 fdctrl->dor |= (fdctrl->dma_chann != -1) ? FD_DOR_DMAEN : 0;
1298 fdctrl->msr = FD_MSR_RQM;
1299 fdctrl->reset_sensei = 0;
1300 timer_del(fdctrl->result_timer);
1301 /* FIFO state */
1302 fdctrl->data_pos = 0;
1303 fdctrl->data_len = 0;
1304 fdctrl->data_state = 0;
1305 fdctrl->data_dir = FD_DIR_WRITE;
1306 for (i = 0; i < MAX_FD; i++)
1307 fd_recalibrate(&fdctrl->drives[i]);
1308 fdctrl_to_command_phase(fdctrl);
1309 if (do_irq) {
1310 fdctrl->status0 |= FD_SR0_RDYCHG;
1311 fdctrl_raise_irq(fdctrl);
1312 fdctrl->reset_sensei = FD_RESET_SENSEI_COUNT;
1313 }
1314 }
1315
1316 static inline FDrive *drv0(FDCtrl *fdctrl)
1317 {
1318 return &fdctrl->drives[(fdctrl->tdr & FD_TDR_BOOTSEL) >> 2];
1319 }
1320
1321 static inline FDrive *drv1(FDCtrl *fdctrl)
1322 {
1323 if ((fdctrl->tdr & FD_TDR_BOOTSEL) < (1 << 2))
1324 return &fdctrl->drives[1];
1325 else
1326 return &fdctrl->drives[0];
1327 }
1328
1329 #if MAX_FD == 4
1330 static inline FDrive *drv2(FDCtrl *fdctrl)
1331 {
1332 if ((fdctrl->tdr & FD_TDR_BOOTSEL) < (2 << 2))
1333 return &fdctrl->drives[2];
1334 else
1335 return &fdctrl->drives[1];
1336 }
1337
1338 static inline FDrive *drv3(FDCtrl *fdctrl)
1339 {
1340 if ((fdctrl->tdr & FD_TDR_BOOTSEL) < (3 << 2))
1341 return &fdctrl->drives[3];
1342 else
1343 return &fdctrl->drives[2];
1344 }
1345 #endif
1346
1347 static FDrive *get_drv(FDCtrl *fdctrl, int unit)
1348 {
1349 switch (unit) {
1350 case 0: return drv0(fdctrl);
1351 case 1: return drv1(fdctrl);
1352 #if MAX_FD == 4
1353 case 2: return drv2(fdctrl);
1354 case 3: return drv3(fdctrl);
1355 #endif
1356 default: return NULL;
1357 }
1358 }
1359
1360 static FDrive *get_cur_drv(FDCtrl *fdctrl)
1361 {
1362 return get_drv(fdctrl, fdctrl->cur_drv);
1363 }
1364
1365 /* Status A register : 0x00 (read-only) */
1366 static uint32_t fdctrl_read_statusA(FDCtrl *fdctrl)
1367 {
1368 uint32_t retval = fdctrl->sra;
1369
1370 FLOPPY_DPRINTF("status register A: 0x%02x\n", retval);
1371
1372 return retval;
1373 }
1374
1375 /* Status B register : 0x01 (read-only) */
1376 static uint32_t fdctrl_read_statusB(FDCtrl *fdctrl)
1377 {
1378 uint32_t retval = fdctrl->srb;
1379
1380 FLOPPY_DPRINTF("status register B: 0x%02x\n", retval);
1381
1382 return retval;
1383 }
1384
1385 /* Digital output register : 0x02 */
1386 static uint32_t fdctrl_read_dor(FDCtrl *fdctrl)
1387 {
1388 uint32_t retval = fdctrl->dor;
1389
1390 /* Selected drive */
1391 retval |= fdctrl->cur_drv;
1392 FLOPPY_DPRINTF("digital output register: 0x%02x\n", retval);
1393
1394 return retval;
1395 }
1396
1397 static void fdctrl_write_dor(FDCtrl *fdctrl, uint32_t value)
1398 {
1399 FLOPPY_DPRINTF("digital output register set to 0x%02x\n", value);
1400
1401 /* Motors */
1402 if (value & FD_DOR_MOTEN0)
1403 fdctrl->srb |= FD_SRB_MTR0;
1404 else
1405 fdctrl->srb &= ~FD_SRB_MTR0;
1406 if (value & FD_DOR_MOTEN1)
1407 fdctrl->srb |= FD_SRB_MTR1;
1408 else
1409 fdctrl->srb &= ~FD_SRB_MTR1;
1410
1411 /* Drive */
1412 if (value & 1)
1413 fdctrl->srb |= FD_SRB_DR0;
1414 else
1415 fdctrl->srb &= ~FD_SRB_DR0;
1416
1417 /* Reset */
1418 if (!(value & FD_DOR_nRESET)) {
1419 if (fdctrl->dor & FD_DOR_nRESET) {
1420 FLOPPY_DPRINTF("controller enter RESET state\n");
1421 }
1422 } else {
1423 if (!(fdctrl->dor & FD_DOR_nRESET)) {
1424 FLOPPY_DPRINTF("controller out of RESET state\n");
1425 fdctrl_reset(fdctrl, 1);
1426 fdctrl->dsr &= ~FD_DSR_PWRDOWN;
1427 }
1428 }
1429 /* Selected drive */
1430 fdctrl->cur_drv = value & FD_DOR_SELMASK;
1431
1432 fdctrl->dor = value;
1433 }
1434
1435 /* Tape drive register : 0x03 */
1436 static uint32_t fdctrl_read_tape(FDCtrl *fdctrl)
1437 {
1438 uint32_t retval = fdctrl->tdr;
1439
1440 FLOPPY_DPRINTF("tape drive register: 0x%02x\n", retval);
1441
1442 return retval;
1443 }
1444
1445 static void fdctrl_write_tape(FDCtrl *fdctrl, uint32_t value)
1446 {
1447 /* Reset mode */
1448 if (!(fdctrl->dor & FD_DOR_nRESET)) {
1449 FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
1450 return;
1451 }
1452 FLOPPY_DPRINTF("tape drive register set to 0x%02x\n", value);
1453 /* Disk boot selection indicator */
1454 fdctrl->tdr = value & FD_TDR_BOOTSEL;
1455 /* Tape indicators: never allow */
1456 }
1457
1458 /* Main status register : 0x04 (read) */
1459 static uint32_t fdctrl_read_main_status(FDCtrl *fdctrl)
1460 {
1461 uint32_t retval = fdctrl->msr;
1462
1463 fdctrl->dsr &= ~FD_DSR_PWRDOWN;
1464 fdctrl->dor |= FD_DOR_nRESET;
1465
1466 FLOPPY_DPRINTF("main status register: 0x%02x\n", retval);
1467
1468 return retval;
1469 }
1470
1471 /* Data select rate register : 0x04 (write) */
1472 static void fdctrl_write_rate(FDCtrl *fdctrl, uint32_t value)
1473 {
1474 /* Reset mode */
1475 if (!(fdctrl->dor & FD_DOR_nRESET)) {
1476 FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
1477 return;
1478 }
1479 FLOPPY_DPRINTF("select rate register set to 0x%02x\n", value);
1480 /* Reset: autoclear */
1481 if (value & FD_DSR_SWRESET) {
1482 fdctrl->dor &= ~FD_DOR_nRESET;
1483 fdctrl_reset(fdctrl, 1);
1484 fdctrl->dor |= FD_DOR_nRESET;
1485 }
1486 if (value & FD_DSR_PWRDOWN) {
1487 fdctrl_reset(fdctrl, 1);
1488 }
1489 fdctrl->dsr = value;
1490 }
1491
1492 /* Configuration control register: 0x07 (write) */
1493 static void fdctrl_write_ccr(FDCtrl *fdctrl, uint32_t value)
1494 {
1495 /* Reset mode */
1496 if (!(fdctrl->dor & FD_DOR_nRESET)) {
1497 FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
1498 return;
1499 }
1500 FLOPPY_DPRINTF("configuration control register set to 0x%02x\n", value);
1501
1502 /* Only the rate selection bits used in AT mode, and we
1503 * store those in the DSR.
1504 */
1505 fdctrl->dsr = (fdctrl->dsr & ~FD_DSR_DRATEMASK) |
1506 (value & FD_DSR_DRATEMASK);
1507 }
1508
1509 static int fdctrl_media_changed(FDrive *drv)
1510 {
1511 return drv->media_changed;
1512 }
1513
1514 /* Digital input register : 0x07 (read-only) */
1515 static uint32_t fdctrl_read_dir(FDCtrl *fdctrl)
1516 {
1517 uint32_t retval = 0;
1518
1519 if (fdctrl_media_changed(get_cur_drv(fdctrl))) {
1520 retval |= FD_DIR_DSKCHG;
1521 }
1522 if (retval != 0) {
1523 FLOPPY_DPRINTF("Floppy digital input register: 0x%02x\n", retval);
1524 }
1525
1526 return retval;
1527 }
1528
1529 /* Clear the FIFO and update the state for receiving the next command */
1530 static void fdctrl_to_command_phase(FDCtrl *fdctrl)
1531 {
1532 fdctrl->phase = FD_PHASE_COMMAND;
1533 fdctrl->data_dir = FD_DIR_WRITE;
1534 fdctrl->data_pos = 0;
1535 fdctrl->data_len = 1; /* Accept command byte, adjust for params later */
1536 fdctrl->msr &= ~(FD_MSR_CMDBUSY | FD_MSR_DIO);
1537 fdctrl->msr |= FD_MSR_RQM;
1538 }
1539
1540 /* Update the state to allow the guest to read out the command status.
1541 * @fifo_len is the number of result bytes to be read out. */
1542 static void fdctrl_to_result_phase(FDCtrl *fdctrl, int fifo_len)
1543 {
1544 fdctrl->phase = FD_PHASE_RESULT;
1545 fdctrl->data_dir = FD_DIR_READ;
1546 fdctrl->data_len = fifo_len;
1547 fdctrl->data_pos = 0;
1548 fdctrl->msr |= FD_MSR_CMDBUSY | FD_MSR_RQM | FD_MSR_DIO;
1549 }
1550
1551 /* Set an error: unimplemented/unknown command */
1552 static void fdctrl_unimplemented(FDCtrl *fdctrl, int direction)
1553 {
1554 qemu_log_mask(LOG_UNIMP, "fdc: unimplemented command 0x%02x\n",
1555 fdctrl->fifo[0]);
1556 fdctrl->fifo[0] = FD_SR0_INVCMD;
1557 fdctrl_to_result_phase(fdctrl, 1);
1558 }
1559
1560 /* Seek to next sector
1561 * returns 0 when end of track reached (for DBL_SIDES on head 1)
1562 * otherwise returns 1
1563 */
1564 static int fdctrl_seek_to_next_sect(FDCtrl *fdctrl, FDrive *cur_drv)
1565 {
1566 FLOPPY_DPRINTF("seek to next sector (%d %02x %02x => %d)\n",
1567 cur_drv->head, cur_drv->track, cur_drv->sect,
1568 fd_sector(cur_drv));
1569 /* XXX: cur_drv->sect >= cur_drv->last_sect should be an
1570 error in fact */
1571 uint8_t new_head = cur_drv->head;
1572 uint8_t new_track = cur_drv->track;
1573 uint8_t new_sect = cur_drv->sect;
1574
1575 int ret = 1;
1576
1577 if (new_sect >= cur_drv->last_sect ||
1578 new_sect == fdctrl->eot) {
1579 new_sect = 1;
1580 if (FD_MULTI_TRACK(fdctrl->data_state)) {
1581 if (new_head == 0 &&
1582 (cur_drv->flags & FDISK_DBL_SIDES) != 0) {
1583 new_head = 1;
1584 } else {
1585 new_head = 0;
1586 new_track++;
1587 fdctrl->status0 |= FD_SR0_SEEK;
1588 if ((cur_drv->flags & FDISK_DBL_SIDES) == 0) {
1589 ret = 0;
1590 }
1591 }
1592 } else {
1593 fdctrl->status0 |= FD_SR0_SEEK;
1594 new_track++;
1595 ret = 0;
1596 }
1597 if (ret == 1) {
1598 FLOPPY_DPRINTF("seek to next track (%d %02x %02x => %d)\n",
1599 new_head, new_track, new_sect, fd_sector(cur_drv));
1600 }
1601 } else {
1602 new_sect++;
1603 }
1604 fd_seek(cur_drv, new_head, new_track, new_sect, 1);
1605 return ret;
1606 }
1607
1608 /* Callback for transfer end (stop or abort) */
1609 static void fdctrl_stop_transfer(FDCtrl *fdctrl, uint8_t status0,
1610 uint8_t status1, uint8_t status2)
1611 {
1612 FDrive *cur_drv;
1613 cur_drv = get_cur_drv(fdctrl);
1614
1615 fdctrl->status0 &= ~(FD_SR0_DS0 | FD_SR0_DS1 | FD_SR0_HEAD);
1616 fdctrl->status0 |= GET_CUR_DRV(fdctrl);
1617 if (cur_drv->head) {
1618 fdctrl->status0 |= FD_SR0_HEAD;
1619 }
1620 fdctrl->status0 |= status0;
1621
1622 FLOPPY_DPRINTF("transfer status: %02x %02x %02x (%02x)\n",
1623 status0, status1, status2, fdctrl->status0);
1624 fdctrl->fifo[0] = fdctrl->status0;
1625 fdctrl->fifo[1] = status1;
1626 fdctrl->fifo[2] = status2;
1627 fdctrl->fifo[3] = cur_drv->track;
1628 fdctrl->fifo[4] = cur_drv->head;
1629 fdctrl->fifo[5] = cur_drv->sect;
1630 fdctrl->fifo[6] = FD_SECTOR_SC;
1631 fdctrl->data_dir = FD_DIR_READ;
1632 if (fdctrl->dma_chann != -1 && !(fdctrl->msr & FD_MSR_NONDMA)) {
1633 IsaDmaClass *k = ISADMA_GET_CLASS(fdctrl->dma);
1634 k->release_DREQ(fdctrl->dma, fdctrl->dma_chann);
1635 }
1636 fdctrl->msr |= FD_MSR_RQM | FD_MSR_DIO;
1637 fdctrl->msr &= ~FD_MSR_NONDMA;
1638
1639 fdctrl_to_result_phase(fdctrl, 7);
1640 fdctrl_raise_irq(fdctrl);
1641 }
1642
1643 /* Prepare a data transfer (either DMA or FIFO) */
1644 static void fdctrl_start_transfer(FDCtrl *fdctrl, int direction)
1645 {
1646 FDrive *cur_drv;
1647 uint8_t kh, kt, ks;
1648
1649 SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
1650 cur_drv = get_cur_drv(fdctrl);
1651 kt = fdctrl->fifo[2];
1652 kh = fdctrl->fifo[3];
1653 ks = fdctrl->fifo[4];
1654 FLOPPY_DPRINTF("Start transfer at %d %d %02x %02x (%d)\n",
1655 GET_CUR_DRV(fdctrl), kh, kt, ks,
1656 fd_sector_calc(kh, kt, ks, cur_drv->last_sect,
1657 NUM_SIDES(cur_drv)));
1658 switch (fd_seek(cur_drv, kh, kt, ks, fdctrl->config & FD_CONFIG_EIS)) {
1659 case 2:
1660 /* sect too big */
1661 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
1662 fdctrl->fifo[3] = kt;
1663 fdctrl->fifo[4] = kh;
1664 fdctrl->fifo[5] = ks;
1665 return;
1666 case 3:
1667 /* track too big */
1668 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, FD_SR1_EC, 0x00);
1669 fdctrl->fifo[3] = kt;
1670 fdctrl->fifo[4] = kh;
1671 fdctrl->fifo[5] = ks;
1672 return;
1673 case 4:
1674 /* No seek enabled */
1675 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
1676 fdctrl->fifo[3] = kt;
1677 fdctrl->fifo[4] = kh;
1678 fdctrl->fifo[5] = ks;
1679 return;
1680 case 1:
1681 fdctrl->status0 |= FD_SR0_SEEK;
1682 break;
1683 default:
1684 break;
1685 }
1686
1687 /* Check the data rate. If the programmed data rate does not match
1688 * the currently inserted medium, the operation has to fail. */
1689 if (fdctrl->check_media_rate &&
1690 (fdctrl->dsr & FD_DSR_DRATEMASK) != cur_drv->media_rate) {
1691 FLOPPY_DPRINTF("data rate mismatch (fdc=%d, media=%d)\n",
1692 fdctrl->dsr & FD_DSR_DRATEMASK, cur_drv->media_rate);
1693 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, FD_SR1_MA, 0x00);
1694 fdctrl->fifo[3] = kt;
1695 fdctrl->fifo[4] = kh;
1696 fdctrl->fifo[5] = ks;
1697 return;
1698 }
1699
1700 /* Set the FIFO state */
1701 fdctrl->data_dir = direction;
1702 fdctrl->data_pos = 0;
1703 assert(fdctrl->msr & FD_MSR_CMDBUSY);
1704 if (fdctrl->fifo[0] & 0x80)
1705 fdctrl->data_state |= FD_STATE_MULTI;
1706 else
1707 fdctrl->data_state &= ~FD_STATE_MULTI;
1708 if (fdctrl->fifo[5] == 0) {
1709 fdctrl->data_len = fdctrl->fifo[8];
1710 } else {
1711 int tmp;
1712 fdctrl->data_len = 128 << (fdctrl->fifo[5] > 7 ? 7 : fdctrl->fifo[5]);
1713 tmp = (fdctrl->fifo[6] - ks + 1);
1714 if (fdctrl->fifo[0] & 0x80)
1715 tmp += fdctrl->fifo[6];
1716 fdctrl->data_len *= tmp;
1717 }
1718 fdctrl->eot = fdctrl->fifo[6];
1719 if (fdctrl->dor & FD_DOR_DMAEN) {
1720 /* DMA transfer is enabled. */
1721 IsaDmaClass *k = ISADMA_GET_CLASS(fdctrl->dma);
1722
1723 FLOPPY_DPRINTF("direction=%d (%d - %d)\n",
1724 direction, (128 << fdctrl->fifo[5]) *
1725 (cur_drv->last_sect - ks + 1), fdctrl->data_len);
1726
1727 /* No access is allowed until DMA transfer has completed */
1728 fdctrl->msr &= ~FD_MSR_RQM;
1729 if (direction != FD_DIR_VERIFY) {
1730 /*
1731 * Now, we just have to wait for the DMA controller to
1732 * recall us...
1733 */
1734 k->hold_DREQ(fdctrl->dma, fdctrl->dma_chann);
1735 k->schedule(fdctrl->dma);
1736 } else {
1737 /* Start transfer */
1738 fdctrl_transfer_handler(fdctrl, fdctrl->dma_chann, 0,
1739 fdctrl->data_len);
1740 }
1741 return;
1742 }
1743 FLOPPY_DPRINTF("start non-DMA transfer\n");
1744 fdctrl->msr |= FD_MSR_NONDMA | FD_MSR_RQM;
1745 if (direction != FD_DIR_WRITE)
1746 fdctrl->msr |= FD_MSR_DIO;
1747 /* IO based transfer: calculate len */
1748 fdctrl_raise_irq(fdctrl);
1749 }
1750
1751 /* Prepare a transfer of deleted data */
1752 static void fdctrl_start_transfer_del(FDCtrl *fdctrl, int direction)
1753 {
1754 qemu_log_mask(LOG_UNIMP, "fdctrl_start_transfer_del() unimplemented\n");
1755
1756 /* We don't handle deleted data,
1757 * so we don't return *ANYTHING*
1758 */
1759 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM | FD_SR0_SEEK, 0x00, 0x00);
1760 }
1761
1762 /* handlers for DMA transfers */
1763 static int fdctrl_transfer_handler (void *opaque, int nchan,
1764 int dma_pos, int dma_len)
1765 {
1766 FDCtrl *fdctrl;
1767 FDrive *cur_drv;
1768 int len, start_pos, rel_pos;
1769 uint8_t status0 = 0x00, status1 = 0x00, status2 = 0x00;
1770 IsaDmaClass *k;
1771
1772 fdctrl = opaque;
1773 if (fdctrl->msr & FD_MSR_RQM) {
1774 FLOPPY_DPRINTF("Not in DMA transfer mode !\n");
1775 return 0;
1776 }
1777 k = ISADMA_GET_CLASS(fdctrl->dma);
1778 cur_drv = get_cur_drv(fdctrl);
1779 if (fdctrl->data_dir == FD_DIR_SCANE || fdctrl->data_dir == FD_DIR_SCANL ||
1780 fdctrl->data_dir == FD_DIR_SCANH)
1781 status2 = FD_SR2_SNS;
1782 if (dma_len > fdctrl->data_len)
1783 dma_len = fdctrl->data_len;
1784 if (cur_drv->blk == NULL) {
1785 if (fdctrl->data_dir == FD_DIR_WRITE)
1786 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM | FD_SR0_SEEK, 0x00, 0x00);
1787 else
1788 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
1789 len = 0;
1790 goto transfer_error;
1791 }
1792 rel_pos = fdctrl->data_pos % FD_SECTOR_LEN;
1793 for (start_pos = fdctrl->data_pos; fdctrl->data_pos < dma_len;) {
1794 len = dma_len - fdctrl->data_pos;
1795 if (len + rel_pos > FD_SECTOR_LEN)
1796 len = FD_SECTOR_LEN - rel_pos;
1797 FLOPPY_DPRINTF("copy %d bytes (%d %d %d) %d pos %d %02x "
1798 "(%d-0x%08x 0x%08x)\n", len, dma_len, fdctrl->data_pos,
1799 fdctrl->data_len, GET_CUR_DRV(fdctrl), cur_drv->head,
1800 cur_drv->track, cur_drv->sect, fd_sector(cur_drv),
1801 fd_sector(cur_drv) * FD_SECTOR_LEN);
1802 if (fdctrl->data_dir != FD_DIR_WRITE ||
1803 len < FD_SECTOR_LEN || rel_pos != 0) {
1804 /* READ & SCAN commands and realign to a sector for WRITE */
1805 if (blk_pread(cur_drv->blk, fd_offset(cur_drv),
1806 fdctrl->fifo, BDRV_SECTOR_SIZE) < 0) {
1807 FLOPPY_DPRINTF("Floppy: error getting sector %d\n",
1808 fd_sector(cur_drv));
1809 /* Sure, image size is too small... */
1810 memset(fdctrl->fifo, 0, FD_SECTOR_LEN);
1811 }
1812 }
1813 switch (fdctrl->data_dir) {
1814 case FD_DIR_READ:
1815 /* READ commands */
1816 k->write_memory(fdctrl->dma, nchan, fdctrl->fifo + rel_pos,
1817 fdctrl->data_pos, len);
1818 break;
1819 case FD_DIR_WRITE:
1820 /* WRITE commands */
1821 if (cur_drv->ro) {
1822 /* Handle readonly medium early, no need to do DMA, touch the
1823 * LED or attempt any writes. A real floppy doesn't attempt
1824 * to write to readonly media either. */
1825 fdctrl_stop_transfer(fdctrl,
1826 FD_SR0_ABNTERM | FD_SR0_SEEK, FD_SR1_NW,
1827 0x00);
1828 goto transfer_error;
1829 }
1830
1831 k->read_memory(fdctrl->dma, nchan, fdctrl->fifo + rel_pos,
1832 fdctrl->data_pos, len);
1833 if (blk_pwrite(cur_drv->blk, fd_offset(cur_drv),
1834 fdctrl->fifo, BDRV_SECTOR_SIZE, 0) < 0) {
1835 FLOPPY_DPRINTF("error writing sector %d\n",
1836 fd_sector(cur_drv));
1837 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM | FD_SR0_SEEK, 0x00, 0x00);
1838 goto transfer_error;
1839 }
1840 break;
1841 case FD_DIR_VERIFY:
1842 /* VERIFY commands */
1843 break;
1844 default:
1845 /* SCAN commands */
1846 {
1847 uint8_t tmpbuf[FD_SECTOR_LEN];
1848 int ret;
1849 k->read_memory(fdctrl->dma, nchan, tmpbuf, fdctrl->data_pos,
1850 len);
1851 ret = memcmp(tmpbuf, fdctrl->fifo + rel_pos, len);
1852 if (ret == 0) {
1853 status2 = FD_SR2_SEH;
1854 goto end_transfer;
1855 }
1856 if ((ret < 0 && fdctrl->data_dir == FD_DIR_SCANL) ||
1857 (ret > 0 && fdctrl->data_dir == FD_DIR_SCANH)) {
1858 status2 = 0x00;
1859 goto end_transfer;
1860 }
1861 }
1862 break;
1863 }
1864 fdctrl->data_pos += len;
1865 rel_pos = fdctrl->data_pos % FD_SECTOR_LEN;
1866 if (rel_pos == 0) {
1867 /* Seek to next sector */
1868 if (!fdctrl_seek_to_next_sect(fdctrl, cur_drv))
1869 break;
1870 }
1871 }
1872 end_transfer:
1873 len = fdctrl->data_pos - start_pos;
1874 FLOPPY_DPRINTF("end transfer %d %d %d\n",
1875 fdctrl->data_pos, len, fdctrl->data_len);
1876 if (fdctrl->data_dir == FD_DIR_SCANE ||
1877 fdctrl->data_dir == FD_DIR_SCANL ||
1878 fdctrl->data_dir == FD_DIR_SCANH)
1879 status2 = FD_SR2_SEH;
1880 fdctrl->data_len -= len;
1881 fdctrl_stop_transfer(fdctrl, status0, status1, status2);
1882 transfer_error:
1883
1884 return len;
1885 }
1886
1887 /* Data register : 0x05 */
1888 static uint32_t fdctrl_read_data(FDCtrl *fdctrl)
1889 {
1890 FDrive *cur_drv;
1891 uint32_t retval = 0;
1892 uint32_t pos;
1893
1894 cur_drv = get_cur_drv(fdctrl);
1895 fdctrl->dsr &= ~FD_DSR_PWRDOWN;
1896 if (!(fdctrl->msr & FD_MSR_RQM) || !(fdctrl->msr & FD_MSR_DIO)) {
1897 FLOPPY_DPRINTF("error: controller not ready for reading\n");
1898 return 0;
1899 }
1900
1901 /* If data_len spans multiple sectors, the current position in the FIFO
1902 * wraps around while fdctrl->data_pos is the real position in the whole
1903 * request. */
1904 pos = fdctrl->data_pos;
1905 pos %= FD_SECTOR_LEN;
1906
1907 switch (fdctrl->phase) {
1908 case FD_PHASE_EXECUTION:
1909 assert(fdctrl->msr & FD_MSR_NONDMA);
1910 if (pos == 0) {
1911 if (fdctrl->data_pos != 0)
1912 if (!fdctrl_seek_to_next_sect(fdctrl, cur_drv)) {
1913 FLOPPY_DPRINTF("error seeking to next sector %d\n",
1914 fd_sector(cur_drv));
1915 return 0;
1916 }
1917 if (blk_pread(cur_drv->blk, fd_offset(cur_drv), fdctrl->fifo,
1918 BDRV_SECTOR_SIZE)
1919 < 0) {
1920 FLOPPY_DPRINTF("error getting sector %d\n",
1921 fd_sector(cur_drv));
1922 /* Sure, image size is too small... */
1923 memset(fdctrl->fifo, 0, FD_SECTOR_LEN);
1924 }
1925 }
1926
1927 if (++fdctrl->data_pos == fdctrl->data_len) {
1928 fdctrl->msr &= ~FD_MSR_RQM;
1929 fdctrl_stop_transfer(fdctrl, 0x00, 0x00, 0x00);
1930 }
1931 break;
1932
1933 case FD_PHASE_RESULT:
1934 assert(!(fdctrl->msr & FD_MSR_NONDMA));
1935 if (++fdctrl->data_pos == fdctrl->data_len) {
1936 fdctrl->msr &= ~FD_MSR_RQM;
1937 fdctrl_to_command_phase(fdctrl);
1938 fdctrl_reset_irq(fdctrl);
1939 }
1940 break;
1941
1942 case FD_PHASE_COMMAND:
1943 default:
1944 abort();
1945 }
1946
1947 retval = fdctrl->fifo[pos];
1948 FLOPPY_DPRINTF("data register: 0x%02x\n", retval);
1949
1950 return retval;
1951 }
1952
1953 static void fdctrl_format_sector(FDCtrl *fdctrl)
1954 {
1955 FDrive *cur_drv;
1956 uint8_t kh, kt, ks;
1957
1958 SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
1959 cur_drv = get_cur_drv(fdctrl);
1960 kt = fdctrl->fifo[6];
1961 kh = fdctrl->fifo[7];
1962 ks = fdctrl->fifo[8];
1963 FLOPPY_DPRINTF("format sector at %d %d %02x %02x (%d)\n",
1964 GET_CUR_DRV(fdctrl), kh, kt, ks,
1965 fd_sector_calc(kh, kt, ks, cur_drv->last_sect,
1966 NUM_SIDES(cur_drv)));
1967 switch (fd_seek(cur_drv, kh, kt, ks, fdctrl->config & FD_CONFIG_EIS)) {
1968 case 2:
1969 /* sect too big */
1970 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
1971 fdctrl->fifo[3] = kt;
1972 fdctrl->fifo[4] = kh;
1973 fdctrl->fifo[5] = ks;
1974 return;
1975 case 3:
1976 /* track too big */
1977 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, FD_SR1_EC, 0x00);
1978 fdctrl->fifo[3] = kt;
1979 fdctrl->fifo[4] = kh;
1980 fdctrl->fifo[5] = ks;
1981 return;
1982 case 4:
1983 /* No seek enabled */
1984 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
1985 fdctrl->fifo[3] = kt;
1986 fdctrl->fifo[4] = kh;
1987 fdctrl->fifo[5] = ks;
1988 return;
1989 case 1:
1990 fdctrl->status0 |= FD_SR0_SEEK;
1991 break;
1992 default:
1993 break;
1994 }
1995 memset(fdctrl->fifo, 0, FD_SECTOR_LEN);
1996 if (cur_drv->blk == NULL ||
1997 blk_pwrite(cur_drv->blk, fd_offset(cur_drv), fdctrl->fifo,
1998 BDRV_SECTOR_SIZE, 0) < 0) {
1999 FLOPPY_DPRINTF("error formatting sector %d\n", fd_sector(cur_drv));
2000 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM | FD_SR0_SEEK, 0x00, 0x00);
2001 } else {
2002 if (cur_drv->sect == cur_drv->last_sect) {
2003 fdctrl->data_state &= ~FD_STATE_FORMAT;
2004 /* Last sector done */
2005 fdctrl_stop_transfer(fdctrl, 0x00, 0x00, 0x00);
2006 } else {
2007 /* More to do */
2008 fdctrl->data_pos = 0;
2009 fdctrl->data_len = 4;
2010 }
2011 }
2012 }
2013
2014 static void fdctrl_handle_lock(FDCtrl *fdctrl, int direction)
2015 {
2016 fdctrl->lock = (fdctrl->fifo[0] & 0x80) ? 1 : 0;
2017 fdctrl->fifo[0] = fdctrl->lock << 4;
2018 fdctrl_to_result_phase(fdctrl, 1);
2019 }
2020
2021 static void fdctrl_handle_dumpreg(FDCtrl *fdctrl, int direction)
2022 {
2023 FDrive *cur_drv = get_cur_drv(fdctrl);
2024
2025 /* Drives position */
2026 fdctrl->fifo[0] = drv0(fdctrl)->track;
2027 fdctrl->fifo[1] = drv1(fdctrl)->track;
2028 #if MAX_FD == 4
2029 fdctrl->fifo[2] = drv2(fdctrl)->track;
2030 fdctrl->fifo[3] = drv3(fdctrl)->track;
2031 #else
2032 fdctrl->fifo[2] = 0;
2033 fdctrl->fifo[3] = 0;
2034 #endif
2035 /* timers */
2036 fdctrl->fifo[4] = fdctrl->timer0;
2037 fdctrl->fifo[5] = (fdctrl->timer1 << 1) | (fdctrl->dor & FD_DOR_DMAEN ? 1 : 0);
2038 fdctrl->fifo[6] = cur_drv->last_sect;
2039 fdctrl->fifo[7] = (fdctrl->lock << 7) |
2040 (cur_drv->perpendicular << 2);
2041 fdctrl->fifo[8] = fdctrl->config;
2042 fdctrl->fifo[9] = fdctrl->precomp_trk;
2043 fdctrl_to_result_phase(fdctrl, 10);
2044 }
2045
2046 static void fdctrl_handle_version(FDCtrl *fdctrl, int direction)
2047 {
2048 /* Controller's version */
2049 fdctrl->fifo[0] = fdctrl->version;
2050 fdctrl_to_result_phase(fdctrl, 1);
2051 }
2052
2053 static void fdctrl_handle_partid(FDCtrl *fdctrl, int direction)
2054 {
2055 fdctrl->fifo[0] = 0x41; /* Stepping 1 */
2056 fdctrl_to_result_phase(fdctrl, 1);
2057 }
2058
2059 static void fdctrl_handle_restore(FDCtrl *fdctrl, int direction)
2060 {
2061 FDrive *cur_drv = get_cur_drv(fdctrl);
2062
2063 /* Drives position */
2064 drv0(fdctrl)->track = fdctrl->fifo[3];
2065 drv1(fdctrl)->track = fdctrl->fifo[4];
2066 #if MAX_FD == 4
2067 drv2(fdctrl)->track = fdctrl->fifo[5];
2068 drv3(fdctrl)->track = fdctrl->fifo[6];
2069 #endif
2070 /* timers */
2071 fdctrl->timer0 = fdctrl->fifo[7];
2072 fdctrl->timer1 = fdctrl->fifo[8];
2073 cur_drv->last_sect = fdctrl->fifo[9];
2074 fdctrl->lock = fdctrl->fifo[10] >> 7;
2075 cur_drv->perpendicular = (fdctrl->fifo[10] >> 2) & 0xF;
2076 fdctrl->config = fdctrl->fifo[11];
2077 fdctrl->precomp_trk = fdctrl->fifo[12];
2078 fdctrl->pwrd = fdctrl->fifo[13];
2079 fdctrl_to_command_phase(fdctrl);
2080 }
2081
2082 static void fdctrl_handle_save(FDCtrl *fdctrl, int direction)
2083 {
2084 FDrive *cur_drv = get_cur_drv(fdctrl);
2085
2086 fdctrl->fifo[0] = 0;
2087 fdctrl->fifo[1] = 0;
2088 /* Drives position */
2089 fdctrl->fifo[2] = drv0(fdctrl)->track;
2090 fdctrl->fifo[3] = drv1(fdctrl)->track;
2091 #if MAX_FD == 4
2092 fdctrl->fifo[4] = drv2(fdctrl)->track;
2093 fdctrl->fifo[5] = drv3(fdctrl)->track;
2094 #else
2095 fdctrl->fifo[4] = 0;
2096 fdctrl->fifo[5] = 0;
2097 #endif
2098 /* timers */
2099 fdctrl->fifo[6] = fdctrl->timer0;
2100 fdctrl->fifo[7] = fdctrl->timer1;
2101 fdctrl->fifo[8] = cur_drv->last_sect;
2102 fdctrl->fifo[9] = (fdctrl->lock << 7) |
2103 (cur_drv->perpendicular << 2);
2104 fdctrl->fifo[10] = fdctrl->config;
2105 fdctrl->fifo[11] = fdctrl->precomp_trk;
2106 fdctrl->fifo[12] = fdctrl->pwrd;
2107 fdctrl->fifo[13] = 0;
2108 fdctrl->fifo[14] = 0;
2109 fdctrl_to_result_phase(fdctrl, 15);
2110 }
2111
2112 static void fdctrl_handle_readid(FDCtrl *fdctrl, int direction)
2113 {
2114 FDrive *cur_drv = get_cur_drv(fdctrl);
2115
2116 cur_drv->head = (fdctrl->fifo[1] >> 2) & 1;
2117 timer_mod(fdctrl->result_timer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) +
2118 (NANOSECONDS_PER_SECOND / 50));
2119 }
2120
2121 static void fdctrl_handle_format_track(FDCtrl *fdctrl, int direction)
2122 {
2123 FDrive *cur_drv;
2124
2125 SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
2126 cur_drv = get_cur_drv(fdctrl);
2127 fdctrl->data_state |= FD_STATE_FORMAT;
2128 if (fdctrl->fifo[0] & 0x80)
2129 fdctrl->data_state |= FD_STATE_MULTI;
2130 else
2131 fdctrl->data_state &= ~FD_STATE_MULTI;
2132 cur_drv->bps =
2133 fdctrl->fifo[2] > 7 ? 16384 : 128 << fdctrl->fifo[2];
2134 #if 0
2135 cur_drv->last_sect =
2136 cur_drv->flags & FDISK_DBL_SIDES ? fdctrl->fifo[3] :
2137 fdctrl->fifo[3] / 2;
2138 #else
2139 cur_drv->last_sect = fdctrl->fifo[3];
2140 #endif
2141 /* TODO: implement format using DMA expected by the Bochs BIOS
2142 * and Linux fdformat (read 3 bytes per sector via DMA and fill
2143 * the sector with the specified fill byte
2144 */
2145 fdctrl->data_state &= ~FD_STATE_FORMAT;
2146 fdctrl_stop_transfer(fdctrl, 0x00, 0x00, 0x00);
2147 }
2148
2149 static void fdctrl_handle_specify(FDCtrl *fdctrl, int direction)
2150 {
2151 fdctrl->timer0 = (fdctrl->fifo[1] >> 4) & 0xF;
2152 fdctrl->timer1 = fdctrl->fifo[2] >> 1;
2153 if (fdctrl->fifo[2] & 1)
2154 fdctrl->dor &= ~FD_DOR_DMAEN;
2155 else
2156 fdctrl->dor |= FD_DOR_DMAEN;
2157 /* No result back */
2158 fdctrl_to_command_phase(fdctrl);
2159 }
2160
2161 static void fdctrl_handle_sense_drive_status(FDCtrl *fdctrl, int direction)
2162 {
2163 FDrive *cur_drv;
2164
2165 SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
2166 cur_drv = get_cur_drv(fdctrl);
2167 cur_drv->head = (fdctrl->fifo[1] >> 2) & 1;
2168 /* 1 Byte status back */
2169 fdctrl->fifo[0] = (cur_drv->ro << 6) |
2170 (cur_drv->track == 0 ? 0x10 : 0x00) |
2171 (cur_drv->head << 2) |
2172 GET_CUR_DRV(fdctrl) |
2173 0x28;
2174 fdctrl_to_result_phase(fdctrl, 1);
2175 }
2176
2177 static void fdctrl_handle_recalibrate(FDCtrl *fdctrl, int direction)
2178 {
2179 FDrive *cur_drv;
2180
2181 SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
2182 cur_drv = get_cur_drv(fdctrl);
2183 fd_recalibrate(cur_drv);
2184 fdctrl_to_command_phase(fdctrl);
2185 /* Raise Interrupt */
2186 fdctrl->status0 |= FD_SR0_SEEK;
2187 fdctrl_raise_irq(fdctrl);
2188 }
2189
2190 static void fdctrl_handle_sense_interrupt_status(FDCtrl *fdctrl, int direction)
2191 {
2192 FDrive *cur_drv = get_cur_drv(fdctrl);
2193
2194 if (fdctrl->reset_sensei > 0) {
2195 fdctrl->fifo[0] =
2196 FD_SR0_RDYCHG + FD_RESET_SENSEI_COUNT - fdctrl->reset_sensei;
2197 fdctrl->reset_sensei--;
2198 } else if (!(fdctrl->sra & FD_SRA_INTPEND)) {
2199 fdctrl->fifo[0] = FD_SR0_INVCMD;
2200 fdctrl_to_result_phase(fdctrl, 1);
2201 return;
2202 } else {
2203 fdctrl->fifo[0] =
2204 (fdctrl->status0 & ~(FD_SR0_HEAD | FD_SR0_DS1 | FD_SR0_DS0))
2205 | GET_CUR_DRV(fdctrl);
2206 }
2207
2208 fdctrl->fifo[1] = cur_drv->track;
2209 fdctrl_to_result_phase(fdctrl, 2);
2210 fdctrl_reset_irq(fdctrl);
2211 fdctrl->status0 = FD_SR0_RDYCHG;
2212 }
2213
2214 static void fdctrl_handle_seek(FDCtrl *fdctrl, int direction)
2215 {
2216 FDrive *cur_drv;
2217
2218 SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
2219 cur_drv = get_cur_drv(fdctrl);
2220 fdctrl_to_command_phase(fdctrl);
2221 /* The seek command just sends step pulses to the drive and doesn't care if
2222 * there is a medium inserted of if it's banging the head against the drive.
2223 */
2224 fd_seek(cur_drv, cur_drv->head, fdctrl->fifo[2], cur_drv->sect, 1);
2225 /* Raise Interrupt */
2226 fdctrl->status0 |= FD_SR0_SEEK;
2227 fdctrl_raise_irq(fdctrl);
2228 }
2229
2230 static void fdctrl_handle_perpendicular_mode(FDCtrl *fdctrl, int direction)
2231 {
2232 FDrive *cur_drv = get_cur_drv(fdctrl);
2233
2234 if (fdctrl->fifo[1] & 0x80)
2235 cur_drv->perpendicular = fdctrl->fifo[1] & 0x7;
2236 /* No result back */
2237 fdctrl_to_command_phase(fdctrl);
2238 }
2239
2240 static void fdctrl_handle_configure(FDCtrl *fdctrl, int direction)
2241 {
2242 fdctrl->config = fdctrl->fifo[2];
2243 fdctrl->precomp_trk = fdctrl->fifo[3];
2244 /* No result back */
2245 fdctrl_to_command_phase(fdctrl);
2246 }
2247
2248 static void fdctrl_handle_powerdown_mode(FDCtrl *fdctrl, int direction)
2249 {
2250 fdctrl->pwrd = fdctrl->fifo[1];
2251 fdctrl->fifo[0] = fdctrl->fifo[1];
2252 fdctrl_to_result_phase(fdctrl, 1);
2253 }
2254
2255 static void fdctrl_handle_option(FDCtrl *fdctrl, int direction)
2256 {
2257 /* No result back */
2258 fdctrl_to_command_phase(fdctrl);
2259 }
2260
2261 static void fdctrl_handle_drive_specification_command(FDCtrl *fdctrl, int direction)
2262 {
2263 FDrive *cur_drv = get_cur_drv(fdctrl);
2264 uint32_t pos;
2265
2266 pos = fdctrl->data_pos - 1;
2267 pos %= FD_SECTOR_LEN;
2268 if (fdctrl->fifo[pos] & 0x80) {
2269 /* Command parameters done */
2270 if (fdctrl->fifo[pos] & 0x40) {
2271 fdctrl->fifo[0] = fdctrl->fifo[1];
2272 fdctrl->fifo[2] = 0;
2273 fdctrl->fifo[3] = 0;
2274 fdctrl_to_result_phase(fdctrl, 4);
2275 } else {
2276 fdctrl_to_command_phase(fdctrl);
2277 }
2278 } else if (fdctrl->data_len > 7) {
2279 /* ERROR */
2280 fdctrl->fifo[0] = 0x80 |
2281 (cur_drv->head << 2) | GET_CUR_DRV(fdctrl);
2282 fdctrl_to_result_phase(fdctrl, 1);
2283 }
2284 }
2285
2286 static void fdctrl_handle_relative_seek_in(FDCtrl *fdctrl, int direction)
2287 {
2288 FDrive *cur_drv;
2289
2290 SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
2291 cur_drv = get_cur_drv(fdctrl);
2292 if (fdctrl->fifo[2] + cur_drv->track >= cur_drv->max_track) {
2293 fd_seek(cur_drv, cur_drv->head, cur_drv->max_track - 1,
2294 cur_drv->sect, 1);
2295 } else {
2296 fd_seek(cur_drv, cur_drv->head,
2297 cur_drv->track + fdctrl->fifo[2], cur_drv->sect, 1);
2298 }
2299 fdctrl_to_command_phase(fdctrl);
2300 /* Raise Interrupt */
2301 fdctrl->status0 |= FD_SR0_SEEK;
2302 fdctrl_raise_irq(fdctrl);
2303 }
2304
2305 static void fdctrl_handle_relative_seek_out(FDCtrl *fdctrl, int direction)
2306 {
2307 FDrive *cur_drv;
2308
2309 SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
2310 cur_drv = get_cur_drv(fdctrl);
2311 if (fdctrl->fifo[2] > cur_drv->track) {
2312 fd_seek(cur_drv, cur_drv->head, 0, cur_drv->sect, 1);
2313 } else {
2314 fd_seek(cur_drv, cur_drv->head,
2315 cur_drv->track - fdctrl->fifo[2], cur_drv->sect, 1);
2316 }
2317 fdctrl_to_command_phase(fdctrl);
2318 /* Raise Interrupt */
2319 fdctrl->status0 |= FD_SR0_SEEK;
2320 fdctrl_raise_irq(fdctrl);
2321 }
2322
2323 /*
2324 * Handlers for the execution phase of each command
2325 */
2326 typedef struct FDCtrlCommand {
2327 uint8_t value;
2328 uint8_t mask;
2329 const char* name;
2330 int parameters;
2331 void (*handler)(FDCtrl *fdctrl, int direction);
2332 int direction;
2333 } FDCtrlCommand;
2334
2335 static const FDCtrlCommand handlers[] = {
2336 { FD_CMD_READ, 0x1f, "READ", 8, fdctrl_start_transfer, FD_DIR_READ },
2337 { FD_CMD_WRITE, 0x3f, "WRITE", 8, fdctrl_start_transfer, FD_DIR_WRITE },
2338 { FD_CMD_SEEK, 0xff, "SEEK", 2, fdctrl_handle_seek },
2339 { FD_CMD_SENSE_INTERRUPT_STATUS, 0xff, "SENSE INTERRUPT STATUS", 0, fdctrl_handle_sense_interrupt_status },
2340 { FD_CMD_RECALIBRATE, 0xff, "RECALIBRATE", 1, fdctrl_handle_recalibrate },
2341 { FD_CMD_FORMAT_TRACK, 0xbf, "FORMAT TRACK", 5, fdctrl_handle_format_track },
2342 { FD_CMD_READ_TRACK, 0xbf, "READ TRACK", 8, fdctrl_start_transfer, FD_DIR_READ },
2343 { FD_CMD_RESTORE, 0xff, "RESTORE", 17, fdctrl_handle_restore }, /* part of READ DELETED DATA */
2344 { FD_CMD_SAVE, 0xff, "SAVE", 0, fdctrl_handle_save }, /* part of READ DELETED DATA */
2345 { FD_CMD_READ_DELETED, 0x1f, "READ DELETED DATA", 8, fdctrl_start_transfer_del, FD_DIR_READ },
2346 { FD_CMD_SCAN_EQUAL, 0x1f, "SCAN EQUAL", 8, fdctrl_start_transfer, FD_DIR_SCANE },
2347 { FD_CMD_VERIFY, 0x1f, "VERIFY", 8, fdctrl_start_transfer, FD_DIR_VERIFY },
2348 { FD_CMD_SCAN_LOW_OR_EQUAL, 0x1f, "SCAN LOW OR EQUAL", 8, fdctrl_start_transfer, FD_DIR_SCANL },
2349 { FD_CMD_SCAN_HIGH_OR_EQUAL, 0x1f, "SCAN HIGH OR EQUAL", 8, fdctrl_start_transfer, FD_DIR_SCANH },
2350 { FD_CMD_WRITE_DELETED, 0x3f, "WRITE DELETED DATA", 8, fdctrl_start_transfer_del, FD_DIR_WRITE },
2351 { FD_CMD_READ_ID, 0xbf, "READ ID", 1, fdctrl_handle_readid },
2352 { FD_CMD_SPECIFY, 0xff, "SPECIFY", 2, fdctrl_handle_specify },
2353 { FD_CMD_SENSE_DRIVE_STATUS, 0xff, "SENSE DRIVE STATUS", 1, fdctrl_handle_sense_drive_status },
2354 { FD_CMD_PERPENDICULAR_MODE, 0xff, "PERPENDICULAR MODE", 1, fdctrl_handle_perpendicular_mode },
2355 { FD_CMD_CONFIGURE, 0xff, "CONFIGURE", 3, fdctrl_handle_configure },
2356 { FD_CMD_POWERDOWN_MODE, 0xff, "POWERDOWN MODE", 2, fdctrl_handle_powerdown_mode },
2357 { FD_CMD_OPTION, 0xff, "OPTION", 1, fdctrl_handle_option },
2358 { FD_CMD_DRIVE_SPECIFICATION_COMMAND, 0xff, "DRIVE SPECIFICATION COMMAND", 5, fdctrl_handle_drive_specification_command },
2359 { FD_CMD_RELATIVE_SEEK_OUT, 0xff, "RELATIVE SEEK OUT", 2, fdctrl_handle_relative_seek_out },
2360 { FD_CMD_FORMAT_AND_WRITE, 0xff, "FORMAT AND WRITE", 10, fdctrl_unimplemented },
2361 { FD_CMD_RELATIVE_SEEK_IN, 0xff, "RELATIVE SEEK IN", 2, fdctrl_handle_relative_seek_in },
2362 { FD_CMD_LOCK, 0x7f, "LOCK", 0, fdctrl_handle_lock },
2363 { FD_CMD_DUMPREG, 0xff, "DUMPREG", 0, fdctrl_handle_dumpreg },
2364 { FD_CMD_VERSION, 0xff, "VERSION", 0, fdctrl_handle_version },
2365 { FD_CMD_PART_ID, 0xff, "PART ID", 0, fdctrl_handle_partid },
2366 { FD_CMD_WRITE, 0x1f, "WRITE (BeOS)", 8, fdctrl_start_transfer, FD_DIR_WRITE }, /* not in specification ; BeOS 4.5 bug */
2367 { 0, 0, "unknown", 0, fdctrl_unimplemented }, /* default handler */
2368 };
2369 /* Associate command to an index in the 'handlers' array */
2370 static uint8_t command_to_handler[256];
2371
2372 static const FDCtrlCommand *get_command(uint8_t cmd)
2373 {
2374 int idx;
2375
2376 idx = command_to_handler[cmd];
2377 FLOPPY_DPRINTF("%s command\n", handlers[idx].name);
2378 return &handlers[idx];
2379 }
2380
2381 static void fdctrl_write_data(FDCtrl *fdctrl, uint32_t value)
2382 {
2383 FDrive *cur_drv;
2384 const FDCtrlCommand *cmd;
2385 uint32_t pos;
2386
2387 /* Reset mode */
2388 if (!(fdctrl->dor & FD_DOR_nRESET)) {
2389 FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
2390 return;
2391 }
2392 if (!(fdctrl->msr & FD_MSR_RQM) || (fdctrl->msr & FD_MSR_DIO)) {
2393 FLOPPY_DPRINTF("error: controller not ready for writing\n");
2394 return;
2395 }
2396 fdctrl->dsr &= ~FD_DSR_PWRDOWN;
2397
2398 FLOPPY_DPRINTF("%s: %02x\n", __func__, value);
2399
2400 /* If data_len spans multiple sectors, the current position in the FIFO
2401 * wraps around while fdctrl->data_pos is the real position in the whole
2402 * request. */
2403 pos = fdctrl->data_pos++;
2404 pos %= FD_SECTOR_LEN;
2405 fdctrl->fifo[pos] = value;
2406
2407 if (fdctrl->data_pos == fdctrl->data_len) {
2408 fdctrl->msr &= ~FD_MSR_RQM;
2409 }
2410
2411 switch (fdctrl->phase) {
2412 case FD_PHASE_EXECUTION:
2413 /* For DMA requests, RQM should be cleared during execution phase, so
2414 * we would have errored out above. */
2415 assert(fdctrl->msr & FD_MSR_NONDMA);
2416
2417 /* FIFO data write */
2418 if (pos == FD_SECTOR_LEN - 1 ||
2419 fdctrl->data_pos == fdctrl->data_len) {
2420 cur_drv = get_cur_drv(fdctrl);
2421 if (blk_pwrite(cur_drv->blk, fd_offset(cur_drv), fdctrl->fifo,
2422 BDRV_SECTOR_SIZE, 0) < 0) {
2423 FLOPPY_DPRINTF("error writing sector %d\n",
2424 fd_sector(cur_drv));
2425 break;
2426 }
2427 if (!fdctrl_seek_to_next_sect(fdctrl, cur_drv)) {
2428 FLOPPY_DPRINTF("error seeking to next sector %d\n",
2429 fd_sector(cur_drv));
2430 break;
2431 }
2432 }
2433
2434 /* Switch to result phase when done with the transfer */
2435 if (fdctrl->data_pos == fdctrl->data_len) {
2436 fdctrl_stop_transfer(fdctrl, 0x00, 0x00, 0x00);
2437 }
2438 break;
2439
2440 case FD_PHASE_COMMAND:
2441 assert(!(fdctrl->msr & FD_MSR_NONDMA));
2442 assert(fdctrl->data_pos < FD_SECTOR_LEN);
2443
2444 if (pos == 0) {
2445 /* The first byte specifies the command. Now we start reading
2446 * as many parameters as this command requires. */
2447 cmd = get_command(value);
2448 fdctrl->data_len = cmd->parameters + 1;
2449 if (cmd->parameters) {
2450 fdctrl->msr |= FD_MSR_RQM;
2451 }
2452 fdctrl->msr |= FD_MSR_CMDBUSY;
2453 }
2454
2455 if (fdctrl->data_pos == fdctrl->data_len) {
2456 /* We have all parameters now, execute the command */
2457 fdctrl->phase = FD_PHASE_EXECUTION;
2458
2459 if (fdctrl->data_state & FD_STATE_FORMAT) {
2460 fdctrl_format_sector(fdctrl);
2461 break;
2462 }
2463
2464 cmd = get_command(fdctrl->fifo[0]);
2465 FLOPPY_DPRINTF("Calling handler for '%s'\n", cmd->name);
2466 cmd->handler(fdctrl, cmd->direction);
2467 }
2468 break;
2469
2470 case FD_PHASE_RESULT:
2471 default:
2472 abort();
2473 }
2474 }
2475
2476 static void fdctrl_result_timer(void *opaque)
2477 {
2478 FDCtrl *fdctrl = opaque;
2479 FDrive *cur_drv = get_cur_drv(fdctrl);
2480
2481 /* Pretend we are spinning.
2482 * This is needed for Coherent, which uses READ ID to check for
2483 * sector interleaving.
2484 */
2485 if (cur_drv->last_sect != 0) {
2486 cur_drv->sect = (cur_drv->sect % cur_drv->last_sect) + 1;
2487 }
2488 /* READ_ID can't automatically succeed! */
2489 if (fdctrl->check_media_rate &&
2490 (fdctrl->dsr & FD_DSR_DRATEMASK) != cur_drv->media_rate) {
2491 FLOPPY_DPRINTF("read id rate mismatch (fdc=%d, media=%d)\n",
2492 fdctrl->dsr & FD_DSR_DRATEMASK, cur_drv->media_rate);
2493 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, FD_SR1_MA, 0x00);
2494 } else {
2495 fdctrl_stop_transfer(fdctrl, 0x00, 0x00, 0x00);
2496 }
2497 }
2498
2499 /* Init functions */
2500
2501 static void fdctrl_init_drives(FloppyBus *bus, DriveInfo **fds)
2502 {
2503 DeviceState *dev;
2504 int i;
2505
2506 for (i = 0; i < MAX_FD; i++) {
2507 if (fds[i]) {
2508 dev = qdev_new("floppy");
2509 qdev_prop_set_uint32(dev, "unit", i);
2510 qdev_prop_set_enum(dev, "drive-type", FLOPPY_DRIVE_TYPE_AUTO);
2511 qdev_prop_set_drive(dev, "drive", blk_by_legacy_dinfo(fds[i]),
2512 &error_fatal);
2513 qdev_realize_and_unref(dev, &bus->bus, &error_fatal);
2514 }
2515 }
2516 }
2517
2518 void isa_fdc_init_drives(ISADevice *fdc, DriveInfo **fds)
2519 {
2520 fdctrl_init_drives(&ISA_FDC(fdc)->state.bus, fds);
2521 }
2522
2523 static void fdctrl_connect_drives(FDCtrl *fdctrl, DeviceState *fdc_dev,
2524 Error **errp)
2525 {
2526 unsigned int i;
2527 FDrive *drive;
2528 DeviceState *dev;
2529 BlockBackend *blk;
2530 Error *local_err = NULL;
2531 const char *fdc_name, *drive_suffix;
2532
2533 for (i = 0; i < MAX_FD; i++) {
2534 drive = &fdctrl->drives[i];
2535 drive->fdctrl = fdctrl;
2536
2537 /* If the drive is not present, we skip creating the qdev device, but
2538 * still have to initialise the controller. */
2539 blk = fdctrl->qdev_for_drives[i].blk;
2540 if (!blk) {
2541 fd_init(drive);
2542 fd_revalidate(drive);
2543 continue;
2544 }
2545
2546 fdc_name = object_get_typename(OBJECT(fdc_dev));
2547 drive_suffix = !strcmp(fdc_name, "SUNW,fdtwo") ? "" : i ? "B" : "A";
2548 warn_report("warning: property %s.drive%s is deprecated",
2549 fdc_name, drive_suffix);
2550 error_printf("Use -device floppy,unit=%d,drive=... instead.\n", i);
2551
2552 dev = qdev_new("floppy");
2553 qdev_prop_set_uint32(dev, "unit", i);
2554 qdev_prop_set_enum(dev, "drive-type", fdctrl->qdev_for_drives[i].type);
2555
2556 /*
2557 * Hack alert: we move the backend from the floppy controller
2558 * device to the floppy device. We first need to detach the
2559 * controller, or else floppy_create()'s qdev_prop_set_drive()
2560 * will die when it attaches floppy device. We also need to
2561 * take another reference so that blk_detach_dev() doesn't
2562 * free blk while we still need it.
2563 *
2564 * The hack is probably a bad idea.
2565 */
2566 blk_ref(blk);
2567 blk_detach_dev(blk, fdc_dev);
2568 fdctrl->qdev_for_drives[i].blk = NULL;
2569 qdev_prop_set_drive(dev, "drive", blk, &local_err);
2570 blk_unref(blk);
2571
2572 if (local_err) {
2573 error_propagate(errp, local_err);
2574 return;
2575 }
2576
2577 qdev_realize_and_unref(dev, &fdctrl->bus.bus, &local_err);
2578 if (local_err) {
2579 error_propagate(errp, local_err);
2580 return;
2581 }
2582 }
2583 }
2584
2585 void fdctrl_init_sysbus(qemu_irq irq, int dma_chann,
2586 hwaddr mmio_base, DriveInfo **fds)
2587 {
2588 FDCtrl *fdctrl;
2589 DeviceState *dev;
2590 SysBusDevice *sbd;
2591 FDCtrlSysBus *sys;
2592
2593 dev = qdev_new("sysbus-fdc");
2594 sys = SYSBUS_FDC(dev);
2595 fdctrl = &sys->state;
2596 fdctrl->dma_chann = dma_chann; /* FIXME */
2597 sbd = SYS_BUS_DEVICE(dev);
2598 sysbus_realize_and_unref(sbd, &error_fatal);
2599 sysbus_connect_irq(sbd, 0, irq);
2600 sysbus_mmio_map(sbd, 0, mmio_base);
2601
2602 fdctrl_init_drives(&sys->state.bus, fds);
2603 }
2604
2605 void sun4m_fdctrl_init(qemu_irq irq, hwaddr io_base,
2606 DriveInfo **fds, qemu_irq *fdc_tc)
2607 {
2608 DeviceState *dev;
2609 FDCtrlSysBus *sys;
2610
2611 dev = qdev_new("SUNW,fdtwo");
2612 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
2613 sys = SYSBUS_FDC(dev);
2614 sysbus_connect_irq(SYS_BUS_DEVICE(sys), 0, irq);
2615 sysbus_mmio_map(SYS_BUS_DEVICE(sys), 0, io_base);
2616 *fdc_tc = qdev_get_gpio_in(dev, 0);
2617
2618 fdctrl_init_drives(&sys->state.bus, fds);
2619 }
2620
2621 static void fdctrl_realize_common(DeviceState *dev, FDCtrl *fdctrl,
2622 Error **errp)
2623 {
2624 int i, j;
2625 static int command_tables_inited = 0;
2626
2627 if (fdctrl->fallback == FLOPPY_DRIVE_TYPE_AUTO) {
2628 error_setg(errp, "Cannot choose a fallback FDrive type of 'auto'");
2629 return;
2630 }
2631
2632 /* Fill 'command_to_handler' lookup table */
2633 if (!command_tables_inited) {
2634 command_tables_inited = 1;
2635 for (i = ARRAY_SIZE(handlers) - 1; i >= 0; i--) {
2636 for (j = 0; j < sizeof(command_to_handler); j++) {
2637 if ((j & handlers[i].mask) == handlers[i].value) {
2638 command_to_handler[j] = i;
2639 }
2640 }
2641 }
2642 }
2643
2644 FLOPPY_DPRINTF("init controller\n");
2645 fdctrl->fifo = qemu_memalign(512, FD_SECTOR_LEN);
2646 memset(fdctrl->fifo, 0, FD_SECTOR_LEN);
2647 fdctrl->fifo_size = 512;
2648 fdctrl->result_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL,
2649 fdctrl_result_timer, fdctrl);
2650
2651 fdctrl->version = 0x90; /* Intel 82078 controller */
2652 fdctrl->config = FD_CONFIG_EIS | FD_CONFIG_EFIFO; /* Implicit seek, polling & FIFO enabled */
2653 fdctrl->num_floppies = MAX_FD;
2654
2655 if (fdctrl->dma_chann != -1) {
2656 IsaDmaClass *k;
2657 assert(fdctrl->dma);
2658 k = ISADMA_GET_CLASS(fdctrl->dma);
2659 k->register_channel(fdctrl->dma, fdctrl->dma_chann,
2660 &fdctrl_transfer_handler, fdctrl);
2661 }
2662
2663 floppy_bus_create(fdctrl, &fdctrl->bus, dev);
2664 fdctrl_connect_drives(fdctrl, dev, errp);
2665 }
2666
2667 static const MemoryRegionPortio fdc_portio_list[] = {
2668 { 1, 5, 1, .read = fdctrl_read, .write = fdctrl_write },
2669 { 7, 1, 1, .read = fdctrl_read, .write = fdctrl_write },
2670 PORTIO_END_OF_LIST(),
2671 };
2672
2673 static void isabus_fdc_realize(DeviceState *dev, Error **errp)
2674 {
2675 ISADevice *isadev = ISA_DEVICE(dev);
2676 FDCtrlISABus *isa = ISA_FDC(dev);
2677 FDCtrl *fdctrl = &isa->state;
2678 Error *err = NULL;
2679
2680 isa_register_portio_list(isadev, &fdctrl->portio_list,
2681 isa->iobase, fdc_portio_list, fdctrl,
2682 "fdc");
2683
2684 isa_init_irq(isadev, &fdctrl->irq, isa->irq);
2685 fdctrl->dma_chann = isa->dma;
2686 if (fdctrl->dma_chann != -1) {
2687 fdctrl->dma = isa_get_dma(isa_bus_from_device(isadev), isa->dma);
2688 if (!fdctrl->dma) {
2689 error_setg(errp, "ISA controller does not support DMA");
2690 return;
2691 }
2692 }
2693
2694 qdev_set_legacy_instance_id(dev, isa->iobase, 2);
2695 fdctrl_realize_common(dev, fdctrl, &err);
2696 if (err != NULL) {
2697 error_propagate(errp, err);
2698 return;
2699 }
2700 }
2701
2702 static void sysbus_fdc_initfn(Object *obj)
2703 {
2704 SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
2705 FDCtrlSysBus *sys = SYSBUS_FDC(obj);
2706 FDCtrl *fdctrl = &sys->state;
2707
2708 fdctrl->dma_chann = -1;
2709
2710 memory_region_init_io(&fdctrl->iomem, obj, &fdctrl_mem_ops, fdctrl,
2711 "fdc", 0x08);
2712 sysbus_init_mmio(sbd, &fdctrl->iomem);
2713 }
2714
2715 static void sun4m_fdc_initfn(Object *obj)
2716 {
2717 SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
2718 FDCtrlSysBus *sys = SYSBUS_FDC(obj);
2719 FDCtrl *fdctrl = &sys->state;
2720
2721 fdctrl->dma_chann = -1;
2722
2723 memory_region_init_io(&fdctrl->iomem, obj, &fdctrl_mem_strict_ops,
2724 fdctrl, "fdctrl", 0x08);
2725 sysbus_init_mmio(sbd, &fdctrl->iomem);
2726 }
2727
2728 static void sysbus_fdc_common_initfn(Object *obj)
2729 {
2730 DeviceState *dev = DEVICE(obj);
2731 SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
2732 FDCtrlSysBus *sys = SYSBUS_FDC(obj);
2733 FDCtrl *fdctrl = &sys->state;
2734
2735 qdev_set_legacy_instance_id(dev, 0 /* io */, 2); /* FIXME */
2736
2737 sysbus_init_irq(sbd, &fdctrl->irq);
2738 qdev_init_gpio_in(dev, fdctrl_handle_tc, 1);
2739 }
2740
2741 static void sysbus_fdc_common_realize(DeviceState *dev, Error **errp)
2742 {
2743 FDCtrlSysBus *sys = SYSBUS_FDC(dev);
2744 FDCtrl *fdctrl = &sys->state;
2745
2746 fdctrl_realize_common(dev, fdctrl, errp);
2747 }
2748
2749 FloppyDriveType isa_fdc_get_drive_type(ISADevice *fdc, int i)
2750 {
2751 FDCtrlISABus *isa = ISA_FDC(fdc);
2752
2753 return isa->state.drives[i].drive;
2754 }
2755
2756 void isa_fdc_get_drive_max_chs(FloppyDriveType type,
2757 uint8_t *maxc, uint8_t *maxh, uint8_t *maxs)
2758 {
2759 const FDFormat *fdf;
2760
2761 *maxc = *maxh = *maxs = 0;
2762 for (fdf = fd_formats; fdf->drive != FLOPPY_DRIVE_TYPE_NONE; fdf++) {
2763 if (fdf->drive != type) {
2764 continue;
2765 }
2766 if (*maxc < fdf->max_track) {
2767 *maxc = fdf->max_track;
2768 }
2769 if (*maxh < fdf->max_head) {
2770 *maxh = fdf->max_head;
2771 }
2772 if (*maxs < fdf->last_sect) {
2773 *maxs = fdf->last_sect;
2774 }
2775 }
2776 (*maxc)--;
2777 }
2778
2779 static const VMStateDescription vmstate_isa_fdc ={
2780 .name = "fdc",
2781 .version_id = 2,
2782 .minimum_version_id = 2,
2783 .fields = (VMStateField[]) {
2784 VMSTATE_STRUCT(state, FDCtrlISABus, 0, vmstate_fdc, FDCtrl),
2785 VMSTATE_END_OF_LIST()
2786 }
2787 };
2788
2789 static Property isa_fdc_properties[] = {
2790 DEFINE_PROP_UINT32("iobase", FDCtrlISABus, iobase, 0x3f0),
2791 DEFINE_PROP_UINT32("irq", FDCtrlISABus, irq, 6),
2792 DEFINE_PROP_UINT32("dma", FDCtrlISABus, dma, 2),
2793 DEFINE_PROP_DRIVE("driveA", FDCtrlISABus, state.qdev_for_drives[0].blk),
2794 DEFINE_PROP_DRIVE("driveB", FDCtrlISABus, state.qdev_for_drives[1].blk),
2795 DEFINE_PROP_BIT("check_media_rate", FDCtrlISABus, state.check_media_rate,
2796 0, true),
2797 DEFINE_PROP_SIGNED("fdtypeA", FDCtrlISABus, state.qdev_for_drives[0].type,
2798 FLOPPY_DRIVE_TYPE_AUTO, qdev_prop_fdc_drive_type,
2799 FloppyDriveType),
2800 DEFINE_PROP_SIGNED("fdtypeB", FDCtrlISABus, state.qdev_for_drives[1].type,
2801 FLOPPY_DRIVE_TYPE_AUTO, qdev_prop_fdc_drive_type,
2802 FloppyDriveType),
2803 DEFINE_PROP_SIGNED("fallback", FDCtrlISABus, state.fallback,
2804 FLOPPY_DRIVE_TYPE_288, qdev_prop_fdc_drive_type,
2805 FloppyDriveType),
2806 DEFINE_PROP_END_OF_LIST(),
2807 };
2808
2809 static void isabus_fdc_class_init(ObjectClass *klass, void *data)
2810 {
2811 DeviceClass *dc = DEVICE_CLASS(klass);
2812
2813 dc->realize = isabus_fdc_realize;
2814 dc->fw_name = "fdc";
2815 dc->reset = fdctrl_external_reset_isa;
2816 dc->vmsd = &vmstate_isa_fdc;
2817 device_class_set_props(dc, isa_fdc_properties);
2818 set_bit(DEVICE_CATEGORY_STORAGE, dc->categories);
2819 }
2820
2821 static void isabus_fdc_instance_init(Object *obj)
2822 {
2823 FDCtrlISABus *isa = ISA_FDC(obj);
2824
2825 device_add_bootindex_property(obj, &isa->bootindexA,
2826 "bootindexA", "/floppy@0",
2827 DEVICE(obj));
2828 device_add_bootindex_property(obj, &isa->bootindexB,
2829 "bootindexB", "/floppy@1",
2830 DEVICE(obj));
2831 }
2832
2833 static const TypeInfo isa_fdc_info = {
2834 .name = TYPE_ISA_FDC,
2835 .parent = TYPE_ISA_DEVICE,
2836 .instance_size = sizeof(FDCtrlISABus),
2837 .class_init = isabus_fdc_class_init,
2838 .instance_init = isabus_fdc_instance_init,
2839 };
2840
2841 static const VMStateDescription vmstate_sysbus_fdc ={
2842 .name = "fdc",
2843 .version_id = 2,
2844 .minimum_version_id = 2,
2845 .fields = (VMStateField[]) {
2846 VMSTATE_STRUCT(state, FDCtrlSysBus, 0, vmstate_fdc, FDCtrl),
2847 VMSTATE_END_OF_LIST()
2848 }
2849 };
2850
2851 static Property sysbus_fdc_properties[] = {
2852 DEFINE_PROP_DRIVE("driveA", FDCtrlSysBus, state.qdev_for_drives[0].blk),
2853 DEFINE_PROP_DRIVE("driveB", FDCtrlSysBus, state.qdev_for_drives[1].blk),
2854 DEFINE_PROP_SIGNED("fdtypeA", FDCtrlSysBus, state.qdev_for_drives[0].type,
2855 FLOPPY_DRIVE_TYPE_AUTO, qdev_prop_fdc_drive_type,
2856 FloppyDriveType),
2857 DEFINE_PROP_SIGNED("fdtypeB", FDCtrlSysBus, state.qdev_for_drives[1].type,
2858 FLOPPY_DRIVE_TYPE_AUTO, qdev_prop_fdc_drive_type,
2859 FloppyDriveType),
2860 DEFINE_PROP_SIGNED("fallback", FDCtrlISABus, state.fallback,
2861 FLOPPY_DRIVE_TYPE_144, qdev_prop_fdc_drive_type,
2862 FloppyDriveType),
2863 DEFINE_PROP_END_OF_LIST(),
2864 };
2865
2866 static void sysbus_fdc_class_init(ObjectClass *klass, void *data)
2867 {
2868 DeviceClass *dc = DEVICE_CLASS(klass);
2869
2870 device_class_set_props(dc, sysbus_fdc_properties);
2871 set_bit(DEVICE_CATEGORY_STORAGE, dc->categories);
2872 }
2873
2874 static const TypeInfo sysbus_fdc_info = {
2875 .name = "sysbus-fdc",
2876 .parent = TYPE_SYSBUS_FDC,
2877 .instance_init = sysbus_fdc_initfn,
2878 .class_init = sysbus_fdc_class_init,
2879 };
2880
2881 static Property sun4m_fdc_properties[] = {
2882 DEFINE_PROP_DRIVE("drive", FDCtrlSysBus, state.qdev_for_drives[0].blk),
2883 DEFINE_PROP_SIGNED("fdtype", FDCtrlSysBus, state.qdev_for_drives[0].type,
2884 FLOPPY_DRIVE_TYPE_AUTO, qdev_prop_fdc_drive_type,
2885 FloppyDriveType),
2886 DEFINE_PROP_SIGNED("fallback", FDCtrlISABus, state.fallback,
2887 FLOPPY_DRIVE_TYPE_144, qdev_prop_fdc_drive_type,
2888 FloppyDriveType),
2889 DEFINE_PROP_END_OF_LIST(),
2890 };
2891
2892 static void sun4m_fdc_class_init(ObjectClass *klass, void *data)
2893 {
2894 DeviceClass *dc = DEVICE_CLASS(klass);
2895
2896 device_class_set_props(dc, sun4m_fdc_properties);
2897 set_bit(DEVICE_CATEGORY_STORAGE, dc->categories);
2898 }
2899
2900 static const TypeInfo sun4m_fdc_info = {
2901 .name = "SUNW,fdtwo",
2902 .parent = TYPE_SYSBUS_FDC,
2903 .instance_init = sun4m_fdc_initfn,
2904 .class_init = sun4m_fdc_class_init,
2905 };
2906
2907 static void sysbus_fdc_common_class_init(ObjectClass *klass, void *data)
2908 {
2909 DeviceClass *dc = DEVICE_CLASS(klass);
2910
2911 dc->realize = sysbus_fdc_common_realize;
2912 dc->reset = fdctrl_external_reset_sysbus;
2913 dc->vmsd = &vmstate_sysbus_fdc;
2914 }
2915
2916 static const TypeInfo sysbus_fdc_type_info = {
2917 .name = TYPE_SYSBUS_FDC,
2918 .parent = TYPE_SYS_BUS_DEVICE,
2919 .instance_size = sizeof(FDCtrlSysBus),
2920 .instance_init = sysbus_fdc_common_initfn,
2921 .abstract = true,
2922 .class_init = sysbus_fdc_common_class_init,
2923 };
2924
2925 static void fdc_register_types(void)
2926 {
2927 type_register_static(&isa_fdc_info);
2928 type_register_static(&sysbus_fdc_type_info);
2929 type_register_static(&sysbus_fdc_info);
2930 type_register_static(&sun4m_fdc_info);
2931 type_register_static(&floppy_bus_info);
2932 type_register_static(&floppy_drive_info);
2933 }
2934
2935 type_init(fdc_register_types)
AR7 emulation for QEMU