2 * Tiny Code Generator for QEMU
4 * Copyright (c) 2008 Fabrice Bellard
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
25 /* define it to use liveness analysis (better code) */
26 #define USE_LIVENESS_ANALYSIS
27 #define USE_TCG_OPTIMIZATIONS
31 /* Define to jump the ELF file used to communicate with GDB. */
34 #if !defined(CONFIG_DEBUG_TCG) && !defined(NDEBUG)
35 /* define it to suppress various consistency checks (faster) */
39 #include "qemu-common.h"
40 #include "qemu/cache-utils.h"
41 #include "qemu/host-utils.h"
42 #include "qemu/timer.h"
44 /* Note: the long term plan is to reduce the dependancies on the QEMU
45 CPU definitions. Currently they are used for qemu_ld/st
47 #define NO_CPU_IO_DEFS
52 #if UINTPTR_MAX == UINT32_MAX
53 # define ELF_CLASS ELFCLASS32
55 # define ELF_CLASS ELFCLASS64
57 #ifdef HOST_WORDS_BIGENDIAN
58 # define ELF_DATA ELFDATA2MSB
60 # define ELF_DATA ELFDATA2LSB
65 /* Forward declarations for functions declared in tcg-target.c and used here. */
66 static void tcg_target_init(TCGContext
*s
);
67 static void tcg_target_qemu_prologue(TCGContext
*s
);
68 static void patch_reloc(uint8_t *code_ptr
, int type
,
69 intptr_t value
, intptr_t addend
);
71 /* The CIE and FDE header definitions will be common to all hosts. */
73 uint32_t len
__attribute__((aligned((sizeof(void *)))));
79 uint8_t return_column
;
82 typedef struct QEMU_PACKED
{
83 uint32_t len
__attribute__((aligned((sizeof(void *)))));
87 } DebugFrameFDEHeader
;
89 static void tcg_register_jit_int(void *buf
, size_t size
,
90 void *debug_frame
, size_t debug_frame_size
)
91 __attribute__((unused
));
93 /* Forward declarations for functions declared and used in tcg-target.c. */
94 static int target_parse_constraint(TCGArgConstraint
*ct
, const char **pct_str
);
95 static void tcg_out_ld(TCGContext
*s
, TCGType type
, TCGReg ret
, TCGReg arg1
,
97 static void tcg_out_mov(TCGContext
*s
, TCGType type
, TCGReg ret
, TCGReg arg
);
98 static void tcg_out_movi(TCGContext
*s
, TCGType type
,
99 TCGReg ret
, tcg_target_long arg
);
100 static void tcg_out_op(TCGContext
*s
, TCGOpcode opc
, const TCGArg
*args
,
101 const int *const_args
);
102 static void tcg_out_st(TCGContext
*s
, TCGType type
, TCGReg arg
, TCGReg arg1
,
104 static int tcg_target_const_match(tcg_target_long val
,
105 const TCGArgConstraint
*arg_ct
);
107 TCGOpDef tcg_op_defs
[] = {
108 #define DEF(s, oargs, iargs, cargs, flags) { #s, oargs, iargs, cargs, iargs + oargs + cargs, flags },
112 const size_t tcg_op_defs_max
= ARRAY_SIZE(tcg_op_defs
);
114 static TCGRegSet tcg_target_available_regs
[2];
115 static TCGRegSet tcg_target_call_clobber_regs
;
117 static inline void tcg_out8(TCGContext
*s
, uint8_t v
)
122 static inline void tcg_out16(TCGContext
*s
, uint16_t v
)
124 uint8_t *p
= s
->code_ptr
;
129 static inline void tcg_out32(TCGContext
*s
, uint32_t v
)
131 uint8_t *p
= s
->code_ptr
;
136 static inline void tcg_out64(TCGContext
*s
, uint64_t v
)
138 uint8_t *p
= s
->code_ptr
;
143 /* label relocation processing */
145 static void tcg_out_reloc(TCGContext
*s
, uint8_t *code_ptr
, int type
,
146 int label_index
, intptr_t addend
)
151 l
= &s
->labels
[label_index
];
153 /* FIXME: This may break relocations on RISC targets that
154 modify instruction fields in place. The caller may not have
155 written the initial value. */
156 patch_reloc(code_ptr
, type
, l
->u
.value
, addend
);
158 /* add a new relocation entry */
159 r
= tcg_malloc(sizeof(TCGRelocation
));
163 r
->next
= l
->u
.first_reloc
;
164 l
->u
.first_reloc
= r
;
168 static void tcg_out_label(TCGContext
*s
, int label_index
, void *ptr
)
172 intptr_t value
= (intptr_t)ptr
;
174 l
= &s
->labels
[label_index
];
178 r
= l
->u
.first_reloc
;
180 patch_reloc(r
->ptr
, r
->type
, value
, r
->addend
);
187 int gen_new_label(void)
189 TCGContext
*s
= &tcg_ctx
;
193 if (s
->nb_labels
>= TCG_MAX_LABELS
)
195 idx
= s
->nb_labels
++;
198 l
->u
.first_reloc
= NULL
;
202 #include "tcg-target.c"
204 /* pool based memory allocation */
205 void *tcg_malloc_internal(TCGContext
*s
, int size
)
210 if (size
> TCG_POOL_CHUNK_SIZE
) {
211 /* big malloc: insert a new pool (XXX: could optimize) */
212 p
= g_malloc(sizeof(TCGPool
) + size
);
214 p
->next
= s
->pool_first_large
;
215 s
->pool_first_large
= p
;
226 pool_size
= TCG_POOL_CHUNK_SIZE
;
227 p
= g_malloc(sizeof(TCGPool
) + pool_size
);
231 s
->pool_current
->next
= p
;
240 s
->pool_cur
= p
->data
+ size
;
241 s
->pool_end
= p
->data
+ p
->size
;
245 void tcg_pool_reset(TCGContext
*s
)
248 for (p
= s
->pool_first_large
; p
; p
= t
) {
252 s
->pool_first_large
= NULL
;
253 s
->pool_cur
= s
->pool_end
= NULL
;
254 s
->pool_current
= NULL
;
257 void tcg_context_init(TCGContext
*s
)
259 int op
, total_args
, n
;
261 TCGArgConstraint
*args_ct
;
264 memset(s
, 0, sizeof(*s
));
267 /* Count total number of arguments and allocate the corresponding
270 for(op
= 0; op
< NB_OPS
; op
++) {
271 def
= &tcg_op_defs
[op
];
272 n
= def
->nb_iargs
+ def
->nb_oargs
;
276 args_ct
= g_malloc(sizeof(TCGArgConstraint
) * total_args
);
277 sorted_args
= g_malloc(sizeof(int) * total_args
);
279 for(op
= 0; op
< NB_OPS
; op
++) {
280 def
= &tcg_op_defs
[op
];
281 def
->args_ct
= args_ct
;
282 def
->sorted_args
= sorted_args
;
283 n
= def
->nb_iargs
+ def
->nb_oargs
;
291 void tcg_prologue_init(TCGContext
*s
)
293 /* init global prologue and epilogue */
294 s
->code_buf
= s
->code_gen_prologue
;
295 s
->code_ptr
= s
->code_buf
;
296 tcg_target_qemu_prologue(s
);
297 flush_icache_range((uintptr_t)s
->code_buf
, (uintptr_t)s
->code_ptr
);
300 if (qemu_loglevel_mask(CPU_LOG_TB_OUT_ASM
)) {
301 size_t size
= s
->code_ptr
- s
->code_buf
;
302 qemu_log("PROLOGUE: [size=%zu]\n", size
);
303 log_disas(s
->code_buf
, size
);
310 void tcg_set_frame(TCGContext
*s
, int reg
, intptr_t start
, intptr_t size
)
312 s
->frame_start
= start
;
313 s
->frame_end
= start
+ size
;
317 void tcg_func_start(TCGContext
*s
)
321 s
->nb_temps
= s
->nb_globals
;
322 for(i
= 0; i
< (TCG_TYPE_COUNT
* 2); i
++)
323 s
->first_free_temp
[i
] = -1;
324 s
->labels
= tcg_malloc(sizeof(TCGLabel
) * TCG_MAX_LABELS
);
326 s
->current_frame_offset
= s
->frame_start
;
328 #ifdef CONFIG_DEBUG_TCG
329 s
->goto_tb_issue_mask
= 0;
332 s
->gen_opc_ptr
= s
->gen_opc_buf
;
333 s
->gen_opparam_ptr
= s
->gen_opparam_buf
;
335 #if defined(CONFIG_QEMU_LDST_OPTIMIZATION) && defined(CONFIG_SOFTMMU)
336 /* Initialize qemu_ld/st labels to assist code generation at the end of TB
337 for TLB miss cases at the end of TB */
338 s
->qemu_ldst_labels
= tcg_malloc(sizeof(TCGLabelQemuLdst
) *
340 s
->nb_qemu_ldst_labels
= 0;
344 static inline void tcg_temp_alloc(TCGContext
*s
, int n
)
346 if (n
> TCG_MAX_TEMPS
)
350 static inline int tcg_global_reg_new_internal(TCGType type
, int reg
,
353 TCGContext
*s
= &tcg_ctx
;
357 #if TCG_TARGET_REG_BITS == 32
358 if (type
!= TCG_TYPE_I32
)
361 if (tcg_regset_test_reg(s
->reserved_regs
, reg
))
364 tcg_temp_alloc(s
, s
->nb_globals
+ 1);
365 ts
= &s
->temps
[s
->nb_globals
];
366 ts
->base_type
= type
;
372 tcg_regset_set_reg(s
->reserved_regs
, reg
);
376 TCGv_i32
tcg_global_reg_new_i32(int reg
, const char *name
)
380 idx
= tcg_global_reg_new_internal(TCG_TYPE_I32
, reg
, name
);
381 return MAKE_TCGV_I32(idx
);
384 TCGv_i64
tcg_global_reg_new_i64(int reg
, const char *name
)
388 idx
= tcg_global_reg_new_internal(TCG_TYPE_I64
, reg
, name
);
389 return MAKE_TCGV_I64(idx
);
392 static inline int tcg_global_mem_new_internal(TCGType type
, int reg
,
396 TCGContext
*s
= &tcg_ctx
;
401 #if TCG_TARGET_REG_BITS == 32
402 if (type
== TCG_TYPE_I64
) {
404 tcg_temp_alloc(s
, s
->nb_globals
+ 2);
405 ts
= &s
->temps
[s
->nb_globals
];
406 ts
->base_type
= type
;
407 ts
->type
= TCG_TYPE_I32
;
409 ts
->mem_allocated
= 1;
411 #ifdef TCG_TARGET_WORDS_BIGENDIAN
412 ts
->mem_offset
= offset
+ 4;
414 ts
->mem_offset
= offset
;
416 pstrcpy(buf
, sizeof(buf
), name
);
417 pstrcat(buf
, sizeof(buf
), "_0");
418 ts
->name
= strdup(buf
);
421 ts
->base_type
= type
;
422 ts
->type
= TCG_TYPE_I32
;
424 ts
->mem_allocated
= 1;
426 #ifdef TCG_TARGET_WORDS_BIGENDIAN
427 ts
->mem_offset
= offset
;
429 ts
->mem_offset
= offset
+ 4;
431 pstrcpy(buf
, sizeof(buf
), name
);
432 pstrcat(buf
, sizeof(buf
), "_1");
433 ts
->name
= strdup(buf
);
439 tcg_temp_alloc(s
, s
->nb_globals
+ 1);
440 ts
= &s
->temps
[s
->nb_globals
];
441 ts
->base_type
= type
;
444 ts
->mem_allocated
= 1;
446 ts
->mem_offset
= offset
;
453 TCGv_i32
tcg_global_mem_new_i32(int reg
, intptr_t offset
, const char *name
)
455 int idx
= tcg_global_mem_new_internal(TCG_TYPE_I32
, reg
, offset
, name
);
456 return MAKE_TCGV_I32(idx
);
459 TCGv_i64
tcg_global_mem_new_i64(int reg
, intptr_t offset
, const char *name
)
461 int idx
= tcg_global_mem_new_internal(TCG_TYPE_I64
, reg
, offset
, name
);
462 return MAKE_TCGV_I64(idx
);
465 static inline int tcg_temp_new_internal(TCGType type
, int temp_local
)
467 TCGContext
*s
= &tcg_ctx
;
474 idx
= s
->first_free_temp
[k
];
476 /* There is already an available temp with the
479 s
->first_free_temp
[k
] = ts
->next_free_temp
;
480 ts
->temp_allocated
= 1;
481 assert(ts
->temp_local
== temp_local
);
484 #if TCG_TARGET_REG_BITS == 32
485 if (type
== TCG_TYPE_I64
) {
486 tcg_temp_alloc(s
, s
->nb_temps
+ 2);
487 ts
= &s
->temps
[s
->nb_temps
];
488 ts
->base_type
= type
;
489 ts
->type
= TCG_TYPE_I32
;
490 ts
->temp_allocated
= 1;
491 ts
->temp_local
= temp_local
;
494 ts
->base_type
= TCG_TYPE_I32
;
495 ts
->type
= TCG_TYPE_I32
;
496 ts
->temp_allocated
= 1;
497 ts
->temp_local
= temp_local
;
503 tcg_temp_alloc(s
, s
->nb_temps
+ 1);
504 ts
= &s
->temps
[s
->nb_temps
];
505 ts
->base_type
= type
;
507 ts
->temp_allocated
= 1;
508 ts
->temp_local
= temp_local
;
514 #if defined(CONFIG_DEBUG_TCG)
520 TCGv_i32
tcg_temp_new_internal_i32(int temp_local
)
524 idx
= tcg_temp_new_internal(TCG_TYPE_I32
, temp_local
);
525 return MAKE_TCGV_I32(idx
);
528 TCGv_i64
tcg_temp_new_internal_i64(int temp_local
)
532 idx
= tcg_temp_new_internal(TCG_TYPE_I64
, temp_local
);
533 return MAKE_TCGV_I64(idx
);
536 static inline void tcg_temp_free_internal(int idx
)
538 TCGContext
*s
= &tcg_ctx
;
542 #if defined(CONFIG_DEBUG_TCG)
544 if (s
->temps_in_use
< 0) {
545 fprintf(stderr
, "More temporaries freed than allocated!\n");
549 assert(idx
>= s
->nb_globals
&& idx
< s
->nb_temps
);
551 assert(ts
->temp_allocated
!= 0);
552 ts
->temp_allocated
= 0;
556 ts
->next_free_temp
= s
->first_free_temp
[k
];
557 s
->first_free_temp
[k
] = idx
;
560 void tcg_temp_free_i32(TCGv_i32 arg
)
562 tcg_temp_free_internal(GET_TCGV_I32(arg
));
565 void tcg_temp_free_i64(TCGv_i64 arg
)
567 tcg_temp_free_internal(GET_TCGV_I64(arg
));
570 TCGv_i32
tcg_const_i32(int32_t val
)
573 t0
= tcg_temp_new_i32();
574 tcg_gen_movi_i32(t0
, val
);
578 TCGv_i64
tcg_const_i64(int64_t val
)
581 t0
= tcg_temp_new_i64();
582 tcg_gen_movi_i64(t0
, val
);
586 TCGv_i32
tcg_const_local_i32(int32_t val
)
589 t0
= tcg_temp_local_new_i32();
590 tcg_gen_movi_i32(t0
, val
);
594 TCGv_i64
tcg_const_local_i64(int64_t val
)
597 t0
= tcg_temp_local_new_i64();
598 tcg_gen_movi_i64(t0
, val
);
602 #if defined(CONFIG_DEBUG_TCG)
603 void tcg_clear_temp_count(void)
605 TCGContext
*s
= &tcg_ctx
;
609 int tcg_check_temp_count(void)
611 TCGContext
*s
= &tcg_ctx
;
612 if (s
->temps_in_use
) {
613 /* Clear the count so that we don't give another
614 * warning immediately next time around.
623 void tcg_register_helper(void *func
, const char *name
)
625 TCGContext
*s
= &tcg_ctx
;
627 if ((s
->nb_helpers
+ 1) > s
->allocated_helpers
) {
628 n
= s
->allocated_helpers
;
634 s
->helpers
= realloc(s
->helpers
, n
* sizeof(TCGHelperInfo
));
635 s
->allocated_helpers
= n
;
637 s
->helpers
[s
->nb_helpers
].func
= (uintptr_t)func
;
638 s
->helpers
[s
->nb_helpers
].name
= name
;
642 /* Note: we convert the 64 bit args to 32 bit and do some alignment
643 and endian swap. Maybe it would be better to do the alignment
644 and endian swap in tcg_reg_alloc_call(). */
645 void tcg_gen_callN(TCGContext
*s
, TCGv_ptr func
, unsigned int flags
,
646 int sizemask
, TCGArg ret
, int nargs
, TCGArg
*args
)
653 #if defined(TCG_TARGET_EXTEND_ARGS) && TCG_TARGET_REG_BITS == 64
654 for (i
= 0; i
< nargs
; ++i
) {
655 int is_64bit
= sizemask
& (1 << (i
+1)*2);
656 int is_signed
= sizemask
& (2 << (i
+1)*2);
658 TCGv_i64 temp
= tcg_temp_new_i64();
659 TCGv_i64 orig
= MAKE_TCGV_I64(args
[i
]);
661 tcg_gen_ext32s_i64(temp
, orig
);
663 tcg_gen_ext32u_i64(temp
, orig
);
665 args
[i
] = GET_TCGV_I64(temp
);
668 #endif /* TCG_TARGET_EXTEND_ARGS */
670 *s
->gen_opc_ptr
++ = INDEX_op_call
;
671 nparam
= s
->gen_opparam_ptr
++;
672 if (ret
!= TCG_CALL_DUMMY_ARG
) {
673 #if TCG_TARGET_REG_BITS < 64
675 #ifdef TCG_TARGET_WORDS_BIGENDIAN
676 *s
->gen_opparam_ptr
++ = ret
+ 1;
677 *s
->gen_opparam_ptr
++ = ret
;
679 *s
->gen_opparam_ptr
++ = ret
;
680 *s
->gen_opparam_ptr
++ = ret
+ 1;
686 *s
->gen_opparam_ptr
++ = ret
;
693 for (i
= 0; i
< nargs
; i
++) {
694 #if TCG_TARGET_REG_BITS < 64
695 int is_64bit
= sizemask
& (1 << (i
+1)*2);
697 #ifdef TCG_TARGET_CALL_ALIGN_ARGS
698 /* some targets want aligned 64 bit args */
700 *s
->gen_opparam_ptr
++ = TCG_CALL_DUMMY_ARG
;
704 /* If stack grows up, then we will be placing successive
705 arguments at lower addresses, which means we need to
706 reverse the order compared to how we would normally
707 treat either big or little-endian. For those arguments
708 that will wind up in registers, this still works for
709 HPPA (the only current STACK_GROWSUP target) since the
710 argument registers are *also* allocated in decreasing
711 order. If another such target is added, this logic may
712 have to get more complicated to differentiate between
713 stack arguments and register arguments. */
714 #if defined(TCG_TARGET_WORDS_BIGENDIAN) != defined(TCG_TARGET_STACK_GROWSUP)
715 *s
->gen_opparam_ptr
++ = args
[i
] + 1;
716 *s
->gen_opparam_ptr
++ = args
[i
];
718 *s
->gen_opparam_ptr
++ = args
[i
];
719 *s
->gen_opparam_ptr
++ = args
[i
] + 1;
724 #endif /* TCG_TARGET_REG_BITS < 64 */
726 *s
->gen_opparam_ptr
++ = args
[i
];
729 *s
->gen_opparam_ptr
++ = GET_TCGV_PTR(func
);
731 *s
->gen_opparam_ptr
++ = flags
;
733 *nparam
= (nb_rets
<< 16) | (real_args
+ 1);
735 /* total parameters, needed to go backward in the instruction stream */
736 *s
->gen_opparam_ptr
++ = 1 + nb_rets
+ real_args
+ 3;
738 #if defined(TCG_TARGET_EXTEND_ARGS) && TCG_TARGET_REG_BITS == 64
739 for (i
= 0; i
< nargs
; ++i
) {
740 int is_64bit
= sizemask
& (1 << (i
+1)*2);
742 TCGv_i64 temp
= MAKE_TCGV_I64(args
[i
]);
743 tcg_temp_free_i64(temp
);
746 #endif /* TCG_TARGET_EXTEND_ARGS */
749 #if TCG_TARGET_REG_BITS == 32
750 void tcg_gen_shifti_i64(TCGv_i64 ret
, TCGv_i64 arg1
,
751 int c
, int right
, int arith
)
754 tcg_gen_mov_i32(TCGV_LOW(ret
), TCGV_LOW(arg1
));
755 tcg_gen_mov_i32(TCGV_HIGH(ret
), TCGV_HIGH(arg1
));
756 } else if (c
>= 32) {
760 tcg_gen_sari_i32(TCGV_LOW(ret
), TCGV_HIGH(arg1
), c
);
761 tcg_gen_sari_i32(TCGV_HIGH(ret
), TCGV_HIGH(arg1
), 31);
763 tcg_gen_shri_i32(TCGV_LOW(ret
), TCGV_HIGH(arg1
), c
);
764 tcg_gen_movi_i32(TCGV_HIGH(ret
), 0);
767 tcg_gen_shli_i32(TCGV_HIGH(ret
), TCGV_LOW(arg1
), c
);
768 tcg_gen_movi_i32(TCGV_LOW(ret
), 0);
773 t0
= tcg_temp_new_i32();
774 t1
= tcg_temp_new_i32();
776 tcg_gen_shli_i32(t0
, TCGV_HIGH(arg1
), 32 - c
);
778 tcg_gen_sari_i32(t1
, TCGV_HIGH(arg1
), c
);
780 tcg_gen_shri_i32(t1
, TCGV_HIGH(arg1
), c
);
781 tcg_gen_shri_i32(TCGV_LOW(ret
), TCGV_LOW(arg1
), c
);
782 tcg_gen_or_i32(TCGV_LOW(ret
), TCGV_LOW(ret
), t0
);
783 tcg_gen_mov_i32(TCGV_HIGH(ret
), t1
);
785 tcg_gen_shri_i32(t0
, TCGV_LOW(arg1
), 32 - c
);
786 /* Note: ret can be the same as arg1, so we use t1 */
787 tcg_gen_shli_i32(t1
, TCGV_LOW(arg1
), c
);
788 tcg_gen_shli_i32(TCGV_HIGH(ret
), TCGV_HIGH(arg1
), c
);
789 tcg_gen_or_i32(TCGV_HIGH(ret
), TCGV_HIGH(ret
), t0
);
790 tcg_gen_mov_i32(TCGV_LOW(ret
), t1
);
792 tcg_temp_free_i32(t0
);
793 tcg_temp_free_i32(t1
);
799 static void tcg_reg_alloc_start(TCGContext
*s
)
803 for(i
= 0; i
< s
->nb_globals
; i
++) {
806 ts
->val_type
= TEMP_VAL_REG
;
808 ts
->val_type
= TEMP_VAL_MEM
;
811 for(i
= s
->nb_globals
; i
< s
->nb_temps
; i
++) {
813 if (ts
->temp_local
) {
814 ts
->val_type
= TEMP_VAL_MEM
;
816 ts
->val_type
= TEMP_VAL_DEAD
;
818 ts
->mem_allocated
= 0;
821 for(i
= 0; i
< TCG_TARGET_NB_REGS
; i
++) {
822 s
->reg_to_temp
[i
] = -1;
826 static char *tcg_get_arg_str_idx(TCGContext
*s
, char *buf
, int buf_size
,
831 assert(idx
>= 0 && idx
< s
->nb_temps
);
833 if (idx
< s
->nb_globals
) {
834 pstrcpy(buf
, buf_size
, ts
->name
);
837 snprintf(buf
, buf_size
, "loc%d", idx
- s
->nb_globals
);
839 snprintf(buf
, buf_size
, "tmp%d", idx
- s
->nb_globals
);
844 char *tcg_get_arg_str_i32(TCGContext
*s
, char *buf
, int buf_size
, TCGv_i32 arg
)
846 return tcg_get_arg_str_idx(s
, buf
, buf_size
, GET_TCGV_I32(arg
));
849 char *tcg_get_arg_str_i64(TCGContext
*s
, char *buf
, int buf_size
, TCGv_i64 arg
)
851 return tcg_get_arg_str_idx(s
, buf
, buf_size
, GET_TCGV_I64(arg
));
854 static int helper_cmp(const void *p1
, const void *p2
)
856 const TCGHelperInfo
*th1
= p1
;
857 const TCGHelperInfo
*th2
= p2
;
858 if (th1
->func
< th2
->func
)
860 else if (th1
->func
== th2
->func
)
866 /* find helper definition (Note: A hash table would be better) */
867 static TCGHelperInfo
*tcg_find_helper(TCGContext
*s
, uintptr_t val
)
873 if (unlikely(!s
->helpers_sorted
)) {
874 qsort(s
->helpers
, s
->nb_helpers
, sizeof(TCGHelperInfo
),
876 s
->helpers_sorted
= 1;
881 m_max
= s
->nb_helpers
- 1;
882 while (m_min
<= m_max
) {
883 m
= (m_min
+ m_max
) >> 1;
897 static const char * const cond_name
[] =
899 [TCG_COND_NEVER
] = "never",
900 [TCG_COND_ALWAYS
] = "always",
901 [TCG_COND_EQ
] = "eq",
902 [TCG_COND_NE
] = "ne",
903 [TCG_COND_LT
] = "lt",
904 [TCG_COND_GE
] = "ge",
905 [TCG_COND_LE
] = "le",
906 [TCG_COND_GT
] = "gt",
907 [TCG_COND_LTU
] = "ltu",
908 [TCG_COND_GEU
] = "geu",
909 [TCG_COND_LEU
] = "leu",
910 [TCG_COND_GTU
] = "gtu"
913 void tcg_dump_ops(TCGContext
*s
)
915 const uint16_t *opc_ptr
;
919 int i
, k
, nb_oargs
, nb_iargs
, nb_cargs
, first_insn
;
924 opc_ptr
= s
->gen_opc_buf
;
925 args
= s
->gen_opparam_buf
;
926 while (opc_ptr
< s
->gen_opc_ptr
) {
928 def
= &tcg_op_defs
[c
];
929 if (c
== INDEX_op_debug_insn_start
) {
931 #if TARGET_LONG_BITS > TCG_TARGET_REG_BITS
932 pc
= ((uint64_t)args
[1] << 32) | args
[0];
939 qemu_log(" ---- 0x%" PRIx64
, pc
);
941 nb_oargs
= def
->nb_oargs
;
942 nb_iargs
= def
->nb_iargs
;
943 nb_cargs
= def
->nb_cargs
;
944 } else if (c
== INDEX_op_call
) {
947 /* variable number of arguments */
949 nb_oargs
= arg
>> 16;
950 nb_iargs
= arg
& 0xffff;
951 nb_cargs
= def
->nb_cargs
;
953 qemu_log(" %s ", def
->name
);
957 tcg_get_arg_str_idx(s
, buf
, sizeof(buf
),
958 args
[nb_oargs
+ nb_iargs
- 1]));
960 qemu_log(",$0x%" TCG_PRIlx
, args
[nb_oargs
+ nb_iargs
]);
962 qemu_log(",$%d", nb_oargs
);
963 for(i
= 0; i
< nb_oargs
; i
++) {
965 qemu_log("%s", tcg_get_arg_str_idx(s
, buf
, sizeof(buf
),
968 for(i
= 0; i
< (nb_iargs
- 1); i
++) {
970 if (args
[nb_oargs
+ i
] == TCG_CALL_DUMMY_ARG
) {
973 qemu_log("%s", tcg_get_arg_str_idx(s
, buf
, sizeof(buf
),
974 args
[nb_oargs
+ i
]));
977 } else if (c
== INDEX_op_movi_i32
|| c
== INDEX_op_movi_i64
) {
978 tcg_target_ulong val
;
981 nb_oargs
= def
->nb_oargs
;
982 nb_iargs
= def
->nb_iargs
;
983 nb_cargs
= def
->nb_cargs
;
984 qemu_log(" %s %s,$", def
->name
,
985 tcg_get_arg_str_idx(s
, buf
, sizeof(buf
), args
[0]));
987 th
= tcg_find_helper(s
, val
);
989 qemu_log("%s", th
->name
);
991 if (c
== INDEX_op_movi_i32
) {
992 qemu_log("0x%x", (uint32_t)val
);
994 qemu_log("0x%" PRIx64
, (uint64_t)val
);
998 qemu_log(" %s ", def
->name
);
999 if (c
== INDEX_op_nopn
) {
1000 /* variable number of arguments */
1005 nb_oargs
= def
->nb_oargs
;
1006 nb_iargs
= def
->nb_iargs
;
1007 nb_cargs
= def
->nb_cargs
;
1011 for(i
= 0; i
< nb_oargs
; i
++) {
1015 qemu_log("%s", tcg_get_arg_str_idx(s
, buf
, sizeof(buf
),
1018 for(i
= 0; i
< nb_iargs
; i
++) {
1022 qemu_log("%s", tcg_get_arg_str_idx(s
, buf
, sizeof(buf
),
1026 case INDEX_op_brcond_i32
:
1027 case INDEX_op_setcond_i32
:
1028 case INDEX_op_movcond_i32
:
1029 case INDEX_op_brcond2_i32
:
1030 case INDEX_op_setcond2_i32
:
1031 case INDEX_op_brcond_i64
:
1032 case INDEX_op_setcond_i64
:
1033 case INDEX_op_movcond_i64
:
1034 if (args
[k
] < ARRAY_SIZE(cond_name
) && cond_name
[args
[k
]]) {
1035 qemu_log(",%s", cond_name
[args
[k
++]]);
1037 qemu_log(",$0x%" TCG_PRIlx
, args
[k
++]);
1045 for(; i
< nb_cargs
; i
++) {
1050 qemu_log("$0x%" TCG_PRIlx
, arg
);
1054 args
+= nb_iargs
+ nb_oargs
+ nb_cargs
;
1058 /* we give more priority to constraints with less registers */
1059 static int get_constraint_priority(const TCGOpDef
*def
, int k
)
1061 const TCGArgConstraint
*arg_ct
;
1064 arg_ct
= &def
->args_ct
[k
];
1065 if (arg_ct
->ct
& TCG_CT_ALIAS
) {
1066 /* an alias is equivalent to a single register */
1069 if (!(arg_ct
->ct
& TCG_CT_REG
))
1072 for(i
= 0; i
< TCG_TARGET_NB_REGS
; i
++) {
1073 if (tcg_regset_test_reg(arg_ct
->u
.regs
, i
))
1077 return TCG_TARGET_NB_REGS
- n
+ 1;
1080 /* sort from highest priority to lowest */
1081 static void sort_constraints(TCGOpDef
*def
, int start
, int n
)
1083 int i
, j
, p1
, p2
, tmp
;
1085 for(i
= 0; i
< n
; i
++)
1086 def
->sorted_args
[start
+ i
] = start
+ i
;
1089 for(i
= 0; i
< n
- 1; i
++) {
1090 for(j
= i
+ 1; j
< n
; j
++) {
1091 p1
= get_constraint_priority(def
, def
->sorted_args
[start
+ i
]);
1092 p2
= get_constraint_priority(def
, def
->sorted_args
[start
+ j
]);
1094 tmp
= def
->sorted_args
[start
+ i
];
1095 def
->sorted_args
[start
+ i
] = def
->sorted_args
[start
+ j
];
1096 def
->sorted_args
[start
+ j
] = tmp
;
1102 void tcg_add_target_add_op_defs(const TCGTargetOpDef
*tdefs
)
1110 if (tdefs
->op
== (TCGOpcode
)-1)
1113 assert((unsigned)op
< NB_OPS
);
1114 def
= &tcg_op_defs
[op
];
1115 #if defined(CONFIG_DEBUG_TCG)
1116 /* Duplicate entry in op definitions? */
1120 nb_args
= def
->nb_iargs
+ def
->nb_oargs
;
1121 for(i
= 0; i
< nb_args
; i
++) {
1122 ct_str
= tdefs
->args_ct_str
[i
];
1123 /* Incomplete TCGTargetOpDef entry? */
1124 assert(ct_str
!= NULL
);
1125 tcg_regset_clear(def
->args_ct
[i
].u
.regs
);
1126 def
->args_ct
[i
].ct
= 0;
1127 if (ct_str
[0] >= '0' && ct_str
[0] <= '9') {
1129 oarg
= ct_str
[0] - '0';
1130 assert(oarg
< def
->nb_oargs
);
1131 assert(def
->args_ct
[oarg
].ct
& TCG_CT_REG
);
1132 /* TCG_CT_ALIAS is for the output arguments. The input
1133 argument is tagged with TCG_CT_IALIAS. */
1134 def
->args_ct
[i
] = def
->args_ct
[oarg
];
1135 def
->args_ct
[oarg
].ct
= TCG_CT_ALIAS
;
1136 def
->args_ct
[oarg
].alias_index
= i
;
1137 def
->args_ct
[i
].ct
|= TCG_CT_IALIAS
;
1138 def
->args_ct
[i
].alias_index
= oarg
;
1141 if (*ct_str
== '\0')
1145 def
->args_ct
[i
].ct
|= TCG_CT_CONST
;
1149 if (target_parse_constraint(&def
->args_ct
[i
], &ct_str
) < 0) {
1150 fprintf(stderr
, "Invalid constraint '%s' for arg %d of operation '%s'\n",
1151 ct_str
, i
, def
->name
);
1159 /* TCGTargetOpDef entry with too much information? */
1160 assert(i
== TCG_MAX_OP_ARGS
|| tdefs
->args_ct_str
[i
] == NULL
);
1162 /* sort the constraints (XXX: this is just an heuristic) */
1163 sort_constraints(def
, 0, def
->nb_oargs
);
1164 sort_constraints(def
, def
->nb_oargs
, def
->nb_iargs
);
1170 printf("%s: sorted=", def
->name
);
1171 for(i
= 0; i
< def
->nb_oargs
+ def
->nb_iargs
; i
++)
1172 printf(" %d", def
->sorted_args
[i
]);
1179 #if defined(CONFIG_DEBUG_TCG)
1181 for (op
= 0; op
< ARRAY_SIZE(tcg_op_defs
); op
++) {
1182 const TCGOpDef
*def
= &tcg_op_defs
[op
];
1183 if (def
->flags
& TCG_OPF_NOT_PRESENT
) {
1184 /* Wrong entry in op definitions? */
1186 fprintf(stderr
, "Invalid op definition for %s\n", def
->name
);
1190 /* Missing entry in op definitions? */
1192 fprintf(stderr
, "Missing op definition for %s\n", def
->name
);
1203 #ifdef USE_LIVENESS_ANALYSIS
1205 /* set a nop for an operation using 'nb_args' */
1206 static inline void tcg_set_nop(TCGContext
*s
, uint16_t *opc_ptr
,
1207 TCGArg
*args
, int nb_args
)
1210 *opc_ptr
= INDEX_op_nop
;
1212 *opc_ptr
= INDEX_op_nopn
;
1214 args
[nb_args
- 1] = nb_args
;
1218 /* liveness analysis: end of function: all temps are dead, and globals
1219 should be in memory. */
1220 static inline void tcg_la_func_end(TCGContext
*s
, uint8_t *dead_temps
,
1223 memset(dead_temps
, 1, s
->nb_temps
);
1224 memset(mem_temps
, 1, s
->nb_globals
);
1225 memset(mem_temps
+ s
->nb_globals
, 0, s
->nb_temps
- s
->nb_globals
);
1228 /* liveness analysis: end of basic block: all temps are dead, globals
1229 and local temps should be in memory. */
1230 static inline void tcg_la_bb_end(TCGContext
*s
, uint8_t *dead_temps
,
1235 memset(dead_temps
, 1, s
->nb_temps
);
1236 memset(mem_temps
, 1, s
->nb_globals
);
1237 for(i
= s
->nb_globals
; i
< s
->nb_temps
; i
++) {
1238 mem_temps
[i
] = s
->temps
[i
].temp_local
;
1242 /* Liveness analysis : update the opc_dead_args array to tell if a
1243 given input arguments is dead. Instructions updating dead
1244 temporaries are removed. */
1245 static void tcg_liveness_analysis(TCGContext
*s
)
1247 int i
, op_index
, nb_args
, nb_iargs
, nb_oargs
, arg
, nb_ops
;
1248 TCGOpcode op
, op_new
, op_new2
;
1250 const TCGOpDef
*def
;
1251 uint8_t *dead_temps
, *mem_temps
;
1256 s
->gen_opc_ptr
++; /* skip end */
1258 nb_ops
= s
->gen_opc_ptr
- s
->gen_opc_buf
;
1260 s
->op_dead_args
= tcg_malloc(nb_ops
* sizeof(uint16_t));
1261 s
->op_sync_args
= tcg_malloc(nb_ops
* sizeof(uint8_t));
1263 dead_temps
= tcg_malloc(s
->nb_temps
);
1264 mem_temps
= tcg_malloc(s
->nb_temps
);
1265 tcg_la_func_end(s
, dead_temps
, mem_temps
);
1267 args
= s
->gen_opparam_ptr
;
1268 op_index
= nb_ops
- 1;
1269 while (op_index
>= 0) {
1270 op
= s
->gen_opc_buf
[op_index
];
1271 def
= &tcg_op_defs
[op
];
1279 nb_iargs
= args
[0] & 0xffff;
1280 nb_oargs
= args
[0] >> 16;
1282 call_flags
= args
[nb_oargs
+ nb_iargs
];
1284 /* pure functions can be removed if their result is not
1286 if (call_flags
& TCG_CALL_NO_SIDE_EFFECTS
) {
1287 for(i
= 0; i
< nb_oargs
; i
++) {
1289 if (!dead_temps
[arg
] || mem_temps
[arg
]) {
1290 goto do_not_remove_call
;
1293 tcg_set_nop(s
, s
->gen_opc_buf
+ op_index
,
1298 /* output args are dead */
1301 for(i
= 0; i
< nb_oargs
; i
++) {
1303 if (dead_temps
[arg
]) {
1304 dead_args
|= (1 << i
);
1306 if (mem_temps
[arg
]) {
1307 sync_args
|= (1 << i
);
1309 dead_temps
[arg
] = 1;
1313 if (!(call_flags
& TCG_CALL_NO_READ_GLOBALS
)) {
1314 /* globals should be synced to memory */
1315 memset(mem_temps
, 1, s
->nb_globals
);
1317 if (!(call_flags
& (TCG_CALL_NO_WRITE_GLOBALS
|
1318 TCG_CALL_NO_READ_GLOBALS
))) {
1319 /* globals should go back to memory */
1320 memset(dead_temps
, 1, s
->nb_globals
);
1323 /* input args are live */
1324 for(i
= nb_oargs
; i
< nb_iargs
+ nb_oargs
; i
++) {
1326 if (arg
!= TCG_CALL_DUMMY_ARG
) {
1327 if (dead_temps
[arg
]) {
1328 dead_args
|= (1 << i
);
1330 dead_temps
[arg
] = 0;
1333 s
->op_dead_args
[op_index
] = dead_args
;
1334 s
->op_sync_args
[op_index
] = sync_args
;
1339 case INDEX_op_debug_insn_start
:
1340 args
-= def
->nb_args
;
1346 case INDEX_op_discard
:
1348 /* mark the temporary as dead */
1349 dead_temps
[args
[0]] = 1;
1350 mem_temps
[args
[0]] = 0;
1355 case INDEX_op_add2_i32
:
1356 op_new
= INDEX_op_add_i32
;
1358 case INDEX_op_sub2_i32
:
1359 op_new
= INDEX_op_sub_i32
;
1361 case INDEX_op_add2_i64
:
1362 op_new
= INDEX_op_add_i64
;
1364 case INDEX_op_sub2_i64
:
1365 op_new
= INDEX_op_sub_i64
;
1370 /* Test if the high part of the operation is dead, but not
1371 the low part. The result can be optimized to a simple
1372 add or sub. This happens often for x86_64 guest when the
1373 cpu mode is set to 32 bit. */
1374 if (dead_temps
[args
[1]] && !mem_temps
[args
[1]]) {
1375 if (dead_temps
[args
[0]] && !mem_temps
[args
[0]]) {
1378 /* Create the single operation plus nop. */
1379 s
->gen_opc_buf
[op_index
] = op
= op_new
;
1382 assert(s
->gen_opc_buf
[op_index
+ 1] == INDEX_op_nop
);
1383 tcg_set_nop(s
, s
->gen_opc_buf
+ op_index
+ 1, args
+ 3, 3);
1384 /* Fall through and mark the single-word operation live. */
1390 case INDEX_op_mulu2_i32
:
1391 op_new
= INDEX_op_mul_i32
;
1392 op_new2
= INDEX_op_muluh_i32
;
1393 have_op_new2
= TCG_TARGET_HAS_muluh_i32
;
1395 case INDEX_op_muls2_i32
:
1396 op_new
= INDEX_op_mul_i32
;
1397 op_new2
= INDEX_op_mulsh_i32
;
1398 have_op_new2
= TCG_TARGET_HAS_mulsh_i32
;
1400 case INDEX_op_mulu2_i64
:
1401 op_new
= INDEX_op_mul_i64
;
1402 op_new2
= INDEX_op_muluh_i64
;
1403 have_op_new2
= TCG_TARGET_HAS_muluh_i64
;
1405 case INDEX_op_muls2_i64
:
1406 op_new
= INDEX_op_mul_i64
;
1407 op_new2
= INDEX_op_mulsh_i64
;
1408 have_op_new2
= TCG_TARGET_HAS_mulsh_i64
;
1414 if (dead_temps
[args
[1]] && !mem_temps
[args
[1]]) {
1415 if (dead_temps
[args
[0]] && !mem_temps
[args
[0]]) {
1416 /* Both parts of the operation are dead. */
1419 /* The high part of the operation is dead; generate the low. */
1420 s
->gen_opc_buf
[op_index
] = op
= op_new
;
1423 } else if (have_op_new2
&& dead_temps
[args
[0]]
1424 && !mem_temps
[args
[0]]) {
1425 /* The low part of the operation is dead; generate the high. */
1426 s
->gen_opc_buf
[op_index
] = op
= op_new2
;
1433 assert(s
->gen_opc_buf
[op_index
+ 1] == INDEX_op_nop
);
1434 tcg_set_nop(s
, s
->gen_opc_buf
+ op_index
+ 1, args
+ 3, 1);
1435 /* Mark the single-word operation live. */
1440 /* XXX: optimize by hardcoding common cases (e.g. triadic ops) */
1441 args
-= def
->nb_args
;
1442 nb_iargs
= def
->nb_iargs
;
1443 nb_oargs
= def
->nb_oargs
;
1445 /* Test if the operation can be removed because all
1446 its outputs are dead. We assume that nb_oargs == 0
1447 implies side effects */
1448 if (!(def
->flags
& TCG_OPF_SIDE_EFFECTS
) && nb_oargs
!= 0) {
1449 for(i
= 0; i
< nb_oargs
; i
++) {
1451 if (!dead_temps
[arg
] || mem_temps
[arg
]) {
1456 tcg_set_nop(s
, s
->gen_opc_buf
+ op_index
, args
, def
->nb_args
);
1457 #ifdef CONFIG_PROFILER
1463 /* output args are dead */
1466 for(i
= 0; i
< nb_oargs
; i
++) {
1468 if (dead_temps
[arg
]) {
1469 dead_args
|= (1 << i
);
1471 if (mem_temps
[arg
]) {
1472 sync_args
|= (1 << i
);
1474 dead_temps
[arg
] = 1;
1478 /* if end of basic block, update */
1479 if (def
->flags
& TCG_OPF_BB_END
) {
1480 tcg_la_bb_end(s
, dead_temps
, mem_temps
);
1481 } else if (def
->flags
& TCG_OPF_SIDE_EFFECTS
) {
1482 /* globals should be synced to memory */
1483 memset(mem_temps
, 1, s
->nb_globals
);
1486 /* input args are live */
1487 for(i
= nb_oargs
; i
< nb_oargs
+ nb_iargs
; i
++) {
1489 if (dead_temps
[arg
]) {
1490 dead_args
|= (1 << i
);
1492 dead_temps
[arg
] = 0;
1494 s
->op_dead_args
[op_index
] = dead_args
;
1495 s
->op_sync_args
[op_index
] = sync_args
;
1502 if (args
!= s
->gen_opparam_buf
) {
1507 /* dummy liveness analysis */
1508 static void tcg_liveness_analysis(TCGContext
*s
)
1511 nb_ops
= s
->gen_opc_ptr
- s
->gen_opc_buf
;
1513 s
->op_dead_args
= tcg_malloc(nb_ops
* sizeof(uint16_t));
1514 memset(s
->op_dead_args
, 0, nb_ops
* sizeof(uint16_t));
1515 s
->op_sync_args
= tcg_malloc(nb_ops
* sizeof(uint8_t));
1516 memset(s
->op_sync_args
, 0, nb_ops
* sizeof(uint8_t));
1521 static void dump_regs(TCGContext
*s
)
1527 for(i
= 0; i
< s
->nb_temps
; i
++) {
1529 printf(" %10s: ", tcg_get_arg_str_idx(s
, buf
, sizeof(buf
), i
));
1530 switch(ts
->val_type
) {
1532 printf("%s", tcg_target_reg_names
[ts
->reg
]);
1535 printf("%d(%s)", (int)ts
->mem_offset
, tcg_target_reg_names
[ts
->mem_reg
]);
1537 case TEMP_VAL_CONST
:
1538 printf("$0x%" TCG_PRIlx
, ts
->val
);
1550 for(i
= 0; i
< TCG_TARGET_NB_REGS
; i
++) {
1551 if (s
->reg_to_temp
[i
] >= 0) {
1553 tcg_target_reg_names
[i
],
1554 tcg_get_arg_str_idx(s
, buf
, sizeof(buf
), s
->reg_to_temp
[i
]));
1559 static void check_regs(TCGContext
*s
)
1565 for(reg
= 0; reg
< TCG_TARGET_NB_REGS
; reg
++) {
1566 k
= s
->reg_to_temp
[reg
];
1569 if (ts
->val_type
!= TEMP_VAL_REG
||
1571 printf("Inconsistency for register %s:\n",
1572 tcg_target_reg_names
[reg
]);
1577 for(k
= 0; k
< s
->nb_temps
; k
++) {
1579 if (ts
->val_type
== TEMP_VAL_REG
&&
1581 s
->reg_to_temp
[ts
->reg
] != k
) {
1582 printf("Inconsistency for temp %s:\n",
1583 tcg_get_arg_str_idx(s
, buf
, sizeof(buf
), k
));
1585 printf("reg state:\n");
1593 static void temp_allocate_frame(TCGContext
*s
, int temp
)
1596 ts
= &s
->temps
[temp
];
1597 #if !(defined(__sparc__) && TCG_TARGET_REG_BITS == 64)
1598 /* Sparc64 stack is accessed with offset of 2047 */
1599 s
->current_frame_offset
= (s
->current_frame_offset
+
1600 (tcg_target_long
)sizeof(tcg_target_long
) - 1) &
1601 ~(sizeof(tcg_target_long
) - 1);
1603 if (s
->current_frame_offset
+ (tcg_target_long
)sizeof(tcg_target_long
) >
1607 ts
->mem_offset
= s
->current_frame_offset
;
1608 ts
->mem_reg
= s
->frame_reg
;
1609 ts
->mem_allocated
= 1;
1610 s
->current_frame_offset
+= sizeof(tcg_target_long
);
1613 /* sync register 'reg' by saving it to the corresponding temporary */
1614 static inline void tcg_reg_sync(TCGContext
*s
, int reg
)
1619 temp
= s
->reg_to_temp
[reg
];
1620 ts
= &s
->temps
[temp
];
1621 assert(ts
->val_type
== TEMP_VAL_REG
);
1622 if (!ts
->mem_coherent
&& !ts
->fixed_reg
) {
1623 if (!ts
->mem_allocated
) {
1624 temp_allocate_frame(s
, temp
);
1626 tcg_out_st(s
, ts
->type
, reg
, ts
->mem_reg
, ts
->mem_offset
);
1628 ts
->mem_coherent
= 1;
1631 /* free register 'reg' by spilling the corresponding temporary if necessary */
1632 static void tcg_reg_free(TCGContext
*s
, int reg
)
1636 temp
= s
->reg_to_temp
[reg
];
1638 tcg_reg_sync(s
, reg
);
1639 s
->temps
[temp
].val_type
= TEMP_VAL_MEM
;
1640 s
->reg_to_temp
[reg
] = -1;
1644 /* Allocate a register belonging to reg1 & ~reg2 */
1645 static int tcg_reg_alloc(TCGContext
*s
, TCGRegSet reg1
, TCGRegSet reg2
)
1650 tcg_regset_andnot(reg_ct
, reg1
, reg2
);
1652 /* first try free registers */
1653 for(i
= 0; i
< ARRAY_SIZE(tcg_target_reg_alloc_order
); i
++) {
1654 reg
= tcg_target_reg_alloc_order
[i
];
1655 if (tcg_regset_test_reg(reg_ct
, reg
) && s
->reg_to_temp
[reg
] == -1)
1659 /* XXX: do better spill choice */
1660 for(i
= 0; i
< ARRAY_SIZE(tcg_target_reg_alloc_order
); i
++) {
1661 reg
= tcg_target_reg_alloc_order
[i
];
1662 if (tcg_regset_test_reg(reg_ct
, reg
)) {
1663 tcg_reg_free(s
, reg
);
1671 /* mark a temporary as dead. */
1672 static inline void temp_dead(TCGContext
*s
, int temp
)
1676 ts
= &s
->temps
[temp
];
1677 if (!ts
->fixed_reg
) {
1678 if (ts
->val_type
== TEMP_VAL_REG
) {
1679 s
->reg_to_temp
[ts
->reg
] = -1;
1681 if (temp
< s
->nb_globals
|| ts
->temp_local
) {
1682 ts
->val_type
= TEMP_VAL_MEM
;
1684 ts
->val_type
= TEMP_VAL_DEAD
;
1689 /* sync a temporary to memory. 'allocated_regs' is used in case a
1690 temporary registers needs to be allocated to store a constant. */
1691 static inline void temp_sync(TCGContext
*s
, int temp
, TCGRegSet allocated_regs
)
1695 ts
= &s
->temps
[temp
];
1696 if (!ts
->fixed_reg
) {
1697 switch(ts
->val_type
) {
1698 case TEMP_VAL_CONST
:
1699 ts
->reg
= tcg_reg_alloc(s
, tcg_target_available_regs
[ts
->type
],
1701 ts
->val_type
= TEMP_VAL_REG
;
1702 s
->reg_to_temp
[ts
->reg
] = temp
;
1703 ts
->mem_coherent
= 0;
1704 tcg_out_movi(s
, ts
->type
, ts
->reg
, ts
->val
);
1707 tcg_reg_sync(s
, ts
->reg
);
1718 /* save a temporary to memory. 'allocated_regs' is used in case a
1719 temporary registers needs to be allocated to store a constant. */
1720 static inline void temp_save(TCGContext
*s
, int temp
, TCGRegSet allocated_regs
)
1722 #ifdef USE_LIVENESS_ANALYSIS
1723 /* The liveness analysis already ensures that globals are back
1724 in memory. Keep an assert for safety. */
1725 assert(s
->temps
[temp
].val_type
== TEMP_VAL_MEM
|| s
->temps
[temp
].fixed_reg
);
1727 temp_sync(s
, temp
, allocated_regs
);
1732 /* save globals to their canonical location and assume they can be
1733 modified be the following code. 'allocated_regs' is used in case a
1734 temporary registers needs to be allocated to store a constant. */
1735 static void save_globals(TCGContext
*s
, TCGRegSet allocated_regs
)
1739 for(i
= 0; i
< s
->nb_globals
; i
++) {
1740 temp_save(s
, i
, allocated_regs
);
1744 /* sync globals to their canonical location and assume they can be
1745 read by the following code. 'allocated_regs' is used in case a
1746 temporary registers needs to be allocated to store a constant. */
1747 static void sync_globals(TCGContext
*s
, TCGRegSet allocated_regs
)
1751 for (i
= 0; i
< s
->nb_globals
; i
++) {
1752 #ifdef USE_LIVENESS_ANALYSIS
1753 assert(s
->temps
[i
].val_type
!= TEMP_VAL_REG
|| s
->temps
[i
].fixed_reg
||
1754 s
->temps
[i
].mem_coherent
);
1756 temp_sync(s
, i
, allocated_regs
);
1761 /* at the end of a basic block, we assume all temporaries are dead and
1762 all globals are stored at their canonical location. */
1763 static void tcg_reg_alloc_bb_end(TCGContext
*s
, TCGRegSet allocated_regs
)
1768 for(i
= s
->nb_globals
; i
< s
->nb_temps
; i
++) {
1770 if (ts
->temp_local
) {
1771 temp_save(s
, i
, allocated_regs
);
1773 #ifdef USE_LIVENESS_ANALYSIS
1774 /* The liveness analysis already ensures that temps are dead.
1775 Keep an assert for safety. */
1776 assert(ts
->val_type
== TEMP_VAL_DEAD
);
1783 save_globals(s
, allocated_regs
);
1786 #define IS_DEAD_ARG(n) ((dead_args >> (n)) & 1)
1787 #define NEED_SYNC_ARG(n) ((sync_args >> (n)) & 1)
1789 static void tcg_reg_alloc_movi(TCGContext
*s
, const TCGArg
*args
,
1790 uint16_t dead_args
, uint8_t sync_args
)
1793 tcg_target_ulong val
;
1795 ots
= &s
->temps
[args
[0]];
1798 if (ots
->fixed_reg
) {
1799 /* for fixed registers, we do not do any constant
1801 tcg_out_movi(s
, ots
->type
, ots
->reg
, val
);
1803 /* The movi is not explicitly generated here */
1804 if (ots
->val_type
== TEMP_VAL_REG
)
1805 s
->reg_to_temp
[ots
->reg
] = -1;
1806 ots
->val_type
= TEMP_VAL_CONST
;
1809 if (NEED_SYNC_ARG(0)) {
1810 temp_sync(s
, args
[0], s
->reserved_regs
);
1812 if (IS_DEAD_ARG(0)) {
1813 temp_dead(s
, args
[0]);
1817 static void tcg_reg_alloc_mov(TCGContext
*s
, const TCGOpDef
*def
,
1818 const TCGArg
*args
, uint16_t dead_args
,
1821 TCGRegSet allocated_regs
;
1823 const TCGArgConstraint
*arg_ct
, *oarg_ct
;
1825 tcg_regset_set(allocated_regs
, s
->reserved_regs
);
1826 ots
= &s
->temps
[args
[0]];
1827 ts
= &s
->temps
[args
[1]];
1828 oarg_ct
= &def
->args_ct
[0];
1829 arg_ct
= &def
->args_ct
[1];
1831 /* If the source value is not in a register, and we're going to be
1832 forced to have it in a register in order to perform the copy,
1833 then copy the SOURCE value into its own register first. That way
1834 we don't have to reload SOURCE the next time it is used. */
1835 if (((NEED_SYNC_ARG(0) || ots
->fixed_reg
) && ts
->val_type
!= TEMP_VAL_REG
)
1836 || ts
->val_type
== TEMP_VAL_MEM
) {
1837 ts
->reg
= tcg_reg_alloc(s
, arg_ct
->u
.regs
, allocated_regs
);
1838 if (ts
->val_type
== TEMP_VAL_MEM
) {
1839 tcg_out_ld(s
, ts
->type
, ts
->reg
, ts
->mem_reg
, ts
->mem_offset
);
1840 ts
->mem_coherent
= 1;
1841 } else if (ts
->val_type
== TEMP_VAL_CONST
) {
1842 tcg_out_movi(s
, ts
->type
, ts
->reg
, ts
->val
);
1844 s
->reg_to_temp
[ts
->reg
] = args
[1];
1845 ts
->val_type
= TEMP_VAL_REG
;
1848 if (IS_DEAD_ARG(0) && !ots
->fixed_reg
) {
1849 /* mov to a non-saved dead register makes no sense (even with
1850 liveness analysis disabled). */
1851 assert(NEED_SYNC_ARG(0));
1852 /* The code above should have moved the temp to a register. */
1853 assert(ts
->val_type
== TEMP_VAL_REG
);
1854 if (!ots
->mem_allocated
) {
1855 temp_allocate_frame(s
, args
[0]);
1857 tcg_out_st(s
, ots
->type
, ts
->reg
, ots
->mem_reg
, ots
->mem_offset
);
1858 if (IS_DEAD_ARG(1)) {
1859 temp_dead(s
, args
[1]);
1861 temp_dead(s
, args
[0]);
1862 } else if (ts
->val_type
== TEMP_VAL_CONST
) {
1863 /* propagate constant */
1864 if (ots
->val_type
== TEMP_VAL_REG
) {
1865 s
->reg_to_temp
[ots
->reg
] = -1;
1867 ots
->val_type
= TEMP_VAL_CONST
;
1870 /* The code in the first if block should have moved the
1871 temp to a register. */
1872 assert(ts
->val_type
== TEMP_VAL_REG
);
1873 if (IS_DEAD_ARG(1) && !ts
->fixed_reg
&& !ots
->fixed_reg
) {
1874 /* the mov can be suppressed */
1875 if (ots
->val_type
== TEMP_VAL_REG
) {
1876 s
->reg_to_temp
[ots
->reg
] = -1;
1879 temp_dead(s
, args
[1]);
1881 if (ots
->val_type
!= TEMP_VAL_REG
) {
1882 /* When allocating a new register, make sure to not spill the
1884 tcg_regset_set_reg(allocated_regs
, ts
->reg
);
1885 ots
->reg
= tcg_reg_alloc(s
, oarg_ct
->u
.regs
, allocated_regs
);
1887 tcg_out_mov(s
, ots
->type
, ots
->reg
, ts
->reg
);
1889 ots
->val_type
= TEMP_VAL_REG
;
1890 ots
->mem_coherent
= 0;
1891 s
->reg_to_temp
[ots
->reg
] = args
[0];
1892 if (NEED_SYNC_ARG(0)) {
1893 tcg_reg_sync(s
, ots
->reg
);
1898 static void tcg_reg_alloc_op(TCGContext
*s
,
1899 const TCGOpDef
*def
, TCGOpcode opc
,
1900 const TCGArg
*args
, uint16_t dead_args
,
1903 TCGRegSet allocated_regs
;
1904 int i
, k
, nb_iargs
, nb_oargs
, reg
;
1906 const TCGArgConstraint
*arg_ct
;
1908 TCGArg new_args
[TCG_MAX_OP_ARGS
];
1909 int const_args
[TCG_MAX_OP_ARGS
];
1911 nb_oargs
= def
->nb_oargs
;
1912 nb_iargs
= def
->nb_iargs
;
1914 /* copy constants */
1915 memcpy(new_args
+ nb_oargs
+ nb_iargs
,
1916 args
+ nb_oargs
+ nb_iargs
,
1917 sizeof(TCGArg
) * def
->nb_cargs
);
1919 /* satisfy input constraints */
1920 tcg_regset_set(allocated_regs
, s
->reserved_regs
);
1921 for(k
= 0; k
< nb_iargs
; k
++) {
1922 i
= def
->sorted_args
[nb_oargs
+ k
];
1924 arg_ct
= &def
->args_ct
[i
];
1925 ts
= &s
->temps
[arg
];
1926 if (ts
->val_type
== TEMP_VAL_MEM
) {
1927 reg
= tcg_reg_alloc(s
, arg_ct
->u
.regs
, allocated_regs
);
1928 tcg_out_ld(s
, ts
->type
, reg
, ts
->mem_reg
, ts
->mem_offset
);
1929 ts
->val_type
= TEMP_VAL_REG
;
1931 ts
->mem_coherent
= 1;
1932 s
->reg_to_temp
[reg
] = arg
;
1933 } else if (ts
->val_type
== TEMP_VAL_CONST
) {
1934 if (tcg_target_const_match(ts
->val
, arg_ct
)) {
1935 /* constant is OK for instruction */
1937 new_args
[i
] = ts
->val
;
1940 /* need to move to a register */
1941 reg
= tcg_reg_alloc(s
, arg_ct
->u
.regs
, allocated_regs
);
1942 tcg_out_movi(s
, ts
->type
, reg
, ts
->val
);
1943 ts
->val_type
= TEMP_VAL_REG
;
1945 ts
->mem_coherent
= 0;
1946 s
->reg_to_temp
[reg
] = arg
;
1949 assert(ts
->val_type
== TEMP_VAL_REG
);
1950 if (arg_ct
->ct
& TCG_CT_IALIAS
) {
1951 if (ts
->fixed_reg
) {
1952 /* if fixed register, we must allocate a new register
1953 if the alias is not the same register */
1954 if (arg
!= args
[arg_ct
->alias_index
])
1955 goto allocate_in_reg
;
1957 /* if the input is aliased to an output and if it is
1958 not dead after the instruction, we must allocate
1959 a new register and move it */
1960 if (!IS_DEAD_ARG(i
)) {
1961 goto allocate_in_reg
;
1966 if (tcg_regset_test_reg(arg_ct
->u
.regs
, reg
)) {
1967 /* nothing to do : the constraint is satisfied */
1970 /* allocate a new register matching the constraint
1971 and move the temporary register into it */
1972 reg
= tcg_reg_alloc(s
, arg_ct
->u
.regs
, allocated_regs
);
1973 tcg_out_mov(s
, ts
->type
, reg
, ts
->reg
);
1977 tcg_regset_set_reg(allocated_regs
, reg
);
1981 /* mark dead temporaries and free the associated registers */
1982 for (i
= nb_oargs
; i
< nb_oargs
+ nb_iargs
; i
++) {
1983 if (IS_DEAD_ARG(i
)) {
1984 temp_dead(s
, args
[i
]);
1988 if (def
->flags
& TCG_OPF_BB_END
) {
1989 tcg_reg_alloc_bb_end(s
, allocated_regs
);
1991 if (def
->flags
& TCG_OPF_CALL_CLOBBER
) {
1992 /* XXX: permit generic clobber register list ? */
1993 for(reg
= 0; reg
< TCG_TARGET_NB_REGS
; reg
++) {
1994 if (tcg_regset_test_reg(tcg_target_call_clobber_regs
, reg
)) {
1995 tcg_reg_free(s
, reg
);
1999 if (def
->flags
& TCG_OPF_SIDE_EFFECTS
) {
2000 /* sync globals if the op has side effects and might trigger
2002 sync_globals(s
, allocated_regs
);
2005 /* satisfy the output constraints */
2006 tcg_regset_set(allocated_regs
, s
->reserved_regs
);
2007 for(k
= 0; k
< nb_oargs
; k
++) {
2008 i
= def
->sorted_args
[k
];
2010 arg_ct
= &def
->args_ct
[i
];
2011 ts
= &s
->temps
[arg
];
2012 if (arg_ct
->ct
& TCG_CT_ALIAS
) {
2013 reg
= new_args
[arg_ct
->alias_index
];
2015 /* if fixed register, we try to use it */
2017 if (ts
->fixed_reg
&&
2018 tcg_regset_test_reg(arg_ct
->u
.regs
, reg
)) {
2021 reg
= tcg_reg_alloc(s
, arg_ct
->u
.regs
, allocated_regs
);
2023 tcg_regset_set_reg(allocated_regs
, reg
);
2024 /* if a fixed register is used, then a move will be done afterwards */
2025 if (!ts
->fixed_reg
) {
2026 if (ts
->val_type
== TEMP_VAL_REG
) {
2027 s
->reg_to_temp
[ts
->reg
] = -1;
2029 ts
->val_type
= TEMP_VAL_REG
;
2031 /* temp value is modified, so the value kept in memory is
2032 potentially not the same */
2033 ts
->mem_coherent
= 0;
2034 s
->reg_to_temp
[reg
] = arg
;
2041 /* emit instruction */
2042 tcg_out_op(s
, opc
, new_args
, const_args
);
2044 /* move the outputs in the correct register if needed */
2045 for(i
= 0; i
< nb_oargs
; i
++) {
2046 ts
= &s
->temps
[args
[i
]];
2048 if (ts
->fixed_reg
&& ts
->reg
!= reg
) {
2049 tcg_out_mov(s
, ts
->type
, ts
->reg
, reg
);
2051 if (NEED_SYNC_ARG(i
)) {
2052 tcg_reg_sync(s
, reg
);
2054 if (IS_DEAD_ARG(i
)) {
2055 temp_dead(s
, args
[i
]);
2060 #ifdef TCG_TARGET_STACK_GROWSUP
2061 #define STACK_DIR(x) (-(x))
2063 #define STACK_DIR(x) (x)
2066 static int tcg_reg_alloc_call(TCGContext
*s
, const TCGOpDef
*def
,
2067 TCGOpcode opc
, const TCGArg
*args
,
2068 uint16_t dead_args
, uint8_t sync_args
)
2070 int nb_iargs
, nb_oargs
, flags
, nb_regs
, i
, reg
, nb_params
;
2071 TCGArg arg
, func_arg
;
2073 intptr_t stack_offset
;
2074 size_t call_stack_size
;
2075 uintptr_t func_addr
;
2076 int const_func_arg
, allocate_args
;
2077 TCGRegSet allocated_regs
;
2078 const TCGArgConstraint
*arg_ct
;
2082 nb_oargs
= arg
>> 16;
2083 nb_iargs
= arg
& 0xffff;
2084 nb_params
= nb_iargs
- 1;
2086 flags
= args
[nb_oargs
+ nb_iargs
];
2088 nb_regs
= ARRAY_SIZE(tcg_target_call_iarg_regs
);
2089 if (nb_regs
> nb_params
)
2090 nb_regs
= nb_params
;
2092 /* assign stack slots first */
2093 call_stack_size
= (nb_params
- nb_regs
) * sizeof(tcg_target_long
);
2094 call_stack_size
= (call_stack_size
+ TCG_TARGET_STACK_ALIGN
- 1) &
2095 ~(TCG_TARGET_STACK_ALIGN
- 1);
2096 allocate_args
= (call_stack_size
> TCG_STATIC_CALL_ARGS_SIZE
);
2097 if (allocate_args
) {
2098 /* XXX: if more than TCG_STATIC_CALL_ARGS_SIZE is needed,
2099 preallocate call stack */
2103 stack_offset
= TCG_TARGET_CALL_STACK_OFFSET
;
2104 for(i
= nb_regs
; i
< nb_params
; i
++) {
2105 arg
= args
[nb_oargs
+ i
];
2106 #ifdef TCG_TARGET_STACK_GROWSUP
2107 stack_offset
-= sizeof(tcg_target_long
);
2109 if (arg
!= TCG_CALL_DUMMY_ARG
) {
2110 ts
= &s
->temps
[arg
];
2111 if (ts
->val_type
== TEMP_VAL_REG
) {
2112 tcg_out_st(s
, ts
->type
, ts
->reg
, TCG_REG_CALL_STACK
, stack_offset
);
2113 } else if (ts
->val_type
== TEMP_VAL_MEM
) {
2114 reg
= tcg_reg_alloc(s
, tcg_target_available_regs
[ts
->type
],
2116 /* XXX: not correct if reading values from the stack */
2117 tcg_out_ld(s
, ts
->type
, reg
, ts
->mem_reg
, ts
->mem_offset
);
2118 tcg_out_st(s
, ts
->type
, reg
, TCG_REG_CALL_STACK
, stack_offset
);
2119 } else if (ts
->val_type
== TEMP_VAL_CONST
) {
2120 reg
= tcg_reg_alloc(s
, tcg_target_available_regs
[ts
->type
],
2122 /* XXX: sign extend may be needed on some targets */
2123 tcg_out_movi(s
, ts
->type
, reg
, ts
->val
);
2124 tcg_out_st(s
, ts
->type
, reg
, TCG_REG_CALL_STACK
, stack_offset
);
2129 #ifndef TCG_TARGET_STACK_GROWSUP
2130 stack_offset
+= sizeof(tcg_target_long
);
2134 /* assign input registers */
2135 tcg_regset_set(allocated_regs
, s
->reserved_regs
);
2136 for(i
= 0; i
< nb_regs
; i
++) {
2137 arg
= args
[nb_oargs
+ i
];
2138 if (arg
!= TCG_CALL_DUMMY_ARG
) {
2139 ts
= &s
->temps
[arg
];
2140 reg
= tcg_target_call_iarg_regs
[i
];
2141 tcg_reg_free(s
, reg
);
2142 if (ts
->val_type
== TEMP_VAL_REG
) {
2143 if (ts
->reg
!= reg
) {
2144 tcg_out_mov(s
, ts
->type
, reg
, ts
->reg
);
2146 } else if (ts
->val_type
== TEMP_VAL_MEM
) {
2147 tcg_out_ld(s
, ts
->type
, reg
, ts
->mem_reg
, ts
->mem_offset
);
2148 } else if (ts
->val_type
== TEMP_VAL_CONST
) {
2149 /* XXX: sign extend ? */
2150 tcg_out_movi(s
, ts
->type
, reg
, ts
->val
);
2154 tcg_regset_set_reg(allocated_regs
, reg
);
2158 /* assign function address */
2159 func_arg
= args
[nb_oargs
+ nb_iargs
- 1];
2160 arg_ct
= &def
->args_ct
[0];
2161 ts
= &s
->temps
[func_arg
];
2162 func_addr
= ts
->val
;
2164 if (ts
->val_type
== TEMP_VAL_MEM
) {
2165 reg
= tcg_reg_alloc(s
, arg_ct
->u
.regs
, allocated_regs
);
2166 tcg_out_ld(s
, ts
->type
, reg
, ts
->mem_reg
, ts
->mem_offset
);
2168 tcg_regset_set_reg(allocated_regs
, reg
);
2169 } else if (ts
->val_type
== TEMP_VAL_REG
) {
2171 if (!tcg_regset_test_reg(arg_ct
->u
.regs
, reg
)) {
2172 reg
= tcg_reg_alloc(s
, arg_ct
->u
.regs
, allocated_regs
);
2173 tcg_out_mov(s
, ts
->type
, reg
, ts
->reg
);
2176 tcg_regset_set_reg(allocated_regs
, reg
);
2177 } else if (ts
->val_type
== TEMP_VAL_CONST
) {
2178 if (tcg_target_const_match(func_addr
, arg_ct
)) {
2180 func_arg
= func_addr
;
2182 reg
= tcg_reg_alloc(s
, arg_ct
->u
.regs
, allocated_regs
);
2183 tcg_out_movi(s
, ts
->type
, reg
, func_addr
);
2185 tcg_regset_set_reg(allocated_regs
, reg
);
2192 /* mark dead temporaries and free the associated registers */
2193 for(i
= nb_oargs
; i
< nb_iargs
+ nb_oargs
; i
++) {
2194 if (IS_DEAD_ARG(i
)) {
2195 temp_dead(s
, args
[i
]);
2199 /* clobber call registers */
2200 for(reg
= 0; reg
< TCG_TARGET_NB_REGS
; reg
++) {
2201 if (tcg_regset_test_reg(tcg_target_call_clobber_regs
, reg
)) {
2202 tcg_reg_free(s
, reg
);
2206 /* Save globals if they might be written by the helper, sync them if
2207 they might be read. */
2208 if (flags
& TCG_CALL_NO_READ_GLOBALS
) {
2210 } else if (flags
& TCG_CALL_NO_WRITE_GLOBALS
) {
2211 sync_globals(s
, allocated_regs
);
2213 save_globals(s
, allocated_regs
);
2216 tcg_out_op(s
, opc
, &func_arg
, &const_func_arg
);
2218 /* assign output registers and emit moves if needed */
2219 for(i
= 0; i
< nb_oargs
; i
++) {
2221 ts
= &s
->temps
[arg
];
2222 reg
= tcg_target_call_oarg_regs
[i
];
2223 assert(s
->reg_to_temp
[reg
] == -1);
2224 if (ts
->fixed_reg
) {
2225 if (ts
->reg
!= reg
) {
2226 tcg_out_mov(s
, ts
->type
, ts
->reg
, reg
);
2229 if (ts
->val_type
== TEMP_VAL_REG
) {
2230 s
->reg_to_temp
[ts
->reg
] = -1;
2232 ts
->val_type
= TEMP_VAL_REG
;
2234 ts
->mem_coherent
= 0;
2235 s
->reg_to_temp
[reg
] = arg
;
2236 if (NEED_SYNC_ARG(i
)) {
2237 tcg_reg_sync(s
, reg
);
2239 if (IS_DEAD_ARG(i
)) {
2240 temp_dead(s
, args
[i
]);
2245 return nb_iargs
+ nb_oargs
+ def
->nb_cargs
+ 1;
2248 #ifdef CONFIG_PROFILER
2250 static int64_t tcg_table_op_count
[NB_OPS
];
2252 static void dump_op_count(void)
2256 f
= fopen("/tmp/op.log", "w");
2257 for(i
= INDEX_op_end
; i
< NB_OPS
; i
++) {
2258 fprintf(f
, "%s %" PRId64
"\n", tcg_op_defs
[i
].name
, tcg_table_op_count
[i
]);
2265 static inline int tcg_gen_code_common(TCGContext
*s
, uint8_t *gen_code_buf
,
2270 const TCGOpDef
*def
;
2274 if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP
))) {
2281 #ifdef CONFIG_PROFILER
2282 s
->opt_time
-= profile_getclock();
2285 #ifdef USE_TCG_OPTIMIZATIONS
2286 s
->gen_opparam_ptr
=
2287 tcg_optimize(s
, s
->gen_opc_ptr
, s
->gen_opparam_buf
, tcg_op_defs
);
2290 #ifdef CONFIG_PROFILER
2291 s
->opt_time
+= profile_getclock();
2292 s
->la_time
-= profile_getclock();
2295 tcg_liveness_analysis(s
);
2297 #ifdef CONFIG_PROFILER
2298 s
->la_time
+= profile_getclock();
2302 if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP_OPT
))) {
2303 qemu_log("OP after optimization and liveness analysis:\n");
2309 tcg_reg_alloc_start(s
);
2311 s
->code_buf
= gen_code_buf
;
2312 s
->code_ptr
= gen_code_buf
;
2314 args
= s
->gen_opparam_buf
;
2318 opc
= s
->gen_opc_buf
[op_index
];
2319 #ifdef CONFIG_PROFILER
2320 tcg_table_op_count
[opc
]++;
2322 def
= &tcg_op_defs
[opc
];
2324 printf("%s: %d %d %d\n", def
->name
,
2325 def
->nb_oargs
, def
->nb_iargs
, def
->nb_cargs
);
2329 case INDEX_op_mov_i32
:
2330 case INDEX_op_mov_i64
:
2331 tcg_reg_alloc_mov(s
, def
, args
, s
->op_dead_args
[op_index
],
2332 s
->op_sync_args
[op_index
]);
2334 case INDEX_op_movi_i32
:
2335 case INDEX_op_movi_i64
:
2336 tcg_reg_alloc_movi(s
, args
, s
->op_dead_args
[op_index
],
2337 s
->op_sync_args
[op_index
]);
2339 case INDEX_op_debug_insn_start
:
2340 /* debug instruction */
2350 case INDEX_op_discard
:
2351 temp_dead(s
, args
[0]);
2353 case INDEX_op_set_label
:
2354 tcg_reg_alloc_bb_end(s
, s
->reserved_regs
);
2355 tcg_out_label(s
, args
[0], s
->code_ptr
);
2358 args
+= tcg_reg_alloc_call(s
, def
, opc
, args
,
2359 s
->op_dead_args
[op_index
],
2360 s
->op_sync_args
[op_index
]);
2365 /* Sanity check that we've not introduced any unhandled opcodes. */
2366 if (def
->flags
& TCG_OPF_NOT_PRESENT
) {
2369 /* Note: in order to speed up the code, it would be much
2370 faster to have specialized register allocator functions for
2371 some common argument patterns */
2372 tcg_reg_alloc_op(s
, def
, opc
, args
, s
->op_dead_args
[op_index
],
2373 s
->op_sync_args
[op_index
]);
2376 args
+= def
->nb_args
;
2378 if (search_pc
>= 0 && search_pc
< s
->code_ptr
- gen_code_buf
) {
2387 #if defined(CONFIG_QEMU_LDST_OPTIMIZATION) && defined(CONFIG_SOFTMMU)
2388 /* Generate TB finalization at the end of block */
2389 tcg_out_tb_finalize(s
);
2394 int tcg_gen_code(TCGContext
*s
, uint8_t *gen_code_buf
)
2396 #ifdef CONFIG_PROFILER
2399 n
= (s
->gen_opc_ptr
- s
->gen_opc_buf
);
2401 if (n
> s
->op_count_max
)
2402 s
->op_count_max
= n
;
2404 s
->temp_count
+= s
->nb_temps
;
2405 if (s
->nb_temps
> s
->temp_count_max
)
2406 s
->temp_count_max
= s
->nb_temps
;
2410 tcg_gen_code_common(s
, gen_code_buf
, -1);
2412 /* flush instruction cache */
2413 flush_icache_range((uintptr_t)gen_code_buf
, (uintptr_t)s
->code_ptr
);
2415 return s
->code_ptr
- gen_code_buf
;
2418 /* Return the index of the micro operation such as the pc after is <
2419 offset bytes from the start of the TB. The contents of gen_code_buf must
2420 not be changed, though writing the same values is ok.
2421 Return -1 if not found. */
2422 int tcg_gen_code_search_pc(TCGContext
*s
, uint8_t *gen_code_buf
, long offset
)
2424 return tcg_gen_code_common(s
, gen_code_buf
, offset
);
2427 #ifdef CONFIG_PROFILER
2428 void tcg_dump_info(FILE *f
, fprintf_function cpu_fprintf
)
2430 TCGContext
*s
= &tcg_ctx
;
2433 tot
= s
->interm_time
+ s
->code_time
;
2434 cpu_fprintf(f
, "JIT cycles %" PRId64
" (%0.3f s at 2.4 GHz)\n",
2436 cpu_fprintf(f
, "translated TBs %" PRId64
" (aborted=%" PRId64
" %0.1f%%)\n",
2438 s
->tb_count1
- s
->tb_count
,
2439 s
->tb_count1
? (double)(s
->tb_count1
- s
->tb_count
) / s
->tb_count1
* 100.0 : 0);
2440 cpu_fprintf(f
, "avg ops/TB %0.1f max=%d\n",
2441 s
->tb_count
? (double)s
->op_count
/ s
->tb_count
: 0, s
->op_count_max
);
2442 cpu_fprintf(f
, "deleted ops/TB %0.2f\n",
2444 (double)s
->del_op_count
/ s
->tb_count
: 0);
2445 cpu_fprintf(f
, "avg temps/TB %0.2f max=%d\n",
2447 (double)s
->temp_count
/ s
->tb_count
: 0,
2450 cpu_fprintf(f
, "cycles/op %0.1f\n",
2451 s
->op_count
? (double)tot
/ s
->op_count
: 0);
2452 cpu_fprintf(f
, "cycles/in byte %0.1f\n",
2453 s
->code_in_len
? (double)tot
/ s
->code_in_len
: 0);
2454 cpu_fprintf(f
, "cycles/out byte %0.1f\n",
2455 s
->code_out_len
? (double)tot
/ s
->code_out_len
: 0);
2458 cpu_fprintf(f
, " gen_interm time %0.1f%%\n",
2459 (double)s
->interm_time
/ tot
* 100.0);
2460 cpu_fprintf(f
, " gen_code time %0.1f%%\n",
2461 (double)s
->code_time
/ tot
* 100.0);
2462 cpu_fprintf(f
, "optim./code time %0.1f%%\n",
2463 (double)s
->opt_time
/ (s
->code_time
? s
->code_time
: 1)
2465 cpu_fprintf(f
, "liveness/code time %0.1f%%\n",
2466 (double)s
->la_time
/ (s
->code_time
? s
->code_time
: 1) * 100.0);
2467 cpu_fprintf(f
, "cpu_restore count %" PRId64
"\n",
2469 cpu_fprintf(f
, " avg cycles %0.1f\n",
2470 s
->restore_count
? (double)s
->restore_time
/ s
->restore_count
: 0);
2475 void tcg_dump_info(FILE *f
, fprintf_function cpu_fprintf
)
2477 cpu_fprintf(f
, "[TCG profiler not compiled]\n");
2481 #ifdef ELF_HOST_MACHINE
2482 /* In order to use this feature, the backend needs to do three things:
2484 (1) Define ELF_HOST_MACHINE to indicate both what value to
2485 put into the ELF image and to indicate support for the feature.
2487 (2) Define tcg_register_jit. This should create a buffer containing
2488 the contents of a .debug_frame section that describes the post-
2489 prologue unwind info for the tcg machine.
2491 (3) Call tcg_register_jit_int, with the constructed .debug_frame.
2494 /* Begin GDB interface. THE FOLLOWING MUST MATCH GDB DOCS. */
2501 struct jit_code_entry
{
2502 struct jit_code_entry
*next_entry
;
2503 struct jit_code_entry
*prev_entry
;
2504 const void *symfile_addr
;
2505 uint64_t symfile_size
;
2508 struct jit_descriptor
{
2510 uint32_t action_flag
;
2511 struct jit_code_entry
*relevant_entry
;
2512 struct jit_code_entry
*first_entry
;
2515 void __jit_debug_register_code(void) __attribute__((noinline
));
2516 void __jit_debug_register_code(void)
2521 /* Must statically initialize the version, because GDB may check
2522 the version before we can set it. */
2523 struct jit_descriptor __jit_debug_descriptor
= { 1, 0, 0, 0 };
2525 /* End GDB interface. */
2527 static int find_string(const char *strtab
, const char *str
)
2529 const char *p
= strtab
+ 1;
2532 if (strcmp(p
, str
) == 0) {
2539 static void tcg_register_jit_int(void *buf_ptr
, size_t buf_size
,
2540 void *debug_frame
, size_t debug_frame_size
)
2542 struct __attribute__((packed
)) DebugInfo
{
2549 uintptr_t cu_low_pc
;
2550 uintptr_t cu_high_pc
;
2553 uintptr_t fn_low_pc
;
2554 uintptr_t fn_high_pc
;
2563 struct DebugInfo di
;
2568 struct ElfImage
*img
;
2570 static const struct ElfImage img_template
= {
2572 .e_ident
[EI_MAG0
] = ELFMAG0
,
2573 .e_ident
[EI_MAG1
] = ELFMAG1
,
2574 .e_ident
[EI_MAG2
] = ELFMAG2
,
2575 .e_ident
[EI_MAG3
] = ELFMAG3
,
2576 .e_ident
[EI_CLASS
] = ELF_CLASS
,
2577 .e_ident
[EI_DATA
] = ELF_DATA
,
2578 .e_ident
[EI_VERSION
] = EV_CURRENT
,
2580 .e_machine
= ELF_HOST_MACHINE
,
2581 .e_version
= EV_CURRENT
,
2582 .e_phoff
= offsetof(struct ElfImage
, phdr
),
2583 .e_shoff
= offsetof(struct ElfImage
, shdr
),
2584 .e_ehsize
= sizeof(ElfW(Shdr
)),
2585 .e_phentsize
= sizeof(ElfW(Phdr
)),
2587 .e_shentsize
= sizeof(ElfW(Shdr
)),
2588 .e_shnum
= ARRAY_SIZE(img
->shdr
),
2589 .e_shstrndx
= ARRAY_SIZE(img
->shdr
) - 1,
2590 #ifdef ELF_HOST_FLAGS
2591 .e_flags
= ELF_HOST_FLAGS
,
2594 .e_ident
[EI_OSABI
] = ELF_OSABI
,
2602 [0] = { .sh_type
= SHT_NULL
},
2603 /* Trick: The contents of code_gen_buffer are not present in
2604 this fake ELF file; that got allocated elsewhere. Therefore
2605 we mark .text as SHT_NOBITS (similar to .bss) so that readers
2606 will not look for contents. We can record any address. */
2608 .sh_type
= SHT_NOBITS
,
2609 .sh_flags
= SHF_EXECINSTR
| SHF_ALLOC
,
2611 [2] = { /* .debug_info */
2612 .sh_type
= SHT_PROGBITS
,
2613 .sh_offset
= offsetof(struct ElfImage
, di
),
2614 .sh_size
= sizeof(struct DebugInfo
),
2616 [3] = { /* .debug_abbrev */
2617 .sh_type
= SHT_PROGBITS
,
2618 .sh_offset
= offsetof(struct ElfImage
, da
),
2619 .sh_size
= sizeof(img
->da
),
2621 [4] = { /* .debug_frame */
2622 .sh_type
= SHT_PROGBITS
,
2623 .sh_offset
= sizeof(struct ElfImage
),
2625 [5] = { /* .symtab */
2626 .sh_type
= SHT_SYMTAB
,
2627 .sh_offset
= offsetof(struct ElfImage
, sym
),
2628 .sh_size
= sizeof(img
->sym
),
2630 .sh_link
= ARRAY_SIZE(img
->shdr
) - 1,
2631 .sh_entsize
= sizeof(ElfW(Sym
)),
2633 [6] = { /* .strtab */
2634 .sh_type
= SHT_STRTAB
,
2635 .sh_offset
= offsetof(struct ElfImage
, str
),
2636 .sh_size
= sizeof(img
->str
),
2640 [1] = { /* code_gen_buffer */
2641 .st_info
= ELF_ST_INFO(STB_GLOBAL
, STT_FUNC
),
2646 .len
= sizeof(struct DebugInfo
) - 4,
2648 .ptr_size
= sizeof(void *),
2650 .cu_lang
= 0x8001, /* DW_LANG_Mips_Assembler */
2652 .fn_name
= "code_gen_buffer"
2655 1, /* abbrev number (the cu) */
2656 0x11, 1, /* DW_TAG_compile_unit, has children */
2657 0x13, 0x5, /* DW_AT_language, DW_FORM_data2 */
2658 0x11, 0x1, /* DW_AT_low_pc, DW_FORM_addr */
2659 0x12, 0x1, /* DW_AT_high_pc, DW_FORM_addr */
2660 0, 0, /* end of abbrev */
2661 2, /* abbrev number (the fn) */
2662 0x2e, 0, /* DW_TAG_subprogram, no children */
2663 0x3, 0x8, /* DW_AT_name, DW_FORM_string */
2664 0x11, 0x1, /* DW_AT_low_pc, DW_FORM_addr */
2665 0x12, 0x1, /* DW_AT_high_pc, DW_FORM_addr */
2666 0, 0, /* end of abbrev */
2667 0 /* no more abbrev */
2669 .str
= "\0" ".text\0" ".debug_info\0" ".debug_abbrev\0"
2670 ".debug_frame\0" ".symtab\0" ".strtab\0" "code_gen_buffer",
2673 /* We only need a single jit entry; statically allocate it. */
2674 static struct jit_code_entry one_entry
;
2676 uintptr_t buf
= (uintptr_t)buf_ptr
;
2677 size_t img_size
= sizeof(struct ElfImage
) + debug_frame_size
;
2679 img
= g_malloc(img_size
);
2680 *img
= img_template
;
2681 memcpy(img
+ 1, debug_frame
, debug_frame_size
);
2683 img
->phdr
.p_vaddr
= buf
;
2684 img
->phdr
.p_paddr
= buf
;
2685 img
->phdr
.p_memsz
= buf_size
;
2687 img
->shdr
[1].sh_name
= find_string(img
->str
, ".text");
2688 img
->shdr
[1].sh_addr
= buf
;
2689 img
->shdr
[1].sh_size
= buf_size
;
2691 img
->shdr
[2].sh_name
= find_string(img
->str
, ".debug_info");
2692 img
->shdr
[3].sh_name
= find_string(img
->str
, ".debug_abbrev");
2694 img
->shdr
[4].sh_name
= find_string(img
->str
, ".debug_frame");
2695 img
->shdr
[4].sh_size
= debug_frame_size
;
2697 img
->shdr
[5].sh_name
= find_string(img
->str
, ".symtab");
2698 img
->shdr
[6].sh_name
= find_string(img
->str
, ".strtab");
2700 img
->sym
[1].st_name
= find_string(img
->str
, "code_gen_buffer");
2701 img
->sym
[1].st_value
= buf
;
2702 img
->sym
[1].st_size
= buf_size
;
2704 img
->di
.cu_low_pc
= buf
;
2705 img
->di
.cu_high_pc
= buf
+ buf_size
;
2706 img
->di
.fn_low_pc
= buf
;
2707 img
->di
.fn_high_pc
= buf
+ buf_size
;
2710 /* Enable this block to be able to debug the ELF image file creation.
2711 One can use readelf, objdump, or other inspection utilities. */
2713 FILE *f
= fopen("/tmp/qemu.jit", "w+b");
2715 if (fwrite(img
, img_size
, 1, f
) != img_size
) {
2716 /* Avoid stupid unused return value warning for fwrite. */
2723 one_entry
.symfile_addr
= img
;
2724 one_entry
.symfile_size
= img_size
;
2726 __jit_debug_descriptor
.action_flag
= JIT_REGISTER_FN
;
2727 __jit_debug_descriptor
.relevant_entry
= &one_entry
;
2728 __jit_debug_descriptor
.first_entry
= &one_entry
;
2729 __jit_debug_register_code();
2732 /* No support for the feature. Provide the entry point expected by exec.c,
2733 and implement the internal function we declared earlier. */
2735 static void tcg_register_jit_int(void *buf
, size_t size
,
2736 void *debug_frame
, size_t debug_frame_size
)
2740 void tcg_register_jit(void *buf
, size_t buf_size
)
2743 #endif /* ELF_HOST_MACHINE */