target/arm/vfp_helper: Restrict the SoftFloat use to TCG
[qemu/ar7.git] / include / hw / mips / cps.h
blobaab1af926dff8cb11449d965b615789c202de634
1 /*
2 * Coherent Processing System emulation.
4 * Copyright (c) 2016 Imagination Technologies
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
20 #ifndef MIPS_CPS_H
21 #define MIPS_CPS_H
23 #include "hw/sysbus.h"
24 #include "hw/misc/mips_cmgcr.h"
25 #include "hw/intc/mips_gic.h"
26 #include "hw/misc/mips_cpc.h"
27 #include "hw/misc/mips_itu.h"
29 #define TYPE_MIPS_CPS "mips-cps"
30 #define MIPS_CPS(obj) OBJECT_CHECK(MIPSCPSState, (obj), TYPE_MIPS_CPS)
32 typedef struct MIPSCPSState {
33 SysBusDevice parent_obj;
35 uint32_t num_vp;
36 uint32_t num_irq;
37 char *cpu_type;
39 MemoryRegion container;
40 MIPSGCRState gcr;
41 MIPSGICState gic;
42 MIPSCPCState cpc;
43 MIPSITUState itu;
44 } MIPSCPSState;
46 qemu_irq get_cps_irq(MIPSCPSState *cps, int pin_number);
48 #endif