target-*: dfilter support for in_asm
[qemu/ar7.git] / hw / audio / wm8750.c
blob0c6500e96ac7c926fe48ad39b6b503421fe66429
1 /*
2 * WM8750 audio CODEC.
4 * Copyright (c) 2006 Openedhand Ltd.
5 * Written by Andrzej Zaborowski <balrog@zabor.org>
7 * This file is licensed under GNU GPL.
8 */
10 #include "qemu/osdep.h"
11 #include "hw/hw.h"
12 #include "hw/i2c/i2c.h"
13 #include "audio/audio.h"
15 #define IN_PORT_N 3
16 #define OUT_PORT_N 3
18 #define CODEC "wm8750"
20 typedef struct {
21 int adc;
22 int adc_hz;
23 int dac;
24 int dac_hz;
25 } WMRate;
27 #define TYPE_WM8750 "wm8750"
28 #define WM8750(obj) OBJECT_CHECK(WM8750State, (obj), TYPE_WM8750)
30 typedef struct WM8750State {
31 I2CSlave parent_obj;
33 uint8_t i2c_data[2];
34 int i2c_len;
35 QEMUSoundCard card;
36 SWVoiceIn *adc_voice[IN_PORT_N];
37 SWVoiceOut *dac_voice[OUT_PORT_N];
38 int enable;
39 void (*data_req)(void *, int, int);
40 void *opaque;
41 uint8_t data_in[4096];
42 uint8_t data_out[4096];
43 int idx_in, req_in;
44 int idx_out, req_out;
46 SWVoiceOut **out[2];
47 uint8_t outvol[7], outmute[2];
48 SWVoiceIn **in[2];
49 uint8_t invol[4], inmute[2];
51 uint8_t diff[2], pol, ds, monomix[2], alc, mute;
52 uint8_t path[4], mpath[2], power, format;
53 const WMRate *rate;
54 uint8_t rate_vmstate;
55 int adc_hz, dac_hz, ext_adc_hz, ext_dac_hz, master;
56 } WM8750State;
58 /* pow(10.0, -i / 20.0) * 255, i = 0..42 */
59 static const uint8_t wm8750_vol_db_table[] = {
60 255, 227, 203, 181, 161, 143, 128, 114, 102, 90, 81, 72, 64, 57, 51, 45,
61 40, 36, 32, 29, 26, 23, 20, 18, 16, 14, 13, 11, 10, 9, 8, 7, 6, 6, 5, 5,
62 4, 4, 3, 3, 3, 2, 2
65 #define WM8750_OUTVOL_TRANSFORM(x) wm8750_vol_db_table[(0x7f - x) / 3]
66 #define WM8750_INVOL_TRANSFORM(x) (x << 2)
68 static inline void wm8750_in_load(WM8750State *s)
70 if (s->idx_in + s->req_in <= sizeof(s->data_in))
71 return;
72 s->idx_in = audio_MAX(0, (int) sizeof(s->data_in) - s->req_in);
73 AUD_read(*s->in[0], s->data_in + s->idx_in,
74 sizeof(s->data_in) - s->idx_in);
77 static inline void wm8750_out_flush(WM8750State *s)
79 int sent = 0;
80 while (sent < s->idx_out)
81 sent += AUD_write(*s->out[0], s->data_out + sent, s->idx_out - sent)
82 ?: s->idx_out;
83 s->idx_out = 0;
86 static void wm8750_audio_in_cb(void *opaque, int avail_b)
88 WM8750State *s = (WM8750State *) opaque;
89 s->req_in = avail_b;
90 s->data_req(s->opaque, s->req_out >> 2, avail_b >> 2);
93 static void wm8750_audio_out_cb(void *opaque, int free_b)
95 WM8750State *s = (WM8750State *) opaque;
97 if (s->idx_out >= free_b) {
98 s->idx_out = free_b;
99 s->req_out = 0;
100 wm8750_out_flush(s);
101 } else
102 s->req_out = free_b - s->idx_out;
104 s->data_req(s->opaque, s->req_out >> 2, s->req_in >> 2);
107 static const WMRate wm_rate_table[] = {
108 { 256, 48000, 256, 48000 }, /* SR: 00000 */
109 { 384, 48000, 384, 48000 }, /* SR: 00001 */
110 { 256, 48000, 1536, 8000 }, /* SR: 00010 */
111 { 384, 48000, 2304, 8000 }, /* SR: 00011 */
112 { 1536, 8000, 256, 48000 }, /* SR: 00100 */
113 { 2304, 8000, 384, 48000 }, /* SR: 00101 */
114 { 1536, 8000, 1536, 8000 }, /* SR: 00110 */
115 { 2304, 8000, 2304, 8000 }, /* SR: 00111 */
116 { 1024, 12000, 1024, 12000 }, /* SR: 01000 */
117 { 1526, 12000, 1536, 12000 }, /* SR: 01001 */
118 { 768, 16000, 768, 16000 }, /* SR: 01010 */
119 { 1152, 16000, 1152, 16000 }, /* SR: 01011 */
120 { 384, 32000, 384, 32000 }, /* SR: 01100 */
121 { 576, 32000, 576, 32000 }, /* SR: 01101 */
122 { 128, 96000, 128, 96000 }, /* SR: 01110 */
123 { 192, 96000, 192, 96000 }, /* SR: 01111 */
124 { 256, 44100, 256, 44100 }, /* SR: 10000 */
125 { 384, 44100, 384, 44100 }, /* SR: 10001 */
126 { 256, 44100, 1408, 8018 }, /* SR: 10010 */
127 { 384, 44100, 2112, 8018 }, /* SR: 10011 */
128 { 1408, 8018, 256, 44100 }, /* SR: 10100 */
129 { 2112, 8018, 384, 44100 }, /* SR: 10101 */
130 { 1408, 8018, 1408, 8018 }, /* SR: 10110 */
131 { 2112, 8018, 2112, 8018 }, /* SR: 10111 */
132 { 1024, 11025, 1024, 11025 }, /* SR: 11000 */
133 { 1536, 11025, 1536, 11025 }, /* SR: 11001 */
134 { 512, 22050, 512, 22050 }, /* SR: 11010 */
135 { 768, 22050, 768, 22050 }, /* SR: 11011 */
136 { 512, 24000, 512, 24000 }, /* SR: 11100 */
137 { 768, 24000, 768, 24000 }, /* SR: 11101 */
138 { 128, 88200, 128, 88200 }, /* SR: 11110 */
139 { 192, 88200, 192, 88200 }, /* SR: 11111 */
142 static void wm8750_vol_update(WM8750State *s)
144 /* FIXME: multiply all volumes by s->invol[2], s->invol[3] */
146 AUD_set_volume_in(s->adc_voice[0], s->mute,
147 s->inmute[0] ? 0 : WM8750_INVOL_TRANSFORM(s->invol[0]),
148 s->inmute[1] ? 0 : WM8750_INVOL_TRANSFORM(s->invol[1]));
149 AUD_set_volume_in(s->adc_voice[1], s->mute,
150 s->inmute[0] ? 0 : WM8750_INVOL_TRANSFORM(s->invol[0]),
151 s->inmute[1] ? 0 : WM8750_INVOL_TRANSFORM(s->invol[1]));
152 AUD_set_volume_in(s->adc_voice[2], s->mute,
153 s->inmute[0] ? 0 : WM8750_INVOL_TRANSFORM(s->invol[0]),
154 s->inmute[1] ? 0 : WM8750_INVOL_TRANSFORM(s->invol[1]));
156 /* FIXME: multiply all volumes by s->outvol[0], s->outvol[1] */
158 /* Speaker: LOUT2VOL ROUT2VOL */
159 AUD_set_volume_out(s->dac_voice[0], s->mute,
160 s->outmute[0] ? 0 : WM8750_OUTVOL_TRANSFORM(s->outvol[4]),
161 s->outmute[1] ? 0 : WM8750_OUTVOL_TRANSFORM(s->outvol[5]));
163 /* Headphone: LOUT1VOL ROUT1VOL */
164 AUD_set_volume_out(s->dac_voice[1], s->mute,
165 s->outmute[0] ? 0 : WM8750_OUTVOL_TRANSFORM(s->outvol[2]),
166 s->outmute[1] ? 0 : WM8750_OUTVOL_TRANSFORM(s->outvol[3]));
168 /* MONOOUT: MONOVOL MONOVOL */
169 AUD_set_volume_out(s->dac_voice[2], s->mute,
170 s->outmute[0] ? 0 : WM8750_OUTVOL_TRANSFORM(s->outvol[6]),
171 s->outmute[1] ? 0 : WM8750_OUTVOL_TRANSFORM(s->outvol[6]));
174 static void wm8750_set_format(WM8750State *s)
176 int i;
177 struct audsettings in_fmt;
178 struct audsettings out_fmt;
180 wm8750_out_flush(s);
182 if (s->in[0] && *s->in[0])
183 AUD_set_active_in(*s->in[0], 0);
184 if (s->out[0] && *s->out[0])
185 AUD_set_active_out(*s->out[0], 0);
187 for (i = 0; i < IN_PORT_N; i ++)
188 if (s->adc_voice[i]) {
189 AUD_close_in(&s->card, s->adc_voice[i]);
190 s->adc_voice[i] = NULL;
192 for (i = 0; i < OUT_PORT_N; i ++)
193 if (s->dac_voice[i]) {
194 AUD_close_out(&s->card, s->dac_voice[i]);
195 s->dac_voice[i] = NULL;
198 if (!s->enable)
199 return;
201 /* Setup input */
202 in_fmt.endianness = 0;
203 in_fmt.nchannels = 2;
204 in_fmt.freq = s->adc_hz;
205 in_fmt.fmt = AUD_FMT_S16;
207 s->adc_voice[0] = AUD_open_in(&s->card, s->adc_voice[0],
208 CODEC ".input1", s, wm8750_audio_in_cb, &in_fmt);
209 s->adc_voice[1] = AUD_open_in(&s->card, s->adc_voice[1],
210 CODEC ".input2", s, wm8750_audio_in_cb, &in_fmt);
211 s->adc_voice[2] = AUD_open_in(&s->card, s->adc_voice[2],
212 CODEC ".input3", s, wm8750_audio_in_cb, &in_fmt);
214 /* Setup output */
215 out_fmt.endianness = 0;
216 out_fmt.nchannels = 2;
217 out_fmt.freq = s->dac_hz;
218 out_fmt.fmt = AUD_FMT_S16;
220 s->dac_voice[0] = AUD_open_out(&s->card, s->dac_voice[0],
221 CODEC ".speaker", s, wm8750_audio_out_cb, &out_fmt);
222 s->dac_voice[1] = AUD_open_out(&s->card, s->dac_voice[1],
223 CODEC ".headphone", s, wm8750_audio_out_cb, &out_fmt);
224 /* MONOMIX is also in stereo for simplicity */
225 s->dac_voice[2] = AUD_open_out(&s->card, s->dac_voice[2],
226 CODEC ".monomix", s, wm8750_audio_out_cb, &out_fmt);
227 /* no sense emulating OUT3 which is a mix of other outputs */
229 wm8750_vol_update(s);
231 /* We should connect the left and right channels to their
232 * respective inputs/outputs but we have completely no need
233 * for mixing or combining paths to different ports, so we
234 * connect both channels to where the left channel is routed. */
235 if (s->in[0] && *s->in[0])
236 AUD_set_active_in(*s->in[0], 1);
237 if (s->out[0] && *s->out[0])
238 AUD_set_active_out(*s->out[0], 1);
241 static void wm8750_clk_update(WM8750State *s, int ext)
243 if (s->master || !s->ext_dac_hz)
244 s->dac_hz = s->rate->dac_hz;
245 else
246 s->dac_hz = s->ext_dac_hz;
248 if (s->master || !s->ext_adc_hz)
249 s->adc_hz = s->rate->adc_hz;
250 else
251 s->adc_hz = s->ext_adc_hz;
253 if (s->master || (!s->ext_dac_hz && !s->ext_adc_hz)) {
254 if (!ext)
255 wm8750_set_format(s);
256 } else {
257 if (ext)
258 wm8750_set_format(s);
262 static void wm8750_reset(I2CSlave *i2c)
264 WM8750State *s = WM8750(i2c);
266 s->rate = &wm_rate_table[0];
267 s->enable = 0;
268 wm8750_clk_update(s, 1);
269 s->diff[0] = 0;
270 s->diff[1] = 0;
271 s->ds = 0;
272 s->alc = 0;
273 s->in[0] = &s->adc_voice[0];
274 s->invol[0] = 0x17;
275 s->invol[1] = 0x17;
276 s->invol[2] = 0xc3;
277 s->invol[3] = 0xc3;
278 s->out[0] = &s->dac_voice[0];
279 s->outvol[0] = 0xff;
280 s->outvol[1] = 0xff;
281 s->outvol[2] = 0x79;
282 s->outvol[3] = 0x79;
283 s->outvol[4] = 0x79;
284 s->outvol[5] = 0x79;
285 s->outvol[6] = 0x79;
286 s->inmute[0] = 0;
287 s->inmute[1] = 0;
288 s->outmute[0] = 0;
289 s->outmute[1] = 0;
290 s->mute = 1;
291 s->path[0] = 0;
292 s->path[1] = 0;
293 s->path[2] = 0;
294 s->path[3] = 0;
295 s->mpath[0] = 0;
296 s->mpath[1] = 0;
297 s->format = 0x0a;
298 s->idx_in = sizeof(s->data_in);
299 s->req_in = 0;
300 s->idx_out = 0;
301 s->req_out = 0;
302 wm8750_vol_update(s);
303 s->i2c_len = 0;
306 static void wm8750_event(I2CSlave *i2c, enum i2c_event event)
308 WM8750State *s = WM8750(i2c);
310 switch (event) {
311 case I2C_START_SEND:
312 s->i2c_len = 0;
313 break;
314 case I2C_FINISH:
315 #ifdef VERBOSE
316 if (s->i2c_len < 2)
317 printf("%s: message too short (%i bytes)\n",
318 __FUNCTION__, s->i2c_len);
319 #endif
320 break;
321 default:
322 break;
326 #define WM8750_LINVOL 0x00
327 #define WM8750_RINVOL 0x01
328 #define WM8750_LOUT1V 0x02
329 #define WM8750_ROUT1V 0x03
330 #define WM8750_ADCDAC 0x05
331 #define WM8750_IFACE 0x07
332 #define WM8750_SRATE 0x08
333 #define WM8750_LDAC 0x0a
334 #define WM8750_RDAC 0x0b
335 #define WM8750_BASS 0x0c
336 #define WM8750_TREBLE 0x0d
337 #define WM8750_RESET 0x0f
338 #define WM8750_3D 0x10
339 #define WM8750_ALC1 0x11
340 #define WM8750_ALC2 0x12
341 #define WM8750_ALC3 0x13
342 #define WM8750_NGATE 0x14
343 #define WM8750_LADC 0x15
344 #define WM8750_RADC 0x16
345 #define WM8750_ADCTL1 0x17
346 #define WM8750_ADCTL2 0x18
347 #define WM8750_PWR1 0x19
348 #define WM8750_PWR2 0x1a
349 #define WM8750_ADCTL3 0x1b
350 #define WM8750_ADCIN 0x1f
351 #define WM8750_LADCIN 0x20
352 #define WM8750_RADCIN 0x21
353 #define WM8750_LOUTM1 0x22
354 #define WM8750_LOUTM2 0x23
355 #define WM8750_ROUTM1 0x24
356 #define WM8750_ROUTM2 0x25
357 #define WM8750_MOUTM1 0x26
358 #define WM8750_MOUTM2 0x27
359 #define WM8750_LOUT2V 0x28
360 #define WM8750_ROUT2V 0x29
361 #define WM8750_MOUTV 0x2a
363 static int wm8750_tx(I2CSlave *i2c, uint8_t data)
365 WM8750State *s = WM8750(i2c);
366 uint8_t cmd;
367 uint16_t value;
369 if (s->i2c_len >= 2) {
370 #ifdef VERBOSE
371 printf("%s: long message (%i bytes)\n", __func__, s->i2c_len);
372 #endif
373 return 1;
375 s->i2c_data[s->i2c_len ++] = data;
376 if (s->i2c_len != 2)
377 return 0;
379 cmd = s->i2c_data[0] >> 1;
380 value = ((s->i2c_data[0] << 8) | s->i2c_data[1]) & 0x1ff;
382 switch (cmd) {
383 case WM8750_LADCIN: /* ADC Signal Path Control (Left) */
384 s->diff[0] = (((value >> 6) & 3) == 3); /* LINSEL */
385 if (s->diff[0])
386 s->in[0] = &s->adc_voice[0 + s->ds * 1];
387 else
388 s->in[0] = &s->adc_voice[((value >> 6) & 3) * 1 + 0];
389 break;
391 case WM8750_RADCIN: /* ADC Signal Path Control (Right) */
392 s->diff[1] = (((value >> 6) & 3) == 3); /* RINSEL */
393 if (s->diff[1])
394 s->in[1] = &s->adc_voice[0 + s->ds * 1];
395 else
396 s->in[1] = &s->adc_voice[((value >> 6) & 3) * 1 + 0];
397 break;
399 case WM8750_ADCIN: /* ADC Input Mode */
400 s->ds = (value >> 8) & 1; /* DS */
401 if (s->diff[0])
402 s->in[0] = &s->adc_voice[0 + s->ds * 1];
403 if (s->diff[1])
404 s->in[1] = &s->adc_voice[0 + s->ds * 1];
405 s->monomix[0] = (value >> 6) & 3; /* MONOMIX */
406 break;
408 case WM8750_ADCTL1: /* Additional Control (1) */
409 s->monomix[1] = (value >> 1) & 1; /* DMONOMIX */
410 break;
412 case WM8750_PWR1: /* Power Management (1) */
413 s->enable = ((value >> 6) & 7) == 3; /* VMIDSEL, VREF */
414 wm8750_set_format(s);
415 break;
417 case WM8750_LINVOL: /* Left Channel PGA */
418 s->invol[0] = value & 0x3f; /* LINVOL */
419 s->inmute[0] = (value >> 7) & 1; /* LINMUTE */
420 wm8750_vol_update(s);
421 break;
423 case WM8750_RINVOL: /* Right Channel PGA */
424 s->invol[1] = value & 0x3f; /* RINVOL */
425 s->inmute[1] = (value >> 7) & 1; /* RINMUTE */
426 wm8750_vol_update(s);
427 break;
429 case WM8750_ADCDAC: /* ADC and DAC Control */
430 s->pol = (value >> 5) & 3; /* ADCPOL */
431 s->mute = (value >> 3) & 1; /* DACMU */
432 wm8750_vol_update(s);
433 break;
435 case WM8750_ADCTL3: /* Additional Control (3) */
436 break;
438 case WM8750_LADC: /* Left ADC Digital Volume */
439 s->invol[2] = value & 0xff; /* LADCVOL */
440 wm8750_vol_update(s);
441 break;
443 case WM8750_RADC: /* Right ADC Digital Volume */
444 s->invol[3] = value & 0xff; /* RADCVOL */
445 wm8750_vol_update(s);
446 break;
448 case WM8750_ALC1: /* ALC Control (1) */
449 s->alc = (value >> 7) & 3; /* ALCSEL */
450 break;
452 case WM8750_NGATE: /* Noise Gate Control */
453 case WM8750_3D: /* 3D enhance */
454 break;
456 case WM8750_LDAC: /* Left Channel Digital Volume */
457 s->outvol[0] = value & 0xff; /* LDACVOL */
458 wm8750_vol_update(s);
459 break;
461 case WM8750_RDAC: /* Right Channel Digital Volume */
462 s->outvol[1] = value & 0xff; /* RDACVOL */
463 wm8750_vol_update(s);
464 break;
466 case WM8750_BASS: /* Bass Control */
467 break;
469 case WM8750_LOUTM1: /* Left Mixer Control (1) */
470 s->path[0] = (value >> 8) & 1; /* LD2LO */
471 /* TODO: mute/unmute respective paths */
472 wm8750_vol_update(s);
473 break;
475 case WM8750_LOUTM2: /* Left Mixer Control (2) */
476 s->path[1] = (value >> 8) & 1; /* RD2LO */
477 /* TODO: mute/unmute respective paths */
478 wm8750_vol_update(s);
479 break;
481 case WM8750_ROUTM1: /* Right Mixer Control (1) */
482 s->path[2] = (value >> 8) & 1; /* LD2RO */
483 /* TODO: mute/unmute respective paths */
484 wm8750_vol_update(s);
485 break;
487 case WM8750_ROUTM2: /* Right Mixer Control (2) */
488 s->path[3] = (value >> 8) & 1; /* RD2RO */
489 /* TODO: mute/unmute respective paths */
490 wm8750_vol_update(s);
491 break;
493 case WM8750_MOUTM1: /* Mono Mixer Control (1) */
494 s->mpath[0] = (value >> 8) & 1; /* LD2MO */
495 /* TODO: mute/unmute respective paths */
496 wm8750_vol_update(s);
497 break;
499 case WM8750_MOUTM2: /* Mono Mixer Control (2) */
500 s->mpath[1] = (value >> 8) & 1; /* RD2MO */
501 /* TODO: mute/unmute respective paths */
502 wm8750_vol_update(s);
503 break;
505 case WM8750_LOUT1V: /* LOUT1 Volume */
506 s->outvol[2] = value & 0x7f; /* LOUT1VOL */
507 wm8750_vol_update(s);
508 break;
510 case WM8750_LOUT2V: /* LOUT2 Volume */
511 s->outvol[4] = value & 0x7f; /* LOUT2VOL */
512 wm8750_vol_update(s);
513 break;
515 case WM8750_ROUT1V: /* ROUT1 Volume */
516 s->outvol[3] = value & 0x7f; /* ROUT1VOL */
517 wm8750_vol_update(s);
518 break;
520 case WM8750_ROUT2V: /* ROUT2 Volume */
521 s->outvol[5] = value & 0x7f; /* ROUT2VOL */
522 wm8750_vol_update(s);
523 break;
525 case WM8750_MOUTV: /* MONOOUT Volume */
526 s->outvol[6] = value & 0x7f; /* MONOOUTVOL */
527 wm8750_vol_update(s);
528 break;
530 case WM8750_ADCTL2: /* Additional Control (2) */
531 break;
533 case WM8750_PWR2: /* Power Management (2) */
534 s->power = value & 0x7e;
535 /* TODO: mute/unmute respective paths */
536 wm8750_vol_update(s);
537 break;
539 case WM8750_IFACE: /* Digital Audio Interface Format */
540 s->format = value;
541 s->master = (value >> 6) & 1; /* MS */
542 wm8750_clk_update(s, s->master);
543 break;
545 case WM8750_SRATE: /* Clocking and Sample Rate Control */
546 s->rate = &wm_rate_table[(value >> 1) & 0x1f];
547 wm8750_clk_update(s, 0);
548 break;
550 case WM8750_RESET: /* Reset */
551 wm8750_reset(I2C_SLAVE(s));
552 break;
554 #ifdef VERBOSE
555 default:
556 printf("%s: unknown register %02x\n", __FUNCTION__, cmd);
557 #endif
560 return 0;
563 static int wm8750_rx(I2CSlave *i2c)
565 return 0x00;
568 static void wm8750_pre_save(void *opaque)
570 WM8750State *s = opaque;
572 s->rate_vmstate = s->rate - wm_rate_table;
575 static int wm8750_post_load(void *opaque, int version_id)
577 WM8750State *s = opaque;
579 s->rate = &wm_rate_table[s->rate_vmstate & 0x1f];
580 return 0;
583 static const VMStateDescription vmstate_wm8750 = {
584 .name = CODEC,
585 .version_id = 0,
586 .minimum_version_id = 0,
587 .pre_save = wm8750_pre_save,
588 .post_load = wm8750_post_load,
589 .fields = (VMStateField[]) {
590 VMSTATE_UINT8_ARRAY(i2c_data, WM8750State, 2),
591 VMSTATE_INT32(i2c_len, WM8750State),
592 VMSTATE_INT32(enable, WM8750State),
593 VMSTATE_INT32(idx_in, WM8750State),
594 VMSTATE_INT32(req_in, WM8750State),
595 VMSTATE_INT32(idx_out, WM8750State),
596 VMSTATE_INT32(req_out, WM8750State),
597 VMSTATE_UINT8_ARRAY(outvol, WM8750State, 7),
598 VMSTATE_UINT8_ARRAY(outmute, WM8750State, 2),
599 VMSTATE_UINT8_ARRAY(invol, WM8750State, 4),
600 VMSTATE_UINT8_ARRAY(inmute, WM8750State, 2),
601 VMSTATE_UINT8_ARRAY(diff, WM8750State, 2),
602 VMSTATE_UINT8(pol, WM8750State),
603 VMSTATE_UINT8(ds, WM8750State),
604 VMSTATE_UINT8_ARRAY(monomix, WM8750State, 2),
605 VMSTATE_UINT8(alc, WM8750State),
606 VMSTATE_UINT8(mute, WM8750State),
607 VMSTATE_UINT8_ARRAY(path, WM8750State, 4),
608 VMSTATE_UINT8_ARRAY(mpath, WM8750State, 2),
609 VMSTATE_UINT8(format, WM8750State),
610 VMSTATE_UINT8(power, WM8750State),
611 VMSTATE_UINT8(rate_vmstate, WM8750State),
612 VMSTATE_I2C_SLAVE(parent_obj, WM8750State),
613 VMSTATE_END_OF_LIST()
617 static int wm8750_init(I2CSlave *i2c)
619 WM8750State *s = WM8750(i2c);
621 AUD_register_card(CODEC, &s->card);
622 wm8750_reset(I2C_SLAVE(s));
624 return 0;
627 #if 0
628 static void wm8750_fini(I2CSlave *i2c)
630 WM8750State *s = WM8750(i2c);
632 wm8750_reset(I2C_SLAVE(s));
633 AUD_remove_card(&s->card);
634 g_free(s);
636 #endif
638 void wm8750_data_req_set(DeviceState *dev,
639 void (*data_req)(void *, int, int), void *opaque)
641 WM8750State *s = WM8750(dev);
643 s->data_req = data_req;
644 s->opaque = opaque;
647 void wm8750_dac_dat(void *opaque, uint32_t sample)
649 WM8750State *s = (WM8750State *) opaque;
651 *(uint32_t *) &s->data_out[s->idx_out] = sample;
652 s->req_out -= 4;
653 s->idx_out += 4;
654 if (s->idx_out >= sizeof(s->data_out) || s->req_out <= 0)
655 wm8750_out_flush(s);
658 void *wm8750_dac_buffer(void *opaque, int samples)
660 WM8750State *s = (WM8750State *) opaque;
661 /* XXX: Should check if there are <i>samples</i> free samples available */
662 void *ret = s->data_out + s->idx_out;
664 s->idx_out += samples << 2;
665 s->req_out -= samples << 2;
666 return ret;
669 void wm8750_dac_commit(void *opaque)
671 WM8750State *s = (WM8750State *) opaque;
673 wm8750_out_flush(s);
676 uint32_t wm8750_adc_dat(void *opaque)
678 WM8750State *s = (WM8750State *) opaque;
679 uint32_t *data;
681 if (s->idx_in >= sizeof(s->data_in))
682 wm8750_in_load(s);
684 data = (uint32_t *) &s->data_in[s->idx_in];
685 s->req_in -= 4;
686 s->idx_in += 4;
687 return *data;
690 void wm8750_set_bclk_in(void *opaque, int new_hz)
692 WM8750State *s = (WM8750State *) opaque;
694 s->ext_adc_hz = new_hz;
695 s->ext_dac_hz = new_hz;
696 wm8750_clk_update(s, 1);
699 static void wm8750_class_init(ObjectClass *klass, void *data)
701 DeviceClass *dc = DEVICE_CLASS(klass);
702 I2CSlaveClass *sc = I2C_SLAVE_CLASS(klass);
704 sc->init = wm8750_init;
705 sc->event = wm8750_event;
706 sc->recv = wm8750_rx;
707 sc->send = wm8750_tx;
708 dc->vmsd = &vmstate_wm8750;
711 static const TypeInfo wm8750_info = {
712 .name = TYPE_WM8750,
713 .parent = TYPE_I2C_SLAVE,
714 .instance_size = sizeof(WM8750State),
715 .class_init = wm8750_class_init,
718 static void wm8750_register_types(void)
720 type_register_static(&wm8750_info);
723 type_init(wm8750_register_types)