scsi-disk: change disk serial length from 20 to 36
[qemu/ar7.git] / hw / xtensa / pic_cpu.c
blob2bed64f15b1901276b0e96b7a638d9d445d748d7
1 /*
2 * Copyright (c) 2011, Max Filippov, Open Source and Linux Lab.
3 * All rights reserved.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are met:
7 * * Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * * Redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution.
12 * * Neither the name of the Open Source and Linux Lab nor the
13 * names of its contributors may be used to endorse or promote products
14 * derived from this software without specific prior written permission.
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
17 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
20 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
21 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
23 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
25 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 #include "qemu/osdep.h"
29 #include "cpu.h"
30 #include "hw/hw.h"
31 #include "qemu/log.h"
32 #include "qemu/timer.h"
34 void xtensa_advance_ccount(CPUXtensaState *env, uint32_t d)
36 uint32_t old_ccount = env->sregs[CCOUNT] + 1;
38 env->sregs[CCOUNT] += d;
40 if (xtensa_option_enabled(env->config, XTENSA_OPTION_TIMER_INTERRUPT)) {
41 int i;
42 for (i = 0; i < env->config->nccompare; ++i) {
43 if (env->sregs[CCOMPARE + i] - old_ccount < d) {
44 xtensa_timer_irq(env, i, 1);
50 void check_interrupts(CPUXtensaState *env)
52 CPUState *cs = CPU(xtensa_env_get_cpu(env));
53 int minlevel = xtensa_get_cintlevel(env);
54 uint32_t int_set_enabled = env->sregs[INTSET] & env->sregs[INTENABLE];
55 int level;
57 /* If the CPU is halted advance CCOUNT according to the QEMU_CLOCK_VIRTUAL time
58 * elapsed since the moment when it was advanced last time.
60 if (cs->halted) {
61 int64_t now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
63 xtensa_advance_ccount(env,
64 muldiv64(now - env->halt_clock,
65 env->config->clock_freq_khz, 1000000));
66 env->halt_clock = now;
68 for (level = env->config->nlevel; level > minlevel; --level) {
69 if (env->config->level_mask[level] & int_set_enabled) {
70 env->pending_irq_level = level;
71 cpu_interrupt(cs, CPU_INTERRUPT_HARD);
72 qemu_log_mask(CPU_LOG_INT,
73 "%s level = %d, cintlevel = %d, "
74 "pc = %08x, a0 = %08x, ps = %08x, "
75 "intset = %08x, intenable = %08x, "
76 "ccount = %08x\n",
77 __func__, level, xtensa_get_cintlevel(env),
78 env->pc, env->regs[0], env->sregs[PS],
79 env->sregs[INTSET], env->sregs[INTENABLE],
80 env->sregs[CCOUNT]);
81 return;
84 env->pending_irq_level = 0;
85 cpu_reset_interrupt(cs, CPU_INTERRUPT_HARD);
88 static void xtensa_set_irq(void *opaque, int irq, int active)
90 CPUXtensaState *env = opaque;
92 if (irq >= env->config->ninterrupt) {
93 qemu_log("%s: bad IRQ %d\n", __func__, irq);
94 } else {
95 uint32_t irq_bit = 1 << irq;
97 if (active) {
98 env->sregs[INTSET] |= irq_bit;
99 } else if (env->config->interrupt[irq].inttype == INTTYPE_LEVEL) {
100 env->sregs[INTSET] &= ~irq_bit;
103 check_interrupts(env);
107 void xtensa_timer_irq(CPUXtensaState *env, uint32_t id, uint32_t active)
109 qemu_set_irq(env->irq_inputs[env->config->timerint[id]], active);
112 void xtensa_rearm_ccompare_timer(CPUXtensaState *env)
114 int i;
115 uint32_t wake_ccount = env->sregs[CCOUNT] - 1;
117 for (i = 0; i < env->config->nccompare; ++i) {
118 if (env->sregs[CCOMPARE + i] - env->sregs[CCOUNT] <
119 wake_ccount - env->sregs[CCOUNT]) {
120 wake_ccount = env->sregs[CCOMPARE + i];
123 env->wake_ccount = wake_ccount;
124 timer_mod(env->ccompare_timer, env->halt_clock +
125 (uint64_t)(wake_ccount - env->sregs[CCOUNT]) *
126 1000000 / env->config->clock_freq_khz);
129 static void xtensa_ccompare_cb(void *opaque)
131 XtensaCPU *cpu = opaque;
132 CPUXtensaState *env = &cpu->env;
133 CPUState *cs = CPU(cpu);
135 if (cs->halted) {
136 env->halt_clock = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
137 xtensa_advance_ccount(env, env->wake_ccount - env->sregs[CCOUNT]);
138 if (!cpu_has_work(cs)) {
139 env->sregs[CCOUNT] = env->wake_ccount + 1;
140 xtensa_rearm_ccompare_timer(env);
145 void xtensa_irq_init(CPUXtensaState *env)
147 XtensaCPU *cpu = xtensa_env_get_cpu(env);
149 env->irq_inputs = (void **)qemu_allocate_irqs(
150 xtensa_set_irq, env, env->config->ninterrupt);
151 if (xtensa_option_enabled(env->config, XTENSA_OPTION_TIMER_INTERRUPT) &&
152 env->config->nccompare > 0) {
153 env->ccompare_timer =
154 timer_new_ns(QEMU_CLOCK_VIRTUAL, &xtensa_ccompare_cb, cpu);
158 void *xtensa_get_extint(CPUXtensaState *env, unsigned extint)
160 if (extint < env->config->nextint) {
161 unsigned irq = env->config->extint[extint];
162 return env->irq_inputs[irq];
163 } else {
164 qemu_log("%s: trying to acquire invalid external interrupt %d\n",
165 __func__, extint);
166 return NULL;