s390x/css: copy CCW format bit from ORB to SCSW
[qemu/ar7.git] / hw / s390x / css.c
blob9e98f50868ede53ae1f6b8c1b40d4fcdee91787e
1 /*
2 * Channel subsystem base support.
4 * Copyright 2012 IBM Corp.
5 * Author(s): Cornelia Huck <cornelia.huck@de.ibm.com>
7 * This work is licensed under the terms of the GNU GPL, version 2 or (at
8 * your option) any later version. See the COPYING file in the top-level
9 * directory.
12 #include "qemu/osdep.h"
13 #include "qapi/error.h"
14 #include "qapi/visitor.h"
15 #include "hw/qdev.h"
16 #include "qemu/bitops.h"
17 #include "exec/address-spaces.h"
18 #include "cpu.h"
19 #include "hw/s390x/ioinst.h"
20 #include "hw/s390x/css.h"
21 #include "trace.h"
22 #include "hw/s390x/s390_flic.h"
24 typedef struct CrwContainer {
25 CRW crw;
26 QTAILQ_ENTRY(CrwContainer) sibling;
27 } CrwContainer;
29 typedef struct ChpInfo {
30 uint8_t in_use;
31 uint8_t type;
32 uint8_t is_virtual;
33 } ChpInfo;
35 typedef struct SubchSet {
36 SubchDev *sch[MAX_SCHID + 1];
37 unsigned long schids_used[BITS_TO_LONGS(MAX_SCHID + 1)];
38 unsigned long devnos_used[BITS_TO_LONGS(MAX_SCHID + 1)];
39 } SubchSet;
41 typedef struct CssImage {
42 SubchSet *sch_set[MAX_SSID + 1];
43 ChpInfo chpids[MAX_CHPID + 1];
44 } CssImage;
46 typedef struct IoAdapter {
47 uint32_t id;
48 uint8_t type;
49 uint8_t isc;
50 QTAILQ_ENTRY(IoAdapter) sibling;
51 } IoAdapter;
53 typedef struct ChannelSubSys {
54 QTAILQ_HEAD(, CrwContainer) pending_crws;
55 bool sei_pending;
56 bool do_crw_mchk;
57 bool crws_lost;
58 uint8_t max_cssid;
59 uint8_t max_ssid;
60 bool chnmon_active;
61 uint64_t chnmon_area;
62 CssImage *css[MAX_CSSID + 1];
63 uint8_t default_cssid;
64 QTAILQ_HEAD(, IoAdapter) io_adapters;
65 QTAILQ_HEAD(, IndAddr) indicator_addresses;
66 } ChannelSubSys;
68 static ChannelSubSys channel_subsys = {
69 .pending_crws = QTAILQ_HEAD_INITIALIZER(channel_subsys.pending_crws),
70 .do_crw_mchk = true,
71 .sei_pending = false,
72 .do_crw_mchk = true,
73 .crws_lost = false,
74 .chnmon_active = false,
75 .io_adapters = QTAILQ_HEAD_INITIALIZER(channel_subsys.io_adapters),
76 .indicator_addresses =
77 QTAILQ_HEAD_INITIALIZER(channel_subsys.indicator_addresses),
80 IndAddr *get_indicator(hwaddr ind_addr, int len)
82 IndAddr *indicator;
84 QTAILQ_FOREACH(indicator, &channel_subsys.indicator_addresses, sibling) {
85 if (indicator->addr == ind_addr) {
86 indicator->refcnt++;
87 return indicator;
90 indicator = g_new0(IndAddr, 1);
91 indicator->addr = ind_addr;
92 indicator->len = len;
93 indicator->refcnt = 1;
94 QTAILQ_INSERT_TAIL(&channel_subsys.indicator_addresses,
95 indicator, sibling);
96 return indicator;
99 static int s390_io_adapter_map(AdapterInfo *adapter, uint64_t map_addr,
100 bool do_map)
102 S390FLICState *fs = s390_get_flic();
103 S390FLICStateClass *fsc = S390_FLIC_COMMON_GET_CLASS(fs);
105 return fsc->io_adapter_map(fs, adapter->adapter_id, map_addr, do_map);
108 void release_indicator(AdapterInfo *adapter, IndAddr *indicator)
110 assert(indicator->refcnt > 0);
111 indicator->refcnt--;
112 if (indicator->refcnt > 0) {
113 return;
115 QTAILQ_REMOVE(&channel_subsys.indicator_addresses, indicator, sibling);
116 if (indicator->map) {
117 s390_io_adapter_map(adapter, indicator->map, false);
119 g_free(indicator);
122 int map_indicator(AdapterInfo *adapter, IndAddr *indicator)
124 int ret;
126 if (indicator->map) {
127 return 0; /* already mapped is not an error */
129 indicator->map = indicator->addr;
130 ret = s390_io_adapter_map(adapter, indicator->map, true);
131 if ((ret != 0) && (ret != -ENOSYS)) {
132 goto out_err;
134 return 0;
136 out_err:
137 indicator->map = 0;
138 return ret;
141 int css_create_css_image(uint8_t cssid, bool default_image)
143 trace_css_new_image(cssid, default_image ? "(default)" : "");
144 if (cssid > MAX_CSSID) {
145 return -EINVAL;
147 if (channel_subsys.css[cssid]) {
148 return -EBUSY;
150 channel_subsys.css[cssid] = g_malloc0(sizeof(CssImage));
151 if (default_image) {
152 channel_subsys.default_cssid = cssid;
154 return 0;
157 int css_register_io_adapter(uint8_t type, uint8_t isc, bool swap,
158 bool maskable, uint32_t *id)
160 IoAdapter *adapter;
161 bool found = false;
162 int ret;
163 S390FLICState *fs = s390_get_flic();
164 S390FLICStateClass *fsc = S390_FLIC_COMMON_GET_CLASS(fs);
166 *id = 0;
167 QTAILQ_FOREACH(adapter, &channel_subsys.io_adapters, sibling) {
168 if ((adapter->type == type) && (adapter->isc == isc)) {
169 *id = adapter->id;
170 found = true;
171 ret = 0;
172 break;
174 if (adapter->id >= *id) {
175 *id = adapter->id + 1;
178 if (found) {
179 goto out;
181 adapter = g_new0(IoAdapter, 1);
182 ret = fsc->register_io_adapter(fs, *id, isc, swap, maskable);
183 if (ret == 0) {
184 adapter->id = *id;
185 adapter->isc = isc;
186 adapter->type = type;
187 QTAILQ_INSERT_TAIL(&channel_subsys.io_adapters, adapter, sibling);
188 } else {
189 g_free(adapter);
190 fprintf(stderr, "Unexpected error %d when registering adapter %d\n",
191 ret, *id);
193 out:
194 return ret;
197 static void css_clear_io_interrupt(uint16_t subchannel_id,
198 uint16_t subchannel_nr)
200 Error *err = NULL;
201 static bool no_clear_irq;
202 S390FLICState *fs = s390_get_flic();
203 S390FLICStateClass *fsc = S390_FLIC_COMMON_GET_CLASS(fs);
204 int r;
206 if (unlikely(no_clear_irq)) {
207 return;
209 r = fsc->clear_io_irq(fs, subchannel_id, subchannel_nr);
210 switch (r) {
211 case 0:
212 break;
213 case -ENOSYS:
214 no_clear_irq = true;
216 * Ignore unavailability, as the user can't do anything
217 * about it anyway.
219 break;
220 default:
221 error_setg_errno(&err, -r, "unexpected error condition");
222 error_propagate(&error_abort, err);
226 static inline uint16_t css_do_build_subchannel_id(uint8_t cssid, uint8_t ssid)
228 if (channel_subsys.max_cssid > 0) {
229 return (cssid << 8) | (1 << 3) | (ssid << 1) | 1;
231 return (ssid << 1) | 1;
234 uint16_t css_build_subchannel_id(SubchDev *sch)
236 return css_do_build_subchannel_id(sch->cssid, sch->ssid);
239 static void css_inject_io_interrupt(SubchDev *sch)
241 uint8_t isc = (sch->curr_status.pmcw.flags & PMCW_FLAGS_MASK_ISC) >> 11;
243 trace_css_io_interrupt(sch->cssid, sch->ssid, sch->schid,
244 sch->curr_status.pmcw.intparm, isc, "");
245 s390_io_interrupt(css_build_subchannel_id(sch),
246 sch->schid,
247 sch->curr_status.pmcw.intparm,
248 isc << 27);
251 void css_conditional_io_interrupt(SubchDev *sch)
254 * If the subchannel is not currently status pending, make it pending
255 * with alert status.
257 if (!(sch->curr_status.scsw.ctrl & SCSW_STCTL_STATUS_PEND)) {
258 uint8_t isc = (sch->curr_status.pmcw.flags & PMCW_FLAGS_MASK_ISC) >> 11;
260 trace_css_io_interrupt(sch->cssid, sch->ssid, sch->schid,
261 sch->curr_status.pmcw.intparm, isc,
262 "(unsolicited)");
263 sch->curr_status.scsw.ctrl &= ~SCSW_CTRL_MASK_STCTL;
264 sch->curr_status.scsw.ctrl |=
265 SCSW_STCTL_ALERT | SCSW_STCTL_STATUS_PEND;
266 /* Inject an I/O interrupt. */
267 s390_io_interrupt(css_build_subchannel_id(sch),
268 sch->schid,
269 sch->curr_status.pmcw.intparm,
270 isc << 27);
274 void css_adapter_interrupt(uint8_t isc)
276 uint32_t io_int_word = (isc << 27) | IO_INT_WORD_AI;
278 trace_css_adapter_interrupt(isc);
279 s390_io_interrupt(0, 0, 0, io_int_word);
282 static void sch_handle_clear_func(SubchDev *sch)
284 PMCW *p = &sch->curr_status.pmcw;
285 SCSW *s = &sch->curr_status.scsw;
286 int path;
288 /* Path management: In our simple css, we always choose the only path. */
289 path = 0x80;
291 /* Reset values prior to 'issuing the clear signal'. */
292 p->lpum = 0;
293 p->pom = 0xff;
294 s->flags &= ~SCSW_FLAGS_MASK_PNO;
296 /* We always 'attempt to issue the clear signal', and we always succeed. */
297 sch->channel_prog = 0x0;
298 sch->last_cmd_valid = false;
299 s->ctrl &= ~SCSW_ACTL_CLEAR_PEND;
300 s->ctrl |= SCSW_STCTL_STATUS_PEND;
302 s->dstat = 0;
303 s->cstat = 0;
304 p->lpum = path;
308 static void sch_handle_halt_func(SubchDev *sch)
311 PMCW *p = &sch->curr_status.pmcw;
312 SCSW *s = &sch->curr_status.scsw;
313 hwaddr curr_ccw = sch->channel_prog;
314 int path;
316 /* Path management: In our simple css, we always choose the only path. */
317 path = 0x80;
319 /* We always 'attempt to issue the halt signal', and we always succeed. */
320 sch->channel_prog = 0x0;
321 sch->last_cmd_valid = false;
322 s->ctrl &= ~SCSW_ACTL_HALT_PEND;
323 s->ctrl |= SCSW_STCTL_STATUS_PEND;
325 if ((s->ctrl & (SCSW_ACTL_SUBCH_ACTIVE | SCSW_ACTL_DEVICE_ACTIVE)) ||
326 !((s->ctrl & SCSW_ACTL_START_PEND) ||
327 (s->ctrl & SCSW_ACTL_SUSP))) {
328 s->dstat = SCSW_DSTAT_DEVICE_END;
330 if ((s->ctrl & (SCSW_ACTL_SUBCH_ACTIVE | SCSW_ACTL_DEVICE_ACTIVE)) ||
331 (s->ctrl & SCSW_ACTL_SUSP)) {
332 s->cpa = curr_ccw + 8;
334 s->cstat = 0;
335 p->lpum = path;
339 static void copy_sense_id_to_guest(SenseId *dest, SenseId *src)
341 int i;
343 dest->reserved = src->reserved;
344 dest->cu_type = cpu_to_be16(src->cu_type);
345 dest->cu_model = src->cu_model;
346 dest->dev_type = cpu_to_be16(src->dev_type);
347 dest->dev_model = src->dev_model;
348 dest->unused = src->unused;
349 for (i = 0; i < ARRAY_SIZE(dest->ciw); i++) {
350 dest->ciw[i].type = src->ciw[i].type;
351 dest->ciw[i].command = src->ciw[i].command;
352 dest->ciw[i].count = cpu_to_be16(src->ciw[i].count);
356 static CCW1 copy_ccw_from_guest(hwaddr addr, bool fmt1)
358 CCW0 tmp0;
359 CCW1 tmp1;
360 CCW1 ret;
362 if (fmt1) {
363 cpu_physical_memory_read(addr, &tmp1, sizeof(tmp1));
364 ret.cmd_code = tmp1.cmd_code;
365 ret.flags = tmp1.flags;
366 ret.count = be16_to_cpu(tmp1.count);
367 ret.cda = be32_to_cpu(tmp1.cda);
368 } else {
369 cpu_physical_memory_read(addr, &tmp0, sizeof(tmp0));
370 ret.cmd_code = tmp0.cmd_code;
371 ret.flags = tmp0.flags;
372 ret.count = be16_to_cpu(tmp0.count);
373 ret.cda = be16_to_cpu(tmp0.cda1) | (tmp0.cda0 << 16);
374 if ((ret.cmd_code & 0x0f) == CCW_CMD_TIC) {
375 ret.cmd_code &= 0x0f;
378 return ret;
381 static int css_interpret_ccw(SubchDev *sch, hwaddr ccw_addr,
382 bool suspend_allowed)
384 int ret;
385 bool check_len;
386 int len;
387 CCW1 ccw;
389 if (!ccw_addr) {
390 return -EIO;
393 /* Translate everything to format-1 ccws - the information is the same. */
394 ccw = copy_ccw_from_guest(ccw_addr, sch->ccw_fmt_1);
396 /* Check for invalid command codes. */
397 if ((ccw.cmd_code & 0x0f) == 0) {
398 return -EINVAL;
400 if (((ccw.cmd_code & 0x0f) == CCW_CMD_TIC) &&
401 ((ccw.cmd_code & 0xf0) != 0)) {
402 return -EINVAL;
404 if (!sch->ccw_fmt_1 && (ccw.count == 0) &&
405 (ccw.cmd_code != CCW_CMD_TIC)) {
406 return -EINVAL;
409 if (ccw.flags & CCW_FLAG_SUSPEND) {
410 return suspend_allowed ? -EINPROGRESS : -EINVAL;
413 check_len = !((ccw.flags & CCW_FLAG_SLI) && !(ccw.flags & CCW_FLAG_DC));
415 if (!ccw.cda) {
416 if (sch->ccw_no_data_cnt == 255) {
417 return -EINVAL;
419 sch->ccw_no_data_cnt++;
422 /* Look at the command. */
423 switch (ccw.cmd_code) {
424 case CCW_CMD_NOOP:
425 /* Nothing to do. */
426 ret = 0;
427 break;
428 case CCW_CMD_BASIC_SENSE:
429 if (check_len) {
430 if (ccw.count != sizeof(sch->sense_data)) {
431 ret = -EINVAL;
432 break;
435 len = MIN(ccw.count, sizeof(sch->sense_data));
436 cpu_physical_memory_write(ccw.cda, sch->sense_data, len);
437 sch->curr_status.scsw.count = ccw.count - len;
438 memset(sch->sense_data, 0, sizeof(sch->sense_data));
439 ret = 0;
440 break;
441 case CCW_CMD_SENSE_ID:
443 SenseId sense_id;
445 copy_sense_id_to_guest(&sense_id, &sch->id);
446 /* Sense ID information is device specific. */
447 if (check_len) {
448 if (ccw.count != sizeof(sense_id)) {
449 ret = -EINVAL;
450 break;
453 len = MIN(ccw.count, sizeof(sense_id));
455 * Only indicate 0xff in the first sense byte if we actually
456 * have enough place to store at least bytes 0-3.
458 if (len >= 4) {
459 sense_id.reserved = 0xff;
460 } else {
461 sense_id.reserved = 0;
463 cpu_physical_memory_write(ccw.cda, &sense_id, len);
464 sch->curr_status.scsw.count = ccw.count - len;
465 ret = 0;
466 break;
468 case CCW_CMD_TIC:
469 if (sch->last_cmd_valid && (sch->last_cmd.cmd_code == CCW_CMD_TIC)) {
470 ret = -EINVAL;
471 break;
473 if (ccw.flags & (CCW_FLAG_CC | CCW_FLAG_DC)) {
474 ret = -EINVAL;
475 break;
477 sch->channel_prog = ccw.cda;
478 ret = -EAGAIN;
479 break;
480 default:
481 if (sch->ccw_cb) {
482 /* Handle device specific commands. */
483 ret = sch->ccw_cb(sch, ccw);
484 } else {
485 ret = -ENOSYS;
487 break;
489 sch->last_cmd = ccw;
490 sch->last_cmd_valid = true;
491 if (ret == 0) {
492 if (ccw.flags & CCW_FLAG_CC) {
493 sch->channel_prog += 8;
494 ret = -EAGAIN;
498 return ret;
501 static void sch_handle_start_func(SubchDev *sch, ORB *orb)
504 PMCW *p = &sch->curr_status.pmcw;
505 SCSW *s = &sch->curr_status.scsw;
506 int path;
507 int ret;
508 bool suspend_allowed;
510 /* Path management: In our simple css, we always choose the only path. */
511 path = 0x80;
513 if (!(s->ctrl & SCSW_ACTL_SUSP)) {
514 s->cstat = 0;
515 s->dstat = 0;
516 /* Look at the orb and try to execute the channel program. */
517 assert(orb != NULL); /* resume does not pass an orb */
518 p->intparm = orb->intparm;
519 if (!(orb->lpm & path)) {
520 /* Generate a deferred cc 3 condition. */
521 s->flags |= SCSW_FLAGS_MASK_CC;
522 s->ctrl &= ~SCSW_CTRL_MASK_STCTL;
523 s->ctrl |= (SCSW_STCTL_ALERT | SCSW_STCTL_STATUS_PEND);
524 return;
526 sch->ccw_fmt_1 = !!(orb->ctrl0 & ORB_CTRL0_MASK_FMT);
527 s->flags |= (sch->ccw_fmt_1) ? SCSW_FLAGS_MASK_FMT : 0;
528 sch->ccw_no_data_cnt = 0;
529 suspend_allowed = !!(orb->ctrl0 & ORB_CTRL0_MASK_SPND);
530 } else {
531 s->ctrl &= ~(SCSW_ACTL_SUSP | SCSW_ACTL_RESUME_PEND);
532 /* The channel program had been suspended before. */
533 suspend_allowed = true;
535 sch->last_cmd_valid = false;
536 do {
537 ret = css_interpret_ccw(sch, sch->channel_prog, suspend_allowed);
538 switch (ret) {
539 case -EAGAIN:
540 /* ccw chain, continue processing */
541 break;
542 case 0:
543 /* success */
544 s->ctrl &= ~SCSW_ACTL_START_PEND;
545 s->ctrl &= ~SCSW_CTRL_MASK_STCTL;
546 s->ctrl |= SCSW_STCTL_PRIMARY | SCSW_STCTL_SECONDARY |
547 SCSW_STCTL_STATUS_PEND;
548 s->dstat = SCSW_DSTAT_CHANNEL_END | SCSW_DSTAT_DEVICE_END;
549 s->cpa = sch->channel_prog + 8;
550 break;
551 case -ENOSYS:
552 /* unsupported command, generate unit check (command reject) */
553 s->ctrl &= ~SCSW_ACTL_START_PEND;
554 s->dstat = SCSW_DSTAT_UNIT_CHECK;
555 /* Set sense bit 0 in ecw0. */
556 sch->sense_data[0] = 0x80;
557 s->ctrl &= ~SCSW_CTRL_MASK_STCTL;
558 s->ctrl |= SCSW_STCTL_PRIMARY | SCSW_STCTL_SECONDARY |
559 SCSW_STCTL_ALERT | SCSW_STCTL_STATUS_PEND;
560 s->cpa = sch->channel_prog + 8;
561 break;
562 case -EFAULT:
563 /* memory problem, generate channel data check */
564 s->ctrl &= ~SCSW_ACTL_START_PEND;
565 s->cstat = SCSW_CSTAT_DATA_CHECK;
566 s->ctrl &= ~SCSW_CTRL_MASK_STCTL;
567 s->ctrl |= SCSW_STCTL_PRIMARY | SCSW_STCTL_SECONDARY |
568 SCSW_STCTL_ALERT | SCSW_STCTL_STATUS_PEND;
569 s->cpa = sch->channel_prog + 8;
570 break;
571 case -EBUSY:
572 /* subchannel busy, generate deferred cc 1 */
573 s->flags &= ~SCSW_FLAGS_MASK_CC;
574 s->flags |= (1 << 8);
575 s->ctrl &= ~SCSW_CTRL_MASK_STCTL;
576 s->ctrl |= SCSW_STCTL_ALERT | SCSW_STCTL_STATUS_PEND;
577 break;
578 case -EINPROGRESS:
579 /* channel program has been suspended */
580 s->ctrl &= ~SCSW_ACTL_START_PEND;
581 s->ctrl |= SCSW_ACTL_SUSP;
582 break;
583 default:
584 /* error, generate channel program check */
585 s->ctrl &= ~SCSW_ACTL_START_PEND;
586 s->cstat = SCSW_CSTAT_PROG_CHECK;
587 s->ctrl &= ~SCSW_CTRL_MASK_STCTL;
588 s->ctrl |= SCSW_STCTL_PRIMARY | SCSW_STCTL_SECONDARY |
589 SCSW_STCTL_ALERT | SCSW_STCTL_STATUS_PEND;
590 s->cpa = sch->channel_prog + 8;
591 break;
593 } while (ret == -EAGAIN);
598 * On real machines, this would run asynchronously to the main vcpus.
599 * We might want to make some parts of the ssch handling (interpreting
600 * read/writes) asynchronous later on if we start supporting more than
601 * our current very simple devices.
603 static void do_subchannel_work(SubchDev *sch, ORB *orb)
606 SCSW *s = &sch->curr_status.scsw;
608 if (s->ctrl & SCSW_FCTL_CLEAR_FUNC) {
609 sch_handle_clear_func(sch);
610 } else if (s->ctrl & SCSW_FCTL_HALT_FUNC) {
611 sch_handle_halt_func(sch);
612 } else if (s->ctrl & SCSW_FCTL_START_FUNC) {
613 sch_handle_start_func(sch, orb);
614 } else {
615 /* Cannot happen. */
616 return;
618 css_inject_io_interrupt(sch);
621 static void copy_pmcw_to_guest(PMCW *dest, const PMCW *src)
623 int i;
625 dest->intparm = cpu_to_be32(src->intparm);
626 dest->flags = cpu_to_be16(src->flags);
627 dest->devno = cpu_to_be16(src->devno);
628 dest->lpm = src->lpm;
629 dest->pnom = src->pnom;
630 dest->lpum = src->lpum;
631 dest->pim = src->pim;
632 dest->mbi = cpu_to_be16(src->mbi);
633 dest->pom = src->pom;
634 dest->pam = src->pam;
635 for (i = 0; i < ARRAY_SIZE(dest->chpid); i++) {
636 dest->chpid[i] = src->chpid[i];
638 dest->chars = cpu_to_be32(src->chars);
641 static void copy_scsw_to_guest(SCSW *dest, const SCSW *src)
643 dest->flags = cpu_to_be16(src->flags);
644 dest->ctrl = cpu_to_be16(src->ctrl);
645 dest->cpa = cpu_to_be32(src->cpa);
646 dest->dstat = src->dstat;
647 dest->cstat = src->cstat;
648 dest->count = cpu_to_be16(src->count);
651 static void copy_schib_to_guest(SCHIB *dest, const SCHIB *src)
653 int i;
655 copy_pmcw_to_guest(&dest->pmcw, &src->pmcw);
656 copy_scsw_to_guest(&dest->scsw, &src->scsw);
657 dest->mba = cpu_to_be64(src->mba);
658 for (i = 0; i < ARRAY_SIZE(dest->mda); i++) {
659 dest->mda[i] = src->mda[i];
663 int css_do_stsch(SubchDev *sch, SCHIB *schib)
665 /* Use current status. */
666 copy_schib_to_guest(schib, &sch->curr_status);
667 return 0;
670 static void copy_pmcw_from_guest(PMCW *dest, const PMCW *src)
672 int i;
674 dest->intparm = be32_to_cpu(src->intparm);
675 dest->flags = be16_to_cpu(src->flags);
676 dest->devno = be16_to_cpu(src->devno);
677 dest->lpm = src->lpm;
678 dest->pnom = src->pnom;
679 dest->lpum = src->lpum;
680 dest->pim = src->pim;
681 dest->mbi = be16_to_cpu(src->mbi);
682 dest->pom = src->pom;
683 dest->pam = src->pam;
684 for (i = 0; i < ARRAY_SIZE(dest->chpid); i++) {
685 dest->chpid[i] = src->chpid[i];
687 dest->chars = be32_to_cpu(src->chars);
690 static void copy_scsw_from_guest(SCSW *dest, const SCSW *src)
692 dest->flags = be16_to_cpu(src->flags);
693 dest->ctrl = be16_to_cpu(src->ctrl);
694 dest->cpa = be32_to_cpu(src->cpa);
695 dest->dstat = src->dstat;
696 dest->cstat = src->cstat;
697 dest->count = be16_to_cpu(src->count);
700 static void copy_schib_from_guest(SCHIB *dest, const SCHIB *src)
702 int i;
704 copy_pmcw_from_guest(&dest->pmcw, &src->pmcw);
705 copy_scsw_from_guest(&dest->scsw, &src->scsw);
706 dest->mba = be64_to_cpu(src->mba);
707 for (i = 0; i < ARRAY_SIZE(dest->mda); i++) {
708 dest->mda[i] = src->mda[i];
712 int css_do_msch(SubchDev *sch, const SCHIB *orig_schib)
714 SCSW *s = &sch->curr_status.scsw;
715 PMCW *p = &sch->curr_status.pmcw;
716 uint16_t oldflags;
717 int ret;
718 SCHIB schib;
720 if (!(sch->curr_status.pmcw.flags & PMCW_FLAGS_MASK_DNV)) {
721 ret = 0;
722 goto out;
725 if (s->ctrl & SCSW_STCTL_STATUS_PEND) {
726 ret = -EINPROGRESS;
727 goto out;
730 if (s->ctrl &
731 (SCSW_FCTL_START_FUNC|SCSW_FCTL_HALT_FUNC|SCSW_FCTL_CLEAR_FUNC)) {
732 ret = -EBUSY;
733 goto out;
736 copy_schib_from_guest(&schib, orig_schib);
737 /* Only update the program-modifiable fields. */
738 p->intparm = schib.pmcw.intparm;
739 oldflags = p->flags;
740 p->flags &= ~(PMCW_FLAGS_MASK_ISC | PMCW_FLAGS_MASK_ENA |
741 PMCW_FLAGS_MASK_LM | PMCW_FLAGS_MASK_MME |
742 PMCW_FLAGS_MASK_MP);
743 p->flags |= schib.pmcw.flags &
744 (PMCW_FLAGS_MASK_ISC | PMCW_FLAGS_MASK_ENA |
745 PMCW_FLAGS_MASK_LM | PMCW_FLAGS_MASK_MME |
746 PMCW_FLAGS_MASK_MP);
747 p->lpm = schib.pmcw.lpm;
748 p->mbi = schib.pmcw.mbi;
749 p->pom = schib.pmcw.pom;
750 p->chars &= ~(PMCW_CHARS_MASK_MBFC | PMCW_CHARS_MASK_CSENSE);
751 p->chars |= schib.pmcw.chars &
752 (PMCW_CHARS_MASK_MBFC | PMCW_CHARS_MASK_CSENSE);
753 sch->curr_status.mba = schib.mba;
755 /* Has the channel been disabled? */
756 if (sch->disable_cb && (oldflags & PMCW_FLAGS_MASK_ENA) != 0
757 && (p->flags & PMCW_FLAGS_MASK_ENA) == 0) {
758 sch->disable_cb(sch);
761 ret = 0;
763 out:
764 return ret;
767 int css_do_xsch(SubchDev *sch)
769 SCSW *s = &sch->curr_status.scsw;
770 PMCW *p = &sch->curr_status.pmcw;
771 int ret;
773 if (!(p->flags & (PMCW_FLAGS_MASK_DNV | PMCW_FLAGS_MASK_ENA))) {
774 ret = -ENODEV;
775 goto out;
778 if (!(s->ctrl & SCSW_CTRL_MASK_FCTL) ||
779 ((s->ctrl & SCSW_CTRL_MASK_FCTL) != SCSW_FCTL_START_FUNC) ||
780 (!(s->ctrl &
781 (SCSW_ACTL_RESUME_PEND | SCSW_ACTL_START_PEND | SCSW_ACTL_SUSP))) ||
782 (s->ctrl & SCSW_ACTL_SUBCH_ACTIVE)) {
783 ret = -EINPROGRESS;
784 goto out;
787 if (s->ctrl & SCSW_CTRL_MASK_STCTL) {
788 ret = -EBUSY;
789 goto out;
792 /* Cancel the current operation. */
793 s->ctrl &= ~(SCSW_FCTL_START_FUNC |
794 SCSW_ACTL_RESUME_PEND |
795 SCSW_ACTL_START_PEND |
796 SCSW_ACTL_SUSP);
797 sch->channel_prog = 0x0;
798 sch->last_cmd_valid = false;
799 s->dstat = 0;
800 s->cstat = 0;
801 ret = 0;
803 out:
804 return ret;
807 int css_do_csch(SubchDev *sch)
809 SCSW *s = &sch->curr_status.scsw;
810 PMCW *p = &sch->curr_status.pmcw;
811 int ret;
813 if (!(p->flags & (PMCW_FLAGS_MASK_DNV | PMCW_FLAGS_MASK_ENA))) {
814 ret = -ENODEV;
815 goto out;
818 /* Trigger the clear function. */
819 s->ctrl &= ~(SCSW_CTRL_MASK_FCTL | SCSW_CTRL_MASK_ACTL);
820 s->ctrl |= SCSW_FCTL_CLEAR_FUNC | SCSW_ACTL_CLEAR_PEND;
822 do_subchannel_work(sch, NULL);
823 ret = 0;
825 out:
826 return ret;
829 int css_do_hsch(SubchDev *sch)
831 SCSW *s = &sch->curr_status.scsw;
832 PMCW *p = &sch->curr_status.pmcw;
833 int ret;
835 if (!(p->flags & (PMCW_FLAGS_MASK_DNV | PMCW_FLAGS_MASK_ENA))) {
836 ret = -ENODEV;
837 goto out;
840 if (((s->ctrl & SCSW_CTRL_MASK_STCTL) == SCSW_STCTL_STATUS_PEND) ||
841 (s->ctrl & (SCSW_STCTL_PRIMARY |
842 SCSW_STCTL_SECONDARY |
843 SCSW_STCTL_ALERT))) {
844 ret = -EINPROGRESS;
845 goto out;
848 if (s->ctrl & (SCSW_FCTL_HALT_FUNC | SCSW_FCTL_CLEAR_FUNC)) {
849 ret = -EBUSY;
850 goto out;
853 /* Trigger the halt function. */
854 s->ctrl |= SCSW_FCTL_HALT_FUNC;
855 s->ctrl &= ~SCSW_FCTL_START_FUNC;
856 if (((s->ctrl & SCSW_CTRL_MASK_ACTL) ==
857 (SCSW_ACTL_SUBCH_ACTIVE | SCSW_ACTL_DEVICE_ACTIVE)) &&
858 ((s->ctrl & SCSW_CTRL_MASK_STCTL) == SCSW_STCTL_INTERMEDIATE)) {
859 s->ctrl &= ~SCSW_STCTL_STATUS_PEND;
861 s->ctrl |= SCSW_ACTL_HALT_PEND;
863 do_subchannel_work(sch, NULL);
864 ret = 0;
866 out:
867 return ret;
870 static void css_update_chnmon(SubchDev *sch)
872 if (!(sch->curr_status.pmcw.flags & PMCW_FLAGS_MASK_MME)) {
873 /* Not active. */
874 return;
876 /* The counter is conveniently located at the beginning of the struct. */
877 if (sch->curr_status.pmcw.chars & PMCW_CHARS_MASK_MBFC) {
878 /* Format 1, per-subchannel area. */
879 uint32_t count;
881 count = address_space_ldl(&address_space_memory,
882 sch->curr_status.mba,
883 MEMTXATTRS_UNSPECIFIED,
884 NULL);
885 count++;
886 address_space_stl(&address_space_memory, sch->curr_status.mba, count,
887 MEMTXATTRS_UNSPECIFIED, NULL);
888 } else {
889 /* Format 0, global area. */
890 uint32_t offset;
891 uint16_t count;
893 offset = sch->curr_status.pmcw.mbi << 5;
894 count = address_space_lduw(&address_space_memory,
895 channel_subsys.chnmon_area + offset,
896 MEMTXATTRS_UNSPECIFIED,
897 NULL);
898 count++;
899 address_space_stw(&address_space_memory,
900 channel_subsys.chnmon_area + offset, count,
901 MEMTXATTRS_UNSPECIFIED, NULL);
905 int css_do_ssch(SubchDev *sch, ORB *orb)
907 SCSW *s = &sch->curr_status.scsw;
908 PMCW *p = &sch->curr_status.pmcw;
909 int ret;
911 if (!(p->flags & (PMCW_FLAGS_MASK_DNV | PMCW_FLAGS_MASK_ENA))) {
912 ret = -ENODEV;
913 goto out;
916 if (s->ctrl & SCSW_STCTL_STATUS_PEND) {
917 ret = -EINPROGRESS;
918 goto out;
921 if (s->ctrl & (SCSW_FCTL_START_FUNC |
922 SCSW_FCTL_HALT_FUNC |
923 SCSW_FCTL_CLEAR_FUNC)) {
924 ret = -EBUSY;
925 goto out;
928 /* If monitoring is active, update counter. */
929 if (channel_subsys.chnmon_active) {
930 css_update_chnmon(sch);
932 sch->channel_prog = orb->cpa;
933 /* Trigger the start function. */
934 s->ctrl |= (SCSW_FCTL_START_FUNC | SCSW_ACTL_START_PEND);
935 s->flags &= ~SCSW_FLAGS_MASK_PNO;
937 do_subchannel_work(sch, orb);
938 ret = 0;
940 out:
941 return ret;
944 static void copy_irb_to_guest(IRB *dest, const IRB *src, PMCW *pmcw,
945 int *irb_len)
947 int i;
948 uint16_t stctl = src->scsw.ctrl & SCSW_CTRL_MASK_STCTL;
949 uint16_t actl = src->scsw.ctrl & SCSW_CTRL_MASK_ACTL;
951 copy_scsw_to_guest(&dest->scsw, &src->scsw);
953 for (i = 0; i < ARRAY_SIZE(dest->esw); i++) {
954 dest->esw[i] = cpu_to_be32(src->esw[i]);
956 for (i = 0; i < ARRAY_SIZE(dest->ecw); i++) {
957 dest->ecw[i] = cpu_to_be32(src->ecw[i]);
959 *irb_len = sizeof(*dest) - sizeof(dest->emw);
961 /* extended measurements enabled? */
962 if ((src->scsw.flags & SCSW_FLAGS_MASK_ESWF) ||
963 !(pmcw->flags & PMCW_FLAGS_MASK_TF) ||
964 !(pmcw->chars & PMCW_CHARS_MASK_XMWME)) {
965 return;
967 /* extended measurements pending? */
968 if (!(stctl & SCSW_STCTL_STATUS_PEND)) {
969 return;
971 if ((stctl & SCSW_STCTL_PRIMARY) ||
972 (stctl == SCSW_STCTL_SECONDARY) ||
973 ((stctl & SCSW_STCTL_INTERMEDIATE) && (actl & SCSW_ACTL_SUSP))) {
974 for (i = 0; i < ARRAY_SIZE(dest->emw); i++) {
975 dest->emw[i] = cpu_to_be32(src->emw[i]);
978 *irb_len = sizeof(*dest);
981 int css_do_tsch_get_irb(SubchDev *sch, IRB *target_irb, int *irb_len)
983 SCSW *s = &sch->curr_status.scsw;
984 PMCW *p = &sch->curr_status.pmcw;
985 uint16_t stctl;
986 IRB irb;
988 if (!(p->flags & (PMCW_FLAGS_MASK_DNV | PMCW_FLAGS_MASK_ENA))) {
989 return 3;
992 stctl = s->ctrl & SCSW_CTRL_MASK_STCTL;
994 /* Prepare the irb for the guest. */
995 memset(&irb, 0, sizeof(IRB));
997 /* Copy scsw from current status. */
998 memcpy(&irb.scsw, s, sizeof(SCSW));
999 if (stctl & SCSW_STCTL_STATUS_PEND) {
1000 if (s->cstat & (SCSW_CSTAT_DATA_CHECK |
1001 SCSW_CSTAT_CHN_CTRL_CHK |
1002 SCSW_CSTAT_INTF_CTRL_CHK)) {
1003 irb.scsw.flags |= SCSW_FLAGS_MASK_ESWF;
1004 irb.esw[0] = 0x04804000;
1005 } else {
1006 irb.esw[0] = 0x00800000;
1008 /* If a unit check is pending, copy sense data. */
1009 if ((s->dstat & SCSW_DSTAT_UNIT_CHECK) &&
1010 (p->chars & PMCW_CHARS_MASK_CSENSE)) {
1011 int i;
1013 irb.scsw.flags |= SCSW_FLAGS_MASK_ESWF | SCSW_FLAGS_MASK_ECTL;
1014 /* Attention: sense_data is already BE! */
1015 memcpy(irb.ecw, sch->sense_data, sizeof(sch->sense_data));
1016 for (i = 0; i < ARRAY_SIZE(irb.ecw); i++) {
1017 irb.ecw[i] = be32_to_cpu(irb.ecw[i]);
1019 irb.esw[1] = 0x01000000 | (sizeof(sch->sense_data) << 8);
1022 /* Store the irb to the guest. */
1023 copy_irb_to_guest(target_irb, &irb, p, irb_len);
1025 return ((stctl & SCSW_STCTL_STATUS_PEND) == 0);
1028 void css_do_tsch_update_subch(SubchDev *sch)
1030 SCSW *s = &sch->curr_status.scsw;
1031 PMCW *p = &sch->curr_status.pmcw;
1032 uint16_t stctl;
1033 uint16_t fctl;
1034 uint16_t actl;
1036 stctl = s->ctrl & SCSW_CTRL_MASK_STCTL;
1037 fctl = s->ctrl & SCSW_CTRL_MASK_FCTL;
1038 actl = s->ctrl & SCSW_CTRL_MASK_ACTL;
1040 /* Clear conditions on subchannel, if applicable. */
1041 if (stctl & SCSW_STCTL_STATUS_PEND) {
1042 s->ctrl &= ~SCSW_CTRL_MASK_STCTL;
1043 if ((stctl != (SCSW_STCTL_INTERMEDIATE | SCSW_STCTL_STATUS_PEND)) ||
1044 ((fctl & SCSW_FCTL_HALT_FUNC) &&
1045 (actl & SCSW_ACTL_SUSP))) {
1046 s->ctrl &= ~SCSW_CTRL_MASK_FCTL;
1048 if (stctl != (SCSW_STCTL_INTERMEDIATE | SCSW_STCTL_STATUS_PEND)) {
1049 s->flags &= ~SCSW_FLAGS_MASK_PNO;
1050 s->ctrl &= ~(SCSW_ACTL_RESUME_PEND |
1051 SCSW_ACTL_START_PEND |
1052 SCSW_ACTL_HALT_PEND |
1053 SCSW_ACTL_CLEAR_PEND |
1054 SCSW_ACTL_SUSP);
1055 } else {
1056 if ((actl & SCSW_ACTL_SUSP) &&
1057 (fctl & SCSW_FCTL_START_FUNC)) {
1058 s->flags &= ~SCSW_FLAGS_MASK_PNO;
1059 if (fctl & SCSW_FCTL_HALT_FUNC) {
1060 s->ctrl &= ~(SCSW_ACTL_RESUME_PEND |
1061 SCSW_ACTL_START_PEND |
1062 SCSW_ACTL_HALT_PEND |
1063 SCSW_ACTL_CLEAR_PEND |
1064 SCSW_ACTL_SUSP);
1065 } else {
1066 s->ctrl &= ~SCSW_ACTL_RESUME_PEND;
1070 /* Clear pending sense data. */
1071 if (p->chars & PMCW_CHARS_MASK_CSENSE) {
1072 memset(sch->sense_data, 0 , sizeof(sch->sense_data));
1077 static void copy_crw_to_guest(CRW *dest, const CRW *src)
1079 dest->flags = cpu_to_be16(src->flags);
1080 dest->rsid = cpu_to_be16(src->rsid);
1083 int css_do_stcrw(CRW *crw)
1085 CrwContainer *crw_cont;
1086 int ret;
1088 crw_cont = QTAILQ_FIRST(&channel_subsys.pending_crws);
1089 if (crw_cont) {
1090 QTAILQ_REMOVE(&channel_subsys.pending_crws, crw_cont, sibling);
1091 copy_crw_to_guest(crw, &crw_cont->crw);
1092 g_free(crw_cont);
1093 ret = 0;
1094 } else {
1095 /* List was empty, turn crw machine checks on again. */
1096 memset(crw, 0, sizeof(*crw));
1097 channel_subsys.do_crw_mchk = true;
1098 ret = 1;
1101 return ret;
1104 static void copy_crw_from_guest(CRW *dest, const CRW *src)
1106 dest->flags = be16_to_cpu(src->flags);
1107 dest->rsid = be16_to_cpu(src->rsid);
1110 void css_undo_stcrw(CRW *crw)
1112 CrwContainer *crw_cont;
1114 crw_cont = g_try_malloc0(sizeof(CrwContainer));
1115 if (!crw_cont) {
1116 channel_subsys.crws_lost = true;
1117 return;
1119 copy_crw_from_guest(&crw_cont->crw, crw);
1121 QTAILQ_INSERT_HEAD(&channel_subsys.pending_crws, crw_cont, sibling);
1124 int css_do_tpi(IOIntCode *int_code, int lowcore)
1126 /* No pending interrupts for !KVM. */
1127 return 0;
1130 int css_collect_chp_desc(int m, uint8_t cssid, uint8_t f_chpid, uint8_t l_chpid,
1131 int rfmt, void *buf)
1133 int i, desc_size;
1134 uint32_t words[8];
1135 uint32_t chpid_type_word;
1136 CssImage *css;
1138 if (!m && !cssid) {
1139 css = channel_subsys.css[channel_subsys.default_cssid];
1140 } else {
1141 css = channel_subsys.css[cssid];
1143 if (!css) {
1144 return 0;
1146 desc_size = 0;
1147 for (i = f_chpid; i <= l_chpid; i++) {
1148 if (css->chpids[i].in_use) {
1149 chpid_type_word = 0x80000000 | (css->chpids[i].type << 8) | i;
1150 if (rfmt == 0) {
1151 words[0] = cpu_to_be32(chpid_type_word);
1152 words[1] = 0;
1153 memcpy(buf + desc_size, words, 8);
1154 desc_size += 8;
1155 } else if (rfmt == 1) {
1156 words[0] = cpu_to_be32(chpid_type_word);
1157 words[1] = 0;
1158 words[2] = 0;
1159 words[3] = 0;
1160 words[4] = 0;
1161 words[5] = 0;
1162 words[6] = 0;
1163 words[7] = 0;
1164 memcpy(buf + desc_size, words, 32);
1165 desc_size += 32;
1169 return desc_size;
1172 void css_do_schm(uint8_t mbk, int update, int dct, uint64_t mbo)
1174 /* dct is currently ignored (not really meaningful for our devices) */
1175 /* TODO: Don't ignore mbk. */
1176 if (update && !channel_subsys.chnmon_active) {
1177 /* Enable measuring. */
1178 channel_subsys.chnmon_area = mbo;
1179 channel_subsys.chnmon_active = true;
1181 if (!update && channel_subsys.chnmon_active) {
1182 /* Disable measuring. */
1183 channel_subsys.chnmon_area = 0;
1184 channel_subsys.chnmon_active = false;
1188 int css_do_rsch(SubchDev *sch)
1190 SCSW *s = &sch->curr_status.scsw;
1191 PMCW *p = &sch->curr_status.pmcw;
1192 int ret;
1194 if (!(p->flags & (PMCW_FLAGS_MASK_DNV | PMCW_FLAGS_MASK_ENA))) {
1195 ret = -ENODEV;
1196 goto out;
1199 if (s->ctrl & SCSW_STCTL_STATUS_PEND) {
1200 ret = -EINPROGRESS;
1201 goto out;
1204 if (((s->ctrl & SCSW_CTRL_MASK_FCTL) != SCSW_FCTL_START_FUNC) ||
1205 (s->ctrl & SCSW_ACTL_RESUME_PEND) ||
1206 (!(s->ctrl & SCSW_ACTL_SUSP))) {
1207 ret = -EINVAL;
1208 goto out;
1211 /* If monitoring is active, update counter. */
1212 if (channel_subsys.chnmon_active) {
1213 css_update_chnmon(sch);
1216 s->ctrl |= SCSW_ACTL_RESUME_PEND;
1217 do_subchannel_work(sch, NULL);
1218 ret = 0;
1220 out:
1221 return ret;
1224 int css_do_rchp(uint8_t cssid, uint8_t chpid)
1226 uint8_t real_cssid;
1228 if (cssid > channel_subsys.max_cssid) {
1229 return -EINVAL;
1231 if (channel_subsys.max_cssid == 0) {
1232 real_cssid = channel_subsys.default_cssid;
1233 } else {
1234 real_cssid = cssid;
1236 if (!channel_subsys.css[real_cssid]) {
1237 return -EINVAL;
1240 if (!channel_subsys.css[real_cssid]->chpids[chpid].in_use) {
1241 return -ENODEV;
1244 if (!channel_subsys.css[real_cssid]->chpids[chpid].is_virtual) {
1245 fprintf(stderr,
1246 "rchp unsupported for non-virtual chpid %x.%02x!\n",
1247 real_cssid, chpid);
1248 return -ENODEV;
1251 /* We don't really use a channel path, so we're done here. */
1252 css_queue_crw(CRW_RSC_CHP, CRW_ERC_INIT,
1253 channel_subsys.max_cssid > 0 ? 1 : 0, chpid);
1254 if (channel_subsys.max_cssid > 0) {
1255 css_queue_crw(CRW_RSC_CHP, CRW_ERC_INIT, 0, real_cssid << 8);
1257 return 0;
1260 bool css_schid_final(int m, uint8_t cssid, uint8_t ssid, uint16_t schid)
1262 SubchSet *set;
1263 uint8_t real_cssid;
1265 real_cssid = (!m && (cssid == 0)) ? channel_subsys.default_cssid : cssid;
1266 if (real_cssid > MAX_CSSID || ssid > MAX_SSID ||
1267 !channel_subsys.css[real_cssid] ||
1268 !channel_subsys.css[real_cssid]->sch_set[ssid]) {
1269 return true;
1271 set = channel_subsys.css[real_cssid]->sch_set[ssid];
1272 return schid > find_last_bit(set->schids_used,
1273 (MAX_SCHID + 1) / sizeof(unsigned long));
1276 static int css_add_virtual_chpid(uint8_t cssid, uint8_t chpid, uint8_t type)
1278 CssImage *css;
1280 trace_css_chpid_add(cssid, chpid, type);
1281 if (cssid > MAX_CSSID) {
1282 return -EINVAL;
1284 css = channel_subsys.css[cssid];
1285 if (!css) {
1286 return -EINVAL;
1288 if (css->chpids[chpid].in_use) {
1289 return -EEXIST;
1291 css->chpids[chpid].in_use = 1;
1292 css->chpids[chpid].type = type;
1293 css->chpids[chpid].is_virtual = 1;
1295 css_generate_chp_crws(cssid, chpid);
1297 return 0;
1300 void css_sch_build_virtual_schib(SubchDev *sch, uint8_t chpid, uint8_t type)
1302 PMCW *p = &sch->curr_status.pmcw;
1303 SCSW *s = &sch->curr_status.scsw;
1304 int i;
1305 CssImage *css = channel_subsys.css[sch->cssid];
1307 assert(css != NULL);
1308 memset(p, 0, sizeof(PMCW));
1309 p->flags |= PMCW_FLAGS_MASK_DNV;
1310 p->devno = sch->devno;
1311 /* single path */
1312 p->pim = 0x80;
1313 p->pom = 0xff;
1314 p->pam = 0x80;
1315 p->chpid[0] = chpid;
1316 if (!css->chpids[chpid].in_use) {
1317 css_add_virtual_chpid(sch->cssid, chpid, type);
1320 memset(s, 0, sizeof(SCSW));
1321 sch->curr_status.mba = 0;
1322 for (i = 0; i < ARRAY_SIZE(sch->curr_status.mda); i++) {
1323 sch->curr_status.mda[i] = 0;
1327 SubchDev *css_find_subch(uint8_t m, uint8_t cssid, uint8_t ssid, uint16_t schid)
1329 uint8_t real_cssid;
1331 real_cssid = (!m && (cssid == 0)) ? channel_subsys.default_cssid : cssid;
1333 if (!channel_subsys.css[real_cssid]) {
1334 return NULL;
1337 if (!channel_subsys.css[real_cssid]->sch_set[ssid]) {
1338 return NULL;
1341 return channel_subsys.css[real_cssid]->sch_set[ssid]->sch[schid];
1345 * Return free device number in subchannel set.
1347 * Return index of the first free device number in the subchannel set
1348 * identified by @p cssid and @p ssid, beginning the search at @p
1349 * start and wrapping around at MAX_DEVNO. Return a value exceeding
1350 * MAX_SCHID if there are no free device numbers in the subchannel
1351 * set.
1353 static uint32_t css_find_free_devno(uint8_t cssid, uint8_t ssid,
1354 uint16_t start)
1356 uint32_t round;
1358 for (round = 0; round <= MAX_DEVNO; round++) {
1359 uint16_t devno = (start + round) % MAX_DEVNO;
1361 if (!css_devno_used(cssid, ssid, devno)) {
1362 return devno;
1365 return MAX_DEVNO + 1;
1369 * Return first free subchannel (id) in subchannel set.
1371 * Return index of the first free subchannel in the subchannel set
1372 * identified by @p cssid and @p ssid, if there is any. Return a value
1373 * exceeding MAX_SCHID if there are no free subchannels in the
1374 * subchannel set.
1376 static uint32_t css_find_free_subch(uint8_t cssid, uint8_t ssid)
1378 uint32_t schid;
1380 for (schid = 0; schid <= MAX_SCHID; schid++) {
1381 if (!css_find_subch(1, cssid, ssid, schid)) {
1382 return schid;
1385 return MAX_SCHID + 1;
1389 * Return first free subchannel (id) in subchannel set for a device number
1391 * Verify the device number @p devno is not used yet in the subchannel
1392 * set identified by @p cssid and @p ssid. Set @p schid to the index
1393 * of the first free subchannel in the subchannel set, if there is
1394 * any. Return true if everything succeeded and false otherwise.
1396 static bool css_find_free_subch_for_devno(uint8_t cssid, uint8_t ssid,
1397 uint16_t devno, uint16_t *schid,
1398 Error **errp)
1400 uint32_t free_schid;
1402 assert(schid);
1403 if (css_devno_used(cssid, ssid, devno)) {
1404 error_setg(errp, "Device %x.%x.%04x already exists",
1405 cssid, ssid, devno);
1406 return false;
1408 free_schid = css_find_free_subch(cssid, ssid);
1409 if (free_schid > MAX_SCHID) {
1410 error_setg(errp, "No free subchannel found for %x.%x.%04x",
1411 cssid, ssid, devno);
1412 return false;
1414 *schid = free_schid;
1415 return true;
1419 * Return first free subchannel (id) and device number
1421 * Locate the first free subchannel and first free device number in
1422 * any of the subchannel sets of the channel subsystem identified by
1423 * @p cssid. Return false if no free subchannel / device number could
1424 * be found. Otherwise set @p ssid, @p devno and @p schid to identify
1425 * the available subchannel and device number and return true.
1427 * May modify @p ssid, @p devno and / or @p schid even if no free
1428 * subchannel / device number could be found.
1430 static bool css_find_free_subch_and_devno(uint8_t cssid, uint8_t *ssid,
1431 uint16_t *devno, uint16_t *schid,
1432 Error **errp)
1434 uint32_t free_schid, free_devno;
1436 assert(ssid && devno && schid);
1437 for (*ssid = 0; *ssid <= MAX_SSID; (*ssid)++) {
1438 free_schid = css_find_free_subch(cssid, *ssid);
1439 if (free_schid > MAX_SCHID) {
1440 continue;
1442 free_devno = css_find_free_devno(cssid, *ssid, free_schid);
1443 if (free_devno > MAX_DEVNO) {
1444 continue;
1446 *schid = free_schid;
1447 *devno = free_devno;
1448 return true;
1450 error_setg(errp, "Virtual channel subsystem is full!");
1451 return false;
1454 bool css_subch_visible(SubchDev *sch)
1456 if (sch->ssid > channel_subsys.max_ssid) {
1457 return false;
1460 if (sch->cssid != channel_subsys.default_cssid) {
1461 return (channel_subsys.max_cssid > 0);
1464 return true;
1467 bool css_present(uint8_t cssid)
1469 return (channel_subsys.css[cssid] != NULL);
1472 bool css_devno_used(uint8_t cssid, uint8_t ssid, uint16_t devno)
1474 if (!channel_subsys.css[cssid]) {
1475 return false;
1477 if (!channel_subsys.css[cssid]->sch_set[ssid]) {
1478 return false;
1481 return !!test_bit(devno,
1482 channel_subsys.css[cssid]->sch_set[ssid]->devnos_used);
1485 void css_subch_assign(uint8_t cssid, uint8_t ssid, uint16_t schid,
1486 uint16_t devno, SubchDev *sch)
1488 CssImage *css;
1489 SubchSet *s_set;
1491 trace_css_assign_subch(sch ? "assign" : "deassign", cssid, ssid, schid,
1492 devno);
1493 if (!channel_subsys.css[cssid]) {
1494 fprintf(stderr,
1495 "Suspicious call to %s (%x.%x.%04x) for non-existing css!\n",
1496 __func__, cssid, ssid, schid);
1497 return;
1499 css = channel_subsys.css[cssid];
1501 if (!css->sch_set[ssid]) {
1502 css->sch_set[ssid] = g_malloc0(sizeof(SubchSet));
1504 s_set = css->sch_set[ssid];
1506 s_set->sch[schid] = sch;
1507 if (sch) {
1508 set_bit(schid, s_set->schids_used);
1509 set_bit(devno, s_set->devnos_used);
1510 } else {
1511 clear_bit(schid, s_set->schids_used);
1512 clear_bit(devno, s_set->devnos_used);
1516 void css_queue_crw(uint8_t rsc, uint8_t erc, int chain, uint16_t rsid)
1518 CrwContainer *crw_cont;
1520 trace_css_crw(rsc, erc, rsid, chain ? "(chained)" : "");
1521 /* TODO: Maybe use a static crw pool? */
1522 crw_cont = g_try_malloc0(sizeof(CrwContainer));
1523 if (!crw_cont) {
1524 channel_subsys.crws_lost = true;
1525 return;
1527 crw_cont->crw.flags = (rsc << 8) | erc;
1528 if (chain) {
1529 crw_cont->crw.flags |= CRW_FLAGS_MASK_C;
1531 crw_cont->crw.rsid = rsid;
1532 if (channel_subsys.crws_lost) {
1533 crw_cont->crw.flags |= CRW_FLAGS_MASK_R;
1534 channel_subsys.crws_lost = false;
1537 QTAILQ_INSERT_TAIL(&channel_subsys.pending_crws, crw_cont, sibling);
1539 if (channel_subsys.do_crw_mchk) {
1540 channel_subsys.do_crw_mchk = false;
1541 /* Inject crw pending machine check. */
1542 s390_crw_mchk();
1546 void css_generate_sch_crws(uint8_t cssid, uint8_t ssid, uint16_t schid,
1547 int hotplugged, int add)
1549 uint8_t guest_cssid;
1550 bool chain_crw;
1552 if (add && !hotplugged) {
1553 return;
1555 if (channel_subsys.max_cssid == 0) {
1556 /* Default cssid shows up as 0. */
1557 guest_cssid = (cssid == channel_subsys.default_cssid) ? 0 : cssid;
1558 } else {
1559 /* Show real cssid to the guest. */
1560 guest_cssid = cssid;
1563 * Only notify for higher subchannel sets/channel subsystems if the
1564 * guest has enabled it.
1566 if ((ssid > channel_subsys.max_ssid) ||
1567 (guest_cssid > channel_subsys.max_cssid) ||
1568 ((channel_subsys.max_cssid == 0) &&
1569 (cssid != channel_subsys.default_cssid))) {
1570 return;
1572 chain_crw = (channel_subsys.max_ssid > 0) ||
1573 (channel_subsys.max_cssid > 0);
1574 css_queue_crw(CRW_RSC_SUBCH, CRW_ERC_IPI, chain_crw ? 1 : 0, schid);
1575 if (chain_crw) {
1576 css_queue_crw(CRW_RSC_SUBCH, CRW_ERC_IPI, 0,
1577 (guest_cssid << 8) | (ssid << 4));
1579 /* RW_ERC_IPI --> clear pending interrupts */
1580 css_clear_io_interrupt(css_do_build_subchannel_id(cssid, ssid), schid);
1583 void css_generate_chp_crws(uint8_t cssid, uint8_t chpid)
1585 /* TODO */
1588 void css_generate_css_crws(uint8_t cssid)
1590 if (!channel_subsys.sei_pending) {
1591 css_queue_crw(CRW_RSC_CSS, 0, 0, cssid);
1593 channel_subsys.sei_pending = true;
1596 void css_clear_sei_pending(void)
1598 channel_subsys.sei_pending = false;
1601 int css_enable_mcsse(void)
1603 trace_css_enable_facility("mcsse");
1604 channel_subsys.max_cssid = MAX_CSSID;
1605 return 0;
1608 int css_enable_mss(void)
1610 trace_css_enable_facility("mss");
1611 channel_subsys.max_ssid = MAX_SSID;
1612 return 0;
1615 void subch_device_save(SubchDev *s, QEMUFile *f)
1617 int i;
1619 qemu_put_byte(f, s->cssid);
1620 qemu_put_byte(f, s->ssid);
1621 qemu_put_be16(f, s->schid);
1622 qemu_put_be16(f, s->devno);
1623 qemu_put_byte(f, s->thinint_active);
1624 /* SCHIB */
1625 /* PMCW */
1626 qemu_put_be32(f, s->curr_status.pmcw.intparm);
1627 qemu_put_be16(f, s->curr_status.pmcw.flags);
1628 qemu_put_be16(f, s->curr_status.pmcw.devno);
1629 qemu_put_byte(f, s->curr_status.pmcw.lpm);
1630 qemu_put_byte(f, s->curr_status.pmcw.pnom);
1631 qemu_put_byte(f, s->curr_status.pmcw.lpum);
1632 qemu_put_byte(f, s->curr_status.pmcw.pim);
1633 qemu_put_be16(f, s->curr_status.pmcw.mbi);
1634 qemu_put_byte(f, s->curr_status.pmcw.pom);
1635 qemu_put_byte(f, s->curr_status.pmcw.pam);
1636 qemu_put_buffer(f, s->curr_status.pmcw.chpid, 8);
1637 qemu_put_be32(f, s->curr_status.pmcw.chars);
1638 /* SCSW */
1639 qemu_put_be16(f, s->curr_status.scsw.flags);
1640 qemu_put_be16(f, s->curr_status.scsw.ctrl);
1641 qemu_put_be32(f, s->curr_status.scsw.cpa);
1642 qemu_put_byte(f, s->curr_status.scsw.dstat);
1643 qemu_put_byte(f, s->curr_status.scsw.cstat);
1644 qemu_put_be16(f, s->curr_status.scsw.count);
1645 qemu_put_be64(f, s->curr_status.mba);
1646 qemu_put_buffer(f, s->curr_status.mda, 4);
1647 /* end SCHIB */
1648 qemu_put_buffer(f, s->sense_data, 32);
1649 qemu_put_be64(f, s->channel_prog);
1650 /* last cmd */
1651 qemu_put_byte(f, s->last_cmd.cmd_code);
1652 qemu_put_byte(f, s->last_cmd.flags);
1653 qemu_put_be16(f, s->last_cmd.count);
1654 qemu_put_be32(f, s->last_cmd.cda);
1655 qemu_put_byte(f, s->last_cmd_valid);
1656 qemu_put_byte(f, s->id.reserved);
1657 qemu_put_be16(f, s->id.cu_type);
1658 qemu_put_byte(f, s->id.cu_model);
1659 qemu_put_be16(f, s->id.dev_type);
1660 qemu_put_byte(f, s->id.dev_model);
1661 qemu_put_byte(f, s->id.unused);
1662 for (i = 0; i < ARRAY_SIZE(s->id.ciw); i++) {
1663 qemu_put_byte(f, s->id.ciw[i].type);
1664 qemu_put_byte(f, s->id.ciw[i].command);
1665 qemu_put_be16(f, s->id.ciw[i].count);
1667 qemu_put_byte(f, s->ccw_fmt_1);
1668 qemu_put_byte(f, s->ccw_no_data_cnt);
1671 int subch_device_load(SubchDev *s, QEMUFile *f)
1673 int i;
1675 s->cssid = qemu_get_byte(f);
1676 s->ssid = qemu_get_byte(f);
1677 s->schid = qemu_get_be16(f);
1678 s->devno = qemu_get_be16(f);
1679 s->thinint_active = qemu_get_byte(f);
1680 /* SCHIB */
1681 /* PMCW */
1682 s->curr_status.pmcw.intparm = qemu_get_be32(f);
1683 s->curr_status.pmcw.flags = qemu_get_be16(f);
1684 s->curr_status.pmcw.devno = qemu_get_be16(f);
1685 s->curr_status.pmcw.lpm = qemu_get_byte(f);
1686 s->curr_status.pmcw.pnom = qemu_get_byte(f);
1687 s->curr_status.pmcw.lpum = qemu_get_byte(f);
1688 s->curr_status.pmcw.pim = qemu_get_byte(f);
1689 s->curr_status.pmcw.mbi = qemu_get_be16(f);
1690 s->curr_status.pmcw.pom = qemu_get_byte(f);
1691 s->curr_status.pmcw.pam = qemu_get_byte(f);
1692 qemu_get_buffer(f, s->curr_status.pmcw.chpid, 8);
1693 s->curr_status.pmcw.chars = qemu_get_be32(f);
1694 /* SCSW */
1695 s->curr_status.scsw.flags = qemu_get_be16(f);
1696 s->curr_status.scsw.ctrl = qemu_get_be16(f);
1697 s->curr_status.scsw.cpa = qemu_get_be32(f);
1698 s->curr_status.scsw.dstat = qemu_get_byte(f);
1699 s->curr_status.scsw.cstat = qemu_get_byte(f);
1700 s->curr_status.scsw.count = qemu_get_be16(f);
1701 s->curr_status.mba = qemu_get_be64(f);
1702 qemu_get_buffer(f, s->curr_status.mda, 4);
1703 /* end SCHIB */
1704 qemu_get_buffer(f, s->sense_data, 32);
1705 s->channel_prog = qemu_get_be64(f);
1706 /* last cmd */
1707 s->last_cmd.cmd_code = qemu_get_byte(f);
1708 s->last_cmd.flags = qemu_get_byte(f);
1709 s->last_cmd.count = qemu_get_be16(f);
1710 s->last_cmd.cda = qemu_get_be32(f);
1711 s->last_cmd_valid = qemu_get_byte(f);
1712 s->id.reserved = qemu_get_byte(f);
1713 s->id.cu_type = qemu_get_be16(f);
1714 s->id.cu_model = qemu_get_byte(f);
1715 s->id.dev_type = qemu_get_be16(f);
1716 s->id.dev_model = qemu_get_byte(f);
1717 s->id.unused = qemu_get_byte(f);
1718 for (i = 0; i < ARRAY_SIZE(s->id.ciw); i++) {
1719 s->id.ciw[i].type = qemu_get_byte(f);
1720 s->id.ciw[i].command = qemu_get_byte(f);
1721 s->id.ciw[i].count = qemu_get_be16(f);
1723 s->ccw_fmt_1 = qemu_get_byte(f);
1724 s->ccw_no_data_cnt = qemu_get_byte(f);
1726 * Hack alert. We don't migrate the channel subsystem status (no
1727 * device!), but we need to find out if the guest enabled mss/mcss-e.
1728 * If the subchannel is enabled, it certainly was able to access it,
1729 * so adjust the max_ssid/max_cssid values for relevant ssid/cssid
1730 * values. This is not watertight, but better than nothing.
1732 if (s->curr_status.pmcw.flags & PMCW_FLAGS_MASK_ENA) {
1733 if (s->ssid) {
1734 channel_subsys.max_ssid = MAX_SSID;
1736 if (s->cssid != channel_subsys.default_cssid) {
1737 channel_subsys.max_cssid = MAX_CSSID;
1740 return 0;
1743 void css_reset_sch(SubchDev *sch)
1745 PMCW *p = &sch->curr_status.pmcw;
1747 if ((p->flags & PMCW_FLAGS_MASK_ENA) != 0 && sch->disable_cb) {
1748 sch->disable_cb(sch);
1751 p->intparm = 0;
1752 p->flags &= ~(PMCW_FLAGS_MASK_ISC | PMCW_FLAGS_MASK_ENA |
1753 PMCW_FLAGS_MASK_LM | PMCW_FLAGS_MASK_MME |
1754 PMCW_FLAGS_MASK_MP | PMCW_FLAGS_MASK_TF);
1755 p->flags |= PMCW_FLAGS_MASK_DNV;
1756 p->devno = sch->devno;
1757 p->pim = 0x80;
1758 p->lpm = p->pim;
1759 p->pnom = 0;
1760 p->lpum = 0;
1761 p->mbi = 0;
1762 p->pom = 0xff;
1763 p->pam = 0x80;
1764 p->chars &= ~(PMCW_CHARS_MASK_MBFC | PMCW_CHARS_MASK_XMWME |
1765 PMCW_CHARS_MASK_CSENSE);
1767 memset(&sch->curr_status.scsw, 0, sizeof(sch->curr_status.scsw));
1768 sch->curr_status.mba = 0;
1770 sch->channel_prog = 0x0;
1771 sch->last_cmd_valid = false;
1772 sch->thinint_active = false;
1775 void css_reset(void)
1777 CrwContainer *crw_cont;
1779 /* Clean up monitoring. */
1780 channel_subsys.chnmon_active = false;
1781 channel_subsys.chnmon_area = 0;
1783 /* Clear pending CRWs. */
1784 while ((crw_cont = QTAILQ_FIRST(&channel_subsys.pending_crws))) {
1785 QTAILQ_REMOVE(&channel_subsys.pending_crws, crw_cont, sibling);
1786 g_free(crw_cont);
1788 channel_subsys.sei_pending = false;
1789 channel_subsys.do_crw_mchk = true;
1790 channel_subsys.crws_lost = false;
1792 /* Reset maximum ids. */
1793 channel_subsys.max_cssid = 0;
1794 channel_subsys.max_ssid = 0;
1797 static void get_css_devid(Object *obj, Visitor *v, const char *name,
1798 void *opaque, Error **errp)
1800 DeviceState *dev = DEVICE(obj);
1801 Property *prop = opaque;
1802 CssDevId *dev_id = qdev_get_prop_ptr(dev, prop);
1803 char buffer[] = "xx.x.xxxx";
1804 char *p = buffer;
1805 int r;
1807 if (dev_id->valid) {
1809 r = snprintf(buffer, sizeof(buffer), "%02x.%1x.%04x", dev_id->cssid,
1810 dev_id->ssid, dev_id->devid);
1811 assert(r == sizeof(buffer) - 1);
1813 /* drop leading zero */
1814 if (dev_id->cssid <= 0xf) {
1815 p++;
1817 } else {
1818 snprintf(buffer, sizeof(buffer), "<unset>");
1821 visit_type_str(v, name, &p, errp);
1825 * parse <cssid>.<ssid>.<devid> and assert valid range for cssid/ssid
1827 static void set_css_devid(Object *obj, Visitor *v, const char *name,
1828 void *opaque, Error **errp)
1830 DeviceState *dev = DEVICE(obj);
1831 Property *prop = opaque;
1832 CssDevId *dev_id = qdev_get_prop_ptr(dev, prop);
1833 Error *local_err = NULL;
1834 char *str;
1835 int num, n1, n2;
1836 unsigned int cssid, ssid, devid;
1838 if (dev->realized) {
1839 qdev_prop_set_after_realize(dev, name, errp);
1840 return;
1843 visit_type_str(v, name, &str, &local_err);
1844 if (local_err) {
1845 error_propagate(errp, local_err);
1846 return;
1849 num = sscanf(str, "%2x.%1x%n.%4x%n", &cssid, &ssid, &n1, &devid, &n2);
1850 if (num != 3 || (n2 - n1) != 5 || strlen(str) != n2) {
1851 error_set_from_qdev_prop_error(errp, EINVAL, dev, prop, str);
1852 goto out;
1854 if ((cssid > MAX_CSSID) || (ssid > MAX_SSID)) {
1855 error_setg(errp, "Invalid cssid or ssid: cssid %x, ssid %x",
1856 cssid, ssid);
1857 goto out;
1860 dev_id->cssid = cssid;
1861 dev_id->ssid = ssid;
1862 dev_id->devid = devid;
1863 dev_id->valid = true;
1865 out:
1866 g_free(str);
1869 PropertyInfo css_devid_propinfo = {
1870 .name = "str",
1871 .description = "Identifier of an I/O device in the channel "
1872 "subsystem, example: fe.1.23ab",
1873 .get = get_css_devid,
1874 .set = set_css_devid,
1877 SubchDev *css_create_virtual_sch(CssDevId bus_id, Error **errp)
1879 uint16_t schid = 0;
1880 SubchDev *sch;
1882 if (bus_id.valid) {
1883 /* Enforce use of virtual cssid. */
1884 if (bus_id.cssid != VIRTUAL_CSSID) {
1885 error_setg(errp, "cssid %hhx not valid for virtual devices",
1886 bus_id.cssid);
1887 return NULL;
1889 if (!css_find_free_subch_for_devno(bus_id.cssid, bus_id.ssid,
1890 bus_id.devid, &schid, errp)) {
1891 return NULL;
1893 } else {
1894 bus_id.cssid = VIRTUAL_CSSID;
1895 if (!css_find_free_subch_and_devno(bus_id.cssid, &bus_id.ssid,
1896 &bus_id.devid, &schid, errp)) {
1897 return NULL;
1901 sch = g_malloc0(sizeof(*sch));
1902 sch->cssid = bus_id.cssid;
1903 sch->ssid = bus_id.ssid;
1904 sch->devno = bus_id.devid;
1905 sch->schid = schid;
1906 css_subch_assign(sch->cssid, sch->ssid, schid, sch->devno, sch);
1907 return sch;