4 * Copyright IBM, Corp. 2011
7 * Anthony Liguori <aliguori@us.ibm.com>
9 * This work is licensed under the terms of the GNU GPL, version 2 or later.
10 * See the COPYING file in the top-level directory.
14 #include "qemu/osdep.h"
15 #include "qapi/error.h"
17 #include "sysemu/qtest.h"
18 #include "sysemu/runstate.h"
19 #include "chardev/char-fe.h"
20 #include "exec/ioport.h"
21 #include "exec/memory.h"
23 #include "sysemu/accel.h"
24 #include "sysemu/cpus.h"
25 #include "qemu/config-file.h"
26 #include "qemu/option.h"
27 #include "qemu/error-report.h"
28 #include "qemu/module.h"
29 #include "qemu/cutils.h"
30 #include "config-devices.h"
32 #include "hw/ppc/spapr_rtas.h"
39 static DeviceState
*irq_intercept_dev
;
40 static FILE *qtest_log_fp
;
41 static CharBackend qtest_chr
;
42 static GString
*inbuf
;
43 static int irq_levels
[MAX_IRQ
];
44 static qemu_timeval start_time
;
45 static bool qtest_opened
;
46 static void (*qtest_server_send
)(void*, const char*);
47 static void *qtest_server_send_opaque
;
49 #define FMT_timeval "%ld.%06ld"
54 * Line based protocol, request/response based. Server can send async messages
55 * so clients should always handle many async messages before the response
62 * The qtest client is completely in charge of the QEMU_CLOCK_VIRTUAL. qtest commands
63 * let you adjust the value of the clock (monotonically). All the commands
64 * return the current value of the clock in nanoseconds.
69 * Advance the clock to the next deadline. Useful when waiting for
70 * asynchronous events.
75 * Advance the clock by NS nanoseconds.
80 * Advance the clock to NS nanoseconds (do nothing if it's already past).
82 * PIO and memory access:
102 * > writeb ADDR VALUE
105 * > writew ADDR VALUE
108 * > writel ADDR VALUE
111 * > writeq ADDR VALUE
129 * > write ADDR SIZE DATA
132 * > b64read ADDR SIZE
135 * > b64write ADDR SIZE B64_DATA
138 * > memset ADDR SIZE VALUE
141 * ADDR, SIZE, VALUE are all integers parsed with strtoul() with a base of 0.
142 * For 'memset' a zero size is permitted and does nothing.
144 * DATA is an arbitrarily long hex number prefixed with '0x'. If it's smaller
145 * than the expected size, the value will be zero filled at the end of the data
148 * B64_DATA is an arbitrarily long base64 encoded string.
149 * If the sizes do not match, the data will be truncated.
153 * > irq_intercept_in QOM-PATH
156 * > irq_intercept_out QOM-PATH
159 * Attach to the gpio-in (resp. gpio-out) pins exported by the device at
160 * QOM-PATH. When the pin is triggered, one of the following async messages
161 * will be printed to the qtest stream:
166 * where NUM is an IRQ number. For the PC, interrupts can be intercepted
167 * simply with "irq_intercept_in ioapic" (note that IRQ0 comes out with
168 * NUM=0 even though it is remapped to GSI 2).
170 * Setting interrupt level:
172 * > set_irq_in QOM-PATH NAME NUM LEVEL
175 * where NAME is the name of the irq/gpio list, NUM is an IRQ number and
176 * LEVEL is an signed integer IRQ level.
178 * Forcibly set the given interrupt pin to the given level.
182 static int hex2nib(char ch
)
184 if (ch
>= '0' && ch
<= '9') {
186 } else if (ch
>= 'a' && ch
<= 'f') {
187 return 10 + (ch
- 'a');
188 } else if (ch
>= 'A' && ch
<= 'F') {
189 return 10 + (ch
- 'A');
195 static void qtest_get_time(qemu_timeval
*tv
)
197 qemu_gettimeofday(tv
);
198 tv
->tv_sec
-= start_time
.tv_sec
;
199 tv
->tv_usec
-= start_time
.tv_usec
;
200 if (tv
->tv_usec
< 0) {
201 tv
->tv_usec
+= 1000000;
206 static void qtest_send_prefix(CharBackend
*chr
)
210 if (!qtest_log_fp
|| !qtest_opened
) {
215 fprintf(qtest_log_fp
, "[S +" FMT_timeval
"] ",
216 (long) tv
.tv_sec
, (long) tv
.tv_usec
);
219 static void GCC_FMT_ATTR(1, 2) qtest_log_send(const char *fmt
, ...)
223 if (!qtest_log_fp
|| !qtest_opened
) {
227 qtest_send_prefix(NULL
);
230 vfprintf(qtest_log_fp
, fmt
, ap
);
234 static void qtest_server_char_be_send(void *opaque
, const char *str
)
236 size_t len
= strlen(str
);
237 CharBackend
* chr
= (CharBackend
*)opaque
;
238 qemu_chr_fe_write_all(chr
, (uint8_t *)str
, len
);
239 if (qtest_log_fp
&& qtest_opened
) {
240 fprintf(qtest_log_fp
, "%s", str
);
244 static void qtest_send(CharBackend
*chr
, const char *str
)
246 qtest_server_send(qtest_server_send_opaque
, str
);
249 static void GCC_FMT_ATTR(2, 3) qtest_sendf(CharBackend
*chr
,
250 const char *fmt
, ...)
256 buffer
= g_strdup_vprintf(fmt
, ap
);
257 qtest_send(chr
, buffer
);
262 static void qtest_irq_handler(void *opaque
, int n
, int level
)
264 qemu_irq old_irq
= *(qemu_irq
*)opaque
;
265 qemu_set_irq(old_irq
, level
);
267 if (irq_levels
[n
] != level
) {
268 CharBackend
*chr
= &qtest_chr
;
269 irq_levels
[n
] = level
;
270 qtest_send_prefix(chr
);
271 qtest_sendf(chr
, "IRQ %s %d\n",
272 level
? "raise" : "lower", n
);
276 static void qtest_process_command(CharBackend
*chr
, gchar
**words
)
278 const gchar
*command
;
289 fprintf(qtest_log_fp
, "[R +" FMT_timeval
"]",
290 (long) tv
.tv_sec
, (long) tv
.tv_usec
);
291 for (i
= 0; words
[i
]; i
++) {
292 fprintf(qtest_log_fp
, " %s", words
[i
]);
294 fprintf(qtest_log_fp
, "\n");
298 if (strcmp(words
[0], "irq_intercept_out") == 0
299 || strcmp(words
[0], "irq_intercept_in") == 0) {
304 dev
= DEVICE(object_resolve_path(words
[1], NULL
));
306 qtest_send_prefix(chr
);
307 qtest_send(chr
, "FAIL Unknown device\n");
311 if (irq_intercept_dev
) {
312 qtest_send_prefix(chr
);
313 if (irq_intercept_dev
!= dev
) {
314 qtest_send(chr
, "FAIL IRQ intercept already enabled\n");
316 qtest_send(chr
, "OK\n");
321 QLIST_FOREACH(ngl
, &dev
->gpios
, node
) {
322 /* We don't support intercept of named GPIOs yet */
326 if (words
[0][14] == 'o') {
328 for (i
= 0; i
< ngl
->num_out
; ++i
) {
329 qemu_irq
*disconnected
= g_new0(qemu_irq
, 1);
330 qemu_irq icpt
= qemu_allocate_irq(qtest_irq_handler
,
333 *disconnected
= qdev_intercept_gpio_out(dev
, icpt
,
337 qemu_irq_intercept_in(ngl
->in
, qtest_irq_handler
,
341 irq_intercept_dev
= dev
;
342 qtest_send_prefix(chr
);
343 qtest_send(chr
, "OK\n");
344 } else if (strcmp(words
[0], "set_irq_in") == 0) {
352 g_assert(words
[1] && words
[2] && words
[3] && words
[4]);
354 dev
= DEVICE(object_resolve_path(words
[1], NULL
));
356 qtest_send_prefix(chr
);
357 qtest_send(chr
, "FAIL Unknown device\n");
361 if (strcmp(words
[2], "unnamed-gpio-in") == 0) {
367 ret
= qemu_strtoi(words
[3], NULL
, 0, &num
);
369 ret
= qemu_strtoi(words
[4], NULL
, 0, &level
);
372 irq
= qdev_get_gpio_in_named(dev
, name
, num
);
374 qemu_set_irq(irq
, level
);
375 qtest_send_prefix(chr
);
376 qtest_send(chr
, "OK\n");
377 } else if (strcmp(words
[0], "outb") == 0 ||
378 strcmp(words
[0], "outw") == 0 ||
379 strcmp(words
[0], "outl") == 0) {
384 g_assert(words
[1] && words
[2]);
385 ret
= qemu_strtoul(words
[1], NULL
, 0, &addr
);
387 ret
= qemu_strtoul(words
[2], NULL
, 0, &value
);
389 g_assert(addr
<= 0xffff);
391 if (words
[0][3] == 'b') {
392 cpu_outb(addr
, value
);
393 } else if (words
[0][3] == 'w') {
394 cpu_outw(addr
, value
);
395 } else if (words
[0][3] == 'l') {
396 cpu_outl(addr
, value
);
398 qtest_send_prefix(chr
);
399 qtest_send(chr
, "OK\n");
400 } else if (strcmp(words
[0], "inb") == 0 ||
401 strcmp(words
[0], "inw") == 0 ||
402 strcmp(words
[0], "inl") == 0) {
404 uint32_t value
= -1U;
408 ret
= qemu_strtoul(words
[1], NULL
, 0, &addr
);
410 g_assert(addr
<= 0xffff);
412 if (words
[0][2] == 'b') {
413 value
= cpu_inb(addr
);
414 } else if (words
[0][2] == 'w') {
415 value
= cpu_inw(addr
);
416 } else if (words
[0][2] == 'l') {
417 value
= cpu_inl(addr
);
419 qtest_send_prefix(chr
);
420 qtest_sendf(chr
, "OK 0x%04x\n", value
);
421 } else if (strcmp(words
[0], "writeb") == 0 ||
422 strcmp(words
[0], "writew") == 0 ||
423 strcmp(words
[0], "writel") == 0 ||
424 strcmp(words
[0], "writeq") == 0) {
429 g_assert(words
[1] && words
[2]);
430 ret
= qemu_strtou64(words
[1], NULL
, 0, &addr
);
432 ret
= qemu_strtou64(words
[2], NULL
, 0, &value
);
435 if (words
[0][5] == 'b') {
436 uint8_t data
= value
;
437 address_space_write(first_cpu
->as
, addr
, MEMTXATTRS_UNSPECIFIED
,
439 } else if (words
[0][5] == 'w') {
440 uint16_t data
= value
;
442 address_space_write(first_cpu
->as
, addr
, MEMTXATTRS_UNSPECIFIED
,
444 } else if (words
[0][5] == 'l') {
445 uint32_t data
= value
;
447 address_space_write(first_cpu
->as
, addr
, MEMTXATTRS_UNSPECIFIED
,
449 } else if (words
[0][5] == 'q') {
450 uint64_t data
= value
;
452 address_space_write(first_cpu
->as
, addr
, MEMTXATTRS_UNSPECIFIED
,
455 qtest_send_prefix(chr
);
456 qtest_send(chr
, "OK\n");
457 } else if (strcmp(words
[0], "readb") == 0 ||
458 strcmp(words
[0], "readw") == 0 ||
459 strcmp(words
[0], "readl") == 0 ||
460 strcmp(words
[0], "readq") == 0) {
462 uint64_t value
= UINT64_C(-1);
466 ret
= qemu_strtou64(words
[1], NULL
, 0, &addr
);
469 if (words
[0][4] == 'b') {
471 address_space_read(first_cpu
->as
, addr
, MEMTXATTRS_UNSPECIFIED
,
474 } else if (words
[0][4] == 'w') {
476 address_space_read(first_cpu
->as
, addr
, MEMTXATTRS_UNSPECIFIED
,
478 value
= tswap16(data
);
479 } else if (words
[0][4] == 'l') {
481 address_space_read(first_cpu
->as
, addr
, MEMTXATTRS_UNSPECIFIED
,
483 value
= tswap32(data
);
484 } else if (words
[0][4] == 'q') {
485 address_space_read(first_cpu
->as
, addr
, MEMTXATTRS_UNSPECIFIED
,
489 qtest_send_prefix(chr
);
490 qtest_sendf(chr
, "OK 0x%016" PRIx64
"\n", value
);
491 } else if (strcmp(words
[0], "read") == 0) {
492 uint64_t addr
, len
, i
;
497 g_assert(words
[1] && words
[2]);
498 ret
= qemu_strtou64(words
[1], NULL
, 0, &addr
);
500 ret
= qemu_strtou64(words
[2], NULL
, 0, &len
);
502 /* We'd send garbage to libqtest if len is 0 */
505 data
= g_malloc(len
);
506 address_space_read(first_cpu
->as
, addr
, MEMTXATTRS_UNSPECIFIED
, data
,
509 enc
= g_malloc(2 * len
+ 1);
510 for (i
= 0; i
< len
; i
++) {
511 sprintf(&enc
[i
* 2], "%02x", data
[i
]);
514 qtest_send_prefix(chr
);
515 qtest_sendf(chr
, "OK 0x%s\n", enc
);
519 } else if (strcmp(words
[0], "b64read") == 0) {
525 g_assert(words
[1] && words
[2]);
526 ret
= qemu_strtou64(words
[1], NULL
, 0, &addr
);
528 ret
= qemu_strtou64(words
[2], NULL
, 0, &len
);
531 data
= g_malloc(len
);
532 address_space_read(first_cpu
->as
, addr
, MEMTXATTRS_UNSPECIFIED
, data
,
534 b64_data
= g_base64_encode(data
, len
);
535 qtest_send_prefix(chr
);
536 qtest_sendf(chr
, "OK %s\n", b64_data
);
540 } else if (strcmp(words
[0], "write") == 0) {
541 uint64_t addr
, len
, i
;
546 g_assert(words
[1] && words
[2] && words
[3]);
547 ret
= qemu_strtou64(words
[1], NULL
, 0, &addr
);
549 ret
= qemu_strtou64(words
[2], NULL
, 0, &len
);
552 data_len
= strlen(words
[3]);
554 qtest_send(chr
, "ERR invalid argument size\n");
558 data
= g_malloc(len
);
559 for (i
= 0; i
< len
; i
++) {
560 if ((i
* 2 + 4) <= data_len
) {
561 data
[i
] = hex2nib(words
[3][i
* 2 + 2]) << 4;
562 data
[i
] |= hex2nib(words
[3][i
* 2 + 3]);
567 address_space_write(first_cpu
->as
, addr
, MEMTXATTRS_UNSPECIFIED
, data
,
571 qtest_send_prefix(chr
);
572 qtest_send(chr
, "OK\n");
573 } else if (strcmp(words
[0], "memset") == 0) {
576 unsigned long pattern
;
579 g_assert(words
[1] && words
[2] && words
[3]);
580 ret
= qemu_strtou64(words
[1], NULL
, 0, &addr
);
582 ret
= qemu_strtou64(words
[2], NULL
, 0, &len
);
584 ret
= qemu_strtoul(words
[3], NULL
, 0, &pattern
);
588 data
= g_malloc(len
);
589 memset(data
, pattern
, len
);
590 address_space_write(first_cpu
->as
, addr
, MEMTXATTRS_UNSPECIFIED
,
595 qtest_send_prefix(chr
);
596 qtest_send(chr
, "OK\n");
597 } else if (strcmp(words
[0], "b64write") == 0) {
604 g_assert(words
[1] && words
[2] && words
[3]);
605 ret
= qemu_strtou64(words
[1], NULL
, 0, &addr
);
607 ret
= qemu_strtou64(words
[2], NULL
, 0, &len
);
610 data_len
= strlen(words
[3]);
612 qtest_send(chr
, "ERR invalid argument size\n");
616 data
= g_base64_decode_inplace(words
[3], &out_len
);
617 if (out_len
!= len
) {
618 qtest_log_send("b64write: data length mismatch (told %"PRIu64
", "
621 out_len
= MIN(out_len
, len
);
624 address_space_write(first_cpu
->as
, addr
, MEMTXATTRS_UNSPECIFIED
, data
,
627 qtest_send_prefix(chr
);
628 qtest_send(chr
, "OK\n");
629 } else if (strcmp(words
[0], "endianness") == 0) {
630 qtest_send_prefix(chr
);
631 #if defined(TARGET_WORDS_BIGENDIAN)
632 qtest_sendf(chr
, "OK big\n");
634 qtest_sendf(chr
, "OK little\n");
636 #ifdef CONFIG_PSERIES
637 } else if (strcmp(words
[0], "rtas") == 0) {
638 uint64_t res
, args
, ret
;
639 unsigned long nargs
, nret
;
642 rc
= qemu_strtoul(words
[2], NULL
, 0, &nargs
);
644 rc
= qemu_strtou64(words
[3], NULL
, 0, &args
);
646 rc
= qemu_strtoul(words
[4], NULL
, 0, &nret
);
648 rc
= qemu_strtou64(words
[5], NULL
, 0, &ret
);
650 res
= qtest_rtas_call(words
[1], nargs
, args
, nret
, ret
);
652 qtest_send_prefix(chr
);
653 qtest_sendf(chr
, "OK %"PRIu64
"\n", res
);
655 } else if (qtest_enabled() && strcmp(words
[0], "clock_step") == 0) {
659 int ret
= qemu_strtoi64(words
[1], NULL
, 0, &ns
);
662 ns
= qemu_clock_deadline_ns_all(QEMU_CLOCK_VIRTUAL
,
663 QEMU_TIMER_ATTR_ALL
);
665 qtest_clock_warp(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL
) + ns
);
666 qtest_send_prefix(chr
);
667 qtest_sendf(chr
, "OK %"PRIi64
"\n",
668 (int64_t)qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL
));
669 } else if (strcmp(words
[0], "module_load") == 0) {
670 g_assert(words
[1] && words
[2]);
672 qtest_send_prefix(chr
);
673 if (module_load_one(words
[1], words
[2])) {
674 qtest_sendf(chr
, "OK\n");
676 qtest_sendf(chr
, "FAIL\n");
678 } else if (qtest_enabled() && strcmp(words
[0], "clock_set") == 0) {
683 ret
= qemu_strtoi64(words
[1], NULL
, 0, &ns
);
685 qtest_clock_warp(ns
);
686 qtest_send_prefix(chr
);
687 qtest_sendf(chr
, "OK %"PRIi64
"\n",
688 (int64_t)qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL
));
690 qtest_send_prefix(chr
);
691 qtest_sendf(chr
, "FAIL Unknown command '%s'\n", words
[0]);
695 static void qtest_process_inbuf(CharBackend
*chr
, GString
*inbuf
)
699 while ((end
= strchr(inbuf
->str
, '\n')) != NULL
) {
704 offset
= end
- inbuf
->str
;
706 cmd
= g_string_new_len(inbuf
->str
, offset
);
707 g_string_erase(inbuf
, 0, offset
+ 1);
709 words
= g_strsplit(cmd
->str
, " ", 0);
710 qtest_process_command(chr
, words
);
713 g_string_free(cmd
, TRUE
);
717 static void qtest_read(void *opaque
, const uint8_t *buf
, int size
)
719 CharBackend
*chr
= opaque
;
721 g_string_append_len(inbuf
, (const gchar
*)buf
, size
);
722 qtest_process_inbuf(chr
, inbuf
);
725 static int qtest_can_read(void *opaque
)
730 static void qtest_event(void *opaque
, QEMUChrEvent event
)
735 case CHR_EVENT_OPENED
:
737 * We used to call qemu_system_reset() here, hoping we could
738 * use the same process for multiple tests that way. Never
739 * used. Injects an extra reset even when it's not used, and
740 * that can mess up tests, e.g. -boot once.
742 for (i
= 0; i
< ARRAY_SIZE(irq_levels
); i
++) {
745 qemu_gettimeofday(&start_time
);
748 fprintf(qtest_log_fp
, "[I " FMT_timeval
"] OPENED\n",
749 (long) start_time
.tv_sec
, (long) start_time
.tv_usec
);
752 case CHR_EVENT_CLOSED
:
753 qtest_opened
= false;
757 fprintf(qtest_log_fp
, "[I +" FMT_timeval
"] CLOSED\n",
758 (long) tv
.tv_sec
, (long) tv
.tv_usec
);
765 void qtest_server_init(const char *qtest_chrdev
, const char *qtest_log
, Error
**errp
)
769 chr
= qemu_chr_new("qtest", qtest_chrdev
, NULL
);
772 error_setg(errp
, "Failed to initialize device for qtest: \"%s\"",
778 if (strcmp(qtest_log
, "none") != 0) {
779 qtest_log_fp
= fopen(qtest_log
, "w+");
782 qtest_log_fp
= stderr
;
785 qemu_chr_fe_init(&qtest_chr
, chr
, errp
);
786 qemu_chr_fe_set_handlers(&qtest_chr
, qtest_can_read
, qtest_read
,
787 qtest_event
, NULL
, &qtest_chr
, NULL
, true);
788 qemu_chr_fe_set_echo(&qtest_chr
, true);
790 inbuf
= g_string_new("");
792 if (!qtest_server_send
) {
793 qtest_server_set_send_handler(qtest_server_char_be_send
, &qtest_chr
);
797 void qtest_server_set_send_handler(void (*send
)(void*, const char*), void *opaque
)
799 qtest_server_send
= send
;
800 qtest_server_send_opaque
= opaque
;
803 bool qtest_driver(void)
805 return qtest_chr
.chr
!= NULL
;
808 void qtest_server_inproc_recv(void *dummy
, const char *buf
)
810 static GString
*gstr
;
812 gstr
= g_string_new(NULL
);
814 g_string_append(gstr
, buf
);
815 if (gstr
->str
[gstr
->len
- 1] == '\n') {
816 qtest_process_inbuf(NULL
, gstr
);
817 g_string_truncate(gstr
, 0);