accel/tcg: remove link between guest ram and TCG cache size
[qemu/ar7.git] / hw / arm / raspi.c
blobacd2bb794d135b0ab80d890d7735c09c35ab92e8
1 /*
2 * Raspberry Pi emulation (c) 2012 Gregory Estrade
3 * Upstreaming code cleanup [including bcm2835_*] (c) 2013 Jan Petrous
5 * Rasperry Pi 2 emulation Copyright (c) 2015, Microsoft
6 * Written by Andrew Baumann
8 * Raspberry Pi 3 emulation Copyright (c) 2018 Zoltán Baldaszti
9 * Upstream code cleanup (c) 2018 Pekka Enberg
11 * This code is licensed under the GNU GPLv2 and later.
14 #include "qemu/osdep.h"
15 #include "qemu/units.h"
16 #include "qemu/cutils.h"
17 #include "qapi/error.h"
18 #include "cpu.h"
19 #include "hw/arm/bcm2836.h"
20 #include "hw/registerfields.h"
21 #include "qemu/error-report.h"
22 #include "hw/boards.h"
23 #include "hw/loader.h"
24 #include "hw/arm/boot.h"
25 #include "sysemu/sysemu.h"
27 #define SMPBOOT_ADDR 0x300 /* this should leave enough space for ATAGS */
28 #define MVBAR_ADDR 0x400 /* secure vectors */
29 #define BOARDSETUP_ADDR (MVBAR_ADDR + 0x20) /* board setup code */
30 #define FIRMWARE_ADDR_2 0x8000 /* Pi 2 loads kernel.img here by default */
31 #define FIRMWARE_ADDR_3 0x80000 /* Pi 3 loads kernel.img here by default */
32 #define SPINTABLE_ADDR 0xd8 /* Pi 3 bootloader spintable */
34 /* Registered machine type (matches RPi Foundation bootloader and U-Boot) */
35 #define MACH_TYPE_BCM2708 3138
37 typedef struct RaspiMachineState {
38 /*< private >*/
39 MachineState parent_obj;
40 /*< public >*/
41 BCM283XState soc;
42 } RaspiMachineState;
44 typedef struct RaspiMachineClass {
45 /*< private >*/
46 MachineClass parent_obj;
47 /*< public >*/
48 uint32_t board_rev;
49 } RaspiMachineClass;
51 #define TYPE_RASPI_MACHINE MACHINE_TYPE_NAME("raspi-common")
52 #define RASPI_MACHINE(obj) \
53 OBJECT_CHECK(RaspiMachineState, (obj), TYPE_RASPI_MACHINE)
55 #define RASPI_MACHINE_CLASS(klass) \
56 OBJECT_CLASS_CHECK(RaspiMachineClass, (klass), TYPE_RASPI_MACHINE)
57 #define RASPI_MACHINE_GET_CLASS(obj) \
58 OBJECT_GET_CLASS(RaspiMachineClass, (obj), TYPE_RASPI_MACHINE)
61 * Board revision codes:
62 * www.raspberrypi.org/documentation/hardware/raspberrypi/revision-codes/
64 FIELD(REV_CODE, REVISION, 0, 4);
65 FIELD(REV_CODE, TYPE, 4, 8);
66 FIELD(REV_CODE, PROCESSOR, 12, 4);
67 FIELD(REV_CODE, MANUFACTURER, 16, 4);
68 FIELD(REV_CODE, MEMORY_SIZE, 20, 3);
69 FIELD(REV_CODE, STYLE, 23, 1);
71 static uint64_t board_ram_size(uint32_t board_rev)
73 assert(FIELD_EX32(board_rev, REV_CODE, STYLE)); /* Only new style */
74 return 256 * MiB << FIELD_EX32(board_rev, REV_CODE, MEMORY_SIZE);
77 static int board_processor_id(uint32_t board_rev)
79 assert(FIELD_EX32(board_rev, REV_CODE, STYLE)); /* Only new style */
80 return FIELD_EX32(board_rev, REV_CODE, PROCESSOR);
83 static int board_version(uint32_t board_rev)
85 return board_processor_id(board_rev) + 1;
88 static const char *board_soc_type(uint32_t board_rev)
90 static const char *soc_types[] = {
91 NULL, TYPE_BCM2836, TYPE_BCM2837,
93 int proc_id = board_processor_id(board_rev);
95 if (proc_id >= ARRAY_SIZE(soc_types) || !soc_types[proc_id]) {
96 error_report("Unsupported processor id '%d' (board revision: 0x%x)",
97 proc_id, board_rev);
98 exit(1);
100 return soc_types[proc_id];
103 static int cores_count(uint32_t board_rev)
105 static const int soc_cores_count[] = {
106 0, BCM283X_NCPUS, BCM283X_NCPUS,
108 int proc_id = board_processor_id(board_rev);
110 if (proc_id >= ARRAY_SIZE(soc_cores_count) || !soc_cores_count[proc_id]) {
111 error_report("Unsupported processor id '%d' (board revision: 0x%x)",
112 proc_id, board_rev);
113 exit(1);
115 return soc_cores_count[proc_id];
118 static const char *board_type(uint32_t board_rev)
120 static const char *types[] = {
121 "A", "B", "A+", "B+", "2B", "Alpha", "CM1", NULL, "3B", "Zero",
122 "CM3", NULL, "Zero W", "3B+", "3A+", NULL, "CM3+", "4B",
124 assert(FIELD_EX32(board_rev, REV_CODE, STYLE)); /* Only new style */
125 int bt = FIELD_EX32(board_rev, REV_CODE, TYPE);
126 if (bt >= ARRAY_SIZE(types) || !types[bt]) {
127 return "Unknown";
129 return types[bt];
132 static void write_smpboot(ARMCPU *cpu, const struct arm_boot_info *info)
134 static const uint32_t smpboot[] = {
135 0xe1a0e00f, /* mov lr, pc */
136 0xe3a0fe00 + (BOARDSETUP_ADDR >> 4), /* mov pc, BOARDSETUP_ADDR */
137 0xee100fb0, /* mrc p15, 0, r0, c0, c0, 5;get core ID */
138 0xe7e10050, /* ubfx r0, r0, #0, #2 ;extract LSB */
139 0xe59f5014, /* ldr r5, =0x400000CC ;load mbox base */
140 0xe320f001, /* 1: yield */
141 0xe7953200, /* ldr r3, [r5, r0, lsl #4] ;read mbox for our core*/
142 0xe3530000, /* cmp r3, #0 ;spin while zero */
143 0x0afffffb, /* beq 1b */
144 0xe7853200, /* str r3, [r5, r0, lsl #4] ;clear mbox */
145 0xe12fff13, /* bx r3 ;jump to target */
146 0x400000cc, /* (constant: mailbox 3 read/clear base) */
149 /* check that we don't overrun board setup vectors */
150 QEMU_BUILD_BUG_ON(SMPBOOT_ADDR + sizeof(smpboot) > MVBAR_ADDR);
151 /* check that board setup address is correctly relocated */
152 QEMU_BUILD_BUG_ON((BOARDSETUP_ADDR & 0xf) != 0
153 || (BOARDSETUP_ADDR >> 4) >= 0x100);
155 rom_add_blob_fixed_as("raspi_smpboot", smpboot, sizeof(smpboot),
156 info->smp_loader_start,
157 arm_boot_address_space(cpu, info));
160 static void write_smpboot64(ARMCPU *cpu, const struct arm_boot_info *info)
162 AddressSpace *as = arm_boot_address_space(cpu, info);
163 /* Unlike the AArch32 version we don't need to call the board setup hook.
164 * The mechanism for doing the spin-table is also entirely different.
165 * We must have four 64-bit fields at absolute addresses
166 * 0xd8, 0xe0, 0xe8, 0xf0 in RAM, which are the flag variables for
167 * our CPUs, and which we must ensure are zero initialized before
168 * the primary CPU goes into the kernel. We put these variables inside
169 * a rom blob, so that the reset for ROM contents zeroes them for us.
171 static const uint32_t smpboot[] = {
172 0xd2801b05, /* mov x5, 0xd8 */
173 0xd53800a6, /* mrs x6, mpidr_el1 */
174 0x924004c6, /* and x6, x6, #0x3 */
175 0xd503205f, /* spin: wfe */
176 0xf86678a4, /* ldr x4, [x5,x6,lsl #3] */
177 0xb4ffffc4, /* cbz x4, spin */
178 0xd2800000, /* mov x0, #0x0 */
179 0xd2800001, /* mov x1, #0x0 */
180 0xd2800002, /* mov x2, #0x0 */
181 0xd2800003, /* mov x3, #0x0 */
182 0xd61f0080, /* br x4 */
185 static const uint64_t spintables[] = {
186 0, 0, 0, 0
189 rom_add_blob_fixed_as("raspi_smpboot", smpboot, sizeof(smpboot),
190 info->smp_loader_start, as);
191 rom_add_blob_fixed_as("raspi_spintables", spintables, sizeof(spintables),
192 SPINTABLE_ADDR, as);
195 static void write_board_setup(ARMCPU *cpu, const struct arm_boot_info *info)
197 arm_write_secure_board_setup_dummy_smc(cpu, info, MVBAR_ADDR);
200 static void reset_secondary(ARMCPU *cpu, const struct arm_boot_info *info)
202 CPUState *cs = CPU(cpu);
203 cpu_set_pc(cs, info->smp_loader_start);
206 static void setup_boot(MachineState *machine, int version, size_t ram_size)
208 static struct arm_boot_info binfo;
209 int r;
211 binfo.board_id = MACH_TYPE_BCM2708;
212 binfo.ram_size = ram_size;
213 binfo.nb_cpus = machine->smp.cpus;
215 if (version <= 2) {
216 /* The rpi1 and 2 require some custom setup code to run in Secure
217 * mode before booting a kernel (to set up the SMC vectors so
218 * that we get a no-op SMC; this is used by Linux to call the
219 * firmware for some cache maintenance operations.
220 * The rpi3 doesn't need this.
222 binfo.board_setup_addr = BOARDSETUP_ADDR;
223 binfo.write_board_setup = write_board_setup;
224 binfo.secure_board_setup = true;
225 binfo.secure_boot = true;
228 /* Pi2 and Pi3 requires SMP setup */
229 if (version >= 2) {
230 binfo.smp_loader_start = SMPBOOT_ADDR;
231 if (version == 2) {
232 binfo.write_secondary_boot = write_smpboot;
233 } else {
234 binfo.write_secondary_boot = write_smpboot64;
236 binfo.secondary_cpu_reset_hook = reset_secondary;
239 /* If the user specified a "firmware" image (e.g. UEFI), we bypass
240 * the normal Linux boot process
242 if (machine->firmware) {
243 hwaddr firmware_addr = version == 3 ? FIRMWARE_ADDR_3 : FIRMWARE_ADDR_2;
244 /* load the firmware image (typically kernel.img) */
245 r = load_image_targphys(machine->firmware, firmware_addr,
246 ram_size - firmware_addr);
247 if (r < 0) {
248 error_report("Failed to load firmware from %s", machine->firmware);
249 exit(1);
252 binfo.entry = firmware_addr;
253 binfo.firmware_loaded = true;
256 arm_load_kernel(ARM_CPU(first_cpu), machine, &binfo);
259 static void raspi_machine_init(MachineState *machine)
261 RaspiMachineClass *mc = RASPI_MACHINE_GET_CLASS(machine);
262 RaspiMachineState *s = RASPI_MACHINE(machine);
263 uint32_t board_rev = mc->board_rev;
264 int version = board_version(board_rev);
265 uint64_t ram_size = board_ram_size(board_rev);
266 uint32_t vcram_size;
267 DriveInfo *di;
268 BlockBackend *blk;
269 BusState *bus;
270 DeviceState *carddev;
272 if (machine->ram_size != ram_size) {
273 char *size_str = size_to_str(ram_size);
274 error_report("Invalid RAM size, should be %s", size_str);
275 g_free(size_str);
276 exit(1);
279 /* FIXME: Remove when we have custom CPU address space support */
280 memory_region_add_subregion_overlap(get_system_memory(), 0,
281 machine->ram, 0);
283 /* Setup the SOC */
284 object_initialize_child(OBJECT(machine), "soc", &s->soc, sizeof(s->soc),
285 board_soc_type(board_rev), &error_abort, NULL);
286 object_property_add_const_link(OBJECT(&s->soc), "ram", OBJECT(machine->ram),
287 &error_abort);
288 object_property_set_int(OBJECT(&s->soc), board_rev, "board-rev",
289 &error_abort);
290 object_property_set_bool(OBJECT(&s->soc), true, "realized", &error_abort);
292 /* Create and plug in the SD cards */
293 di = drive_get_next(IF_SD);
294 blk = di ? blk_by_legacy_dinfo(di) : NULL;
295 bus = qdev_get_child_bus(DEVICE(&s->soc), "sd-bus");
296 if (bus == NULL) {
297 error_report("No SD bus found in SOC object");
298 exit(1);
300 carddev = qdev_create(bus, TYPE_SD_CARD);
301 qdev_prop_set_drive(carddev, "drive", blk, &error_fatal);
302 object_property_set_bool(OBJECT(carddev), true, "realized", &error_fatal);
304 vcram_size = object_property_get_uint(OBJECT(&s->soc), "vcram-size",
305 &error_abort);
306 setup_boot(machine, version, machine->ram_size - vcram_size);
309 static void raspi_machine_class_init(ObjectClass *oc, void *data)
311 MachineClass *mc = MACHINE_CLASS(oc);
312 RaspiMachineClass *rmc = RASPI_MACHINE_CLASS(oc);
313 uint32_t board_rev = (uint32_t)(uintptr_t)data;
315 rmc->board_rev = board_rev;
316 mc->desc = g_strdup_printf("Raspberry Pi %s", board_type(board_rev));
317 mc->init = raspi_machine_init;
318 mc->block_default_type = IF_SD;
319 mc->no_parallel = 1;
320 mc->no_floppy = 1;
321 mc->no_cdrom = 1;
322 mc->default_cpus = mc->min_cpus = mc->max_cpus = cores_count(board_rev);
323 mc->default_ram_size = board_ram_size(board_rev);
324 mc->default_ram_id = "ram";
325 if (board_version(board_rev) == 2) {
326 mc->ignore_memory_transaction_failures = true;
330 static const TypeInfo raspi_machine_types[] = {
332 .name = MACHINE_TYPE_NAME("raspi2"),
333 .parent = TYPE_RASPI_MACHINE,
334 .class_init = raspi_machine_class_init,
335 .class_data = (void *)0xa21041,
336 #ifdef TARGET_AARCH64
337 }, {
338 .name = MACHINE_TYPE_NAME("raspi3"),
339 .parent = TYPE_RASPI_MACHINE,
340 .class_init = raspi_machine_class_init,
341 .class_data = (void *)0xa02082,
342 #endif
343 }, {
344 .name = TYPE_RASPI_MACHINE,
345 .parent = TYPE_MACHINE,
346 .instance_size = sizeof(RaspiMachineState),
347 .class_size = sizeof(RaspiMachineClass),
348 .abstract = true,
352 DEFINE_TYPES(raspi_machine_types)