vfio/pci: Fixup v0 PCIe capabilities
[qemu/ar7.git] / qom / cpu.c
blob8757f033a05edf786594ff5b4693b4079400d5e4
1 /*
2 * QEMU CPU model
4 * Copyright (c) 2012-2014 SUSE LINUX Products GmbH
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, see
18 * <http://www.gnu.org/licenses/gpl-2.0.html>
21 #include "qemu/osdep.h"
22 #include "qapi/error.h"
23 #include "qemu-common.h"
24 #include "qom/cpu.h"
25 #include "sysemu/hw_accel.h"
26 #include "qemu/notify.h"
27 #include "qemu/log.h"
28 #include "exec/log.h"
29 #include "exec/cpu-common.h"
30 #include "qemu/error-report.h"
31 #include "sysemu/sysemu.h"
32 #include "hw/qdev-properties.h"
33 #include "trace-root.h"
35 CPUInterruptHandler cpu_interrupt_handler;
37 bool cpu_exists(int64_t id)
39 CPUState *cpu;
41 CPU_FOREACH(cpu) {
42 CPUClass *cc = CPU_GET_CLASS(cpu);
44 if (cc->get_arch_id(cpu) == id) {
45 return true;
48 return false;
51 CPUState *cpu_generic_init(const char *typename, const char *cpu_model)
53 char *str, *name, *featurestr;
54 CPUState *cpu = NULL;
55 ObjectClass *oc;
56 CPUClass *cc;
57 Error *err = NULL;
59 str = g_strdup(cpu_model);
60 name = strtok(str, ",");
62 oc = cpu_class_by_name(typename, name);
63 if (oc == NULL) {
64 g_free(str);
65 return NULL;
68 cc = CPU_CLASS(oc);
69 featurestr = strtok(NULL, ",");
70 /* TODO: all callers of cpu_generic_init() need to be converted to
71 * call parse_features() only once, before calling cpu_generic_init().
73 cc->parse_features(object_class_get_name(oc), featurestr, &err);
74 g_free(str);
75 if (err != NULL) {
76 goto out;
79 cpu = CPU(object_new(object_class_get_name(oc)));
80 object_property_set_bool(OBJECT(cpu), true, "realized", &err);
82 out:
83 if (err != NULL) {
84 error_report_err(err);
85 object_unref(OBJECT(cpu));
86 return NULL;
89 return cpu;
92 bool cpu_paging_enabled(const CPUState *cpu)
94 CPUClass *cc = CPU_GET_CLASS(cpu);
96 return cc->get_paging_enabled(cpu);
99 static bool cpu_common_get_paging_enabled(const CPUState *cpu)
101 return false;
104 void cpu_get_memory_mapping(CPUState *cpu, MemoryMappingList *list,
105 Error **errp)
107 CPUClass *cc = CPU_GET_CLASS(cpu);
109 cc->get_memory_mapping(cpu, list, errp);
112 static void cpu_common_get_memory_mapping(CPUState *cpu,
113 MemoryMappingList *list,
114 Error **errp)
116 error_setg(errp, "Obtaining memory mappings is unsupported on this CPU.");
119 /* Resetting the IRQ comes from across the code base so we take the
120 * BQL here if we need to. cpu_interrupt assumes it is held.*/
121 void cpu_reset_interrupt(CPUState *cpu, int mask)
123 bool need_lock = !qemu_mutex_iothread_locked();
125 if (need_lock) {
126 qemu_mutex_lock_iothread();
128 cpu->interrupt_request &= ~mask;
129 if (need_lock) {
130 qemu_mutex_unlock_iothread();
134 void cpu_exit(CPUState *cpu)
136 atomic_set(&cpu->exit_request, 1);
137 /* Ensure cpu_exec will see the exit request after TCG has exited. */
138 smp_wmb();
139 atomic_set(&cpu->icount_decr.u16.high, -1);
142 int cpu_write_elf32_qemunote(WriteCoreDumpFunction f, CPUState *cpu,
143 void *opaque)
145 CPUClass *cc = CPU_GET_CLASS(cpu);
147 return (*cc->write_elf32_qemunote)(f, cpu, opaque);
150 static int cpu_common_write_elf32_qemunote(WriteCoreDumpFunction f,
151 CPUState *cpu, void *opaque)
153 return 0;
156 int cpu_write_elf32_note(WriteCoreDumpFunction f, CPUState *cpu,
157 int cpuid, void *opaque)
159 CPUClass *cc = CPU_GET_CLASS(cpu);
161 return (*cc->write_elf32_note)(f, cpu, cpuid, opaque);
164 static int cpu_common_write_elf32_note(WriteCoreDumpFunction f,
165 CPUState *cpu, int cpuid,
166 void *opaque)
168 return -1;
171 int cpu_write_elf64_qemunote(WriteCoreDumpFunction f, CPUState *cpu,
172 void *opaque)
174 CPUClass *cc = CPU_GET_CLASS(cpu);
176 return (*cc->write_elf64_qemunote)(f, cpu, opaque);
179 static int cpu_common_write_elf64_qemunote(WriteCoreDumpFunction f,
180 CPUState *cpu, void *opaque)
182 return 0;
185 int cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cpu,
186 int cpuid, void *opaque)
188 CPUClass *cc = CPU_GET_CLASS(cpu);
190 return (*cc->write_elf64_note)(f, cpu, cpuid, opaque);
193 static int cpu_common_write_elf64_note(WriteCoreDumpFunction f,
194 CPUState *cpu, int cpuid,
195 void *opaque)
197 return -1;
201 static int cpu_common_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg)
203 return 0;
206 static int cpu_common_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg)
208 return 0;
211 static bool cpu_common_debug_check_watchpoint(CPUState *cpu, CPUWatchpoint *wp)
213 /* If no extra check is required, QEMU watchpoint match can be considered
214 * as an architectural match.
216 return true;
219 bool target_words_bigendian(void);
220 static bool cpu_common_virtio_is_big_endian(CPUState *cpu)
222 return target_words_bigendian();
225 static void cpu_common_noop(CPUState *cpu)
229 static bool cpu_common_exec_interrupt(CPUState *cpu, int int_req)
231 return false;
234 GuestPanicInformation *cpu_get_crash_info(CPUState *cpu)
236 CPUClass *cc = CPU_GET_CLASS(cpu);
237 GuestPanicInformation *res = NULL;
239 if (cc->get_crash_info) {
240 res = cc->get_crash_info(cpu);
242 return res;
245 void cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
246 int flags)
248 CPUClass *cc = CPU_GET_CLASS(cpu);
250 if (cc->dump_state) {
251 cpu_synchronize_state(cpu);
252 cc->dump_state(cpu, f, cpu_fprintf, flags);
256 void cpu_dump_statistics(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
257 int flags)
259 CPUClass *cc = CPU_GET_CLASS(cpu);
261 if (cc->dump_statistics) {
262 cc->dump_statistics(cpu, f, cpu_fprintf, flags);
266 void cpu_reset(CPUState *cpu)
268 CPUClass *klass = CPU_GET_CLASS(cpu);
270 if (klass->reset != NULL) {
271 (*klass->reset)(cpu);
274 trace_guest_cpu_reset(cpu);
277 static void cpu_common_reset(CPUState *cpu)
279 CPUClass *cc = CPU_GET_CLASS(cpu);
281 if (qemu_loglevel_mask(CPU_LOG_RESET)) {
282 qemu_log("CPU Reset (CPU %d)\n", cpu->cpu_index);
283 log_cpu_state(cpu, cc->reset_dump_flags);
286 cpu->interrupt_request = 0;
287 cpu->halted = 0;
288 cpu->mem_io_pc = 0;
289 cpu->mem_io_vaddr = 0;
290 cpu->icount_extra = 0;
291 cpu->icount_decr.u32 = 0;
292 cpu->can_do_io = 1;
293 cpu->exception_index = -1;
294 cpu->crash_occurred = false;
296 if (tcg_enabled()) {
297 cpu_tb_jmp_cache_clear(cpu);
299 tcg_flush_softmmu_tlb(cpu);
303 static bool cpu_common_has_work(CPUState *cs)
305 return false;
308 ObjectClass *cpu_class_by_name(const char *typename, const char *cpu_model)
310 CPUClass *cc = CPU_CLASS(object_class_by_name(typename));
312 return cc->class_by_name(cpu_model);
315 static ObjectClass *cpu_common_class_by_name(const char *cpu_model)
317 return NULL;
320 static void cpu_common_parse_features(const char *typename, char *features,
321 Error **errp)
323 char *featurestr; /* Single "key=value" string being parsed */
324 char *val;
325 static bool cpu_globals_initialized;
327 /* TODO: all callers of ->parse_features() need to be changed to
328 * call it only once, so we can remove this check (or change it
329 * to assert(!cpu_globals_initialized).
330 * Current callers of ->parse_features() are:
331 * - cpu_generic_init()
333 if (cpu_globals_initialized) {
334 return;
336 cpu_globals_initialized = true;
338 featurestr = features ? strtok(features, ",") : NULL;
340 while (featurestr) {
341 val = strchr(featurestr, '=');
342 if (val) {
343 GlobalProperty *prop = g_new0(typeof(*prop), 1);
344 *val = 0;
345 val++;
346 prop->driver = typename;
347 prop->property = g_strdup(featurestr);
348 prop->value = g_strdup(val);
349 prop->errp = &error_fatal;
350 qdev_prop_register_global(prop);
351 } else {
352 error_setg(errp, "Expected key=value format, found %s.",
353 featurestr);
354 return;
356 featurestr = strtok(NULL, ",");
360 static void cpu_common_realizefn(DeviceState *dev, Error **errp)
362 CPUState *cpu = CPU(dev);
364 if (dev->hotplugged) {
365 cpu_synchronize_post_init(cpu);
366 cpu_resume(cpu);
369 /* NOTE: latest generic point where the cpu is fully realized */
370 trace_init_vcpu(cpu);
373 static void cpu_common_unrealizefn(DeviceState *dev, Error **errp)
375 CPUState *cpu = CPU(dev);
376 /* NOTE: latest generic point before the cpu is fully unrealized */
377 trace_fini_vcpu(cpu);
378 cpu_exec_unrealizefn(cpu);
381 static void cpu_common_initfn(Object *obj)
383 uint32_t count;
384 CPUState *cpu = CPU(obj);
385 CPUClass *cc = CPU_GET_CLASS(obj);
387 cpu->cpu_index = UNASSIGNED_CPU_INDEX;
388 cpu->gdb_num_regs = cpu->gdb_num_g_regs = cc->gdb_num_core_regs;
389 /* *-user doesn't have configurable SMP topology */
390 /* the default value is changed by qemu_init_vcpu() for softmmu */
391 cpu->nr_cores = 1;
392 cpu->nr_threads = 1;
394 qemu_mutex_init(&cpu->work_mutex);
395 QTAILQ_INIT(&cpu->breakpoints);
396 QTAILQ_INIT(&cpu->watchpoints);
398 count = trace_get_vcpu_event_count();
399 if (count) {
400 cpu->trace_dstate = bitmap_new(count);
403 cpu_exec_initfn(cpu);
406 static void cpu_common_finalize(Object *obj)
408 CPUState *cpu = CPU(obj);
409 g_free(cpu->trace_dstate);
412 static int64_t cpu_common_get_arch_id(CPUState *cpu)
414 return cpu->cpu_index;
417 static vaddr cpu_adjust_watchpoint_address(CPUState *cpu, vaddr addr, int len)
419 return addr;
422 static void generic_handle_interrupt(CPUState *cpu, int mask)
424 cpu->interrupt_request |= mask;
426 if (!qemu_cpu_is_self(cpu)) {
427 qemu_cpu_kick(cpu);
431 CPUInterruptHandler cpu_interrupt_handler = generic_handle_interrupt;
433 static void cpu_class_init(ObjectClass *klass, void *data)
435 DeviceClass *dc = DEVICE_CLASS(klass);
436 CPUClass *k = CPU_CLASS(klass);
438 k->class_by_name = cpu_common_class_by_name;
439 k->parse_features = cpu_common_parse_features;
440 k->reset = cpu_common_reset;
441 k->get_arch_id = cpu_common_get_arch_id;
442 k->has_work = cpu_common_has_work;
443 k->get_paging_enabled = cpu_common_get_paging_enabled;
444 k->get_memory_mapping = cpu_common_get_memory_mapping;
445 k->write_elf32_qemunote = cpu_common_write_elf32_qemunote;
446 k->write_elf32_note = cpu_common_write_elf32_note;
447 k->write_elf64_qemunote = cpu_common_write_elf64_qemunote;
448 k->write_elf64_note = cpu_common_write_elf64_note;
449 k->gdb_read_register = cpu_common_gdb_read_register;
450 k->gdb_write_register = cpu_common_gdb_write_register;
451 k->virtio_is_big_endian = cpu_common_virtio_is_big_endian;
452 k->debug_excp_handler = cpu_common_noop;
453 k->debug_check_watchpoint = cpu_common_debug_check_watchpoint;
454 k->cpu_exec_enter = cpu_common_noop;
455 k->cpu_exec_exit = cpu_common_noop;
456 k->cpu_exec_interrupt = cpu_common_exec_interrupt;
457 k->adjust_watchpoint_address = cpu_adjust_watchpoint_address;
458 set_bit(DEVICE_CATEGORY_CPU, dc->categories);
459 dc->realize = cpu_common_realizefn;
460 dc->unrealize = cpu_common_unrealizefn;
462 * Reason: CPUs still need special care by board code: wiring up
463 * IRQs, adding reset handlers, halting non-first CPUs, ...
465 dc->user_creatable = false;
468 static const TypeInfo cpu_type_info = {
469 .name = TYPE_CPU,
470 .parent = TYPE_DEVICE,
471 .instance_size = sizeof(CPUState),
472 .instance_init = cpu_common_initfn,
473 .instance_finalize = cpu_common_finalize,
474 .abstract = true,
475 .class_size = sizeof(CPUClass),
476 .class_init = cpu_class_init,
479 static void cpu_register_types(void)
481 type_register_static(&cpu_type_info);
484 type_init(cpu_register_types)