hw: explicitly include qemu-common.h and cpu.h
[qemu/ar7.git] / hw / intc / xics_kvm.c
blob9029d9ee0bd2898025235f8e1c90f73083f4bae1
1 /*
2 * QEMU PowerPC pSeries Logical Partition (aka sPAPR) hardware System Emulator
4 * PAPR Virtualized Interrupt System, aka ICS/ICP aka xics, in-kernel emulation
6 * Copyright (c) 2013 David Gibson, IBM Corporation.
8 * Permission is hereby granted, free of charge, to any person obtaining a copy
9 * of this software and associated documentation files (the "Software"), to deal
10 * in the Software without restriction, including without limitation the rights
11 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
12 * copies of the Software, and to permit persons to whom the Software is
13 * furnished to do so, subject to the following conditions:
15 * The above copyright notice and this permission notice shall be included in
16 * all copies or substantial portions of the Software.
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
23 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
24 * THE SOFTWARE.
28 #include "qemu/osdep.h"
29 #include "qapi/error.h"
30 #include "qemu-common.h"
31 #include "cpu.h"
32 #include "hw/hw.h"
33 #include "trace.h"
34 #include "hw/ppc/spapr.h"
35 #include "hw/ppc/xics.h"
36 #include "kvm_ppc.h"
37 #include "qemu/config-file.h"
38 #include "qemu/error-report.h"
40 #include <sys/ioctl.h>
42 typedef struct KVMXICSState {
43 XICSState parent_obj;
45 int kernel_xics_fd;
46 } KVMXICSState;
49 * ICP-KVM
51 static void icp_get_kvm_state(ICPState *ss)
53 uint64_t state;
54 struct kvm_one_reg reg = {
55 .id = KVM_REG_PPC_ICP_STATE,
56 .addr = (uintptr_t)&state,
58 int ret;
60 /* ICP for this CPU thread is not in use, exiting */
61 if (!ss->cs) {
62 return;
65 ret = kvm_vcpu_ioctl(ss->cs, KVM_GET_ONE_REG, &reg);
66 if (ret != 0) {
67 error_report("Unable to retrieve KVM interrupt controller state"
68 " for CPU %ld: %s", kvm_arch_vcpu_id(ss->cs), strerror(errno));
69 exit(1);
72 ss->xirr = state >> KVM_REG_PPC_ICP_XISR_SHIFT;
73 ss->mfrr = (state >> KVM_REG_PPC_ICP_MFRR_SHIFT)
74 & KVM_REG_PPC_ICP_MFRR_MASK;
75 ss->pending_priority = (state >> KVM_REG_PPC_ICP_PPRI_SHIFT)
76 & KVM_REG_PPC_ICP_PPRI_MASK;
79 static int icp_set_kvm_state(ICPState *ss, int version_id)
81 uint64_t state;
82 struct kvm_one_reg reg = {
83 .id = KVM_REG_PPC_ICP_STATE,
84 .addr = (uintptr_t)&state,
86 int ret;
88 /* ICP for this CPU thread is not in use, exiting */
89 if (!ss->cs) {
90 return 0;
93 state = ((uint64_t)ss->xirr << KVM_REG_PPC_ICP_XISR_SHIFT)
94 | ((uint64_t)ss->mfrr << KVM_REG_PPC_ICP_MFRR_SHIFT)
95 | ((uint64_t)ss->pending_priority << KVM_REG_PPC_ICP_PPRI_SHIFT);
97 ret = kvm_vcpu_ioctl(ss->cs, KVM_SET_ONE_REG, &reg);
98 if (ret != 0) {
99 error_report("Unable to restore KVM interrupt controller state (0x%"
100 PRIx64 ") for CPU %ld: %s", state, kvm_arch_vcpu_id(ss->cs),
101 strerror(errno));
102 return ret;
105 return 0;
108 static void icp_kvm_reset(DeviceState *dev)
110 ICPState *icp = ICP(dev);
112 icp->xirr = 0;
113 icp->pending_priority = 0xff;
114 icp->mfrr = 0xff;
116 /* Make all outputs are deasserted */
117 qemu_set_irq(icp->output, 0);
119 icp_set_kvm_state(icp, 1);
122 static void icp_kvm_class_init(ObjectClass *klass, void *data)
124 DeviceClass *dc = DEVICE_CLASS(klass);
125 ICPStateClass *icpc = ICP_CLASS(klass);
127 dc->reset = icp_kvm_reset;
128 icpc->pre_save = icp_get_kvm_state;
129 icpc->post_load = icp_set_kvm_state;
132 static const TypeInfo icp_kvm_info = {
133 .name = TYPE_KVM_ICP,
134 .parent = TYPE_ICP,
135 .instance_size = sizeof(ICPState),
136 .class_init = icp_kvm_class_init,
137 .class_size = sizeof(ICPStateClass),
141 * ICS-KVM
143 static void ics_get_kvm_state(ICSState *ics)
145 KVMXICSState *icpkvm = KVM_XICS(ics->icp);
146 uint64_t state;
147 struct kvm_device_attr attr = {
148 .flags = 0,
149 .group = KVM_DEV_XICS_GRP_SOURCES,
150 .addr = (uint64_t)(uintptr_t)&state,
152 int i;
154 for (i = 0; i < ics->nr_irqs; i++) {
155 ICSIRQState *irq = &ics->irqs[i];
156 int ret;
158 attr.attr = i + ics->offset;
160 ret = ioctl(icpkvm->kernel_xics_fd, KVM_GET_DEVICE_ATTR, &attr);
161 if (ret != 0) {
162 error_report("Unable to retrieve KVM interrupt controller state"
163 " for IRQ %d: %s", i + ics->offset, strerror(errno));
164 exit(1);
167 irq->server = state & KVM_XICS_DESTINATION_MASK;
168 irq->saved_priority = (state >> KVM_XICS_PRIORITY_SHIFT)
169 & KVM_XICS_PRIORITY_MASK;
171 * To be consistent with the software emulation in xics.c, we
172 * split out the masked state + priority that we get from the
173 * kernel into 'current priority' (0xff if masked) and
174 * 'saved priority' (if masked, this is the priority the
175 * interrupt had before it was masked). Masking and unmasking
176 * are done with the ibm,int-off and ibm,int-on RTAS calls.
178 if (state & KVM_XICS_MASKED) {
179 irq->priority = 0xff;
180 } else {
181 irq->priority = irq->saved_priority;
184 if (state & KVM_XICS_PENDING) {
185 if (state & KVM_XICS_LEVEL_SENSITIVE) {
186 irq->status |= XICS_STATUS_ASSERTED;
187 } else {
189 * A pending edge-triggered interrupt (or MSI)
190 * must have been rejected previously when we
191 * first detected it and tried to deliver it,
192 * so mark it as pending and previously rejected
193 * for consistency with how xics.c works.
195 irq->status |= XICS_STATUS_MASKED_PENDING
196 | XICS_STATUS_REJECTED;
202 static int ics_set_kvm_state(ICSState *ics, int version_id)
204 KVMXICSState *icpkvm = KVM_XICS(ics->icp);
205 uint64_t state;
206 struct kvm_device_attr attr = {
207 .flags = 0,
208 .group = KVM_DEV_XICS_GRP_SOURCES,
209 .addr = (uint64_t)(uintptr_t)&state,
211 int i;
213 for (i = 0; i < ics->nr_irqs; i++) {
214 ICSIRQState *irq = &ics->irqs[i];
215 int ret;
217 attr.attr = i + ics->offset;
219 state = irq->server;
220 state |= (uint64_t)(irq->saved_priority & KVM_XICS_PRIORITY_MASK)
221 << KVM_XICS_PRIORITY_SHIFT;
222 if (irq->priority != irq->saved_priority) {
223 assert(irq->priority == 0xff);
224 state |= KVM_XICS_MASKED;
227 if (ics->irqs[i].flags & XICS_FLAGS_IRQ_LSI) {
228 state |= KVM_XICS_LEVEL_SENSITIVE;
229 if (irq->status & XICS_STATUS_ASSERTED) {
230 state |= KVM_XICS_PENDING;
232 } else {
233 if (irq->status & XICS_STATUS_MASKED_PENDING) {
234 state |= KVM_XICS_PENDING;
238 ret = ioctl(icpkvm->kernel_xics_fd, KVM_SET_DEVICE_ATTR, &attr);
239 if (ret != 0) {
240 error_report("Unable to restore KVM interrupt controller state"
241 " for IRQs %d: %s", i + ics->offset, strerror(errno));
242 return ret;
246 return 0;
249 static void ics_kvm_set_irq(void *opaque, int srcno, int val)
251 ICSState *ics = opaque;
252 struct kvm_irq_level args;
253 int rc;
255 args.irq = srcno + ics->offset;
256 if (ics->irqs[srcno].flags & XICS_FLAGS_IRQ_MSI) {
257 if (!val) {
258 return;
260 args.level = KVM_INTERRUPT_SET;
261 } else {
262 args.level = val ? KVM_INTERRUPT_SET_LEVEL : KVM_INTERRUPT_UNSET;
264 rc = kvm_vm_ioctl(kvm_state, KVM_IRQ_LINE, &args);
265 if (rc < 0) {
266 perror("kvm_irq_line");
270 static void ics_kvm_reset(DeviceState *dev)
272 ICSState *ics = ICS(dev);
273 int i;
274 uint8_t flags[ics->nr_irqs];
276 for (i = 0; i < ics->nr_irqs; i++) {
277 flags[i] = ics->irqs[i].flags;
280 memset(ics->irqs, 0, sizeof(ICSIRQState) * ics->nr_irqs);
282 for (i = 0; i < ics->nr_irqs; i++) {
283 ics->irqs[i].priority = 0xff;
284 ics->irqs[i].saved_priority = 0xff;
285 ics->irqs[i].flags = flags[i];
288 ics_set_kvm_state(ics, 1);
291 static void ics_kvm_realize(DeviceState *dev, Error **errp)
293 ICSState *ics = ICS(dev);
295 if (!ics->nr_irqs) {
296 error_setg(errp, "Number of interrupts needs to be greater 0");
297 return;
299 ics->irqs = g_malloc0(ics->nr_irqs * sizeof(ICSIRQState));
300 ics->qirqs = qemu_allocate_irqs(ics_kvm_set_irq, ics, ics->nr_irqs);
303 static void ics_kvm_class_init(ObjectClass *klass, void *data)
305 DeviceClass *dc = DEVICE_CLASS(klass);
306 ICSStateClass *icsc = ICS_CLASS(klass);
308 dc->realize = ics_kvm_realize;
309 dc->reset = ics_kvm_reset;
310 icsc->pre_save = ics_get_kvm_state;
311 icsc->post_load = ics_set_kvm_state;
314 static const TypeInfo ics_kvm_info = {
315 .name = TYPE_KVM_ICS,
316 .parent = TYPE_ICS,
317 .instance_size = sizeof(ICSState),
318 .class_init = ics_kvm_class_init,
322 * XICS-KVM
324 static void xics_kvm_cpu_setup(XICSState *icp, PowerPCCPU *cpu)
326 CPUState *cs;
327 ICPState *ss;
328 KVMXICSState *icpkvm = KVM_XICS(icp);
330 cs = CPU(cpu);
331 ss = &icp->ss[cs->cpu_index];
333 assert(cs->cpu_index < icp->nr_servers);
334 if (icpkvm->kernel_xics_fd == -1) {
335 abort();
339 * If we are reusing a parked vCPU fd corresponding to the CPU
340 * which was hot-removed earlier we don't have to renable
341 * KVM_CAP_IRQ_XICS capability again.
343 if (ss->cap_irq_xics_enabled) {
344 return;
347 if (icpkvm->kernel_xics_fd != -1) {
348 int ret;
350 ss->cs = cs;
352 ret = kvm_vcpu_enable_cap(cs, KVM_CAP_IRQ_XICS, 0,
353 icpkvm->kernel_xics_fd, kvm_arch_vcpu_id(cs));
354 if (ret < 0) {
355 error_report("Unable to connect CPU%ld to kernel XICS: %s",
356 kvm_arch_vcpu_id(cs), strerror(errno));
357 exit(1);
359 ss->cap_irq_xics_enabled = true;
363 static void xics_kvm_set_nr_irqs(XICSState *icp, uint32_t nr_irqs, Error **errp)
365 icp->nr_irqs = icp->ics->nr_irqs = nr_irqs;
368 static void xics_kvm_set_nr_servers(XICSState *icp, uint32_t nr_servers,
369 Error **errp)
371 int i;
373 icp->nr_servers = nr_servers;
375 icp->ss = g_malloc0(icp->nr_servers*sizeof(ICPState));
376 for (i = 0; i < icp->nr_servers; i++) {
377 char buffer[32];
378 object_initialize(&icp->ss[i], sizeof(icp->ss[i]), TYPE_KVM_ICP);
379 snprintf(buffer, sizeof(buffer), "icp[%d]", i);
380 object_property_add_child(OBJECT(icp), buffer, OBJECT(&icp->ss[i]),
381 errp);
385 static void rtas_dummy(PowerPCCPU *cpu, sPAPRMachineState *spapr,
386 uint32_t token,
387 uint32_t nargs, target_ulong args,
388 uint32_t nret, target_ulong rets)
390 error_report("pseries: %s must never be called for in-kernel XICS",
391 __func__);
394 static void xics_kvm_realize(DeviceState *dev, Error **errp)
396 KVMXICSState *icpkvm = KVM_XICS(dev);
397 XICSState *icp = XICS_COMMON(dev);
398 int i, rc;
399 Error *error = NULL;
400 struct kvm_create_device xics_create_device = {
401 .type = KVM_DEV_TYPE_XICS,
402 .flags = 0,
405 if (!kvm_enabled() || !kvm_check_extension(kvm_state, KVM_CAP_IRQ_XICS)) {
406 error_setg(errp,
407 "KVM and IRQ_XICS capability must be present for in-kernel XICS");
408 goto fail;
411 spapr_rtas_register(RTAS_IBM_SET_XIVE, "ibm,set-xive", rtas_dummy);
412 spapr_rtas_register(RTAS_IBM_GET_XIVE, "ibm,get-xive", rtas_dummy);
413 spapr_rtas_register(RTAS_IBM_INT_OFF, "ibm,int-off", rtas_dummy);
414 spapr_rtas_register(RTAS_IBM_INT_ON, "ibm,int-on", rtas_dummy);
416 rc = kvmppc_define_rtas_kernel_token(RTAS_IBM_SET_XIVE, "ibm,set-xive");
417 if (rc < 0) {
418 error_setg(errp, "kvmppc_define_rtas_kernel_token: ibm,set-xive");
419 goto fail;
422 rc = kvmppc_define_rtas_kernel_token(RTAS_IBM_GET_XIVE, "ibm,get-xive");
423 if (rc < 0) {
424 error_setg(errp, "kvmppc_define_rtas_kernel_token: ibm,get-xive");
425 goto fail;
428 rc = kvmppc_define_rtas_kernel_token(RTAS_IBM_INT_ON, "ibm,int-on");
429 if (rc < 0) {
430 error_setg(errp, "kvmppc_define_rtas_kernel_token: ibm,int-on");
431 goto fail;
434 rc = kvmppc_define_rtas_kernel_token(RTAS_IBM_INT_OFF, "ibm,int-off");
435 if (rc < 0) {
436 error_setg(errp, "kvmppc_define_rtas_kernel_token: ibm,int-off");
437 goto fail;
440 /* Create the kernel ICP */
441 rc = kvm_vm_ioctl(kvm_state, KVM_CREATE_DEVICE, &xics_create_device);
442 if (rc < 0) {
443 error_setg_errno(errp, -rc, "Error on KVM_CREATE_DEVICE for XICS");
444 goto fail;
447 icpkvm->kernel_xics_fd = xics_create_device.fd;
449 object_property_set_bool(OBJECT(icp->ics), true, "realized", &error);
450 if (error) {
451 error_propagate(errp, error);
452 goto fail;
455 assert(icp->nr_servers);
456 for (i = 0; i < icp->nr_servers; i++) {
457 object_property_set_bool(OBJECT(&icp->ss[i]), true, "realized", &error);
458 if (error) {
459 error_propagate(errp, error);
460 goto fail;
464 kvm_kernel_irqchip = true;
465 kvm_msi_via_irqfd_allowed = true;
466 kvm_gsi_direct_mapping = true;
468 return;
470 fail:
471 kvmppc_define_rtas_kernel_token(0, "ibm,set-xive");
472 kvmppc_define_rtas_kernel_token(0, "ibm,get-xive");
473 kvmppc_define_rtas_kernel_token(0, "ibm,int-on");
474 kvmppc_define_rtas_kernel_token(0, "ibm,int-off");
477 static void xics_kvm_initfn(Object *obj)
479 XICSState *xics = XICS_COMMON(obj);
481 xics->ics = ICS(object_new(TYPE_KVM_ICS));
482 object_property_add_child(obj, "ics", OBJECT(xics->ics), NULL);
483 xics->ics->icp = xics;
486 static void xics_kvm_class_init(ObjectClass *oc, void *data)
488 DeviceClass *dc = DEVICE_CLASS(oc);
489 XICSStateClass *xsc = XICS_COMMON_CLASS(oc);
491 dc->realize = xics_kvm_realize;
492 xsc->cpu_setup = xics_kvm_cpu_setup;
493 xsc->set_nr_irqs = xics_kvm_set_nr_irqs;
494 xsc->set_nr_servers = xics_kvm_set_nr_servers;
497 static const TypeInfo xics_kvm_info = {
498 .name = TYPE_KVM_XICS,
499 .parent = TYPE_XICS_COMMON,
500 .instance_size = sizeof(KVMXICSState),
501 .class_init = xics_kvm_class_init,
502 .instance_init = xics_kvm_initfn,
505 static void xics_kvm_register_types(void)
507 type_register_static(&xics_kvm_info);
508 type_register_static(&ics_kvm_info);
509 type_register_static(&icp_kvm_info);
512 type_init(xics_kvm_register_types)