2 * s390 PCI instructions
4 * Copyright 2014 IBM Corp.
5 * Author(s): Frank Blaschka <frank.blaschka@de.ibm.com>
6 * Hong Bo Li <lihbbj@cn.ibm.com>
7 * Yi Min Zhao <zyimin@cn.ibm.com>
9 * This work is licensed under the terms of the GNU GPL, version 2 or (at
10 * your option) any later version. See the COPYING file in the top-level
14 #include "qemu/osdep.h"
15 #include "qemu-common.h"
17 #include "s390-pci-inst.h"
18 #include "s390-pci-bus.h"
19 #include "exec/memory-internal.h"
20 #include "qemu/error-report.h"
21 #include "sysemu/hw_accel.h"
23 #ifndef DEBUG_S390PCI_INST
24 #define DEBUG_S390PCI_INST 0
27 #define DPRINTF(fmt, ...) \
29 if (DEBUG_S390PCI_INST) { \
30 fprintf(stderr, "s390pci-inst: " fmt, ## __VA_ARGS__); \
34 static void s390_set_status_code(CPUS390XState
*env
,
35 uint8_t r
, uint64_t status_code
)
37 env
->regs
[r
] &= ~0xff000000ULL
;
38 env
->regs
[r
] |= (status_code
& 0xff) << 24;
41 static int list_pci(ClpReqRspListPci
*rrb
, uint8_t *cc
)
43 S390PCIBusDevice
*pbdev
= NULL
;
44 S390pciState
*s
= s390_get_phb();
45 uint32_t res_code
, initial_l2
, g_l2
;
47 uint64_t resume_token
;
50 if (lduw_p(&rrb
->request
.hdr
.len
) != 32) {
51 res_code
= CLP_RC_LEN
;
56 if ((ldl_p(&rrb
->request
.fmt
) & CLP_MASK_FMT
) != 0) {
57 res_code
= CLP_RC_FMT
;
62 if ((ldl_p(&rrb
->request
.fmt
) & ~CLP_MASK_FMT
) != 0 ||
63 ldq_p(&rrb
->request
.reserved1
) != 0) {
64 res_code
= CLP_RC_RESNOT0
;
69 resume_token
= ldq_p(&rrb
->request
.resume_token
);
72 pbdev
= s390_pci_find_dev_by_idx(s
, resume_token
);
74 res_code
= CLP_RC_LISTPCI_BADRT
;
79 pbdev
= s390_pci_find_next_avail_dev(s
, NULL
);
82 if (lduw_p(&rrb
->response
.hdr
.len
) < 48) {
88 initial_l2
= lduw_p(&rrb
->response
.hdr
.len
);
89 if ((initial_l2
- LIST_PCI_HDR_LEN
) % sizeof(ClpFhListEntry
)
91 res_code
= CLP_RC_LEN
;
97 stl_p(&rrb
->response
.fmt
, 0);
98 stq_p(&rrb
->response
.reserved1
, 0);
99 stl_p(&rrb
->response
.mdd
, FH_MASK_SHM
);
100 stw_p(&rrb
->response
.max_fn
, PCI_MAX_FUNCTIONS
);
101 rrb
->response
.flags
= UID_CHECKING_ENABLED
;
102 rrb
->response
.entry_size
= sizeof(ClpFhListEntry
);
105 g_l2
= LIST_PCI_HDR_LEN
;
106 while (g_l2
< initial_l2
&& pbdev
) {
107 stw_p(&rrb
->response
.fh_list
[i
].device_id
,
108 pci_get_word(pbdev
->pdev
->config
+ PCI_DEVICE_ID
));
109 stw_p(&rrb
->response
.fh_list
[i
].vendor_id
,
110 pci_get_word(pbdev
->pdev
->config
+ PCI_VENDOR_ID
));
111 /* Ignore RESERVED devices. */
112 stl_p(&rrb
->response
.fh_list
[i
].config
,
113 pbdev
->state
== ZPCI_FS_STANDBY
? 0 : 1 << 31);
114 stl_p(&rrb
->response
.fh_list
[i
].fid
, pbdev
->fid
);
115 stl_p(&rrb
->response
.fh_list
[i
].fh
, pbdev
->fh
);
117 g_l2
+= sizeof(ClpFhListEntry
);
118 /* Add endian check for DPRINTF? */
119 DPRINTF("g_l2 %d vendor id 0x%x device id 0x%x fid 0x%x fh 0x%x\n",
121 lduw_p(&rrb
->response
.fh_list
[i
].vendor_id
),
122 lduw_p(&rrb
->response
.fh_list
[i
].device_id
),
123 ldl_p(&rrb
->response
.fh_list
[i
].fid
),
124 ldl_p(&rrb
->response
.fh_list
[i
].fh
));
125 pbdev
= s390_pci_find_next_avail_dev(s
, pbdev
);
132 resume_token
= pbdev
->fh
& FH_MASK_INDEX
;
134 stq_p(&rrb
->response
.resume_token
, resume_token
);
135 stw_p(&rrb
->response
.hdr
.len
, g_l2
);
136 stw_p(&rrb
->response
.hdr
.rsp
, CLP_RC_OK
);
139 DPRINTF("list pci failed rc 0x%x\n", rc
);
140 stw_p(&rrb
->response
.hdr
.rsp
, res_code
);
145 int clp_service_call(S390CPU
*cpu
, uint8_t r2
, uintptr_t ra
)
149 S390PCIBusDevice
*pbdev
;
152 uint8_t buffer
[4096 * 2];
154 CPUS390XState
*env
= &cpu
->env
;
155 S390pciState
*s
= s390_get_phb();
158 cpu_synchronize_state(CPU(cpu
));
160 if (env
->psw
.mask
& PSW_MASK_PSTATE
) {
161 s390_program_interrupt(env
, PGM_PRIVILEGED
, 4, ra
);
165 if (s390_cpu_virt_mem_read(cpu
, env
->regs
[r2
], r2
, buffer
, sizeof(*reqh
))) {
168 reqh
= (ClpReqHdr
*)buffer
;
169 req_len
= lduw_p(&reqh
->len
);
170 if (req_len
< 16 || req_len
> 8184 || (req_len
% 8 != 0)) {
171 s390_program_interrupt(env
, PGM_OPERAND
, 4, ra
);
175 if (s390_cpu_virt_mem_read(cpu
, env
->regs
[r2
], r2
, buffer
,
176 req_len
+ sizeof(*resh
))) {
179 resh
= (ClpRspHdr
*)(buffer
+ req_len
);
180 res_len
= lduw_p(&resh
->len
);
181 if (res_len
< 8 || res_len
> 8176 || (res_len
% 8 != 0)) {
182 s390_program_interrupt(env
, PGM_OPERAND
, 4, ra
);
185 if ((req_len
+ res_len
) > 8192) {
186 s390_program_interrupt(env
, PGM_OPERAND
, 4, ra
);
190 if (s390_cpu_virt_mem_read(cpu
, env
->regs
[r2
], r2
, buffer
,
191 req_len
+ res_len
)) {
196 stw_p(&resh
->rsp
, CLP_RC_LEN
);
200 switch (lduw_p(&reqh
->cmd
)) {
202 ClpReqRspListPci
*rrb
= (ClpReqRspListPci
*)buffer
;
206 case CLP_SET_PCI_FN
: {
207 ClpReqSetPci
*reqsetpci
= (ClpReqSetPci
*)reqh
;
208 ClpRspSetPci
*ressetpci
= (ClpRspSetPci
*)resh
;
210 pbdev
= s390_pci_find_dev_by_fh(s
, ldl_p(&reqsetpci
->fh
));
212 stw_p(&ressetpci
->hdr
.rsp
, CLP_RC_SETPCIFN_FH
);
216 switch (reqsetpci
->oc
) {
217 case CLP_SET_ENABLE_PCI_FN
:
218 switch (reqsetpci
->ndas
) {
220 stw_p(&ressetpci
->hdr
.rsp
, CLP_RC_SETPCIFN_DMAAS
);
225 stw_p(&ressetpci
->hdr
.rsp
, CLP_RC_SETPCIFN_RES
);
229 if (pbdev
->fh
& FH_MASK_ENABLE
) {
230 stw_p(&ressetpci
->hdr
.rsp
, CLP_RC_SETPCIFN_FHOP
);
234 pbdev
->fh
|= FH_MASK_ENABLE
;
235 pbdev
->state
= ZPCI_FS_ENABLED
;
236 stl_p(&ressetpci
->fh
, pbdev
->fh
);
237 stw_p(&ressetpci
->hdr
.rsp
, CLP_RC_OK
);
239 case CLP_SET_DISABLE_PCI_FN
:
240 if (!(pbdev
->fh
& FH_MASK_ENABLE
)) {
241 stw_p(&ressetpci
->hdr
.rsp
, CLP_RC_SETPCIFN_FHOP
);
244 device_reset(DEVICE(pbdev
));
245 pbdev
->fh
&= ~FH_MASK_ENABLE
;
246 pbdev
->state
= ZPCI_FS_DISABLED
;
247 stl_p(&ressetpci
->fh
, pbdev
->fh
);
248 stw_p(&ressetpci
->hdr
.rsp
, CLP_RC_OK
);
251 DPRINTF("unknown set pci command\n");
252 stw_p(&ressetpci
->hdr
.rsp
, CLP_RC_SETPCIFN_FHOP
);
257 case CLP_QUERY_PCI_FN
: {
258 ClpReqQueryPci
*reqquery
= (ClpReqQueryPci
*)reqh
;
259 ClpRspQueryPci
*resquery
= (ClpRspQueryPci
*)resh
;
261 pbdev
= s390_pci_find_dev_by_fh(s
, ldl_p(&reqquery
->fh
));
263 DPRINTF("query pci no pci dev\n");
264 stw_p(&resquery
->hdr
.rsp
, CLP_RC_SETPCIFN_FH
);
268 for (i
= 0; i
< PCI_BAR_COUNT
; i
++) {
269 uint32_t data
= pci_get_long(pbdev
->pdev
->config
+
270 PCI_BASE_ADDRESS_0
+ (i
* 4));
272 stl_p(&resquery
->bar
[i
], data
);
273 resquery
->bar_size
[i
] = pbdev
->pdev
->io_regions
[i
].size
?
274 ctz64(pbdev
->pdev
->io_regions
[i
].size
) : 0;
275 DPRINTF("bar %d addr 0x%x size 0x%" PRIx64
"barsize 0x%x\n", i
,
276 ldl_p(&resquery
->bar
[i
]),
277 pbdev
->pdev
->io_regions
[i
].size
,
278 resquery
->bar_size
[i
]);
281 stq_p(&resquery
->sdma
, ZPCI_SDMA_ADDR
);
282 stq_p(&resquery
->edma
, ZPCI_EDMA_ADDR
);
283 stl_p(&resquery
->fid
, pbdev
->fid
);
284 stw_p(&resquery
->pchid
, 0);
285 stw_p(&resquery
->ug
, 1);
286 stl_p(&resquery
->uid
, pbdev
->uid
);
287 stw_p(&resquery
->hdr
.rsp
, CLP_RC_OK
);
290 case CLP_QUERY_PCI_FNGRP
: {
291 ClpRspQueryPciGrp
*resgrp
= (ClpRspQueryPciGrp
*)resh
;
293 stq_p(&resgrp
->dasm
, 0);
294 stq_p(&resgrp
->msia
, ZPCI_MSI_ADDR
);
295 stw_p(&resgrp
->mui
, 0);
296 stw_p(&resgrp
->i
, 128);
299 stw_p(&resgrp
->hdr
.rsp
, CLP_RC_OK
);
303 DPRINTF("unknown clp command\n");
304 stw_p(&resh
->rsp
, CLP_RC_CMD
);
309 if (s390_cpu_virt_mem_write(cpu
, env
->regs
[r2
], r2
, buffer
,
310 req_len
+ res_len
)) {
317 int pcilg_service_call(S390CPU
*cpu
, uint8_t r1
, uint8_t r2
, uintptr_t ra
)
319 CPUS390XState
*env
= &cpu
->env
;
320 S390PCIBusDevice
*pbdev
;
329 cpu_synchronize_state(CPU(cpu
));
331 if (env
->psw
.mask
& PSW_MASK_PSTATE
) {
332 s390_program_interrupt(env
, PGM_PRIVILEGED
, 4, ra
);
337 s390_program_interrupt(env
, PGM_SPECIFICATION
, 4, ra
);
341 fh
= env
->regs
[r2
] >> 32;
342 pcias
= (env
->regs
[r2
] >> 16) & 0xf;
343 len
= env
->regs
[r2
] & 0xf;
344 offset
= env
->regs
[r2
+ 1];
346 pbdev
= s390_pci_find_dev_by_fh(s390_get_phb(), fh
);
348 DPRINTF("pcilg no pci dev\n");
349 setcc(cpu
, ZPCI_PCI_LS_INVAL_HANDLE
);
353 switch (pbdev
->state
) {
354 case ZPCI_FS_RESERVED
:
355 case ZPCI_FS_STANDBY
:
356 case ZPCI_FS_DISABLED
:
357 case ZPCI_FS_PERMANENT_ERROR
:
358 setcc(cpu
, ZPCI_PCI_LS_INVAL_HANDLE
);
361 setcc(cpu
, ZPCI_PCI_LS_ERR
);
362 s390_set_status_code(env
, r2
, ZPCI_PCI_ST_BLOCKED
);
369 if ((8 - (offset
& 0x7)) < len
) {
370 s390_program_interrupt(env
, PGM_OPERAND
, 4, ra
);
373 mr
= pbdev
->pdev
->io_regions
[pcias
].memory
;
374 result
= memory_region_dispatch_read(mr
, offset
, &data
, len
,
375 MEMTXATTRS_UNSPECIFIED
);
376 if (result
!= MEMTX_OK
) {
377 s390_program_interrupt(env
, PGM_OPERAND
, 4, ra
);
380 } else if (pcias
== 15) {
381 if ((4 - (offset
& 0x3)) < len
) {
382 s390_program_interrupt(env
, PGM_OPERAND
, 4, ra
);
385 data
= pci_host_config_read_common(
386 pbdev
->pdev
, offset
, pci_config_size(pbdev
->pdev
), len
);
392 data
= bswap16(data
);
395 data
= bswap32(data
);
398 data
= bswap64(data
);
401 s390_program_interrupt(env
, PGM_OPERAND
, 4, ra
);
405 DPRINTF("invalid space\n");
406 setcc(cpu
, ZPCI_PCI_LS_ERR
);
407 s390_set_status_code(env
, r2
, ZPCI_PCI_ST_INVAL_AS
);
411 env
->regs
[r1
] = data
;
412 setcc(cpu
, ZPCI_PCI_LS_OK
);
416 static int trap_msix(S390PCIBusDevice
*pbdev
, uint64_t offset
, uint8_t pcias
)
418 if (pbdev
->msix
.available
&& pbdev
->msix
.table_bar
== pcias
&&
419 offset
>= pbdev
->msix
.table_offset
&&
420 offset
< (pbdev
->msix
.table_offset
+
421 pbdev
->msix
.entries
* PCI_MSIX_ENTRY_SIZE
)) {
428 int pcistg_service_call(S390CPU
*cpu
, uint8_t r1
, uint8_t r2
, uintptr_t ra
)
430 CPUS390XState
*env
= &cpu
->env
;
431 uint64_t offset
, data
;
432 S390PCIBusDevice
*pbdev
;
439 cpu_synchronize_state(CPU(cpu
));
441 if (env
->psw
.mask
& PSW_MASK_PSTATE
) {
442 s390_program_interrupt(env
, PGM_PRIVILEGED
, 4, ra
);
447 s390_program_interrupt(env
, PGM_SPECIFICATION
, 4, ra
);
451 fh
= env
->regs
[r2
] >> 32;
452 pcias
= (env
->regs
[r2
] >> 16) & 0xf;
453 len
= env
->regs
[r2
] & 0xf;
454 offset
= env
->regs
[r2
+ 1];
456 pbdev
= s390_pci_find_dev_by_fh(s390_get_phb(), fh
);
458 DPRINTF("pcistg no pci dev\n");
459 setcc(cpu
, ZPCI_PCI_LS_INVAL_HANDLE
);
463 switch (pbdev
->state
) {
464 case ZPCI_FS_RESERVED
:
465 case ZPCI_FS_STANDBY
:
466 case ZPCI_FS_DISABLED
:
467 case ZPCI_FS_PERMANENT_ERROR
:
468 setcc(cpu
, ZPCI_PCI_LS_INVAL_HANDLE
);
471 setcc(cpu
, ZPCI_PCI_LS_ERR
);
472 s390_set_status_code(env
, r2
, ZPCI_PCI_ST_BLOCKED
);
478 data
= env
->regs
[r1
];
480 if ((8 - (offset
& 0x7)) < len
) {
481 s390_program_interrupt(env
, PGM_OPERAND
, 4, ra
);
485 if (trap_msix(pbdev
, offset
, pcias
)) {
486 offset
= offset
- pbdev
->msix
.table_offset
;
487 mr
= &pbdev
->pdev
->msix_table_mmio
;
489 mr
= pbdev
->pdev
->io_regions
[pcias
].memory
;
492 result
= memory_region_dispatch_write(mr
, offset
, data
, len
,
493 MEMTXATTRS_UNSPECIFIED
);
494 if (result
!= MEMTX_OK
) {
495 s390_program_interrupt(env
, PGM_OPERAND
, 4, ra
);
498 } else if (pcias
== 15) {
499 if ((4 - (offset
& 0x3)) < len
) {
500 s390_program_interrupt(env
, PGM_OPERAND
, 4, ra
);
507 data
= bswap16(data
);
510 data
= bswap32(data
);
513 data
= bswap64(data
);
516 s390_program_interrupt(env
, PGM_OPERAND
, 4, ra
);
520 pci_host_config_write_common(pbdev
->pdev
, offset
,
521 pci_config_size(pbdev
->pdev
),
524 DPRINTF("pcistg invalid space\n");
525 setcc(cpu
, ZPCI_PCI_LS_ERR
);
526 s390_set_status_code(env
, r2
, ZPCI_PCI_ST_INVAL_AS
);
530 setcc(cpu
, ZPCI_PCI_LS_OK
);
534 int rpcit_service_call(S390CPU
*cpu
, uint8_t r1
, uint8_t r2
, uintptr_t ra
)
536 CPUS390XState
*env
= &cpu
->env
;
538 S390PCIBusDevice
*pbdev
;
542 IOMMUMemoryRegion
*iommu_mr
;
543 IOMMUMemoryRegionClass
*imrc
;
545 cpu_synchronize_state(CPU(cpu
));
547 if (env
->psw
.mask
& PSW_MASK_PSTATE
) {
548 s390_program_interrupt(env
, PGM_PRIVILEGED
, 4, ra
);
553 s390_program_interrupt(env
, PGM_SPECIFICATION
, 4, ra
);
557 fh
= env
->regs
[r1
] >> 32;
558 start
= env
->regs
[r2
];
559 end
= start
+ env
->regs
[r2
+ 1];
561 pbdev
= s390_pci_find_dev_by_fh(s390_get_phb(), fh
);
563 DPRINTF("rpcit no pci dev\n");
564 setcc(cpu
, ZPCI_PCI_LS_INVAL_HANDLE
);
568 switch (pbdev
->state
) {
569 case ZPCI_FS_RESERVED
:
570 case ZPCI_FS_STANDBY
:
571 case ZPCI_FS_DISABLED
:
572 case ZPCI_FS_PERMANENT_ERROR
:
573 setcc(cpu
, ZPCI_PCI_LS_INVAL_HANDLE
);
576 setcc(cpu
, ZPCI_PCI_LS_ERR
);
577 s390_set_status_code(env
, r1
, ZPCI_MOD_ST_ERROR_RECOVER
);
583 iommu
= pbdev
->iommu
;
584 if (!iommu
->g_iota
) {
585 pbdev
->state
= ZPCI_FS_ERROR
;
586 setcc(cpu
, ZPCI_PCI_LS_ERR
);
587 s390_set_status_code(env
, r1
, ZPCI_PCI_ST_INSUF_RES
);
588 s390_pci_generate_error_event(ERR_EVENT_INVALAS
, pbdev
->fh
, pbdev
->fid
,
593 if (end
< iommu
->pba
|| start
> iommu
->pal
) {
594 pbdev
->state
= ZPCI_FS_ERROR
;
595 setcc(cpu
, ZPCI_PCI_LS_ERR
);
596 s390_set_status_code(env
, r1
, ZPCI_PCI_ST_INSUF_RES
);
597 s390_pci_generate_error_event(ERR_EVENT_OORANGE
, pbdev
->fh
, pbdev
->fid
,
602 iommu_mr
= &iommu
->iommu_mr
;
603 imrc
= IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr
);
605 while (start
< end
) {
606 entry
= imrc
->translate(iommu_mr
, start
, IOMMU_NONE
);
608 if (!entry
.translated_addr
) {
609 pbdev
->state
= ZPCI_FS_ERROR
;
610 setcc(cpu
, ZPCI_PCI_LS_ERR
);
611 s390_set_status_code(env
, r1
, ZPCI_PCI_ST_INSUF_RES
);
612 s390_pci_generate_error_event(ERR_EVENT_SERR
, pbdev
->fh
, pbdev
->fid
,
613 start
, ERR_EVENT_Q_BIT
);
617 memory_region_notify_iommu(iommu_mr
, entry
);
618 start
+= entry
.addr_mask
+ 1;
621 setcc(cpu
, ZPCI_PCI_LS_OK
);
626 int pcistb_service_call(S390CPU
*cpu
, uint8_t r1
, uint8_t r3
, uint64_t gaddr
,
627 uint8_t ar
, uintptr_t ra
)
629 CPUS390XState
*env
= &cpu
->env
;
630 S390PCIBusDevice
*pbdev
;
639 if (env
->psw
.mask
& PSW_MASK_PSTATE
) {
640 s390_program_interrupt(env
, PGM_PRIVILEGED
, 6, ra
);
644 fh
= env
->regs
[r1
] >> 32;
645 pcias
= (env
->regs
[r1
] >> 16) & 0xf;
646 len
= env
->regs
[r1
] & 0xff;
649 DPRINTF("pcistb invalid space\n");
650 setcc(cpu
, ZPCI_PCI_LS_ERR
);
651 s390_set_status_code(env
, r1
, ZPCI_PCI_ST_INVAL_AS
);
662 s390_program_interrupt(env
, PGM_SPECIFICATION
, 6, ra
);
666 pbdev
= s390_pci_find_dev_by_fh(s390_get_phb(), fh
);
668 DPRINTF("pcistb no pci dev fh 0x%x\n", fh
);
669 setcc(cpu
, ZPCI_PCI_LS_INVAL_HANDLE
);
673 switch (pbdev
->state
) {
674 case ZPCI_FS_RESERVED
:
675 case ZPCI_FS_STANDBY
:
676 case ZPCI_FS_DISABLED
:
677 case ZPCI_FS_PERMANENT_ERROR
:
678 setcc(cpu
, ZPCI_PCI_LS_INVAL_HANDLE
);
681 setcc(cpu
, ZPCI_PCI_LS_ERR
);
682 s390_set_status_code(env
, r1
, ZPCI_PCI_ST_BLOCKED
);
688 mr
= pbdev
->pdev
->io_regions
[pcias
].memory
;
689 if (!memory_region_access_valid(mr
, env
->regs
[r3
], len
, true)) {
690 s390_program_interrupt(env
, PGM_OPERAND
, 6, ra
);
694 if (s390_cpu_virt_mem_read(cpu
, gaddr
, ar
, buffer
, len
)) {
698 for (i
= 0; i
< len
/ 8; i
++) {
699 result
= memory_region_dispatch_write(mr
, env
->regs
[r3
] + i
* 8,
700 ldq_p(buffer
+ i
* 8), 8,
701 MEMTXATTRS_UNSPECIFIED
);
702 if (result
!= MEMTX_OK
) {
703 s390_program_interrupt(env
, PGM_OPERAND
, 6, ra
);
708 setcc(cpu
, ZPCI_PCI_LS_OK
);
712 static int reg_irqs(CPUS390XState
*env
, S390PCIBusDevice
*pbdev
, ZpciFib fib
)
715 uint8_t isc
= FIB_DATA_ISC(ldl_p(&fib
.data
));
717 pbdev
->routes
.adapter
.adapter_id
= css_get_adapter_id(
718 CSS_IO_ADAPTER_PCI
, isc
);
719 pbdev
->summary_ind
= get_indicator(ldq_p(&fib
.aisb
), sizeof(uint64_t));
720 len
= BITS_TO_LONGS(FIB_DATA_NOI(ldl_p(&fib
.data
))) * sizeof(unsigned long);
721 pbdev
->indicator
= get_indicator(ldq_p(&fib
.aibv
), len
);
723 ret
= map_indicator(&pbdev
->routes
.adapter
, pbdev
->summary_ind
);
728 ret
= map_indicator(&pbdev
->routes
.adapter
, pbdev
->indicator
);
733 pbdev
->routes
.adapter
.summary_addr
= ldq_p(&fib
.aisb
);
734 pbdev
->routes
.adapter
.summary_offset
= FIB_DATA_AISBO(ldl_p(&fib
.data
));
735 pbdev
->routes
.adapter
.ind_addr
= ldq_p(&fib
.aibv
);
736 pbdev
->routes
.adapter
.ind_offset
= FIB_DATA_AIBVO(ldl_p(&fib
.data
));
738 pbdev
->noi
= FIB_DATA_NOI(ldl_p(&fib
.data
));
739 pbdev
->sum
= FIB_DATA_SUM(ldl_p(&fib
.data
));
741 DPRINTF("reg_irqs adapter id %d\n", pbdev
->routes
.adapter
.adapter_id
);
744 release_indicator(&pbdev
->routes
.adapter
, pbdev
->summary_ind
);
745 release_indicator(&pbdev
->routes
.adapter
, pbdev
->indicator
);
746 pbdev
->summary_ind
= NULL
;
747 pbdev
->indicator
= NULL
;
751 int pci_dereg_irqs(S390PCIBusDevice
*pbdev
)
753 release_indicator(&pbdev
->routes
.adapter
, pbdev
->summary_ind
);
754 release_indicator(&pbdev
->routes
.adapter
, pbdev
->indicator
);
756 pbdev
->summary_ind
= NULL
;
757 pbdev
->indicator
= NULL
;
758 pbdev
->routes
.adapter
.summary_addr
= 0;
759 pbdev
->routes
.adapter
.summary_offset
= 0;
760 pbdev
->routes
.adapter
.ind_addr
= 0;
761 pbdev
->routes
.adapter
.ind_offset
= 0;
766 DPRINTF("dereg_irqs adapter id %d\n", pbdev
->routes
.adapter
.adapter_id
);
770 static int reg_ioat(CPUS390XState
*env
, S390PCIIOMMU
*iommu
, ZpciFib fib
,
773 uint64_t pba
= ldq_p(&fib
.pba
);
774 uint64_t pal
= ldq_p(&fib
.pal
);
775 uint64_t g_iota
= ldq_p(&fib
.iota
);
776 uint8_t dt
= (g_iota
>> 2) & 0x7;
777 uint8_t t
= (g_iota
>> 11) & 0x1;
779 if (pba
> pal
|| pba
< ZPCI_SDMA_ADDR
|| pal
> ZPCI_EDMA_ADDR
) {
780 s390_program_interrupt(env
, PGM_OPERAND
, 6, ra
);
784 /* currently we only support designation type 1 with translation */
785 if (!(dt
== ZPCI_IOTA_RTTO
&& t
)) {
786 error_report("unsupported ioat dt %d t %d", dt
, t
);
787 s390_program_interrupt(env
, PGM_OPERAND
, 6, ra
);
793 iommu
->g_iota
= g_iota
;
795 s390_pci_iommu_enable(iommu
);
800 void pci_dereg_ioat(S390PCIIOMMU
*iommu
)
802 s390_pci_iommu_disable(iommu
);
808 int mpcifc_service_call(S390CPU
*cpu
, uint8_t r1
, uint64_t fiba
, uint8_t ar
,
811 CPUS390XState
*env
= &cpu
->env
;
815 S390PCIBusDevice
*pbdev
;
816 uint64_t cc
= ZPCI_PCI_LS_OK
;
818 if (env
->psw
.mask
& PSW_MASK_PSTATE
) {
819 s390_program_interrupt(env
, PGM_PRIVILEGED
, 6, ra
);
823 oc
= env
->regs
[r1
] & 0xff;
824 dmaas
= (env
->regs
[r1
] >> 16) & 0xff;
825 fh
= env
->regs
[r1
] >> 32;
828 s390_program_interrupt(env
, PGM_SPECIFICATION
, 6, ra
);
832 pbdev
= s390_pci_find_dev_by_fh(s390_get_phb(), fh
);
834 DPRINTF("mpcifc no pci dev fh 0x%x\n", fh
);
835 setcc(cpu
, ZPCI_PCI_LS_INVAL_HANDLE
);
839 switch (pbdev
->state
) {
840 case ZPCI_FS_RESERVED
:
841 case ZPCI_FS_STANDBY
:
842 case ZPCI_FS_DISABLED
:
843 case ZPCI_FS_PERMANENT_ERROR
:
844 setcc(cpu
, ZPCI_PCI_LS_INVAL_HANDLE
);
850 if (s390_cpu_virt_mem_read(cpu
, fiba
, ar
, (uint8_t *)&fib
, sizeof(fib
))) {
855 s390_program_interrupt(env
, PGM_OPERAND
, 6, ra
);
860 case ZPCI_MOD_FC_REG_INT
:
861 if (pbdev
->summary_ind
) {
862 cc
= ZPCI_PCI_LS_ERR
;
863 s390_set_status_code(env
, r1
, ZPCI_MOD_ST_SEQUENCE
);
864 } else if (reg_irqs(env
, pbdev
, fib
)) {
865 cc
= ZPCI_PCI_LS_ERR
;
866 s390_set_status_code(env
, r1
, ZPCI_MOD_ST_RES_NOT_AVAIL
);
869 case ZPCI_MOD_FC_DEREG_INT
:
870 if (!pbdev
->summary_ind
) {
871 cc
= ZPCI_PCI_LS_ERR
;
872 s390_set_status_code(env
, r1
, ZPCI_MOD_ST_SEQUENCE
);
874 pci_dereg_irqs(pbdev
);
877 case ZPCI_MOD_FC_REG_IOAT
:
879 cc
= ZPCI_PCI_LS_ERR
;
880 s390_set_status_code(env
, r1
, ZPCI_MOD_ST_DMAAS_INVAL
);
881 } else if (pbdev
->iommu
->enabled
) {
882 cc
= ZPCI_PCI_LS_ERR
;
883 s390_set_status_code(env
, r1
, ZPCI_MOD_ST_SEQUENCE
);
884 } else if (reg_ioat(env
, pbdev
->iommu
, fib
, ra
)) {
885 cc
= ZPCI_PCI_LS_ERR
;
886 s390_set_status_code(env
, r1
, ZPCI_MOD_ST_INSUF_RES
);
889 case ZPCI_MOD_FC_DEREG_IOAT
:
891 cc
= ZPCI_PCI_LS_ERR
;
892 s390_set_status_code(env
, r1
, ZPCI_MOD_ST_DMAAS_INVAL
);
893 } else if (!pbdev
->iommu
->enabled
) {
894 cc
= ZPCI_PCI_LS_ERR
;
895 s390_set_status_code(env
, r1
, ZPCI_MOD_ST_SEQUENCE
);
897 pci_dereg_ioat(pbdev
->iommu
);
900 case ZPCI_MOD_FC_REREG_IOAT
:
902 cc
= ZPCI_PCI_LS_ERR
;
903 s390_set_status_code(env
, r1
, ZPCI_MOD_ST_DMAAS_INVAL
);
904 } else if (!pbdev
->iommu
->enabled
) {
905 cc
= ZPCI_PCI_LS_ERR
;
906 s390_set_status_code(env
, r1
, ZPCI_MOD_ST_SEQUENCE
);
908 pci_dereg_ioat(pbdev
->iommu
);
909 if (reg_ioat(env
, pbdev
->iommu
, fib
, ra
)) {
910 cc
= ZPCI_PCI_LS_ERR
;
911 s390_set_status_code(env
, r1
, ZPCI_MOD_ST_INSUF_RES
);
915 case ZPCI_MOD_FC_RESET_ERROR
:
916 switch (pbdev
->state
) {
917 case ZPCI_FS_BLOCKED
:
919 pbdev
->state
= ZPCI_FS_ENABLED
;
922 cc
= ZPCI_PCI_LS_ERR
;
923 s390_set_status_code(env
, r1
, ZPCI_MOD_ST_SEQUENCE
);
926 case ZPCI_MOD_FC_RESET_BLOCK
:
927 switch (pbdev
->state
) {
929 pbdev
->state
= ZPCI_FS_BLOCKED
;
932 cc
= ZPCI_PCI_LS_ERR
;
933 s390_set_status_code(env
, r1
, ZPCI_MOD_ST_SEQUENCE
);
936 case ZPCI_MOD_FC_SET_MEASURE
:
937 pbdev
->fmb_addr
= ldq_p(&fib
.fmb_addr
);
940 s390_program_interrupt(&cpu
->env
, PGM_OPERAND
, 6, ra
);
941 cc
= ZPCI_PCI_LS_ERR
;
948 int stpcifc_service_call(S390CPU
*cpu
, uint8_t r1
, uint64_t fiba
, uint8_t ar
,
951 CPUS390XState
*env
= &cpu
->env
;
955 S390PCIBusDevice
*pbdev
;
957 uint64_t cc
= ZPCI_PCI_LS_OK
;
959 if (env
->psw
.mask
& PSW_MASK_PSTATE
) {
960 s390_program_interrupt(env
, PGM_PRIVILEGED
, 6, ra
);
964 fh
= env
->regs
[r1
] >> 32;
965 dmaas
= (env
->regs
[r1
] >> 16) & 0xff;
968 setcc(cpu
, ZPCI_PCI_LS_ERR
);
969 s390_set_status_code(env
, r1
, ZPCI_STPCIFC_ST_INVAL_DMAAS
);
974 s390_program_interrupt(env
, PGM_SPECIFICATION
, 6, ra
);
978 pbdev
= s390_pci_find_dev_by_idx(s390_get_phb(), fh
& FH_MASK_INDEX
);
980 setcc(cpu
, ZPCI_PCI_LS_INVAL_HANDLE
);
984 memset(&fib
, 0, sizeof(fib
));
986 switch (pbdev
->state
) {
987 case ZPCI_FS_RESERVED
:
988 case ZPCI_FS_STANDBY
:
989 setcc(cpu
, ZPCI_PCI_LS_INVAL_HANDLE
);
991 case ZPCI_FS_DISABLED
:
992 if (fh
& FH_MASK_ENABLE
) {
993 setcc(cpu
, ZPCI_PCI_LS_INVAL_HANDLE
);
997 /* BLOCKED bit is set to one coincident with the setting of ERROR bit.
998 * FH Enabled bit is set to one in states of ENABLED, BLOCKED or ERROR. */
1001 case ZPCI_FS_BLOCKED
:
1003 case ZPCI_FS_ENABLED
:
1005 if (pbdev
->iommu
->enabled
) {
1008 if (!(fh
& FH_MASK_ENABLE
)) {
1009 env
->regs
[r1
] |= 1ULL << 63;
1012 case ZPCI_FS_PERMANENT_ERROR
:
1013 setcc(cpu
, ZPCI_PCI_LS_ERR
);
1014 s390_set_status_code(env
, r1
, ZPCI_STPCIFC_ST_PERM_ERROR
);
1018 stq_p(&fib
.pba
, pbdev
->iommu
->pba
);
1019 stq_p(&fib
.pal
, pbdev
->iommu
->pal
);
1020 stq_p(&fib
.iota
, pbdev
->iommu
->g_iota
);
1021 stq_p(&fib
.aibv
, pbdev
->routes
.adapter
.ind_addr
);
1022 stq_p(&fib
.aisb
, pbdev
->routes
.adapter
.summary_addr
);
1023 stq_p(&fib
.fmb_addr
, pbdev
->fmb_addr
);
1025 data
= ((uint32_t)pbdev
->isc
<< 28) | ((uint32_t)pbdev
->noi
<< 16) |
1026 ((uint32_t)pbdev
->routes
.adapter
.ind_offset
<< 8) |
1027 ((uint32_t)pbdev
->sum
<< 7) | pbdev
->routes
.adapter
.summary_offset
;
1028 stl_p(&fib
.data
, data
);
1031 if (s390_cpu_virt_mem_write(cpu
, fiba
, ar
, (uint8_t *)&fib
, sizeof(fib
))) {