tests/ivshmem-test.c

   1 /*
   2  * QTest testcase for ivshmem
   3  *
   4  * Copyright (c) 2014 SUSE LINUX Products GmbH
   5  * Copyright (c) 2015 Red Hat, Inc.
   6  *
   7  * This work is licensed under the terms of the GNU GPL, version 2 or later.
   8  * See the COPYING file in the top-level directory.
   9  */
  10
  11 #include <errno.h>
  12 #include <fcntl.h>
  13 #include <glib.h>
  14 #include <glib/gstdio.h>
  15 #include <string.h>
  16 #include <sys/mman.h>
  17 #include <unistd.h>
  18 #include "contrib/ivshmem-server/ivshmem-server.h"
  19 #include "libqos/pci-pc.h"
  20 #include "libqtest.h"
  21 #include "qemu/osdep.h"
  22 #include "qemu-common.h"
  23
  24 #define TMPSHMSIZE (1 << 20)
  25 static char *tmpshm;
  26 static void *tmpshmem;
  27 static char *tmpdir;
  28 static char *tmpserver;
  29
  30 static void save_fn(QPCIDevice *dev, int devfn, void *data)
  31 {
  32     QPCIDevice **pdev = (QPCIDevice **) data;
  33
  34     *pdev = dev;
  35 }
  36
  37 static QPCIDevice *get_device(void)
  38 {
  39     QPCIDevice *dev;
  40     QPCIBus *pcibus;
  41
  42     pcibus = qpci_init_pc();
  43     qpci_device_foreach(pcibus, 0x1af4, 0x1110, save_fn, &dev);
  44     g_assert(dev != NULL);
  45
  46     return dev;
  47 }
  48
  49 typedef struct _IVState {
  50     QTestState *qtest;
  51     void *reg_base, *mem_base;
  52     QPCIDevice *dev;
  53 } IVState;
  54
  55 enum Reg {
  56     INTRMASK = 0,
  57     INTRSTATUS = 4,
  58     IVPOSITION = 8,
  59     DOORBELL = 12,
  60 };
  61
  62 static const char* reg2str(enum Reg reg) {
  63     switch (reg) {
  64     case INTRMASK:
  65         return "IntrMask";
  66     case INTRSTATUS:
  67         return "IntrStatus";
  68     case IVPOSITION:
  69         return "IVPosition";
  70     case DOORBELL:
  71         return "DoorBell";
  72     default:
  73         return NULL;
  74     }
  75 }
  76
  77 static inline unsigned in_reg(IVState *s, enum Reg reg)
  78 {
  79     const char *name = reg2str(reg);
  80     QTestState *qtest = global_qtest;
  81     unsigned res;
  82
  83     global_qtest = s->qtest;
  84     res = qpci_io_readl(s->dev, s->reg_base + reg);
  85     g_test_message("*%s -> %x\n", name, res);
  86     global_qtest = qtest;
  87
  88     return res;
  89 }
  90
  91 static inline void out_reg(IVState *s, enum Reg reg, unsigned v)
  92 {
  93     const char *name = reg2str(reg);
  94     QTestState *qtest = global_qtest;
  95
  96     global_qtest = s->qtest;
  97     g_test_message("%x -> *%s\n", v, name);
  98     qpci_io_writel(s->dev, s->reg_base + reg, v);
  99     global_qtest = qtest;
 100 }
 101
 102 static void setup_vm_cmd(IVState *s, const char *cmd, bool msix)
 103 {
 104     uint64_t barsize;
 105
 106     s->qtest = qtest_start(cmd);
 107
 108     s->dev = get_device();
 109
 110     /* FIXME: other bar order fails, mappings changes */
 111     s->mem_base = qpci_iomap(s->dev, 2, &barsize);
 112     g_assert_nonnull(s->mem_base);
 113     g_assert_cmpuint(barsize, ==, TMPSHMSIZE);
 114
 115     if (msix) {
 116         qpci_msix_enable(s->dev);
 117     }
 118
 119     s->reg_base = qpci_iomap(s->dev, 0, &barsize);
 120     g_assert_nonnull(s->reg_base);
 121     g_assert_cmpuint(barsize, ==, 256);
 122
 123     qpci_device_enable(s->dev);
 124 }
 125
 126 static void setup_vm(IVState *s)
 127 {
 128     char *cmd = g_strdup_printf("-device ivshmem,shm=%s,size=1M", tmpshm);
 129
 130     setup_vm_cmd(s, cmd, false);
 131
 132     g_free(cmd);
 133 }
 134
 135 static void test_ivshmem_single(void)
 136 {
 137     IVState state, *s;
 138     uint32_t data[1024];
 139     int i;
 140
 141     setup_vm(&state);
 142     s = &state;
 143
 144     /* valid io */
 145     out_reg(s, INTRMASK, 0);
 146     in_reg(s, INTRSTATUS);
 147     in_reg(s, IVPOSITION);
 148
 149     out_reg(s, INTRMASK, 0xffffffff);
 150     g_assert_cmpuint(in_reg(s, INTRMASK), ==, 0xffffffff);
 151     out_reg(s, INTRSTATUS, 1);
 152     /* XXX: intercept IRQ, not seen in resp */
 153     g_assert_cmpuint(in_reg(s, INTRSTATUS), ==, 1);
 154
 155     /* invalid io */
 156     out_reg(s, IVPOSITION, 1);
 157     out_reg(s, DOORBELL, 8 << 16);
 158
 159     for (i = 0; i < G_N_ELEMENTS(data); i++) {
 160         data[i] = i;
 161     }
 162     qtest_memwrite(s->qtest, (uintptr_t)s->mem_base, data, sizeof(data));
 163
 164     for (i = 0; i < G_N_ELEMENTS(data); i++) {
 165         g_assert_cmpuint(((uint32_t *)tmpshmem)[i], ==, i);
 166     }
 167
 168     memset(data, 0, sizeof(data));
 169
 170     qtest_memread(s->qtest, (uintptr_t)s->mem_base, data, sizeof(data));
 171     for (i = 0; i < G_N_ELEMENTS(data); i++) {
 172         g_assert_cmpuint(data[i], ==, i);
 173     }
 174
 175     qtest_quit(s->qtest);
 176 }
 177
 178 static void test_ivshmem_pair(void)
 179 {
 180     IVState state1, state2, *s1, *s2;
 181     char *data;
 182     int i;
 183
 184     setup_vm(&state1);
 185     s1 = &state1;
 186     setup_vm(&state2);
 187     s2 = &state2;
 188
 189     data = g_malloc0(TMPSHMSIZE);
 190
 191     /* host write, guest 1 & 2 read */
 192     memset(tmpshmem, 0x42, TMPSHMSIZE);
 193     qtest_memread(s1->qtest, (uintptr_t)s1->mem_base, data, TMPSHMSIZE);
 194     for (i = 0; i < TMPSHMSIZE; i++) {
 195         g_assert_cmpuint(data[i], ==, 0x42);
 196     }
 197     qtest_memread(s2->qtest, (uintptr_t)s2->mem_base, data, TMPSHMSIZE);
 198     for (i = 0; i < TMPSHMSIZE; i++) {
 199         g_assert_cmpuint(data[i], ==, 0x42);
 200     }
 201
 202     /* guest 1 write, guest 2 read */
 203     memset(data, 0x43, TMPSHMSIZE);
 204     qtest_memwrite(s1->qtest, (uintptr_t)s1->mem_base, data, TMPSHMSIZE);
 205     memset(data, 0, TMPSHMSIZE);
 206     qtest_memread(s2->qtest, (uintptr_t)s2->mem_base, data, TMPSHMSIZE);
 207     for (i = 0; i < TMPSHMSIZE; i++) {
 208         g_assert_cmpuint(data[i], ==, 0x43);
 209     }
 210
 211     /* guest 2 write, guest 1 read */
 212     memset(data, 0x44, TMPSHMSIZE);
 213     qtest_memwrite(s2->qtest, (uintptr_t)s2->mem_base, data, TMPSHMSIZE);
 214     memset(data, 0, TMPSHMSIZE);
 215     qtest_memread(s1->qtest, (uintptr_t)s2->mem_base, data, TMPSHMSIZE);
 216     for (i = 0; i < TMPSHMSIZE; i++) {
 217         g_assert_cmpuint(data[i], ==, 0x44);
 218     }
 219
 220     qtest_quit(s1->qtest);
 221     qtest_quit(s2->qtest);
 222     g_free(data);
 223 }
 224
 225 typedef struct ServerThread {
 226     GThread *thread;
 227     IvshmemServer *server;
 228     int pipe[2]; /* to handle quit */
 229 } ServerThread;
 230
 231 static void *server_thread(void *data)
 232 {
 233     ServerThread *t = data;
 234     IvshmemServer *server = t->server;
 235
 236     while (true) {
 237         fd_set fds;
 238         int maxfd, ret;
 239
 240         FD_ZERO(&fds);
 241         FD_SET(t->pipe[0], &fds);
 242         maxfd = t->pipe[0] + 1;
 243
 244         ivshmem_server_get_fds(server, &fds, &maxfd);
 245
 246         ret = select(maxfd, &fds, NULL, NULL, NULL);
 247
 248         if (ret < 0) {
 249             if (errno == EINTR) {
 250                 continue;
 251             }
 252
 253             g_critical("select error: %s\n", strerror(errno));
 254             break;
 255         }
 256         if (ret == 0) {
 257             continue;
 258         }
 259
 260         if (FD_ISSET(t->pipe[0], &fds)) {
 261             break;
 262         }
 263
 264         if (ivshmem_server_handle_fds(server, &fds, maxfd) < 0) {
 265             g_critical("ivshmem_server_handle_fds() failed\n");
 266             break;
 267         }
 268     }
 269
 270     return NULL;
 271 }
 272
 273 static void setup_vm_with_server(IVState *s, int nvectors)
 274 {
 275     char *cmd = g_strdup_printf("-chardev socket,id=chr0,path=%s,nowait "
 276                                 "-device ivshmem,size=1M,chardev=chr0,vectors=%d",
 277                                 tmpserver, nvectors);
 278
 279     setup_vm_cmd(s, cmd, true);
 280
 281     g_free(cmd);
 282 }
 283
 284 static void test_ivshmem_server(void)
 285 {
 286     IVState state1, state2, *s1, *s2;
 287     ServerThread thread;
 288     IvshmemServer server;
 289     int ret, vm1, vm2;
 290     int nvectors = 2;
 291     guint64 end_time = g_get_monotonic_time() + 5 * G_TIME_SPAN_SECOND;
 292
 293     memset(tmpshmem, 0x42, TMPSHMSIZE);
 294     ret = ivshmem_server_init(&server, tmpserver, tmpshm,
 295                               TMPSHMSIZE, nvectors,
 296                               g_test_verbose());
 297     g_assert_cmpint(ret, ==, 0);
 298
 299     ret = ivshmem_server_start(&server);
 300     g_assert_cmpint(ret, ==, 0);
 301
 302     setup_vm_with_server(&state1, nvectors);
 303     s1 = &state1;
 304     setup_vm_with_server(&state2, nvectors);
 305     s2 = &state2;
 306
 307     g_assert_cmpuint(in_reg(s1, IVPOSITION), ==, 0xffffffff);
 308     g_assert_cmpuint(in_reg(s2, IVPOSITION), ==, 0xffffffff);
 309
 310     g_assert_cmpuint(qtest_readb(s1->qtest, (uintptr_t)s1->mem_base), ==, 0x00);
 311
 312     thread.server = &server;
 313     ret = pipe(thread.pipe);
 314     g_assert_cmpint(ret, ==, 0);
 315     thread.thread = g_thread_new("ivshmem-server", server_thread, &thread);
 316     g_assert(thread.thread != NULL);
 317
 318     /* waiting until mapping is done */
 319     while (g_get_monotonic_time() < end_time) {
 320         g_usleep(1000);
 321
 322         if (qtest_readb(s1->qtest, (uintptr_t)s1->mem_base) == 0x42 &&
 323             qtest_readb(s2->qtest, (uintptr_t)s2->mem_base) == 0x42) {
 324             break;
 325         }
 326     }
 327
 328     /* check got different VM ids */
 329     vm1 = in_reg(s1, IVPOSITION);
 330     vm2 = in_reg(s2, IVPOSITION);
 331     g_assert_cmpuint(vm1, !=, vm2);
 332
 333     global_qtest = s1->qtest;
 334     ret = qpci_msix_table_size(s1->dev);
 335     g_assert_cmpuint(ret, ==, nvectors);
 336
 337     /* ping vm2 -> vm1 */
 338     ret = qpci_msix_pending(s1->dev, 0);
 339     g_assert_cmpuint(ret, ==, 0);
 340     out_reg(s2, DOORBELL, vm1 << 16);
 341     do {
 342         g_usleep(10000);
 343         ret = qpci_msix_pending(s1->dev, 0);
 344     } while (ret == 0 && g_get_monotonic_time() < end_time);
 345     g_assert_cmpuint(ret, !=, 0);
 346
 347     /* ping vm1 -> vm2 */
 348     global_qtest = s2->qtest;
 349     ret = qpci_msix_pending(s2->dev, 0);
 350     g_assert_cmpuint(ret, ==, 0);
 351     out_reg(s1, DOORBELL, vm2 << 16);
 352     do {
 353         g_usleep(10000);
 354         ret = qpci_msix_pending(s2->dev, 0);
 355     } while (ret == 0 && g_get_monotonic_time() < end_time);
 356     g_assert_cmpuint(ret, !=, 0);
 357
 358     qtest_quit(s2->qtest);
 359     qtest_quit(s1->qtest);
 360
 361     if (qemu_write_full(thread.pipe[1], "q", 1) != 1) {
 362         g_error("qemu_write_full: %s", g_strerror(errno));
 363     }
 364
 365     g_thread_join(thread.thread);
 366
 367     ivshmem_server_close(&server);
 368     close(thread.pipe[1]);
 369     close(thread.pipe[0]);
 370 }
 371
 372 #define PCI_SLOT_HP             0x06
 373
 374 static void test_ivshmem_hotplug(void)
 375 {
 376     gchar *opts;
 377
 378     qtest_start("");
 379
 380     opts = g_strdup_printf("'shm': '%s', 'size': '1M'", tmpshm);
 381
 382     qpci_plug_device_test("ivshmem", "iv1", PCI_SLOT_HP, opts);
 383     qpci_unplug_acpi_device_test("iv1", PCI_SLOT_HP);
 384
 385     qtest_end();
 386     g_free(opts);
 387 }
 388
 389 static void test_ivshmem_memdev(void)
 390 {
 391     IVState state;
 392
 393     /* just for the sake of checking memory-backend property */
 394     setup_vm_cmd(&state, "-object memory-backend-ram,size=1M,id=mb1"
 395                  " -device ivshmem,memdev=mb1", false);
 396
 397     qtest_quit(state.qtest);
 398 }
 399
 400 static void cleanup(void)
 401 {
 402     if (tmpshmem) {
 403         munmap(tmpshmem, TMPSHMSIZE);
 404         tmpshmem = NULL;
 405     }
 406
 407     if (tmpshm) {
 408         shm_unlink(tmpshm);
 409         g_free(tmpshm);
 410         tmpshm = NULL;
 411     }
 412
 413     if (tmpserver) {
 414         g_unlink(tmpserver);
 415         g_free(tmpserver);
 416         tmpserver = NULL;
 417     }
 418
 419     if (tmpdir) {
 420         g_rmdir(tmpdir);
 421         tmpdir = NULL;
 422     }
 423 }
 424
 425 static void abrt_handler(void *data)
 426 {
 427     cleanup();
 428 }
 429
 430 static gchar *mktempshm(int size, int *fd)
 431 {
 432     while (true) {
 433         gchar *name;
 434
 435         name = g_strdup_printf("/qtest-%u-%u", getpid(), g_random_int());
 436         *fd = shm_open(name, O_CREAT|O_RDWR|O_EXCL,
 437                        S_IRWXU|S_IRWXG|S_IRWXO);
 438         if (*fd > 0) {
 439             g_assert(ftruncate(*fd, size) == 0);
 440             return name;
 441         }
 442
 443         g_free(name);
 444
 445         if (errno != EEXIST) {
 446             perror("shm_open");
 447             return NULL;
 448         }
 449     }
 450 }
 451
 452 int main(int argc, char **argv)
 453 {
 454     int ret, fd;
 455     gchar dir[] = "/tmp/ivshmem-test.XXXXXX";
 456
 457 #if !GLIB_CHECK_VERSION(2, 31, 0)
 458     if (!g_thread_supported()) {
 459         g_thread_init(NULL);
 460     }
 461 #endif
 462
 463     g_test_init(&argc, &argv, NULL);
 464
 465     qtest_add_abrt_handler(abrt_handler, NULL);
 466     /* shm */
 467     tmpshm = mktempshm(TMPSHMSIZE, &fd);
 468     if (!tmpshm) {
 469         return 0;
 470     }
 471     tmpshmem = mmap(0, TMPSHMSIZE, PROT_READ|PROT_WRITE, MAP_SHARED, fd, 0);
 472     g_assert(tmpshmem != MAP_FAILED);
 473     /* server */
 474     if (mkdtemp(dir) == NULL) {
 475         g_error("mkdtemp: %s", g_strerror(errno));
 476     }
 477     tmpdir = dir;
 478     tmpserver = g_strconcat(tmpdir, "/server", NULL);
 479
 480     qtest_add_func("/ivshmem/single", test_ivshmem_single);
 481     qtest_add_func("/ivshmem/hotplug", test_ivshmem_hotplug);
 482     qtest_add_func("/ivshmem/memdev", test_ivshmem_memdev);
 483     if (g_test_slow()) {
 484         qtest_add_func("/ivshmem/pair", test_ivshmem_pair);
 485         qtest_add_func("/ivshmem/server", test_ivshmem_server);
 486     }
 487
 488     ret = g_test_run();
 489
 490     cleanup();
 491
 492     return ret;
 493 }