hw/arm/xlnx-zynqmp: Remove obsolete 'has_rpu' property
[qemu/ar7.git] / include / hw / registerfields.h
blob93fa4a84c22b363dc552be0f114c7c3f1e020534
1 /*
2 * Register Definition API: field macros
4 * Copyright (c) 2016 Xilinx Inc.
5 * Copyright (c) 2013 Peter Crosthwaite <peter.crosthwaite@xilinx.com>
7 * This work is licensed under the terms of the GNU GPL, version 2. See
8 * the COPYING file in the top-level directory.
9 */
11 #ifndef REGISTERFIELDS_H
12 #define REGISTERFIELDS_H
14 #include "qemu/bitops.h"
16 /* Define constants for a 32 bit register */
18 /* This macro will define A_FOO, for the byte address of a register
19 * as well as R_FOO for the uint32_t[] register number (A_FOO / 4).
21 #define REG32(reg, addr) \
22 enum { A_ ## reg = (addr) }; \
23 enum { R_ ## reg = (addr) / 4 };
25 #define REG8(reg, addr) \
26 enum { A_ ## reg = (addr) }; \
27 enum { R_ ## reg = (addr) };
29 #define REG16(reg, addr) \
30 enum { A_ ## reg = (addr) }; \
31 enum { R_ ## reg = (addr) / 2 };
33 /* Define SHIFT, LENGTH and MASK constants for a field within a register */
35 /* This macro will define R_FOO_BAR_MASK, R_FOO_BAR_SHIFT and R_FOO_BAR_LENGTH
36 * constants for field BAR in register FOO.
38 #define FIELD(reg, field, shift, length) \
39 enum { R_ ## reg ## _ ## field ## _SHIFT = (shift)}; \
40 enum { R_ ## reg ## _ ## field ## _LENGTH = (length)}; \
41 enum { R_ ## reg ## _ ## field ## _MASK = \
42 MAKE_64BIT_MASK(shift, length)};
44 /* Extract a field from a register */
45 #define FIELD_EX8(storage, reg, field) \
46 extract8((storage), R_ ## reg ## _ ## field ## _SHIFT, \
47 R_ ## reg ## _ ## field ## _LENGTH)
48 #define FIELD_EX16(storage, reg, field) \
49 extract16((storage), R_ ## reg ## _ ## field ## _SHIFT, \
50 R_ ## reg ## _ ## field ## _LENGTH)
51 #define FIELD_EX32(storage, reg, field) \
52 extract32((storage), R_ ## reg ## _ ## field ## _SHIFT, \
53 R_ ## reg ## _ ## field ## _LENGTH)
54 #define FIELD_EX64(storage, reg, field) \
55 extract64((storage), R_ ## reg ## _ ## field ## _SHIFT, \
56 R_ ## reg ## _ ## field ## _LENGTH)
58 /* Extract a field from an array of registers */
59 #define ARRAY_FIELD_EX32(regs, reg, field) \
60 FIELD_EX32((regs)[R_ ## reg], reg, field)
62 /* Deposit a register field.
63 * Assigning values larger then the target field will result in
64 * compilation warnings.
66 #define FIELD_DP8(storage, reg, field, val) ({ \
67 struct { \
68 unsigned int v:R_ ## reg ## _ ## field ## _LENGTH; \
69 } _v = { .v = val }; \
70 uint8_t _d; \
71 _d = deposit32((storage), R_ ## reg ## _ ## field ## _SHIFT, \
72 R_ ## reg ## _ ## field ## _LENGTH, _v.v); \
73 _d; })
74 #define FIELD_DP16(storage, reg, field, val) ({ \
75 struct { \
76 unsigned int v:R_ ## reg ## _ ## field ## _LENGTH; \
77 } _v = { .v = val }; \
78 uint16_t _d; \
79 _d = deposit32((storage), R_ ## reg ## _ ## field ## _SHIFT, \
80 R_ ## reg ## _ ## field ## _LENGTH, _v.v); \
81 _d; })
82 #define FIELD_DP32(storage, reg, field, val) ({ \
83 struct { \
84 unsigned int v:R_ ## reg ## _ ## field ## _LENGTH; \
85 } _v = { .v = val }; \
86 uint32_t _d; \
87 _d = deposit32((storage), R_ ## reg ## _ ## field ## _SHIFT, \
88 R_ ## reg ## _ ## field ## _LENGTH, _v.v); \
89 _d; })
90 #define FIELD_DP64(storage, reg, field, val) ({ \
91 struct { \
92 unsigned int v:R_ ## reg ## _ ## field ## _LENGTH; \
93 } _v = { .v = val }; \
94 uint64_t _d; \
95 _d = deposit64((storage), R_ ## reg ## _ ## field ## _SHIFT, \
96 R_ ## reg ## _ ## field ## _LENGTH, _v.v); \
97 _d; })
99 /* Deposit a field to array of registers. */
100 #define ARRAY_FIELD_DP32(regs, reg, field, val) \
101 (regs)[R_ ## reg] = FIELD_DP32((regs)[R_ ## reg], reg, field, val);
103 #endif