include/hw/i386/x86.h

   1 /*
   2  * Copyright (c) 2019 Red Hat, Inc.
   3  *
   4  * This program is free software; you can redistribute it and/or modify it
   5  * under the terms and conditions of the GNU General Public License,
   6  * version 2 or later, as published by the Free Software Foundation.
   7  *
   8  * This program is distributed in the hope it will be useful, but WITHOUT
   9  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  10  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  11  * more details.
  12  *
  13  * You should have received a copy of the GNU General Public License along with
  14  * this program.  If not, see <http://www.gnu.org/licenses/>.
  15  */
  16
  17 #ifndef HW_I386_X86_H
  18 #define HW_I386_X86_H
  19
  20 #include "qemu-common.h"
  21 #include "exec/hwaddr.h"
  22 #include "qemu/notify.h"
  23
  24 #include "hw/i386/topology.h"
  25 #include "hw/boards.h"
  26 #include "hw/nmi.h"
  27 #include "hw/isa/isa.h"
  28 #include "hw/i386/ioapic.h"
  29 #include "qom/object.h"
  30
  31 struct X86MachineClass {
  32     /*< private >*/
  33     MachineClass parent;
  34
  35     /*< public >*/
  36
  37     /* TSC rate migration: */
  38     bool save_tsc_khz;
  39     /* Enables contiguous-apic-ID mode */
  40     bool compat_apic_id_mode;
  41 };
  42
  43 struct X86MachineState {
  44     /*< private >*/
  45     MachineState parent;
  46
  47     /*< public >*/
  48
  49     /* Pointers to devices and objects: */
  50     ISADevice *rtc;
  51     FWCfgState *fw_cfg;
  52     qemu_irq *gsi;
  53     DeviceState *ioapic2;
  54     GMappedFile *initrd_mapped_file;
  55     HotplugHandler *acpi_dev;
  56
  57     /* RAM information (sizes, addresses, configuration): */
  58     ram_addr_t below_4g_mem_size, above_4g_mem_size;
  59
  60     /* CPU and apic information: */
  61     bool apic_xrupt_override;
  62     unsigned pci_irq_mask;
  63     unsigned apic_id_limit;
  64     uint16_t boot_cpus;
  65     unsigned smp_dies;
  66
  67     OnOffAuto smm;
  68     OnOffAuto acpi;
  69
  70     /*
  71      * Address space used by IOAPIC device. All IOAPIC interrupts
  72      * will be translated to MSI messages in the address space.
  73      */
  74     AddressSpace *ioapic_as;
  75 };
  76
  77 #define X86_MACHINE_SMM              "smm"
  78 #define X86_MACHINE_ACPI             "acpi"
  79
  80 #define TYPE_X86_MACHINE   MACHINE_TYPE_NAME("x86")
  81 OBJECT_DECLARE_TYPE(X86MachineState, X86MachineClass, X86_MACHINE)
  82
  83 void init_topo_info(X86CPUTopoInfo *topo_info, const X86MachineState *x86ms);
  84
  85 uint32_t x86_cpu_apic_id_from_index(X86MachineState *pcms,
  86                                     unsigned int cpu_index);
  87
  88 void x86_cpu_new(X86MachineState *pcms, int64_t apic_id, Error **errp);
  89 void x86_cpus_init(X86MachineState *pcms, int default_cpu_version);
  90 CpuInstanceProperties x86_cpu_index_to_props(MachineState *ms,
  91                                              unsigned cpu_index);
  92 int64_t x86_get_default_cpu_node_id(const MachineState *ms, int idx);
  93 const CPUArchIdList *x86_possible_cpu_arch_ids(MachineState *ms);
  94 CPUArchId *x86_find_cpu_slot(MachineState *ms, uint32_t id, int *idx);
  95 void x86_rtc_set_cpus_count(ISADevice *rtc, uint16_t cpus_count);
  96 void x86_cpu_pre_plug(HotplugHandler *hotplug_dev,
  97                       DeviceState *dev, Error **errp);
  98 void x86_cpu_plug(HotplugHandler *hotplug_dev,
  99                   DeviceState *dev, Error **errp);
 100 void x86_cpu_unplug_request_cb(HotplugHandler *hotplug_dev,
 101                                DeviceState *dev, Error **errp);
 102 void x86_cpu_unplug_cb(HotplugHandler *hotplug_dev,
 103                        DeviceState *dev, Error **errp);
 104
 105 void x86_bios_rom_init(MachineState *ms, const char *default_firmware,
 106                        MemoryRegion *rom_memory, bool isapc_ram_fw);
 107
 108 void x86_load_linux(X86MachineState *x86ms,
 109                     FWCfgState *fw_cfg,
 110                     int acpi_data_size,
 111                     bool pvh_enabled,
 112                     bool linuxboot_dma_enabled);
 113
 114 bool x86_machine_is_smm_enabled(const X86MachineState *x86ms);
 115 bool x86_machine_is_acpi_enabled(const X86MachineState *x86ms);
 116
 117 /* Global System Interrupts */
 118
 119 #define GSI_NUM_PINS IOAPIC_NUM_PINS
 120 #define ACPI_BUILD_PCI_IRQS ((1<<5) | (1<<9) | (1<<10) | (1<<11))
 121
 122 typedef struct GSIState {
 123     qemu_irq i8259_irq[ISA_NUM_IRQS];
 124     qemu_irq ioapic_irq[IOAPIC_NUM_PINS];
 125     qemu_irq ioapic2_irq[IOAPIC_NUM_PINS];
 126 } GSIState;
 127
 128 qemu_irq x86_allocate_cpu_irq(void);
 129 void gsi_handler(void *opaque, int n, int level);
 130 void ioapic_init_gsi(GSIState *gsi_state, const char *parent_name);
 131 DeviceState *ioapic_init_secondary(GSIState *gsi_state);
 132
 133 #endif