spapr_pci: Fix broken naming of PCI bus
[qemu/ar7.git] / hw / riscv / sifive_test.c
blob8abd2cd525d673a0808ac0af328c4a5a746a847b
1 /*
2 * QEMU SiFive Test Finisher
4 * Copyright (c) 2018 SiFive, Inc.
6 * Test finisher memory mapped device used to exit simulation
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms and conditions of the GNU General Public License,
10 * version 2 or later, as published by the Free Software Foundation.
12 * This program is distributed in the hope it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
17 * You should have received a copy of the GNU General Public License along with
18 * this program. If not, see <http://www.gnu.org/licenses/>.
21 #include "qemu/osdep.h"
22 #include "hw/sysbus.h"
23 #include "target/riscv/cpu.h"
24 #include "hw/riscv/sifive_test.h"
26 static uint64_t sifive_test_read(void *opaque, hwaddr addr, unsigned int size)
28 return 0;
31 static void sifive_test_write(void *opaque, hwaddr addr,
32 uint64_t val64, unsigned int size)
34 if (addr == 0) {
35 int status = val64 & 0xffff;
36 int code = (val64 >> 16) & 0xffff;
37 switch (status) {
38 case FINISHER_FAIL:
39 exit(code);
40 case FINISHER_PASS:
41 exit(0);
42 default:
43 break;
46 hw_error("%s: write: addr=0x%x val=0x%016" PRIx64 "\n",
47 __func__, (int)addr, val64);
50 static const MemoryRegionOps sifive_test_ops = {
51 .read = sifive_test_read,
52 .write = sifive_test_write,
53 .endianness = DEVICE_NATIVE_ENDIAN,
54 .valid = {
55 .min_access_size = 4,
56 .max_access_size = 4
60 static void sifive_test_init(Object *obj)
62 SiFiveTestState *s = SIFIVE_TEST(obj);
64 memory_region_init_io(&s->mmio, obj, &sifive_test_ops, s,
65 TYPE_SIFIVE_TEST, 0x1000);
66 sysbus_init_mmio(SYS_BUS_DEVICE(obj), &s->mmio);
69 static const TypeInfo sifive_test_info = {
70 .name = TYPE_SIFIVE_TEST,
71 .parent = TYPE_SYS_BUS_DEVICE,
72 .instance_size = sizeof(SiFiveTestState),
73 .instance_init = sifive_test_init,
76 static void sifive_test_register_types(void)
78 type_register_static(&sifive_test_info);
81 type_init(sifive_test_register_types)
85 * Create Test device.
87 DeviceState *sifive_test_create(hwaddr addr)
89 DeviceState *dev = qdev_create(NULL, TYPE_SIFIVE_TEST);
90 qdev_init_nofail(dev);
91 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, addr);
92 return dev;