cpu-exec: remove outermost infinite loop
[qemu/ar7.git] / hw / misc / macio / macio.c
blob5d57f45dc6df174318d42ffff07e738abb4893d7
1 /*
2 * PowerMac MacIO device emulation
4 * Copyright (c) 2005-2007 Fabrice Bellard
5 * Copyright (c) 2007 Jocelyn Mayer
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23 * THE SOFTWARE.
25 #include "qemu/osdep.h"
26 #include "qapi/error.h"
27 #include "hw/hw.h"
28 #include "hw/ppc/mac.h"
29 #include "hw/pci/pci.h"
30 #include "hw/ppc/mac_dbdma.h"
31 #include "hw/char/escc.h"
33 #define TYPE_MACIO "macio"
34 #define MACIO(obj) OBJECT_CHECK(MacIOState, (obj), TYPE_MACIO)
36 typedef struct MacIOState
38 /*< private >*/
39 PCIDevice parent;
40 /*< public >*/
42 MemoryRegion bar;
43 CUDAState cuda;
44 void *dbdma;
45 MemoryRegion *pic_mem;
46 MemoryRegion *escc_mem;
47 uint64_t frequency;
48 } MacIOState;
50 #define OLDWORLD_MACIO(obj) \
51 OBJECT_CHECK(OldWorldMacIOState, (obj), TYPE_OLDWORLD_MACIO)
53 typedef struct OldWorldMacIOState {
54 /*< private >*/
55 MacIOState parent_obj;
56 /*< public >*/
58 qemu_irq irqs[5];
60 MacIONVRAMState nvram;
61 MACIOIDEState ide[2];
62 } OldWorldMacIOState;
64 #define NEWWORLD_MACIO(obj) \
65 OBJECT_CHECK(NewWorldMacIOState, (obj), TYPE_NEWWORLD_MACIO)
67 typedef struct NewWorldMacIOState {
68 /*< private >*/
69 MacIOState parent_obj;
70 /*< public >*/
71 qemu_irq irqs[5];
72 MACIOIDEState ide[2];
73 } NewWorldMacIOState;
76 * The mac-io has two interfaces to the ESCC. One is called "escc-legacy",
77 * while the other one is the normal, current ESCC interface.
79 * The magic below creates memory aliases to spawn the escc-legacy device
80 * purely by rerouting the respective registers to our escc region. This
81 * works because the only difference between the two memory regions is the
82 * register layout, not their semantics.
84 * Reference: ftp://ftp.software.ibm.com/rs6000/technology/spec/chrp/inwork/CHRP_IORef_1.0.pdf
86 static void macio_escc_legacy_setup(MacIOState *macio_state)
88 MemoryRegion *escc_legacy = g_new(MemoryRegion, 1);
89 MemoryRegion *bar = &macio_state->bar;
90 int i;
91 static const int maps[] = {
92 0x00, 0x00, /* Command B */
93 0x02, 0x20, /* Command A */
94 0x04, 0x10, /* Data B */
95 0x06, 0x30, /* Data A */
96 0x08, 0x40, /* Enhancement B */
97 0x0A, 0x50, /* Enhancement A */
98 0x80, 0x80, /* Recovery count */
99 0x90, 0x90, /* Start A */
100 0xa0, 0xa0, /* Start B */
101 0xb0, 0xb0, /* Detect AB */
104 memory_region_init(escc_legacy, OBJECT(macio_state), "escc-legacy", 256);
105 for (i = 0; i < ARRAY_SIZE(maps); i += 2) {
106 MemoryRegion *port = g_new(MemoryRegion, 1);
107 memory_region_init_alias(port, OBJECT(macio_state), "escc-legacy-port",
108 macio_state->escc_mem, maps[i+1], 0x2);
109 memory_region_add_subregion(escc_legacy, maps[i], port);
112 memory_region_add_subregion(bar, 0x12000, escc_legacy);
115 static void macio_bar_setup(MacIOState *macio_state)
117 MemoryRegion *bar = &macio_state->bar;
119 if (macio_state->escc_mem) {
120 memory_region_add_subregion(bar, 0x13000, macio_state->escc_mem);
121 macio_escc_legacy_setup(macio_state);
125 static void macio_common_realize(PCIDevice *d, Error **errp)
127 MacIOState *s = MACIO(d);
128 SysBusDevice *sysbus_dev;
129 Error *err = NULL;
130 MemoryRegion *dbdma_mem;
132 s->dbdma = DBDMA_init(&dbdma_mem);
133 memory_region_add_subregion(&s->bar, 0x08000, dbdma_mem);
135 object_property_set_bool(OBJECT(&s->cuda), true, "realized", &err);
136 if (err) {
137 error_propagate(errp, err);
138 return;
140 sysbus_dev = SYS_BUS_DEVICE(&s->cuda);
141 memory_region_add_subregion(&s->bar, 0x16000,
142 sysbus_mmio_get_region(sysbus_dev, 0));
144 macio_bar_setup(s);
145 pci_register_bar(d, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->bar);
148 static void macio_realize_ide(MacIOState *s, MACIOIDEState *ide,
149 qemu_irq irq0, qemu_irq irq1, int dmaid,
150 Error **errp)
152 SysBusDevice *sysbus_dev;
154 sysbus_dev = SYS_BUS_DEVICE(ide);
155 sysbus_connect_irq(sysbus_dev, 0, irq0);
156 sysbus_connect_irq(sysbus_dev, 1, irq1);
157 macio_ide_register_dma(ide, s->dbdma, dmaid);
158 object_property_set_bool(OBJECT(ide), true, "realized", errp);
161 static void macio_oldworld_realize(PCIDevice *d, Error **errp)
163 MacIOState *s = MACIO(d);
164 OldWorldMacIOState *os = OLDWORLD_MACIO(d);
165 Error *err = NULL;
166 SysBusDevice *sysbus_dev;
167 int i;
168 int cur_irq = 0;
170 macio_common_realize(d, &err);
171 if (err) {
172 error_propagate(errp, err);
173 return;
176 sysbus_dev = SYS_BUS_DEVICE(&s->cuda);
177 sysbus_connect_irq(sysbus_dev, 0, os->irqs[cur_irq++]);
179 object_property_set_bool(OBJECT(&os->nvram), true, "realized", &err);
180 if (err) {
181 error_propagate(errp, err);
182 return;
184 sysbus_dev = SYS_BUS_DEVICE(&os->nvram);
185 memory_region_add_subregion(&s->bar, 0x60000,
186 sysbus_mmio_get_region(sysbus_dev, 0));
187 pmac_format_nvram_partition(&os->nvram, os->nvram.size);
189 if (s->pic_mem) {
190 /* Heathrow PIC */
191 memory_region_add_subregion(&s->bar, 0x00000, s->pic_mem);
194 /* IDE buses */
195 for (i = 0; i < ARRAY_SIZE(os->ide); i++) {
196 qemu_irq irq0 = os->irqs[cur_irq++];
197 qemu_irq irq1 = os->irqs[cur_irq++];
199 macio_realize_ide(s, &os->ide[i], irq0, irq1, 0x16 + (i * 4), &err);
200 if (err) {
201 error_propagate(errp, err);
202 return;
207 static void macio_init_ide(MacIOState *s, MACIOIDEState *ide, size_t ide_size,
208 int index)
210 gchar *name;
212 object_initialize(ide, ide_size, TYPE_MACIO_IDE);
213 qdev_set_parent_bus(DEVICE(ide), sysbus_get_default());
214 memory_region_add_subregion(&s->bar, 0x1f000 + ((index + 1) * 0x1000),
215 &ide->mem);
216 name = g_strdup_printf("ide[%i]", index);
217 object_property_add_child(OBJECT(s), name, OBJECT(ide), NULL);
218 g_free(name);
221 static void macio_oldworld_init(Object *obj)
223 MacIOState *s = MACIO(obj);
224 OldWorldMacIOState *os = OLDWORLD_MACIO(obj);
225 DeviceState *dev;
226 int i;
228 qdev_init_gpio_out(DEVICE(obj), os->irqs, ARRAY_SIZE(os->irqs));
230 object_initialize(&os->nvram, sizeof(os->nvram), TYPE_MACIO_NVRAM);
231 dev = DEVICE(&os->nvram);
232 qdev_prop_set_uint32(dev, "size", 0x2000);
233 qdev_prop_set_uint32(dev, "it_shift", 4);
235 for (i = 0; i < 2; i++) {
236 macio_init_ide(s, &os->ide[i], sizeof(os->ide[i]), i);
240 static void timer_write(void *opaque, hwaddr addr, uint64_t value,
241 unsigned size)
245 static uint64_t timer_read(void *opaque, hwaddr addr, unsigned size)
247 uint32_t value = 0;
248 uint64_t systime = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
249 uint64_t kltime;
251 kltime = muldiv64(systime, 4194300, NANOSECONDS_PER_SECOND * 4);
252 kltime = muldiv64(kltime, 18432000, 1048575);
254 switch (addr) {
255 case 0x38:
256 value = kltime;
257 break;
258 case 0x3c:
259 value = kltime >> 32;
260 break;
263 return value;
266 static const MemoryRegionOps timer_ops = {
267 .read = timer_read,
268 .write = timer_write,
269 .endianness = DEVICE_LITTLE_ENDIAN,
272 static void macio_newworld_realize(PCIDevice *d, Error **errp)
274 MacIOState *s = MACIO(d);
275 NewWorldMacIOState *ns = NEWWORLD_MACIO(d);
276 Error *err = NULL;
277 SysBusDevice *sysbus_dev;
278 MemoryRegion *timer_memory = NULL;
279 int i;
280 int cur_irq = 0;
282 macio_common_realize(d, &err);
283 if (err) {
284 error_propagate(errp, err);
285 return;
288 sysbus_dev = SYS_BUS_DEVICE(&s->cuda);
289 sysbus_connect_irq(sysbus_dev, 0, ns->irqs[cur_irq++]);
291 if (s->pic_mem) {
292 /* OpenPIC */
293 memory_region_add_subregion(&s->bar, 0x40000, s->pic_mem);
296 /* IDE buses */
297 for (i = 0; i < ARRAY_SIZE(ns->ide); i++) {
298 qemu_irq irq0 = ns->irqs[cur_irq++];
299 qemu_irq irq1 = ns->irqs[cur_irq++];
301 macio_realize_ide(s, &ns->ide[i], irq0, irq1, 0x16 + (i * 4), &err);
302 if (err) {
303 error_propagate(errp, err);
304 return;
308 /* Timer */
309 timer_memory = g_new(MemoryRegion, 1);
310 memory_region_init_io(timer_memory, OBJECT(s), &timer_ops, NULL, "timer",
311 0x1000);
312 memory_region_add_subregion(&s->bar, 0x15000, timer_memory);
315 static void macio_newworld_init(Object *obj)
317 MacIOState *s = MACIO(obj);
318 NewWorldMacIOState *ns = NEWWORLD_MACIO(obj);
319 int i;
321 qdev_init_gpio_out(DEVICE(obj), ns->irqs, ARRAY_SIZE(ns->irqs));
323 for (i = 0; i < 2; i++) {
324 macio_init_ide(s, &ns->ide[i], sizeof(ns->ide[i]), i);
328 static void macio_instance_init(Object *obj)
330 MacIOState *s = MACIO(obj);
332 memory_region_init(&s->bar, obj, "macio", 0x80000);
334 object_initialize(&s->cuda, sizeof(s->cuda), TYPE_CUDA);
335 qdev_set_parent_bus(DEVICE(&s->cuda), sysbus_get_default());
336 object_property_add_child(obj, "cuda", OBJECT(&s->cuda), NULL);
339 static const VMStateDescription vmstate_macio_oldworld = {
340 .name = "macio-oldworld",
341 .version_id = 0,
342 .minimum_version_id = 0,
343 .fields = (VMStateField[]) {
344 VMSTATE_PCI_DEVICE(parent_obj.parent, OldWorldMacIOState),
345 VMSTATE_END_OF_LIST()
349 static void macio_oldworld_class_init(ObjectClass *oc, void *data)
351 PCIDeviceClass *pdc = PCI_DEVICE_CLASS(oc);
352 DeviceClass *dc = DEVICE_CLASS(oc);
354 pdc->realize = macio_oldworld_realize;
355 pdc->device_id = PCI_DEVICE_ID_APPLE_343S1201;
356 dc->vmsd = &vmstate_macio_oldworld;
359 static const VMStateDescription vmstate_macio_newworld = {
360 .name = "macio-newworld",
361 .version_id = 0,
362 .minimum_version_id = 0,
363 .fields = (VMStateField[]) {
364 VMSTATE_PCI_DEVICE(parent_obj.parent, NewWorldMacIOState),
365 VMSTATE_END_OF_LIST()
369 static void macio_newworld_class_init(ObjectClass *oc, void *data)
371 PCIDeviceClass *pdc = PCI_DEVICE_CLASS(oc);
372 DeviceClass *dc = DEVICE_CLASS(oc);
374 pdc->realize = macio_newworld_realize;
375 pdc->device_id = PCI_DEVICE_ID_APPLE_UNI_N_KEYL;
376 dc->vmsd = &vmstate_macio_newworld;
379 static Property macio_properties[] = {
380 DEFINE_PROP_UINT64("frequency", MacIOState, frequency, 0),
381 DEFINE_PROP_END_OF_LIST()
384 static void macio_class_init(ObjectClass *klass, void *data)
386 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
387 DeviceClass *dc = DEVICE_CLASS(klass);
389 k->vendor_id = PCI_VENDOR_ID_APPLE;
390 k->class_id = PCI_CLASS_OTHERS << 8;
391 dc->props = macio_properties;
392 set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
395 static const TypeInfo macio_oldworld_type_info = {
396 .name = TYPE_OLDWORLD_MACIO,
397 .parent = TYPE_MACIO,
398 .instance_size = sizeof(OldWorldMacIOState),
399 .instance_init = macio_oldworld_init,
400 .class_init = macio_oldworld_class_init,
403 static const TypeInfo macio_newworld_type_info = {
404 .name = TYPE_NEWWORLD_MACIO,
405 .parent = TYPE_MACIO,
406 .instance_size = sizeof(NewWorldMacIOState),
407 .instance_init = macio_newworld_init,
408 .class_init = macio_newworld_class_init,
411 static const TypeInfo macio_type_info = {
412 .name = TYPE_MACIO,
413 .parent = TYPE_PCI_DEVICE,
414 .instance_size = sizeof(MacIOState),
415 .instance_init = macio_instance_init,
416 .abstract = true,
417 .class_init = macio_class_init,
420 static void macio_register_types(void)
422 type_register_static(&macio_type_info);
423 type_register_static(&macio_oldworld_type_info);
424 type_register_static(&macio_newworld_type_info);
427 type_init(macio_register_types)
429 void macio_init(PCIDevice *d,
430 MemoryRegion *pic_mem,
431 MemoryRegion *escc_mem)
433 MacIOState *macio_state = MACIO(d);
435 macio_state->pic_mem = pic_mem;
436 macio_state->escc_mem = escc_mem;
437 /* Note: this code is strongly inspirated from the corresponding code
438 in PearPC */
439 qdev_prop_set_uint64(DEVICE(&macio_state->cuda), "frequency",
440 macio_state->frequency);
442 qdev_init_nofail(DEVICE(d));