target-mips: Enable vectored interrupt support for the 74Kf CPU
[qemu/ar7.git] / target-xtensa / gdbstub.c
blob9e13b20c4615a2b2a25086e67c7c577df8510326
1 /*
2 * Xtensa gdb server stub
4 * Copyright (c) 2003-2005 Fabrice Bellard
5 * Copyright (c) 2013 SUSE LINUX Products GmbH
7 * This library is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU Lesser General Public
9 * License as published by the Free Software Foundation; either
10 * version 2 of the License, or (at your option) any later version.
12 * This library is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * Lesser General Public License for more details.
17 * You should have received a copy of the GNU Lesser General Public
18 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
20 #include "config.h"
21 #include "qemu-common.h"
22 #include "exec/gdbstub.h"
24 int xtensa_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n)
26 XtensaCPU *cpu = XTENSA_CPU(cs);
27 CPUXtensaState *env = &cpu->env;
28 const XtensaGdbReg *reg = env->config->gdb_regmap.reg + n;
30 if (n < 0 || n >= env->config->gdb_regmap.num_regs) {
31 return 0;
34 switch (reg->type) {
35 case 9: /*pc*/
36 return gdb_get_reg32(mem_buf, env->pc);
38 case 1: /*ar*/
39 xtensa_sync_phys_from_window(env);
40 return gdb_get_reg32(mem_buf, env->phys_regs[(reg->targno & 0xff)
41 % env->config->nareg]);
43 case 2: /*SR*/
44 return gdb_get_reg32(mem_buf, env->sregs[reg->targno & 0xff]);
46 case 3: /*UR*/
47 return gdb_get_reg32(mem_buf, env->uregs[reg->targno & 0xff]);
49 case 4: /*f*/
50 return gdb_get_reg32(mem_buf, float32_val(env->fregs[reg->targno
51 & 0x0f]));
53 case 8: /*a*/
54 return gdb_get_reg32(mem_buf, env->regs[reg->targno & 0x0f]);
56 default:
57 qemu_log("%s from reg %d of unsupported type %d\n",
58 __func__, n, reg->type);
59 return 0;
63 int xtensa_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
65 XtensaCPU *cpu = XTENSA_CPU(cs);
66 CPUXtensaState *env = &cpu->env;
67 uint32_t tmp;
68 const XtensaGdbReg *reg = env->config->gdb_regmap.reg + n;
70 if (n < 0 || n >= env->config->gdb_regmap.num_regs) {
71 return 0;
74 tmp = ldl_p(mem_buf);
76 switch (reg->type) {
77 case 9: /*pc*/
78 env->pc = tmp;
79 break;
81 case 1: /*ar*/
82 env->phys_regs[(reg->targno & 0xff) % env->config->nareg] = tmp;
83 xtensa_sync_window_from_phys(env);
84 break;
86 case 2: /*SR*/
87 env->sregs[reg->targno & 0xff] = tmp;
88 break;
90 case 3: /*UR*/
91 env->uregs[reg->targno & 0xff] = tmp;
92 break;
94 case 4: /*f*/
95 env->fregs[reg->targno & 0x0f] = make_float32(tmp);
96 break;
98 case 8: /*a*/
99 env->regs[reg->targno & 0x0f] = tmp;
100 break;
102 default:
103 qemu_log("%s to reg %d of unsupported type %d\n",
104 __func__, n, reg->type);
105 return 0;
108 return 4;