m48t59: add a Nvram interface
[qemu/ar7.git] / target-cris / cpu-qom.h
blob6fc30c20847f6d40c9c3a668af58c84730ea88e6
1 /*
2 * QEMU CRIS CPU
4 * Copyright (c) 2012 SUSE LINUX Products GmbH
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2.1 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see
18 * <http://www.gnu.org/licenses/lgpl-2.1.html>
20 #ifndef QEMU_CRIS_CPU_QOM_H
21 #define QEMU_CRIS_CPU_QOM_H
23 #include "qom/cpu.h"
25 #define TYPE_CRIS_CPU "cris-cpu"
27 #define CRIS_CPU_CLASS(klass) \
28 OBJECT_CLASS_CHECK(CRISCPUClass, (klass), TYPE_CRIS_CPU)
29 #define CRIS_CPU(obj) \
30 OBJECT_CHECK(CRISCPU, (obj), TYPE_CRIS_CPU)
31 #define CRIS_CPU_GET_CLASS(obj) \
32 OBJECT_GET_CLASS(CRISCPUClass, (obj), TYPE_CRIS_CPU)
34 /**
35 * CRISCPUClass:
36 * @parent_realize: The parent class' realize handler.
37 * @parent_reset: The parent class' reset handler.
38 * @vr: Version Register value.
40 * A CRIS CPU model.
42 typedef struct CRISCPUClass {
43 /*< private >*/
44 CPUClass parent_class;
45 /*< public >*/
47 DeviceRealize parent_realize;
48 void (*parent_reset)(CPUState *cpu);
50 uint32_t vr;
51 } CRISCPUClass;
53 /**
54 * CRISCPU:
55 * @env: #CPUCRISState
57 * A CRIS CPU.
59 typedef struct CRISCPU {
60 /*< private >*/
61 CPUState parent_obj;
62 /*< public >*/
64 CPUCRISState env;
65 } CRISCPU;
67 static inline CRISCPU *cris_env_get_cpu(CPUCRISState *env)
69 return container_of(env, CRISCPU, env);
72 #define ENV_GET_CPU(e) CPU(cris_env_get_cpu(e))
74 #define ENV_OFFSET offsetof(CRISCPU, env)
76 void cris_cpu_do_interrupt(CPUState *cpu);
77 void crisv10_cpu_do_interrupt(CPUState *cpu);
78 bool cris_cpu_exec_interrupt(CPUState *cpu, int int_req);
80 void cris_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf,
81 int flags);
83 hwaddr cris_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
85 int crisv10_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
86 int cris_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
87 int cris_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
89 #endif