hw/ppc/mac_oldworld.c

   1
   2 /*
   3  * QEMU OldWorld PowerMac (currently ~G3 Beige) hardware System Emulator
   4  *
   5  * Copyright (c) 2004-2007 Fabrice Bellard
   6  * Copyright (c) 2007 Jocelyn Mayer
   7  *
   8  * Permission is hereby granted, free of charge, to any person obtaining a copy
   9  * of this software and associated documentation files (the "Software"), to deal
  10  * in the Software without restriction, including without limitation the rights
  11  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  12  * copies of the Software, and to permit persons to whom the Software is
  13  * furnished to do so, subject to the following conditions:
  14  *
  15  * The above copyright notice and this permission notice shall be included in
  16  * all copies or substantial portions of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  19  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  20  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  21  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  22  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  23  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  24  * THE SOFTWARE.
  25  */
  26 #include "qemu/osdep.h"
  27 #include "qapi/error.h"
  28 #include "hw/hw.h"
  29 #include "hw/ppc/ppc.h"
  30 #include "mac.h"
  31 #include "hw/input/adb.h"
  32 #include "hw/timer/m48t59.h"
  33 #include "sysemu/sysemu.h"
  34 #include "net/net.h"
  35 #include "hw/isa/isa.h"
  36 #include "hw/pci/pci.h"
  37 #include "hw/boards.h"
  38 #include "hw/nvram/fw_cfg.h"
  39 #include "hw/char/escc.h"
  40 #include "hw/ide.h"
  41 #include "hw/loader.h"
  42 #include "elf.h"
  43 #include "qemu/error-report.h"
  44 #include "sysemu/kvm.h"
  45 #include "kvm_ppc.h"
  46 #include "sysemu/block-backend.h"
  47 #include "exec/address-spaces.h"
  48 #include "qemu/cutils.h"
  49
  50 #define MAX_IDE_BUS 2
  51 #define CFG_ADDR 0xf0000510
  52 #define TBFREQ 16600000UL
  53 #define CLOCKFREQ 266000000UL
  54 #define BUSFREQ 66000000UL
  55
  56 #define NDRV_VGA_FILENAME "qemu_vga.ndrv"
  57
  58 static void fw_cfg_boot_set(void *opaque, const char *boot_device,
  59                             Error **errp)
  60 {
  61     fw_cfg_modify_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]);
  62 }
  63
  64 static uint64_t translate_kernel_address(void *opaque, uint64_t addr)
  65 {
  66     return (addr & 0x0fffffff) + KERNEL_LOAD_ADDR;
  67 }
  68
  69 static void ppc_heathrow_reset(void *opaque)
  70 {
  71     PowerPCCPU *cpu = opaque;
  72
  73     cpu_reset(CPU(cpu));
  74 }
  75
  76 static void ppc_heathrow_init(MachineState *machine)
  77 {
  78     ram_addr_t ram_size = machine->ram_size;
  79     const char *kernel_filename = machine->kernel_filename;
  80     const char *kernel_cmdline = machine->kernel_cmdline;
  81     const char *initrd_filename = machine->initrd_filename;
  82     const char *boot_device = machine->boot_order;
  83     MemoryRegion *sysmem = get_system_memory();
  84     PowerPCCPU *cpu = NULL;
  85     CPUPPCState *env = NULL;
  86     char *filename;
  87     qemu_irq *pic, **heathrow_irqs;
  88     int linux_boot, i;
  89     MemoryRegion *ram = g_new(MemoryRegion, 1);
  90     MemoryRegion *bios = g_new(MemoryRegion, 1);
  91     MemoryRegion *isa = g_new(MemoryRegion, 1);
  92     uint32_t kernel_base, initrd_base, cmdline_base = 0;
  93     int32_t kernel_size, initrd_size;
  94     PCIBus *pci_bus;
  95     PCIDevice *macio;
  96     MACIOIDEState *macio_ide;
  97     DeviceState *dev;
  98     BusState *adb_bus;
  99     int bios_size, ndrv_size;
 100     uint8_t *ndrv_file;
 101     MemoryRegion *pic_mem;
 102     MemoryRegion *escc_mem, *escc_bar = g_new(MemoryRegion, 1);
 103     uint16_t ppc_boot_device;
 104     DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
 105     void *fw_cfg;
 106     uint64_t tbfreq;
 107
 108     linux_boot = (kernel_filename != NULL);
 109
 110     /* init CPUs */
 111     if (machine->cpu_model == NULL)
 112         machine->cpu_model = "G3";
 113     for (i = 0; i < smp_cpus; i++) {
 114         cpu = POWERPC_CPU(cpu_generic_init(TYPE_POWERPC_CPU,
 115                                            machine->cpu_model));
 116         env = &cpu->env;
 117
 118         /* Set time-base frequency to 16.6 Mhz */
 119         cpu_ppc_tb_init(env,  TBFREQ);
 120         qemu_register_reset(ppc_heathrow_reset, cpu);
 121     }
 122
 123     /* allocate RAM */
 124     if (ram_size > (2047 << 20)) {
 125         fprintf(stderr,
 126                 "qemu: Too much memory for this machine: %d MB, maximum 2047 MB\n",
 127                 ((unsigned int)ram_size / (1 << 20)));
 128         exit(1);
 129     }
 130
 131     memory_region_allocate_system_memory(ram, NULL, "ppc_heathrow.ram",
 132                                          ram_size);
 133     memory_region_add_subregion(sysmem, 0, ram);
 134
 135     /* allocate and load BIOS */
 136     memory_region_init_ram(bios, NULL, "ppc_heathrow.bios", BIOS_SIZE,
 137                            &error_fatal);
 138
 139     if (bios_name == NULL)
 140         bios_name = PROM_FILENAME;
 141     filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
 142     memory_region_set_readonly(bios, true);
 143     memory_region_add_subregion(sysmem, PROM_ADDR, bios);
 144
 145     /* Load OpenBIOS (ELF) */
 146     if (filename) {
 147         bios_size = load_elf(filename, 0, NULL, NULL, NULL, NULL,
 148                              1, PPC_ELF_MACHINE, 0, 0);
 149         g_free(filename);
 150     } else {
 151         bios_size = -1;
 152     }
 153     if (bios_size < 0 || bios_size > BIOS_SIZE) {
 154         error_report("could not load PowerPC bios '%s'", bios_name);
 155         exit(1);
 156     }
 157
 158     if (linux_boot) {
 159         uint64_t lowaddr = 0;
 160         int bswap_needed;
 161
 162 #ifdef BSWAP_NEEDED
 163         bswap_needed = 1;
 164 #else
 165         bswap_needed = 0;
 166 #endif
 167         kernel_base = KERNEL_LOAD_ADDR;
 168         kernel_size = load_elf(kernel_filename, translate_kernel_address, NULL,
 169                                NULL, &lowaddr, NULL, 1, PPC_ELF_MACHINE,
 170                                0, 0);
 171         if (kernel_size < 0)
 172             kernel_size = load_aout(kernel_filename, kernel_base,
 173                                     ram_size - kernel_base, bswap_needed,
 174                                     TARGET_PAGE_SIZE);
 175         if (kernel_size < 0)
 176             kernel_size = load_image_targphys(kernel_filename,
 177                                               kernel_base,
 178                                               ram_size - kernel_base);
 179         if (kernel_size < 0) {
 180             error_report("could not load kernel '%s'", kernel_filename);
 181             exit(1);
 182         }
 183         /* load initrd */
 184         if (initrd_filename) {
 185             initrd_base = TARGET_PAGE_ALIGN(kernel_base + kernel_size + KERNEL_GAP);
 186             initrd_size = load_image_targphys(initrd_filename, initrd_base,
 187                                               ram_size - initrd_base);
 188             if (initrd_size < 0) {
 189                 error_report("could not load initial ram disk '%s'",
 190                              initrd_filename);
 191                 exit(1);
 192             }
 193             cmdline_base = TARGET_PAGE_ALIGN(initrd_base + initrd_size);
 194         } else {
 195             initrd_base = 0;
 196             initrd_size = 0;
 197             cmdline_base = TARGET_PAGE_ALIGN(kernel_base + kernel_size + KERNEL_GAP);
 198         }
 199         ppc_boot_device = 'm';
 200     } else {
 201         kernel_base = 0;
 202         kernel_size = 0;
 203         initrd_base = 0;
 204         initrd_size = 0;
 205         ppc_boot_device = '\0';
 206         for (i = 0; boot_device[i] != '\0'; i++) {
 207             /* TOFIX: for now, the second IDE channel is not properly
 208              *        used by OHW. The Mac floppy disk are not emulated.
 209              *        For now, OHW cannot boot from the network.
 210              */
 211 #if 0
 212             if (boot_device[i] >= 'a' && boot_device[i] <= 'f') {
 213                 ppc_boot_device = boot_device[i];
 214                 break;
 215             }
 216 #else
 217             if (boot_device[i] >= 'c' && boot_device[i] <= 'd') {
 218                 ppc_boot_device = boot_device[i];
 219                 break;
 220             }
 221 #endif
 222         }
 223         if (ppc_boot_device == '\0') {
 224             fprintf(stderr, "No valid boot device for G3 Beige machine\n");
 225             exit(1);
 226         }
 227     }
 228
 229     /* Register 2 MB of ISA IO space */
 230     memory_region_init_alias(isa, NULL, "isa_mmio",
 231                              get_system_io(), 0, 0x00200000);
 232     memory_region_add_subregion(sysmem, 0xfe000000, isa);
 233
 234     /* XXX: we register only 1 output pin for heathrow PIC */
 235     heathrow_irqs = g_malloc0(smp_cpus * sizeof(qemu_irq *));
 236     heathrow_irqs[0] =
 237         g_malloc0(smp_cpus * sizeof(qemu_irq) * 1);
 238     /* Connect the heathrow PIC outputs to the 6xx bus */
 239     for (i = 0; i < smp_cpus; i++) {
 240         switch (PPC_INPUT(env)) {
 241         case PPC_FLAGS_INPUT_6xx:
 242             heathrow_irqs[i] = heathrow_irqs[0] + (i * 1);
 243             heathrow_irqs[i][0] =
 244                 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
 245             break;
 246         default:
 247             error_report("Bus model not supported on OldWorld Mac machine");
 248             exit(1);
 249         }
 250     }
 251
 252     /* Timebase Frequency */
 253     if (kvm_enabled()) {
 254         tbfreq = kvmppc_get_tbfreq();
 255     } else {
 256         tbfreq = TBFREQ;
 257     }
 258
 259     /* init basic PC hardware */
 260     if (PPC_INPUT(env) != PPC_FLAGS_INPUT_6xx) {
 261         error_report("Only 6xx bus is supported on heathrow machine");
 262         exit(1);
 263     }
 264     pic = heathrow_pic_init(&pic_mem, 1, heathrow_irqs);
 265     pci_bus = pci_grackle_init(0xfec00000, pic,
 266                                get_system_memory(),
 267                                get_system_io());
 268     pci_vga_init(pci_bus);
 269
 270     escc_mem = escc_init(0, pic[0x0f], pic[0x10], serial_hds[0],
 271                                serial_hds[1], ESCC_CLOCK, 4);
 272     memory_region_init_alias(escc_bar, NULL, "escc-bar",
 273                              escc_mem, 0, memory_region_size(escc_mem));
 274
 275     for(i = 0; i < nb_nics; i++)
 276         pci_nic_init_nofail(&nd_table[i], pci_bus, "ne2k_pci", NULL);
 277
 278
 279     ide_drive_get(hd, ARRAY_SIZE(hd));
 280
 281     macio = pci_create(pci_bus, -1, TYPE_OLDWORLD_MACIO);
 282     dev = DEVICE(macio);
 283     qdev_connect_gpio_out(dev, 0, pic[0x12]); /* CUDA */
 284     qdev_connect_gpio_out(dev, 1, pic[0x0D]); /* IDE-0 */
 285     qdev_connect_gpio_out(dev, 2, pic[0x02]); /* IDE-0 DMA */
 286     qdev_connect_gpio_out(dev, 3, pic[0x0E]); /* IDE-1 */
 287     qdev_connect_gpio_out(dev, 4, pic[0x03]); /* IDE-1 DMA */
 288     qdev_prop_set_uint64(dev, "frequency", tbfreq);
 289     macio_init(macio, pic_mem, escc_bar);
 290
 291     macio_ide = MACIO_IDE(object_resolve_path_component(OBJECT(macio),
 292                                                         "ide[0]"));
 293     macio_ide_init_drives(macio_ide, hd);
 294
 295     macio_ide = MACIO_IDE(object_resolve_path_component(OBJECT(macio),
 296                                                         "ide[1]"));
 297     macio_ide_init_drives(macio_ide, &hd[MAX_IDE_DEVS]);
 298
 299     dev = DEVICE(object_resolve_path_component(OBJECT(macio), "cuda"));
 300     adb_bus = qdev_get_child_bus(dev, "adb.0");
 301     dev = qdev_create(adb_bus, TYPE_ADB_KEYBOARD);
 302     qdev_init_nofail(dev);
 303     dev = qdev_create(adb_bus, TYPE_ADB_MOUSE);
 304     qdev_init_nofail(dev);
 305
 306     if (machine_usb(machine)) {
 307         pci_create_simple(pci_bus, -1, "pci-ohci");
 308     }
 309
 310     if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8)
 311         graphic_depth = 15;
 312
 313     /* No PCI init: the BIOS will do it */
 314
 315     fw_cfg = fw_cfg_init_mem(CFG_ADDR, CFG_ADDR + 2);
 316     fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, (uint16_t)smp_cpus);
 317     fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, (uint16_t)max_cpus);
 318     fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
 319     fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, ARCH_HEATHROW);
 320     fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, kernel_base);
 321     fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size);
 322     if (kernel_cmdline) {
 323         fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, cmdline_base);
 324         pstrcpy_targphys("cmdline", cmdline_base, TARGET_PAGE_SIZE, kernel_cmdline);
 325     } else {
 326         fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, 0);
 327     }
 328     fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, initrd_base);
 329     fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size);
 330     fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, ppc_boot_device);
 331
 332     fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_WIDTH, graphic_width);
 333     fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_HEIGHT, graphic_height);
 334     fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_DEPTH, graphic_depth);
 335
 336     fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_IS_KVM, kvm_enabled());
 337     if (kvm_enabled()) {
 338 #ifdef CONFIG_KVM
 339         uint8_t *hypercall;
 340
 341         hypercall = g_malloc(16);
 342         kvmppc_get_hypercall(env, hypercall, 16);
 343         fw_cfg_add_bytes(fw_cfg, FW_CFG_PPC_KVM_HC, hypercall, 16);
 344         fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_KVM_PID, getpid());
 345 #endif
 346     }
 347     fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_TBFREQ, tbfreq);
 348     /* Mac OS X requires a "known good" clock-frequency value; pass it one. */
 349     fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_CLOCKFREQ, CLOCKFREQ);
 350     fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_BUSFREQ, BUSFREQ);
 351
 352     /* MacOS NDRV VGA driver */
 353     filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, NDRV_VGA_FILENAME);
 354     if (filename) {
 355         ndrv_size = get_image_size(filename);
 356         if (ndrv_size != -1) {
 357             ndrv_file = g_malloc(ndrv_size);
 358             ndrv_size = load_image(filename, ndrv_file);
 359
 360             fw_cfg_add_file(fw_cfg, "ndrv/qemu_vga.ndrv", ndrv_file, ndrv_size);
 361         }
 362         g_free(filename);
 363     }
 364
 365     qemu_register_boot_set(fw_cfg_boot_set, fw_cfg);
 366 }
 367
 368 static int heathrow_kvm_type(const char *arg)
 369 {
 370     /* Always force PR KVM */
 371     return 2;
 372 }
 373
 374 static void heathrow_class_init(ObjectClass *oc, void *data)
 375 {
 376     MachineClass *mc = MACHINE_CLASS(oc);
 377
 378     mc->desc = "Heathrow based PowerMAC";
 379     mc->init = ppc_heathrow_init;
 380     mc->block_default_type = IF_IDE;
 381     mc->max_cpus = MAX_CPUS;
 382 #ifndef TARGET_PPC64
 383     mc->is_default = 1;
 384 #endif
 385     /* TOFIX "cad" when Mac floppy is implemented */
 386     mc->default_boot_order = "cd";
 387     mc->kvm_type = heathrow_kvm_type;
 388 }
 389
 390 static const TypeInfo ppc_heathrow_machine_info = {
 391     .name          = MACHINE_TYPE_NAME("g3beige"),
 392     .parent        = TYPE_MACHINE,
 393     .class_init    = heathrow_class_init
 394 };
 395
 396 static void ppc_heathrow_register_types(void)
 397 {
 398     type_register_static(&ppc_heathrow_machine_info);
 399 }
 400
 401 type_init(ppc_heathrow_register_types);