4 * Copyright (c) 2003 Fabrice Bellard
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
19 #include "qemu/osdep.h"
20 #include "qapi/error.h"
24 #include "qemu/cutils.h"
26 #include "exec/exec-all.h"
27 #include "exec/target_page.h"
29 #include "hw/qdev-core.h"
30 #include "hw/qdev-properties.h"
31 #if !defined(CONFIG_USER_ONLY)
32 #include "hw/boards.h"
33 #include "hw/xen/xen.h"
35 #include "sysemu/kvm.h"
36 #include "sysemu/sysemu.h"
37 #include "qemu/timer.h"
38 #include "qemu/config-file.h"
39 #include "qemu/error-report.h"
40 #if defined(CONFIG_USER_ONLY)
42 #else /* !CONFIG_USER_ONLY */
44 #include "exec/memory.h"
45 #include "exec/ioport.h"
46 #include "sysemu/dma.h"
47 #include "sysemu/numa.h"
48 #include "sysemu/hw_accel.h"
49 #include "exec/address-spaces.h"
50 #include "sysemu/xen-mapcache.h"
51 #include "trace-root.h"
53 #ifdef CONFIG_FALLOCATE_PUNCH_HOLE
55 #include <linux/falloc.h>
59 #include "qemu/rcu_queue.h"
60 #include "qemu/main-loop.h"
61 #include "translate-all.h"
62 #include "sysemu/replay.h"
64 #include "exec/memory-internal.h"
65 #include "exec/ram_addr.h"
68 #include "migration/vmstate.h"
70 #include "qemu/range.h"
72 #include "qemu/mmap-alloc.h"
75 #include "monitor/monitor.h"
77 //#define DEBUG_SUBPAGE
79 #if !defined(CONFIG_USER_ONLY)
80 /* ram_list is read under rcu_read_lock()/rcu_read_unlock(). Writes
81 * are protected by the ramlist lock.
83 RAMList ram_list
= { .blocks
= QLIST_HEAD_INITIALIZER(ram_list
.blocks
) };
85 static MemoryRegion
*system_memory
;
86 static MemoryRegion
*system_io
;
88 AddressSpace address_space_io
;
89 AddressSpace address_space_memory
;
91 MemoryRegion io_mem_rom
, io_mem_notdirty
;
92 static MemoryRegion io_mem_unassigned
;
94 /* RAM is pre-allocated and passed into qemu_ram_alloc_from_ptr */
95 #define RAM_PREALLOC (1 << 0)
97 /* RAM is mmap-ed with MAP_SHARED */
98 #define RAM_SHARED (1 << 1)
100 /* Only a portion of RAM (used_length) is actually used, and migrated.
101 * This used_length size can change across reboots.
103 #define RAM_RESIZEABLE (1 << 2)
107 #ifdef TARGET_PAGE_BITS_VARY
108 int target_page_bits
;
109 bool target_page_bits_decided
;
112 struct CPUTailQ cpus
= QTAILQ_HEAD_INITIALIZER(cpus
);
113 /* current CPU in the current thread. It is only valid inside
115 __thread CPUState
*current_cpu
;
116 /* 0 = Do not count executed instructions.
117 1 = Precise instruction counting.
118 2 = Adaptive rate instruction counting. */
121 uintptr_t qemu_host_page_size
;
122 intptr_t qemu_host_page_mask
;
124 bool set_preferred_target_page_bits(int bits
)
126 /* The target page size is the lowest common denominator for all
127 * the CPUs in the system, so we can only make it smaller, never
128 * larger. And we can't make it smaller once we've committed to
131 #ifdef TARGET_PAGE_BITS_VARY
132 assert(bits
>= TARGET_PAGE_BITS_MIN
);
133 if (target_page_bits
== 0 || target_page_bits
> bits
) {
134 if (target_page_bits_decided
) {
137 target_page_bits
= bits
;
143 #if !defined(CONFIG_USER_ONLY)
145 static void finalize_target_page_bits(void)
147 #ifdef TARGET_PAGE_BITS_VARY
148 if (target_page_bits
== 0) {
149 target_page_bits
= TARGET_PAGE_BITS_MIN
;
151 target_page_bits_decided
= true;
155 typedef struct PhysPageEntry PhysPageEntry
;
157 struct PhysPageEntry
{
158 /* How many bits skip to next level (in units of L2_SIZE). 0 for a leaf. */
160 /* index into phys_sections (!skip) or phys_map_nodes (skip) */
164 #define PHYS_MAP_NODE_NIL (((uint32_t)~0) >> 6)
166 /* Size of the L2 (and L3, etc) page tables. */
167 #define ADDR_SPACE_BITS 64
170 #define P_L2_SIZE (1 << P_L2_BITS)
172 #define P_L2_LEVELS (((ADDR_SPACE_BITS - TARGET_PAGE_BITS - 1) / P_L2_BITS) + 1)
174 typedef PhysPageEntry Node
[P_L2_SIZE
];
176 typedef struct PhysPageMap
{
179 unsigned sections_nb
;
180 unsigned sections_nb_alloc
;
182 unsigned nodes_nb_alloc
;
184 MemoryRegionSection
*sections
;
187 struct AddressSpaceDispatch
{
188 MemoryRegionSection
*mru_section
;
189 /* This is a multi-level map on the physical address space.
190 * The bottom level has pointers to MemoryRegionSections.
192 PhysPageEntry phys_map
;
196 #define SUBPAGE_IDX(addr) ((addr) & ~TARGET_PAGE_MASK)
197 typedef struct subpage_t
{
201 uint16_t sub_section
[];
204 #define PHYS_SECTION_UNASSIGNED 0
205 #define PHYS_SECTION_NOTDIRTY 1
206 #define PHYS_SECTION_ROM 2
207 #define PHYS_SECTION_WATCH 3
209 static void io_mem_init(void);
210 static void memory_map_init(void);
211 static void tcg_commit(MemoryListener
*listener
);
213 static MemoryRegion io_mem_watch
;
216 * CPUAddressSpace: all the information a CPU needs about an AddressSpace
217 * @cpu: the CPU whose AddressSpace this is
218 * @as: the AddressSpace itself
219 * @memory_dispatch: its dispatch pointer (cached, RCU protected)
220 * @tcg_as_listener: listener for tracking changes to the AddressSpace
222 struct CPUAddressSpace
{
225 struct AddressSpaceDispatch
*memory_dispatch
;
226 MemoryListener tcg_as_listener
;
229 struct DirtyBitmapSnapshot
{
232 unsigned long dirty
[];
237 #if !defined(CONFIG_USER_ONLY)
239 static void phys_map_node_reserve(PhysPageMap
*map
, unsigned nodes
)
241 static unsigned alloc_hint
= 16;
242 if (map
->nodes_nb
+ nodes
> map
->nodes_nb_alloc
) {
243 map
->nodes_nb_alloc
= MAX(map
->nodes_nb_alloc
, alloc_hint
);
244 map
->nodes_nb_alloc
= MAX(map
->nodes_nb_alloc
, map
->nodes_nb
+ nodes
);
245 map
->nodes
= g_renew(Node
, map
->nodes
, map
->nodes_nb_alloc
);
246 alloc_hint
= map
->nodes_nb_alloc
;
250 static uint32_t phys_map_node_alloc(PhysPageMap
*map
, bool leaf
)
257 ret
= map
->nodes_nb
++;
259 assert(ret
!= PHYS_MAP_NODE_NIL
);
260 assert(ret
!= map
->nodes_nb_alloc
);
262 e
.skip
= leaf
? 0 : 1;
263 e
.ptr
= leaf
? PHYS_SECTION_UNASSIGNED
: PHYS_MAP_NODE_NIL
;
264 for (i
= 0; i
< P_L2_SIZE
; ++i
) {
265 memcpy(&p
[i
], &e
, sizeof(e
));
270 static void phys_page_set_level(PhysPageMap
*map
, PhysPageEntry
*lp
,
271 hwaddr
*index
, hwaddr
*nb
, uint16_t leaf
,
275 hwaddr step
= (hwaddr
)1 << (level
* P_L2_BITS
);
277 if (lp
->skip
&& lp
->ptr
== PHYS_MAP_NODE_NIL
) {
278 lp
->ptr
= phys_map_node_alloc(map
, level
== 0);
280 p
= map
->nodes
[lp
->ptr
];
281 lp
= &p
[(*index
>> (level
* P_L2_BITS
)) & (P_L2_SIZE
- 1)];
283 while (*nb
&& lp
< &p
[P_L2_SIZE
]) {
284 if ((*index
& (step
- 1)) == 0 && *nb
>= step
) {
290 phys_page_set_level(map
, lp
, index
, nb
, leaf
, level
- 1);
296 static void phys_page_set(AddressSpaceDispatch
*d
,
297 hwaddr index
, hwaddr nb
,
300 /* Wildly overreserve - it doesn't matter much. */
301 phys_map_node_reserve(&d
->map
, 3 * P_L2_LEVELS
);
303 phys_page_set_level(&d
->map
, &d
->phys_map
, &index
, &nb
, leaf
, P_L2_LEVELS
- 1);
306 /* Compact a non leaf page entry. Simply detect that the entry has a single child,
307 * and update our entry so we can skip it and go directly to the destination.
309 static void phys_page_compact(PhysPageEntry
*lp
, Node
*nodes
)
311 unsigned valid_ptr
= P_L2_SIZE
;
316 if (lp
->ptr
== PHYS_MAP_NODE_NIL
) {
321 for (i
= 0; i
< P_L2_SIZE
; i
++) {
322 if (p
[i
].ptr
== PHYS_MAP_NODE_NIL
) {
329 phys_page_compact(&p
[i
], nodes
);
333 /* We can only compress if there's only one child. */
338 assert(valid_ptr
< P_L2_SIZE
);
340 /* Don't compress if it won't fit in the # of bits we have. */
341 if (lp
->skip
+ p
[valid_ptr
].skip
>= (1 << 3)) {
345 lp
->ptr
= p
[valid_ptr
].ptr
;
346 if (!p
[valid_ptr
].skip
) {
347 /* If our only child is a leaf, make this a leaf. */
348 /* By design, we should have made this node a leaf to begin with so we
349 * should never reach here.
350 * But since it's so simple to handle this, let's do it just in case we
355 lp
->skip
+= p
[valid_ptr
].skip
;
359 void address_space_dispatch_compact(AddressSpaceDispatch
*d
)
361 if (d
->phys_map
.skip
) {
362 phys_page_compact(&d
->phys_map
, d
->map
.nodes
);
366 static inline bool section_covers_addr(const MemoryRegionSection
*section
,
369 /* Memory topology clips a memory region to [0, 2^64); size.hi > 0 means
370 * the section must cover the entire address space.
372 return int128_gethi(section
->size
) ||
373 range_covers_byte(section
->offset_within_address_space
,
374 int128_getlo(section
->size
), addr
);
377 static MemoryRegionSection
*phys_page_find(AddressSpaceDispatch
*d
, hwaddr addr
)
379 PhysPageEntry lp
= d
->phys_map
, *p
;
380 Node
*nodes
= d
->map
.nodes
;
381 MemoryRegionSection
*sections
= d
->map
.sections
;
382 hwaddr index
= addr
>> TARGET_PAGE_BITS
;
385 for (i
= P_L2_LEVELS
; lp
.skip
&& (i
-= lp
.skip
) >= 0;) {
386 if (lp
.ptr
== PHYS_MAP_NODE_NIL
) {
387 return §ions
[PHYS_SECTION_UNASSIGNED
];
390 lp
= p
[(index
>> (i
* P_L2_BITS
)) & (P_L2_SIZE
- 1)];
393 if (section_covers_addr(§ions
[lp
.ptr
], addr
)) {
394 return §ions
[lp
.ptr
];
396 return §ions
[PHYS_SECTION_UNASSIGNED
];
400 bool memory_region_is_unassigned(MemoryRegion
*mr
)
402 return mr
!= &io_mem_rom
&& mr
!= &io_mem_notdirty
&& !mr
->rom_device
403 && mr
!= &io_mem_watch
;
406 /* Called from RCU critical section */
407 static MemoryRegionSection
*address_space_lookup_region(AddressSpaceDispatch
*d
,
409 bool resolve_subpage
)
411 MemoryRegionSection
*section
= atomic_read(&d
->mru_section
);
415 if (section
&& section
!= &d
->map
.sections
[PHYS_SECTION_UNASSIGNED
] &&
416 section_covers_addr(section
, addr
)) {
419 section
= phys_page_find(d
, addr
);
422 if (resolve_subpage
&& section
->mr
->subpage
) {
423 subpage
= container_of(section
->mr
, subpage_t
, iomem
);
424 section
= &d
->map
.sections
[subpage
->sub_section
[SUBPAGE_IDX(addr
)]];
427 atomic_set(&d
->mru_section
, section
);
432 /* Called from RCU critical section */
433 static MemoryRegionSection
*
434 address_space_translate_internal(AddressSpaceDispatch
*d
, hwaddr addr
, hwaddr
*xlat
,
435 hwaddr
*plen
, bool resolve_subpage
)
437 MemoryRegionSection
*section
;
441 section
= address_space_lookup_region(d
, addr
, resolve_subpage
);
442 /* Compute offset within MemoryRegionSection */
443 addr
-= section
->offset_within_address_space
;
445 /* Compute offset within MemoryRegion */
446 *xlat
= addr
+ section
->offset_within_region
;
450 /* MMIO registers can be expected to perform full-width accesses based only
451 * on their address, without considering adjacent registers that could
452 * decode to completely different MemoryRegions. When such registers
453 * exist (e.g. I/O ports 0xcf8 and 0xcf9 on most PC chipsets), MMIO
454 * regions overlap wildly. For this reason we cannot clamp the accesses
457 * If the length is small (as is the case for address_space_ldl/stl),
458 * everything works fine. If the incoming length is large, however,
459 * the caller really has to do the clamping through memory_access_size.
461 if (memory_region_is_ram(mr
)) {
462 diff
= int128_sub(section
->size
, int128_make64(addr
));
463 *plen
= int128_get64(int128_min(diff
, int128_make64(*plen
)));
469 * flatview_do_translate - translate an address in FlatView
471 * @fv: the flat view that we want to translate on
472 * @addr: the address to be translated in above address space
473 * @xlat: the translated address offset within memory region. It
475 * @plen_out: valid read/write length of the translated address. It
476 * can be @NULL when we don't care about it.
477 * @page_mask_out: page mask for the translated address. This
478 * should only be meaningful for IOMMU translated
479 * addresses, since there may be huge pages that this bit
480 * would tell. It can be @NULL if we don't care about it.
481 * @is_write: whether the translation operation is for write
482 * @is_mmio: whether this can be MMIO, set true if it can
484 * This function is called from RCU critical section
486 static MemoryRegionSection
flatview_do_translate(FlatView
*fv
,
490 hwaddr
*page_mask_out
,
493 AddressSpace
**target_as
)
496 MemoryRegionSection
*section
;
497 IOMMUMemoryRegion
*iommu_mr
;
498 IOMMUMemoryRegionClass
*imrc
;
499 hwaddr page_mask
= (hwaddr
)(-1);
500 hwaddr plen
= (hwaddr
)(-1);
507 section
= address_space_translate_internal(
508 flatview_to_dispatch(fv
), addr
, &addr
,
511 iommu_mr
= memory_region_get_iommu(section
->mr
);
515 imrc
= memory_region_get_iommu_class_nocheck(iommu_mr
);
517 iotlb
= imrc
->translate(iommu_mr
, addr
, is_write
?
518 IOMMU_WO
: IOMMU_RO
);
519 addr
= ((iotlb
.translated_addr
& ~iotlb
.addr_mask
)
520 | (addr
& iotlb
.addr_mask
));
521 page_mask
&= iotlb
.addr_mask
;
522 plen
= MIN(plen
, (addr
| iotlb
.addr_mask
) - addr
+ 1);
523 if (!(iotlb
.perm
& (1 << is_write
))) {
527 fv
= address_space_to_flatview(iotlb
.target_as
);
528 *target_as
= iotlb
.target_as
;
533 if (page_mask
== (hwaddr
)(-1)) {
534 /* Not behind an IOMMU, use default page size. */
535 page_mask
= ~TARGET_PAGE_MASK
;
539 *page_mask_out
= page_mask
;
549 return (MemoryRegionSection
) { .mr
= &io_mem_unassigned
};
552 /* Called from RCU critical section */
553 IOMMUTLBEntry
address_space_get_iotlb_entry(AddressSpace
*as
, hwaddr addr
,
556 MemoryRegionSection section
;
557 hwaddr xlat
, page_mask
;
560 * This can never be MMIO, and we don't really care about plen,
563 section
= flatview_do_translate(address_space_to_flatview(as
), addr
, &xlat
,
564 NULL
, &page_mask
, is_write
, false, &as
);
566 /* Illegal translation */
567 if (section
.mr
== &io_mem_unassigned
) {
571 /* Convert memory region offset into address space offset */
572 xlat
+= section
.offset_within_address_space
-
573 section
.offset_within_region
;
575 return (IOMMUTLBEntry
) {
577 .iova
= addr
& ~page_mask
,
578 .translated_addr
= xlat
& ~page_mask
,
579 .addr_mask
= page_mask
,
580 /* IOTLBs are for DMAs, and DMA only allows on RAMs. */
585 return (IOMMUTLBEntry
) {0};
588 /* Called from RCU critical section */
589 MemoryRegion
*flatview_translate(FlatView
*fv
, hwaddr addr
, hwaddr
*xlat
,
590 hwaddr
*plen
, bool is_write
)
593 MemoryRegionSection section
;
594 AddressSpace
*as
= NULL
;
596 /* This can be MMIO, so setup MMIO bit. */
597 section
= flatview_do_translate(fv
, addr
, xlat
, plen
, NULL
,
598 is_write
, true, &as
);
601 if (xen_enabled() && memory_access_is_direct(mr
, is_write
)) {
602 hwaddr page
= ((addr
& TARGET_PAGE_MASK
) + TARGET_PAGE_SIZE
) - addr
;
603 *plen
= MIN(page
, *plen
);
609 /* Called from RCU critical section */
610 MemoryRegionSection
*
611 address_space_translate_for_iotlb(CPUState
*cpu
, int asidx
, hwaddr addr
,
612 hwaddr
*xlat
, hwaddr
*plen
)
614 MemoryRegionSection
*section
;
615 AddressSpaceDispatch
*d
= atomic_rcu_read(&cpu
->cpu_ases
[asidx
].memory_dispatch
);
617 section
= address_space_translate_internal(d
, addr
, xlat
, plen
, false);
619 assert(!memory_region_is_iommu(section
->mr
));
624 #if !defined(CONFIG_USER_ONLY)
626 static int cpu_common_post_load(void *opaque
, int version_id
)
628 CPUState
*cpu
= opaque
;
630 /* 0x01 was CPU_INTERRUPT_EXIT. This line can be removed when the
631 version_id is increased. */
632 cpu
->interrupt_request
&= ~0x01;
638 static int cpu_common_pre_load(void *opaque
)
640 CPUState
*cpu
= opaque
;
642 cpu
->exception_index
= -1;
647 static bool cpu_common_exception_index_needed(void *opaque
)
649 CPUState
*cpu
= opaque
;
651 return tcg_enabled() && cpu
->exception_index
!= -1;
654 static const VMStateDescription vmstate_cpu_common_exception_index
= {
655 .name
= "cpu_common/exception_index",
657 .minimum_version_id
= 1,
658 .needed
= cpu_common_exception_index_needed
,
659 .fields
= (VMStateField
[]) {
660 VMSTATE_INT32(exception_index
, CPUState
),
661 VMSTATE_END_OF_LIST()
665 static bool cpu_common_crash_occurred_needed(void *opaque
)
667 CPUState
*cpu
= opaque
;
669 return cpu
->crash_occurred
;
672 static const VMStateDescription vmstate_cpu_common_crash_occurred
= {
673 .name
= "cpu_common/crash_occurred",
675 .minimum_version_id
= 1,
676 .needed
= cpu_common_crash_occurred_needed
,
677 .fields
= (VMStateField
[]) {
678 VMSTATE_BOOL(crash_occurred
, CPUState
),
679 VMSTATE_END_OF_LIST()
683 const VMStateDescription vmstate_cpu_common
= {
684 .name
= "cpu_common",
686 .minimum_version_id
= 1,
687 .pre_load
= cpu_common_pre_load
,
688 .post_load
= cpu_common_post_load
,
689 .fields
= (VMStateField
[]) {
690 VMSTATE_UINT32(halted
, CPUState
),
691 VMSTATE_UINT32(interrupt_request
, CPUState
),
692 VMSTATE_END_OF_LIST()
694 .subsections
= (const VMStateDescription
*[]) {
695 &vmstate_cpu_common_exception_index
,
696 &vmstate_cpu_common_crash_occurred
,
703 CPUState
*qemu_get_cpu(int index
)
708 if (cpu
->cpu_index
== index
) {
716 #if !defined(CONFIG_USER_ONLY)
717 void cpu_address_space_init(CPUState
*cpu
, AddressSpace
*as
, int asidx
)
719 CPUAddressSpace
*newas
;
721 /* Target code should have set num_ases before calling us */
722 assert(asidx
< cpu
->num_ases
);
725 /* address space 0 gets the convenience alias */
729 /* KVM cannot currently support multiple address spaces. */
730 assert(asidx
== 0 || !kvm_enabled());
732 if (!cpu
->cpu_ases
) {
733 cpu
->cpu_ases
= g_new0(CPUAddressSpace
, cpu
->num_ases
);
736 newas
= &cpu
->cpu_ases
[asidx
];
740 newas
->tcg_as_listener
.commit
= tcg_commit
;
741 memory_listener_register(&newas
->tcg_as_listener
, as
);
745 AddressSpace
*cpu_get_address_space(CPUState
*cpu
, int asidx
)
747 /* Return the AddressSpace corresponding to the specified index */
748 return cpu
->cpu_ases
[asidx
].as
;
752 void cpu_exec_unrealizefn(CPUState
*cpu
)
754 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
756 cpu_list_remove(cpu
);
758 if (cc
->vmsd
!= NULL
) {
759 vmstate_unregister(NULL
, cc
->vmsd
, cpu
);
761 if (qdev_get_vmsd(DEVICE(cpu
)) == NULL
) {
762 vmstate_unregister(NULL
, &vmstate_cpu_common
, cpu
);
766 Property cpu_common_props
[] = {
767 #ifndef CONFIG_USER_ONLY
768 /* Create a memory property for softmmu CPU object,
769 * so users can wire up its memory. (This can't go in qom/cpu.c
770 * because that file is compiled only once for both user-mode
771 * and system builds.) The default if no link is set up is to use
772 * the system address space.
774 DEFINE_PROP_LINK("memory", CPUState
, memory
, TYPE_MEMORY_REGION
,
777 DEFINE_PROP_END_OF_LIST(),
780 void cpu_exec_initfn(CPUState
*cpu
)
782 #ifdef TARGET_WORDS_BIGENDIAN
783 cpu
->bigendian
= true;
785 cpu
->bigendian
= false;
790 #ifndef CONFIG_USER_ONLY
791 cpu
->thread_id
= qemu_get_thread_id();
792 cpu
->memory
= system_memory
;
793 object_ref(OBJECT(cpu
->memory
));
797 void cpu_exec_realizefn(CPUState
*cpu
, Error
**errp
)
799 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
803 if (tcg_enabled() && !cc
->tcg_initialized
) {
804 cc
->tcg_initialized
= true;
805 cc
->tcg_initialize();
808 #ifndef CONFIG_USER_ONLY
809 if (qdev_get_vmsd(DEVICE(cpu
)) == NULL
) {
810 vmstate_register(NULL
, cpu
->cpu_index
, &vmstate_cpu_common
, cpu
);
812 if (cc
->vmsd
!= NULL
) {
813 vmstate_register(NULL
, cpu
->cpu_index
, cc
->vmsd
, cpu
);
818 #if defined(CONFIG_USER_ONLY)
819 static void breakpoint_invalidate(CPUState
*cpu
, target_ulong pc
)
823 tb_invalidate_phys_page_range(pc
, pc
+ 1, 0);
828 static void breakpoint_invalidate(CPUState
*cpu
, target_ulong pc
)
831 hwaddr phys
= cpu_get_phys_page_attrs_debug(cpu
, pc
, &attrs
);
832 int asidx
= cpu_asidx_from_attrs(cpu
, attrs
);
834 /* Locks grabbed by tb_invalidate_phys_addr */
835 tb_invalidate_phys_addr(cpu
->cpu_ases
[asidx
].as
,
836 phys
| (pc
& ~TARGET_PAGE_MASK
));
841 #if defined(CONFIG_USER_ONLY)
842 void cpu_watchpoint_remove_all(CPUState
*cpu
, int mask
)
847 int cpu_watchpoint_remove(CPUState
*cpu
, vaddr addr
, vaddr len
,
853 void cpu_watchpoint_remove_by_ref(CPUState
*cpu
, CPUWatchpoint
*watchpoint
)
857 int cpu_watchpoint_insert(CPUState
*cpu
, vaddr addr
, vaddr len
,
858 int flags
, CPUWatchpoint
**watchpoint
)
863 /* Add a watchpoint. */
864 int cpu_watchpoint_insert(CPUState
*cpu
, vaddr addr
, vaddr len
,
865 int flags
, CPUWatchpoint
**watchpoint
)
869 /* forbid ranges which are empty or run off the end of the address space */
870 if (len
== 0 || (addr
+ len
- 1) < addr
) {
871 error_report("tried to set invalid watchpoint at %"
872 VADDR_PRIx
", len=%" VADDR_PRIu
, addr
, len
);
875 wp
= g_malloc(sizeof(*wp
));
881 /* keep all GDB-injected watchpoints in front */
882 if (flags
& BP_GDB
) {
883 QTAILQ_INSERT_HEAD(&cpu
->watchpoints
, wp
, entry
);
885 QTAILQ_INSERT_TAIL(&cpu
->watchpoints
, wp
, entry
);
888 tlb_flush_page(cpu
, addr
);
895 /* Remove a specific watchpoint. */
896 int cpu_watchpoint_remove(CPUState
*cpu
, vaddr addr
, vaddr len
,
901 QTAILQ_FOREACH(wp
, &cpu
->watchpoints
, entry
) {
902 if (addr
== wp
->vaddr
&& len
== wp
->len
903 && flags
== (wp
->flags
& ~BP_WATCHPOINT_HIT
)) {
904 cpu_watchpoint_remove_by_ref(cpu
, wp
);
911 /* Remove a specific watchpoint by reference. */
912 void cpu_watchpoint_remove_by_ref(CPUState
*cpu
, CPUWatchpoint
*watchpoint
)
914 QTAILQ_REMOVE(&cpu
->watchpoints
, watchpoint
, entry
);
916 tlb_flush_page(cpu
, watchpoint
->vaddr
);
921 /* Remove all matching watchpoints. */
922 void cpu_watchpoint_remove_all(CPUState
*cpu
, int mask
)
924 CPUWatchpoint
*wp
, *next
;
926 QTAILQ_FOREACH_SAFE(wp
, &cpu
->watchpoints
, entry
, next
) {
927 if (wp
->flags
& mask
) {
928 cpu_watchpoint_remove_by_ref(cpu
, wp
);
933 /* Return true if this watchpoint address matches the specified
934 * access (ie the address range covered by the watchpoint overlaps
935 * partially or completely with the address range covered by the
938 static inline bool cpu_watchpoint_address_matches(CPUWatchpoint
*wp
,
942 /* We know the lengths are non-zero, but a little caution is
943 * required to avoid errors in the case where the range ends
944 * exactly at the top of the address space and so addr + len
945 * wraps round to zero.
947 vaddr wpend
= wp
->vaddr
+ wp
->len
- 1;
948 vaddr addrend
= addr
+ len
- 1;
950 return !(addr
> wpend
|| wp
->vaddr
> addrend
);
955 /* Add a breakpoint. */
956 int cpu_breakpoint_insert(CPUState
*cpu
, vaddr pc
, int flags
,
957 CPUBreakpoint
**breakpoint
)
961 bp
= g_malloc(sizeof(*bp
));
966 /* keep all GDB-injected breakpoints in front */
967 if (flags
& BP_GDB
) {
968 QTAILQ_INSERT_HEAD(&cpu
->breakpoints
, bp
, entry
);
970 QTAILQ_INSERT_TAIL(&cpu
->breakpoints
, bp
, entry
);
973 breakpoint_invalidate(cpu
, pc
);
981 /* Remove a specific breakpoint. */
982 int cpu_breakpoint_remove(CPUState
*cpu
, vaddr pc
, int flags
)
986 QTAILQ_FOREACH(bp
, &cpu
->breakpoints
, entry
) {
987 if (bp
->pc
== pc
&& bp
->flags
== flags
) {
988 cpu_breakpoint_remove_by_ref(cpu
, bp
);
995 /* Remove a specific breakpoint by reference. */
996 void cpu_breakpoint_remove_by_ref(CPUState
*cpu
, CPUBreakpoint
*breakpoint
)
998 QTAILQ_REMOVE(&cpu
->breakpoints
, breakpoint
, entry
);
1000 breakpoint_invalidate(cpu
, breakpoint
->pc
);
1005 /* Remove all matching breakpoints. */
1006 void cpu_breakpoint_remove_all(CPUState
*cpu
, int mask
)
1008 CPUBreakpoint
*bp
, *next
;
1010 QTAILQ_FOREACH_SAFE(bp
, &cpu
->breakpoints
, entry
, next
) {
1011 if (bp
->flags
& mask
) {
1012 cpu_breakpoint_remove_by_ref(cpu
, bp
);
1017 /* enable or disable single step mode. EXCP_DEBUG is returned by the
1018 CPU loop after each instruction */
1019 void cpu_single_step(CPUState
*cpu
, int enabled
)
1021 if (cpu
->singlestep_enabled
!= enabled
) {
1022 cpu
->singlestep_enabled
= enabled
;
1023 if (kvm_enabled()) {
1024 kvm_update_guest_debug(cpu
, 0);
1026 /* must flush all the translated code to avoid inconsistencies */
1027 /* XXX: only flush what is necessary */
1033 void QEMU_NORETURN
cpu_abort(CPUState
*cpu
, const char *fmt
, ...)
1040 fprintf(stderr
, "qemu: fatal: ");
1041 vfprintf(stderr
, fmt
, ap
);
1042 fprintf(stderr
, "\n");
1043 cpu_dump_state(cpu
, stderr
, fprintf
, CPU_DUMP_FPU
| CPU_DUMP_CCOP
);
1044 if (qemu_log_separate()) {
1046 qemu_log("qemu: fatal: ");
1047 qemu_log_vprintf(fmt
, ap2
);
1049 log_cpu_state(cpu
, CPU_DUMP_FPU
| CPU_DUMP_CCOP
);
1057 #if defined(CONFIG_USER_ONLY)
1059 struct sigaction act
;
1060 sigfillset(&act
.sa_mask
);
1061 act
.sa_handler
= SIG_DFL
;
1062 sigaction(SIGABRT
, &act
, NULL
);
1068 #if !defined(CONFIG_USER_ONLY)
1069 /* Called from RCU critical section */
1070 static RAMBlock
*qemu_get_ram_block(ram_addr_t addr
)
1074 block
= atomic_rcu_read(&ram_list
.mru_block
);
1075 if (block
&& addr
- block
->offset
< block
->max_length
) {
1078 RAMBLOCK_FOREACH(block
) {
1079 if (addr
- block
->offset
< block
->max_length
) {
1084 fprintf(stderr
, "Bad ram offset %" PRIx64
"\n", (uint64_t)addr
);
1088 /* It is safe to write mru_block outside the iothread lock. This
1093 * xxx removed from list
1097 * call_rcu(reclaim_ramblock, xxx);
1100 * atomic_rcu_set is not needed here. The block was already published
1101 * when it was placed into the list. Here we're just making an extra
1102 * copy of the pointer.
1104 ram_list
.mru_block
= block
;
1108 static void tlb_reset_dirty_range_all(ram_addr_t start
, ram_addr_t length
)
1115 end
= TARGET_PAGE_ALIGN(start
+ length
);
1116 start
&= TARGET_PAGE_MASK
;
1119 block
= qemu_get_ram_block(start
);
1120 assert(block
== qemu_get_ram_block(end
- 1));
1121 start1
= (uintptr_t)ramblock_ptr(block
, start
- block
->offset
);
1123 tlb_reset_dirty(cpu
, start1
, length
);
1128 /* Note: start and end must be within the same ram block. */
1129 bool cpu_physical_memory_test_and_clear_dirty(ram_addr_t start
,
1133 DirtyMemoryBlocks
*blocks
;
1134 unsigned long end
, page
;
1141 end
= TARGET_PAGE_ALIGN(start
+ length
) >> TARGET_PAGE_BITS
;
1142 page
= start
>> TARGET_PAGE_BITS
;
1146 blocks
= atomic_rcu_read(&ram_list
.dirty_memory
[client
]);
1148 while (page
< end
) {
1149 unsigned long idx
= page
/ DIRTY_MEMORY_BLOCK_SIZE
;
1150 unsigned long offset
= page
% DIRTY_MEMORY_BLOCK_SIZE
;
1151 unsigned long num
= MIN(end
- page
, DIRTY_MEMORY_BLOCK_SIZE
- offset
);
1153 dirty
|= bitmap_test_and_clear_atomic(blocks
->blocks
[idx
],
1160 if (dirty
&& tcg_enabled()) {
1161 tlb_reset_dirty_range_all(start
, length
);
1167 DirtyBitmapSnapshot
*cpu_physical_memory_snapshot_and_clear_dirty
1168 (ram_addr_t start
, ram_addr_t length
, unsigned client
)
1170 DirtyMemoryBlocks
*blocks
;
1171 unsigned long align
= 1UL << (TARGET_PAGE_BITS
+ BITS_PER_LEVEL
);
1172 ram_addr_t first
= QEMU_ALIGN_DOWN(start
, align
);
1173 ram_addr_t last
= QEMU_ALIGN_UP(start
+ length
, align
);
1174 DirtyBitmapSnapshot
*snap
;
1175 unsigned long page
, end
, dest
;
1177 snap
= g_malloc0(sizeof(*snap
) +
1178 ((last
- first
) >> (TARGET_PAGE_BITS
+ 3)));
1179 snap
->start
= first
;
1182 page
= first
>> TARGET_PAGE_BITS
;
1183 end
= last
>> TARGET_PAGE_BITS
;
1188 blocks
= atomic_rcu_read(&ram_list
.dirty_memory
[client
]);
1190 while (page
< end
) {
1191 unsigned long idx
= page
/ DIRTY_MEMORY_BLOCK_SIZE
;
1192 unsigned long offset
= page
% DIRTY_MEMORY_BLOCK_SIZE
;
1193 unsigned long num
= MIN(end
- page
, DIRTY_MEMORY_BLOCK_SIZE
- offset
);
1195 assert(QEMU_IS_ALIGNED(offset
, (1 << BITS_PER_LEVEL
)));
1196 assert(QEMU_IS_ALIGNED(num
, (1 << BITS_PER_LEVEL
)));
1197 offset
>>= BITS_PER_LEVEL
;
1199 bitmap_copy_and_clear_atomic(snap
->dirty
+ dest
,
1200 blocks
->blocks
[idx
] + offset
,
1203 dest
+= num
>> BITS_PER_LEVEL
;
1208 if (tcg_enabled()) {
1209 tlb_reset_dirty_range_all(start
, length
);
1215 bool cpu_physical_memory_snapshot_get_dirty(DirtyBitmapSnapshot
*snap
,
1219 unsigned long page
, end
;
1221 assert(start
>= snap
->start
);
1222 assert(start
+ length
<= snap
->end
);
1224 end
= TARGET_PAGE_ALIGN(start
+ length
- snap
->start
) >> TARGET_PAGE_BITS
;
1225 page
= (start
- snap
->start
) >> TARGET_PAGE_BITS
;
1227 while (page
< end
) {
1228 if (test_bit(page
, snap
->dirty
)) {
1236 /* Called from RCU critical section */
1237 hwaddr
memory_region_section_get_iotlb(CPUState
*cpu
,
1238 MemoryRegionSection
*section
,
1240 hwaddr paddr
, hwaddr xlat
,
1242 target_ulong
*address
)
1247 if (memory_region_is_ram(section
->mr
)) {
1249 iotlb
= memory_region_get_ram_addr(section
->mr
) + xlat
;
1250 if (!section
->readonly
) {
1251 iotlb
|= PHYS_SECTION_NOTDIRTY
;
1253 iotlb
|= PHYS_SECTION_ROM
;
1256 AddressSpaceDispatch
*d
;
1258 d
= flatview_to_dispatch(section
->fv
);
1259 iotlb
= section
- d
->map
.sections
;
1263 /* Make accesses to pages with watchpoints go via the
1264 watchpoint trap routines. */
1265 QTAILQ_FOREACH(wp
, &cpu
->watchpoints
, entry
) {
1266 if (cpu_watchpoint_address_matches(wp
, vaddr
, TARGET_PAGE_SIZE
)) {
1267 /* Avoid trapping reads of pages with a write breakpoint. */
1268 if ((prot
& PAGE_WRITE
) || (wp
->flags
& BP_MEM_READ
)) {
1269 iotlb
= PHYS_SECTION_WATCH
+ paddr
;
1270 *address
|= TLB_MMIO
;
1278 #endif /* defined(CONFIG_USER_ONLY) */
1280 #if !defined(CONFIG_USER_ONLY)
1282 static int subpage_register (subpage_t
*mmio
, uint32_t start
, uint32_t end
,
1284 static subpage_t
*subpage_init(FlatView
*fv
, hwaddr base
);
1286 static void *(*phys_mem_alloc
)(size_t size
, uint64_t *align
) =
1287 qemu_anon_ram_alloc
;
1290 * Set a custom physical guest memory alloator.
1291 * Accelerators with unusual needs may need this. Hopefully, we can
1292 * get rid of it eventually.
1294 void phys_mem_set_alloc(void *(*alloc
)(size_t, uint64_t *align
))
1296 phys_mem_alloc
= alloc
;
1299 static uint16_t phys_section_add(PhysPageMap
*map
,
1300 MemoryRegionSection
*section
)
1302 /* The physical section number is ORed with a page-aligned
1303 * pointer to produce the iotlb entries. Thus it should
1304 * never overflow into the page-aligned value.
1306 assert(map
->sections_nb
< TARGET_PAGE_SIZE
);
1308 if (map
->sections_nb
== map
->sections_nb_alloc
) {
1309 map
->sections_nb_alloc
= MAX(map
->sections_nb_alloc
* 2, 16);
1310 map
->sections
= g_renew(MemoryRegionSection
, map
->sections
,
1311 map
->sections_nb_alloc
);
1313 map
->sections
[map
->sections_nb
] = *section
;
1314 memory_region_ref(section
->mr
);
1315 return map
->sections_nb
++;
1318 static void phys_section_destroy(MemoryRegion
*mr
)
1320 bool have_sub_page
= mr
->subpage
;
1322 memory_region_unref(mr
);
1324 if (have_sub_page
) {
1325 subpage_t
*subpage
= container_of(mr
, subpage_t
, iomem
);
1326 object_unref(OBJECT(&subpage
->iomem
));
1331 static void phys_sections_free(PhysPageMap
*map
)
1333 while (map
->sections_nb
> 0) {
1334 MemoryRegionSection
*section
= &map
->sections
[--map
->sections_nb
];
1335 phys_section_destroy(section
->mr
);
1337 g_free(map
->sections
);
1341 static void register_subpage(FlatView
*fv
, MemoryRegionSection
*section
)
1343 AddressSpaceDispatch
*d
= flatview_to_dispatch(fv
);
1345 hwaddr base
= section
->offset_within_address_space
1347 MemoryRegionSection
*existing
= phys_page_find(d
, base
);
1348 MemoryRegionSection subsection
= {
1349 .offset_within_address_space
= base
,
1350 .size
= int128_make64(TARGET_PAGE_SIZE
),
1354 assert(existing
->mr
->subpage
|| existing
->mr
== &io_mem_unassigned
);
1356 if (!(existing
->mr
->subpage
)) {
1357 subpage
= subpage_init(fv
, base
);
1359 subsection
.mr
= &subpage
->iomem
;
1360 phys_page_set(d
, base
>> TARGET_PAGE_BITS
, 1,
1361 phys_section_add(&d
->map
, &subsection
));
1363 subpage
= container_of(existing
->mr
, subpage_t
, iomem
);
1365 start
= section
->offset_within_address_space
& ~TARGET_PAGE_MASK
;
1366 end
= start
+ int128_get64(section
->size
) - 1;
1367 subpage_register(subpage
, start
, end
,
1368 phys_section_add(&d
->map
, section
));
1372 static void register_multipage(FlatView
*fv
,
1373 MemoryRegionSection
*section
)
1375 AddressSpaceDispatch
*d
= flatview_to_dispatch(fv
);
1376 hwaddr start_addr
= section
->offset_within_address_space
;
1377 uint16_t section_index
= phys_section_add(&d
->map
, section
);
1378 uint64_t num_pages
= int128_get64(int128_rshift(section
->size
,
1382 phys_page_set(d
, start_addr
>> TARGET_PAGE_BITS
, num_pages
, section_index
);
1385 void flatview_add_to_dispatch(FlatView
*fv
, MemoryRegionSection
*section
)
1387 MemoryRegionSection now
= *section
, remain
= *section
;
1388 Int128 page_size
= int128_make64(TARGET_PAGE_SIZE
);
1390 if (now
.offset_within_address_space
& ~TARGET_PAGE_MASK
) {
1391 uint64_t left
= TARGET_PAGE_ALIGN(now
.offset_within_address_space
)
1392 - now
.offset_within_address_space
;
1394 now
.size
= int128_min(int128_make64(left
), now
.size
);
1395 register_subpage(fv
, &now
);
1397 now
.size
= int128_zero();
1399 while (int128_ne(remain
.size
, now
.size
)) {
1400 remain
.size
= int128_sub(remain
.size
, now
.size
);
1401 remain
.offset_within_address_space
+= int128_get64(now
.size
);
1402 remain
.offset_within_region
+= int128_get64(now
.size
);
1404 if (int128_lt(remain
.size
, page_size
)) {
1405 register_subpage(fv
, &now
);
1406 } else if (remain
.offset_within_address_space
& ~TARGET_PAGE_MASK
) {
1407 now
.size
= page_size
;
1408 register_subpage(fv
, &now
);
1410 now
.size
= int128_and(now
.size
, int128_neg(page_size
));
1411 register_multipage(fv
, &now
);
1416 void qemu_flush_coalesced_mmio_buffer(void)
1419 kvm_flush_coalesced_mmio_buffer();
1422 void qemu_mutex_lock_ramlist(void)
1424 qemu_mutex_lock(&ram_list
.mutex
);
1427 void qemu_mutex_unlock_ramlist(void)
1429 qemu_mutex_unlock(&ram_list
.mutex
);
1432 void ram_block_dump(Monitor
*mon
)
1438 monitor_printf(mon
, "%24s %8s %18s %18s %18s\n",
1439 "Block Name", "PSize", "Offset", "Used", "Total");
1440 RAMBLOCK_FOREACH(block
) {
1441 psize
= size_to_str(block
->page_size
);
1442 monitor_printf(mon
, "%24s %8s 0x%016" PRIx64
" 0x%016" PRIx64
1443 " 0x%016" PRIx64
"\n", block
->idstr
, psize
,
1444 (uint64_t)block
->offset
,
1445 (uint64_t)block
->used_length
,
1446 (uint64_t)block
->max_length
);
1454 * FIXME TOCTTOU: this iterates over memory backends' mem-path, which
1455 * may or may not name the same files / on the same filesystem now as
1456 * when we actually open and map them. Iterate over the file
1457 * descriptors instead, and use qemu_fd_getpagesize().
1459 static int find_max_supported_pagesize(Object
*obj
, void *opaque
)
1462 long *hpsize_min
= opaque
;
1464 if (object_dynamic_cast(obj
, TYPE_MEMORY_BACKEND
)) {
1465 mem_path
= object_property_get_str(obj
, "mem-path", NULL
);
1467 long hpsize
= qemu_mempath_getpagesize(mem_path
);
1468 if (hpsize
< *hpsize_min
) {
1469 *hpsize_min
= hpsize
;
1472 *hpsize_min
= getpagesize();
1479 long qemu_getrampagesize(void)
1481 long hpsize
= LONG_MAX
;
1482 long mainrampagesize
;
1483 Object
*memdev_root
;
1486 mainrampagesize
= qemu_mempath_getpagesize(mem_path
);
1488 mainrampagesize
= getpagesize();
1491 /* it's possible we have memory-backend objects with
1492 * hugepage-backed RAM. these may get mapped into system
1493 * address space via -numa parameters or memory hotplug
1494 * hooks. we want to take these into account, but we
1495 * also want to make sure these supported hugepage
1496 * sizes are applicable across the entire range of memory
1497 * we may boot from, so we take the min across all
1498 * backends, and assume normal pages in cases where a
1499 * backend isn't backed by hugepages.
1501 memdev_root
= object_resolve_path("/objects", NULL
);
1503 object_child_foreach(memdev_root
, find_max_supported_pagesize
, &hpsize
);
1505 if (hpsize
== LONG_MAX
) {
1506 /* No additional memory regions found ==> Report main RAM page size */
1507 return mainrampagesize
;
1510 /* If NUMA is disabled or the NUMA nodes are not backed with a
1511 * memory-backend, then there is at least one node using "normal" RAM,
1512 * so if its page size is smaller we have got to report that size instead.
1514 if (hpsize
> mainrampagesize
&&
1515 (nb_numa_nodes
== 0 || numa_info
[0].node_memdev
== NULL
)) {
1518 error_report("Huge page support disabled (n/a for main memory).");
1521 return mainrampagesize
;
1527 long qemu_getrampagesize(void)
1529 return getpagesize();
1534 static int64_t get_file_size(int fd
)
1536 int64_t size
= lseek(fd
, 0, SEEK_END
);
1543 static int file_ram_open(const char *path
,
1544 const char *region_name
,
1549 char *sanitized_name
;
1555 fd
= open(path
, O_RDWR
);
1557 /* @path names an existing file, use it */
1560 if (errno
== ENOENT
) {
1561 /* @path names a file that doesn't exist, create it */
1562 fd
= open(path
, O_RDWR
| O_CREAT
| O_EXCL
, 0644);
1567 } else if (errno
== EISDIR
) {
1568 /* @path names a directory, create a file there */
1569 /* Make name safe to use with mkstemp by replacing '/' with '_'. */
1570 sanitized_name
= g_strdup(region_name
);
1571 for (c
= sanitized_name
; *c
!= '\0'; c
++) {
1577 filename
= g_strdup_printf("%s/qemu_back_mem.%s.XXXXXX", path
,
1579 g_free(sanitized_name
);
1581 fd
= mkstemp(filename
);
1589 if (errno
!= EEXIST
&& errno
!= EINTR
) {
1590 error_setg_errno(errp
, errno
,
1591 "can't open backing store %s for guest RAM",
1596 * Try again on EINTR and EEXIST. The latter happens when
1597 * something else creates the file between our two open().
1604 static void *file_ram_alloc(RAMBlock
*block
,
1612 block
->page_size
= qemu_fd_getpagesize(fd
);
1613 block
->mr
->align
= block
->page_size
;
1614 #if defined(__s390x__)
1615 if (kvm_enabled()) {
1616 block
->mr
->align
= MAX(block
->mr
->align
, QEMU_VMALLOC_ALIGN
);
1620 if (memory
< block
->page_size
) {
1621 error_setg(errp
, "memory size 0x" RAM_ADDR_FMT
" must be equal to "
1622 "or larger than page size 0x%zx",
1623 memory
, block
->page_size
);
1627 memory
= ROUND_UP(memory
, block
->page_size
);
1630 * ftruncate is not supported by hugetlbfs in older
1631 * hosts, so don't bother bailing out on errors.
1632 * If anything goes wrong with it under other filesystems,
1635 * Do not truncate the non-empty backend file to avoid corrupting
1636 * the existing data in the file. Disabling shrinking is not
1637 * enough. For example, the current vNVDIMM implementation stores
1638 * the guest NVDIMM labels at the end of the backend file. If the
1639 * backend file is later extended, QEMU will not be able to find
1640 * those labels. Therefore, extending the non-empty backend file
1641 * is disabled as well.
1643 if (truncate
&& ftruncate(fd
, memory
)) {
1644 perror("ftruncate");
1647 area
= qemu_ram_mmap(fd
, memory
, block
->mr
->align
,
1648 block
->flags
& RAM_SHARED
);
1649 if (area
== MAP_FAILED
) {
1650 error_setg_errno(errp
, errno
,
1651 "unable to map backing store for guest RAM");
1656 os_mem_prealloc(fd
, area
, memory
, smp_cpus
, errp
);
1657 if (errp
&& *errp
) {
1658 qemu_ram_munmap(area
, memory
);
1668 /* Called with the ramlist lock held. */
1669 static ram_addr_t
find_ram_offset(ram_addr_t size
)
1671 RAMBlock
*block
, *next_block
;
1672 ram_addr_t offset
= RAM_ADDR_MAX
, mingap
= RAM_ADDR_MAX
;
1674 assert(size
!= 0); /* it would hand out same offset multiple times */
1676 if (QLIST_EMPTY_RCU(&ram_list
.blocks
)) {
1680 RAMBLOCK_FOREACH(block
) {
1681 ram_addr_t end
, next
= RAM_ADDR_MAX
;
1683 end
= block
->offset
+ block
->max_length
;
1685 RAMBLOCK_FOREACH(next_block
) {
1686 if (next_block
->offset
>= end
) {
1687 next
= MIN(next
, next_block
->offset
);
1690 if (next
- end
>= size
&& next
- end
< mingap
) {
1692 mingap
= next
- end
;
1696 if (offset
== RAM_ADDR_MAX
) {
1697 fprintf(stderr
, "Failed to find gap of requested size: %" PRIu64
"\n",
1705 unsigned long last_ram_page(void)
1708 ram_addr_t last
= 0;
1711 RAMBLOCK_FOREACH(block
) {
1712 last
= MAX(last
, block
->offset
+ block
->max_length
);
1715 return last
>> TARGET_PAGE_BITS
;
1718 static void qemu_ram_setup_dump(void *addr
, ram_addr_t size
)
1722 /* Use MADV_DONTDUMP, if user doesn't want the guest memory in the core */
1723 if (!machine_dump_guest_core(current_machine
)) {
1724 ret
= qemu_madvise(addr
, size
, QEMU_MADV_DONTDUMP
);
1726 perror("qemu_madvise");
1727 fprintf(stderr
, "madvise doesn't support MADV_DONTDUMP, "
1728 "but dump_guest_core=off specified\n");
1733 const char *qemu_ram_get_idstr(RAMBlock
*rb
)
1738 bool qemu_ram_is_shared(RAMBlock
*rb
)
1740 return rb
->flags
& RAM_SHARED
;
1743 /* Called with iothread lock held. */
1744 void qemu_ram_set_idstr(RAMBlock
*new_block
, const char *name
, DeviceState
*dev
)
1749 assert(!new_block
->idstr
[0]);
1752 char *id
= qdev_get_dev_path(dev
);
1754 snprintf(new_block
->idstr
, sizeof(new_block
->idstr
), "%s/", id
);
1758 pstrcat(new_block
->idstr
, sizeof(new_block
->idstr
), name
);
1761 RAMBLOCK_FOREACH(block
) {
1762 if (block
!= new_block
&&
1763 !strcmp(block
->idstr
, new_block
->idstr
)) {
1764 fprintf(stderr
, "RAMBlock \"%s\" already registered, abort!\n",
1772 /* Called with iothread lock held. */
1773 void qemu_ram_unset_idstr(RAMBlock
*block
)
1775 /* FIXME: arch_init.c assumes that this is not called throughout
1776 * migration. Ignore the problem since hot-unplug during migration
1777 * does not work anyway.
1780 memset(block
->idstr
, 0, sizeof(block
->idstr
));
1784 size_t qemu_ram_pagesize(RAMBlock
*rb
)
1786 return rb
->page_size
;
1789 /* Returns the largest size of page in use */
1790 size_t qemu_ram_pagesize_largest(void)
1795 RAMBLOCK_FOREACH(block
) {
1796 largest
= MAX(largest
, qemu_ram_pagesize(block
));
1802 static int memory_try_enable_merging(void *addr
, size_t len
)
1804 if (!machine_mem_merge(current_machine
)) {
1805 /* disabled by the user */
1809 return qemu_madvise(addr
, len
, QEMU_MADV_MERGEABLE
);
1812 /* Only legal before guest might have detected the memory size: e.g. on
1813 * incoming migration, or right after reset.
1815 * As memory core doesn't know how is memory accessed, it is up to
1816 * resize callback to update device state and/or add assertions to detect
1817 * misuse, if necessary.
1819 int qemu_ram_resize(RAMBlock
*block
, ram_addr_t newsize
, Error
**errp
)
1823 newsize
= HOST_PAGE_ALIGN(newsize
);
1825 if (block
->used_length
== newsize
) {
1829 if (!(block
->flags
& RAM_RESIZEABLE
)) {
1830 error_setg_errno(errp
, EINVAL
,
1831 "Length mismatch: %s: 0x" RAM_ADDR_FMT
1832 " in != 0x" RAM_ADDR_FMT
, block
->idstr
,
1833 newsize
, block
->used_length
);
1837 if (block
->max_length
< newsize
) {
1838 error_setg_errno(errp
, EINVAL
,
1839 "Length too large: %s: 0x" RAM_ADDR_FMT
1840 " > 0x" RAM_ADDR_FMT
, block
->idstr
,
1841 newsize
, block
->max_length
);
1845 cpu_physical_memory_clear_dirty_range(block
->offset
, block
->used_length
);
1846 block
->used_length
= newsize
;
1847 cpu_physical_memory_set_dirty_range(block
->offset
, block
->used_length
,
1849 memory_region_set_size(block
->mr
, newsize
);
1850 if (block
->resized
) {
1851 block
->resized(block
->idstr
, newsize
, block
->host
);
1856 /* Called with ram_list.mutex held */
1857 static void dirty_memory_extend(ram_addr_t old_ram_size
,
1858 ram_addr_t new_ram_size
)
1860 ram_addr_t old_num_blocks
= DIV_ROUND_UP(old_ram_size
,
1861 DIRTY_MEMORY_BLOCK_SIZE
);
1862 ram_addr_t new_num_blocks
= DIV_ROUND_UP(new_ram_size
,
1863 DIRTY_MEMORY_BLOCK_SIZE
);
1866 /* Only need to extend if block count increased */
1867 if (new_num_blocks
<= old_num_blocks
) {
1871 for (i
= 0; i
< DIRTY_MEMORY_NUM
; i
++) {
1872 DirtyMemoryBlocks
*old_blocks
;
1873 DirtyMemoryBlocks
*new_blocks
;
1876 old_blocks
= atomic_rcu_read(&ram_list
.dirty_memory
[i
]);
1877 new_blocks
= g_malloc(sizeof(*new_blocks
) +
1878 sizeof(new_blocks
->blocks
[0]) * new_num_blocks
);
1880 if (old_num_blocks
) {
1881 memcpy(new_blocks
->blocks
, old_blocks
->blocks
,
1882 old_num_blocks
* sizeof(old_blocks
->blocks
[0]));
1885 for (j
= old_num_blocks
; j
< new_num_blocks
; j
++) {
1886 new_blocks
->blocks
[j
] = bitmap_new(DIRTY_MEMORY_BLOCK_SIZE
);
1889 atomic_rcu_set(&ram_list
.dirty_memory
[i
], new_blocks
);
1892 g_free_rcu(old_blocks
, rcu
);
1897 static void ram_block_add(RAMBlock
*new_block
, Error
**errp
)
1900 RAMBlock
*last_block
= NULL
;
1901 ram_addr_t old_ram_size
, new_ram_size
;
1904 old_ram_size
= last_ram_page();
1906 qemu_mutex_lock_ramlist();
1907 new_block
->offset
= find_ram_offset(new_block
->max_length
);
1909 if (!new_block
->host
) {
1910 if (xen_enabled()) {
1911 xen_ram_alloc(new_block
->offset
, new_block
->max_length
,
1912 new_block
->mr
, &err
);
1914 error_propagate(errp
, err
);
1915 qemu_mutex_unlock_ramlist();
1919 new_block
->host
= phys_mem_alloc(new_block
->max_length
,
1920 &new_block
->mr
->align
);
1921 if (!new_block
->host
) {
1922 error_setg_errno(errp
, errno
,
1923 "cannot set up guest memory '%s'",
1924 memory_region_name(new_block
->mr
));
1925 qemu_mutex_unlock_ramlist();
1928 memory_try_enable_merging(new_block
->host
, new_block
->max_length
);
1932 new_ram_size
= MAX(old_ram_size
,
1933 (new_block
->offset
+ new_block
->max_length
) >> TARGET_PAGE_BITS
);
1934 if (new_ram_size
> old_ram_size
) {
1935 dirty_memory_extend(old_ram_size
, new_ram_size
);
1937 /* Keep the list sorted from biggest to smallest block. Unlike QTAILQ,
1938 * QLIST (which has an RCU-friendly variant) does not have insertion at
1939 * tail, so save the last element in last_block.
1941 RAMBLOCK_FOREACH(block
) {
1943 if (block
->max_length
< new_block
->max_length
) {
1948 QLIST_INSERT_BEFORE_RCU(block
, new_block
, next
);
1949 } else if (last_block
) {
1950 QLIST_INSERT_AFTER_RCU(last_block
, new_block
, next
);
1951 } else { /* list is empty */
1952 QLIST_INSERT_HEAD_RCU(&ram_list
.blocks
, new_block
, next
);
1954 ram_list
.mru_block
= NULL
;
1956 /* Write list before version */
1959 qemu_mutex_unlock_ramlist();
1961 cpu_physical_memory_set_dirty_range(new_block
->offset
,
1962 new_block
->used_length
,
1965 if (new_block
->host
) {
1966 qemu_ram_setup_dump(new_block
->host
, new_block
->max_length
);
1967 qemu_madvise(new_block
->host
, new_block
->max_length
, QEMU_MADV_HUGEPAGE
);
1968 /* MADV_DONTFORK is also needed by KVM in absence of synchronous MMU */
1969 qemu_madvise(new_block
->host
, new_block
->max_length
, QEMU_MADV_DONTFORK
);
1970 ram_block_notify_add(new_block
->host
, new_block
->max_length
);
1975 RAMBlock
*qemu_ram_alloc_from_fd(ram_addr_t size
, MemoryRegion
*mr
,
1979 RAMBlock
*new_block
;
1980 Error
*local_err
= NULL
;
1983 if (xen_enabled()) {
1984 error_setg(errp
, "-mem-path not supported with Xen");
1988 if (kvm_enabled() && !kvm_has_sync_mmu()) {
1990 "host lacks kvm mmu notifiers, -mem-path unsupported");
1994 if (phys_mem_alloc
!= qemu_anon_ram_alloc
) {
1996 * file_ram_alloc() needs to allocate just like
1997 * phys_mem_alloc, but we haven't bothered to provide
2001 "-mem-path not supported with this accelerator");
2005 size
= HOST_PAGE_ALIGN(size
);
2006 file_size
= get_file_size(fd
);
2007 if (file_size
> 0 && file_size
< size
) {
2008 error_setg(errp
, "backing store %s size 0x%" PRIx64
2009 " does not match 'size' option 0x" RAM_ADDR_FMT
,
2010 mem_path
, file_size
, size
);
2014 new_block
= g_malloc0(sizeof(*new_block
));
2016 new_block
->used_length
= size
;
2017 new_block
->max_length
= size
;
2018 new_block
->flags
= share
? RAM_SHARED
: 0;
2019 new_block
->host
= file_ram_alloc(new_block
, size
, fd
, !file_size
, errp
);
2020 if (!new_block
->host
) {
2025 ram_block_add(new_block
, &local_err
);
2028 error_propagate(errp
, local_err
);
2036 RAMBlock
*qemu_ram_alloc_from_file(ram_addr_t size
, MemoryRegion
*mr
,
2037 bool share
, const char *mem_path
,
2044 fd
= file_ram_open(mem_path
, memory_region_name(mr
), &created
, errp
);
2049 block
= qemu_ram_alloc_from_fd(size
, mr
, share
, fd
, errp
);
2063 RAMBlock
*qemu_ram_alloc_internal(ram_addr_t size
, ram_addr_t max_size
,
2064 void (*resized
)(const char*,
2067 void *host
, bool resizeable
,
2068 MemoryRegion
*mr
, Error
**errp
)
2070 RAMBlock
*new_block
;
2071 Error
*local_err
= NULL
;
2073 size
= HOST_PAGE_ALIGN(size
);
2074 max_size
= HOST_PAGE_ALIGN(max_size
);
2075 new_block
= g_malloc0(sizeof(*new_block
));
2077 new_block
->resized
= resized
;
2078 new_block
->used_length
= size
;
2079 new_block
->max_length
= max_size
;
2080 assert(max_size
>= size
);
2082 new_block
->page_size
= getpagesize();
2083 new_block
->host
= host
;
2085 new_block
->flags
|= RAM_PREALLOC
;
2088 new_block
->flags
|= RAM_RESIZEABLE
;
2090 ram_block_add(new_block
, &local_err
);
2093 error_propagate(errp
, local_err
);
2099 RAMBlock
*qemu_ram_alloc_from_ptr(ram_addr_t size
, void *host
,
2100 MemoryRegion
*mr
, Error
**errp
)
2102 return qemu_ram_alloc_internal(size
, size
, NULL
, host
, false, mr
, errp
);
2105 RAMBlock
*qemu_ram_alloc(ram_addr_t size
, MemoryRegion
*mr
, Error
**errp
)
2107 return qemu_ram_alloc_internal(size
, size
, NULL
, NULL
, false, mr
, errp
);
2110 RAMBlock
*qemu_ram_alloc_resizeable(ram_addr_t size
, ram_addr_t maxsz
,
2111 void (*resized
)(const char*,
2114 MemoryRegion
*mr
, Error
**errp
)
2116 return qemu_ram_alloc_internal(size
, maxsz
, resized
, NULL
, true, mr
, errp
);
2119 static void reclaim_ramblock(RAMBlock
*block
)
2121 if (block
->flags
& RAM_PREALLOC
) {
2123 } else if (xen_enabled()) {
2124 xen_invalidate_map_cache_entry(block
->host
);
2126 } else if (block
->fd
>= 0) {
2127 qemu_ram_munmap(block
->host
, block
->max_length
);
2131 qemu_anon_ram_free(block
->host
, block
->max_length
);
2136 void qemu_ram_free(RAMBlock
*block
)
2143 ram_block_notify_remove(block
->host
, block
->max_length
);
2146 qemu_mutex_lock_ramlist();
2147 QLIST_REMOVE_RCU(block
, next
);
2148 ram_list
.mru_block
= NULL
;
2149 /* Write list before version */
2152 call_rcu(block
, reclaim_ramblock
, rcu
);
2153 qemu_mutex_unlock_ramlist();
2157 void qemu_ram_remap(ram_addr_t addr
, ram_addr_t length
)
2164 RAMBLOCK_FOREACH(block
) {
2165 offset
= addr
- block
->offset
;
2166 if (offset
< block
->max_length
) {
2167 vaddr
= ramblock_ptr(block
, offset
);
2168 if (block
->flags
& RAM_PREALLOC
) {
2170 } else if (xen_enabled()) {
2174 if (block
->fd
>= 0) {
2175 flags
|= (block
->flags
& RAM_SHARED
?
2176 MAP_SHARED
: MAP_PRIVATE
);
2177 area
= mmap(vaddr
, length
, PROT_READ
| PROT_WRITE
,
2178 flags
, block
->fd
, offset
);
2181 * Remap needs to match alloc. Accelerators that
2182 * set phys_mem_alloc never remap. If they did,
2183 * we'd need a remap hook here.
2185 assert(phys_mem_alloc
== qemu_anon_ram_alloc
);
2187 flags
|= MAP_PRIVATE
| MAP_ANONYMOUS
;
2188 area
= mmap(vaddr
, length
, PROT_READ
| PROT_WRITE
,
2191 if (area
!= vaddr
) {
2192 fprintf(stderr
, "Could not remap addr: "
2193 RAM_ADDR_FMT
"@" RAM_ADDR_FMT
"\n",
2197 memory_try_enable_merging(vaddr
, length
);
2198 qemu_ram_setup_dump(vaddr
, length
);
2203 #endif /* !_WIN32 */
2205 /* Return a host pointer to ram allocated with qemu_ram_alloc.
2206 * This should not be used for general purpose DMA. Use address_space_map
2207 * or address_space_rw instead. For local memory (e.g. video ram) that the
2208 * device owns, use memory_region_get_ram_ptr.
2210 * Called within RCU critical section.
2212 void *qemu_map_ram_ptr(RAMBlock
*ram_block
, ram_addr_t addr
)
2214 RAMBlock
*block
= ram_block
;
2216 if (block
== NULL
) {
2217 block
= qemu_get_ram_block(addr
);
2218 addr
-= block
->offset
;
2221 if (xen_enabled() && block
->host
== NULL
) {
2222 /* We need to check if the requested address is in the RAM
2223 * because we don't want to map the entire memory in QEMU.
2224 * In that case just map until the end of the page.
2226 if (block
->offset
== 0) {
2227 return xen_map_cache(addr
, 0, 0, false);
2230 block
->host
= xen_map_cache(block
->offset
, block
->max_length
, 1, false);
2232 return ramblock_ptr(block
, addr
);
2235 /* Return a host pointer to guest's ram. Similar to qemu_map_ram_ptr
2236 * but takes a size argument.
2238 * Called within RCU critical section.
2240 static void *qemu_ram_ptr_length(RAMBlock
*ram_block
, ram_addr_t addr
,
2241 hwaddr
*size
, bool lock
)
2243 RAMBlock
*block
= ram_block
;
2248 if (block
== NULL
) {
2249 block
= qemu_get_ram_block(addr
);
2250 addr
-= block
->offset
;
2252 *size
= MIN(*size
, block
->max_length
- addr
);
2254 if (xen_enabled() && block
->host
== NULL
) {
2255 /* We need to check if the requested address is in the RAM
2256 * because we don't want to map the entire memory in QEMU.
2257 * In that case just map the requested area.
2259 if (block
->offset
== 0) {
2260 return xen_map_cache(addr
, *size
, lock
, lock
);
2263 block
->host
= xen_map_cache(block
->offset
, block
->max_length
, 1, lock
);
2266 return ramblock_ptr(block
, addr
);
2270 * Translates a host ptr back to a RAMBlock, a ram_addr and an offset
2273 * ptr: Host pointer to look up
2274 * round_offset: If true round the result offset down to a page boundary
2275 * *ram_addr: set to result ram_addr
2276 * *offset: set to result offset within the RAMBlock
2278 * Returns: RAMBlock (or NULL if not found)
2280 * By the time this function returns, the returned pointer is not protected
2281 * by RCU anymore. If the caller is not within an RCU critical section and
2282 * does not hold the iothread lock, it must have other means of protecting the
2283 * pointer, such as a reference to the region that includes the incoming
2286 RAMBlock
*qemu_ram_block_from_host(void *ptr
, bool round_offset
,
2290 uint8_t *host
= ptr
;
2292 if (xen_enabled()) {
2293 ram_addr_t ram_addr
;
2295 ram_addr
= xen_ram_addr_from_mapcache(ptr
);
2296 block
= qemu_get_ram_block(ram_addr
);
2298 *offset
= ram_addr
- block
->offset
;
2305 block
= atomic_rcu_read(&ram_list
.mru_block
);
2306 if (block
&& block
->host
&& host
- block
->host
< block
->max_length
) {
2310 RAMBLOCK_FOREACH(block
) {
2311 /* This case append when the block is not mapped. */
2312 if (block
->host
== NULL
) {
2315 if (host
- block
->host
< block
->max_length
) {
2324 *offset
= (host
- block
->host
);
2326 *offset
&= TARGET_PAGE_MASK
;
2333 * Finds the named RAMBlock
2335 * name: The name of RAMBlock to find
2337 * Returns: RAMBlock (or NULL if not found)
2339 RAMBlock
*qemu_ram_block_by_name(const char *name
)
2343 RAMBLOCK_FOREACH(block
) {
2344 if (!strcmp(name
, block
->idstr
)) {
2352 /* Some of the softmmu routines need to translate from a host pointer
2353 (typically a TLB entry) back to a ram offset. */
2354 ram_addr_t
qemu_ram_addr_from_host(void *ptr
)
2359 block
= qemu_ram_block_from_host(ptr
, false, &offset
);
2361 return RAM_ADDR_INVALID
;
2364 return block
->offset
+ offset
;
2367 /* Called within RCU critical section. */
2368 static void notdirty_mem_write(void *opaque
, hwaddr ram_addr
,
2369 uint64_t val
, unsigned size
)
2371 bool locked
= false;
2373 assert(tcg_enabled());
2374 if (!cpu_physical_memory_get_dirty_flag(ram_addr
, DIRTY_MEMORY_CODE
)) {
2377 tb_invalidate_phys_page_fast(ram_addr
, size
);
2381 stb_p(qemu_map_ram_ptr(NULL
, ram_addr
), val
);
2384 stw_p(qemu_map_ram_ptr(NULL
, ram_addr
), val
);
2387 stl_p(qemu_map_ram_ptr(NULL
, ram_addr
), val
);
2390 stq_p(qemu_map_ram_ptr(NULL
, ram_addr
), val
);
2400 /* Set both VGA and migration bits for simplicity and to remove
2401 * the notdirty callback faster.
2403 cpu_physical_memory_set_dirty_range(ram_addr
, size
,
2404 DIRTY_CLIENTS_NOCODE
);
2405 /* we remove the notdirty callback only if the code has been
2407 if (!cpu_physical_memory_is_clean(ram_addr
)) {
2408 tlb_set_dirty(current_cpu
, current_cpu
->mem_io_vaddr
);
2412 static bool notdirty_mem_accepts(void *opaque
, hwaddr addr
,
2413 unsigned size
, bool is_write
)
2418 static const MemoryRegionOps notdirty_mem_ops
= {
2419 .write
= notdirty_mem_write
,
2420 .valid
.accepts
= notdirty_mem_accepts
,
2421 .endianness
= DEVICE_NATIVE_ENDIAN
,
2423 .min_access_size
= 1,
2424 .max_access_size
= 8,
2428 .min_access_size
= 1,
2429 .max_access_size
= 8,
2434 /* Generate a debug exception if a watchpoint has been hit. */
2435 static void check_watchpoint(int offset
, int len
, MemTxAttrs attrs
, int flags
)
2437 CPUState
*cpu
= current_cpu
;
2438 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
2442 assert(tcg_enabled());
2443 if (cpu
->watchpoint_hit
) {
2444 /* We re-entered the check after replacing the TB. Now raise
2445 * the debug interrupt so that is will trigger after the
2446 * current instruction. */
2447 cpu_interrupt(cpu
, CPU_INTERRUPT_DEBUG
);
2450 vaddr
= (cpu
->mem_io_vaddr
& TARGET_PAGE_MASK
) + offset
;
2451 vaddr
= cc
->adjust_watchpoint_address(cpu
, vaddr
, len
);
2452 QTAILQ_FOREACH(wp
, &cpu
->watchpoints
, entry
) {
2453 if (cpu_watchpoint_address_matches(wp
, vaddr
, len
)
2454 && (wp
->flags
& flags
)) {
2455 if (flags
== BP_MEM_READ
) {
2456 wp
->flags
|= BP_WATCHPOINT_HIT_READ
;
2458 wp
->flags
|= BP_WATCHPOINT_HIT_WRITE
;
2460 wp
->hitaddr
= vaddr
;
2461 wp
->hitattrs
= attrs
;
2462 if (!cpu
->watchpoint_hit
) {
2463 if (wp
->flags
& BP_CPU
&&
2464 !cc
->debug_check_watchpoint(cpu
, wp
)) {
2465 wp
->flags
&= ~BP_WATCHPOINT_HIT
;
2468 cpu
->watchpoint_hit
= wp
;
2470 /* Both tb_lock and iothread_mutex will be reset when
2471 * cpu_loop_exit or cpu_loop_exit_noexc longjmp
2472 * back into the cpu_exec main loop.
2475 tb_check_watchpoint(cpu
);
2476 if (wp
->flags
& BP_STOP_BEFORE_ACCESS
) {
2477 cpu
->exception_index
= EXCP_DEBUG
;
2480 /* Force execution of one insn next time. */
2481 cpu
->cflags_next_tb
= 1 | curr_cflags();
2482 cpu_loop_exit_noexc(cpu
);
2486 wp
->flags
&= ~BP_WATCHPOINT_HIT
;
2491 /* Watchpoint access routines. Watchpoints are inserted using TLB tricks,
2492 so these check for a hit then pass through to the normal out-of-line
2494 static MemTxResult
watch_mem_read(void *opaque
, hwaddr addr
, uint64_t *pdata
,
2495 unsigned size
, MemTxAttrs attrs
)
2499 int asidx
= cpu_asidx_from_attrs(current_cpu
, attrs
);
2500 AddressSpace
*as
= current_cpu
->cpu_ases
[asidx
].as
;
2502 check_watchpoint(addr
& ~TARGET_PAGE_MASK
, size
, attrs
, BP_MEM_READ
);
2505 data
= address_space_ldub(as
, addr
, attrs
, &res
);
2508 data
= address_space_lduw(as
, addr
, attrs
, &res
);
2511 data
= address_space_ldl(as
, addr
, attrs
, &res
);
2514 data
= address_space_ldq(as
, addr
, attrs
, &res
);
2522 static MemTxResult
watch_mem_write(void *opaque
, hwaddr addr
,
2523 uint64_t val
, unsigned size
,
2527 int asidx
= cpu_asidx_from_attrs(current_cpu
, attrs
);
2528 AddressSpace
*as
= current_cpu
->cpu_ases
[asidx
].as
;
2530 check_watchpoint(addr
& ~TARGET_PAGE_MASK
, size
, attrs
, BP_MEM_WRITE
);
2533 address_space_stb(as
, addr
, val
, attrs
, &res
);
2536 address_space_stw(as
, addr
, val
, attrs
, &res
);
2539 address_space_stl(as
, addr
, val
, attrs
, &res
);
2542 address_space_stq(as
, addr
, val
, attrs
, &res
);
2549 static const MemoryRegionOps watch_mem_ops
= {
2550 .read_with_attrs
= watch_mem_read
,
2551 .write_with_attrs
= watch_mem_write
,
2552 .endianness
= DEVICE_NATIVE_ENDIAN
,
2554 .min_access_size
= 1,
2555 .max_access_size
= 8,
2559 .min_access_size
= 1,
2560 .max_access_size
= 8,
2565 static MemTxResult
flatview_write(FlatView
*fv
, hwaddr addr
, MemTxAttrs attrs
,
2566 const uint8_t *buf
, int len
);
2567 static bool flatview_access_valid(FlatView
*fv
, hwaddr addr
, int len
,
2570 static MemTxResult
subpage_read(void *opaque
, hwaddr addr
, uint64_t *data
,
2571 unsigned len
, MemTxAttrs attrs
)
2573 subpage_t
*subpage
= opaque
;
2577 #if defined(DEBUG_SUBPAGE)
2578 printf("%s: subpage %p len %u addr " TARGET_FMT_plx
"\n", __func__
,
2579 subpage
, len
, addr
);
2581 res
= flatview_read(subpage
->fv
, addr
+ subpage
->base
, attrs
, buf
, len
);
2587 *data
= ldub_p(buf
);
2590 *data
= lduw_p(buf
);
2603 static MemTxResult
subpage_write(void *opaque
, hwaddr addr
,
2604 uint64_t value
, unsigned len
, MemTxAttrs attrs
)
2606 subpage_t
*subpage
= opaque
;
2609 #if defined(DEBUG_SUBPAGE)
2610 printf("%s: subpage %p len %u addr " TARGET_FMT_plx
2611 " value %"PRIx64
"\n",
2612 __func__
, subpage
, len
, addr
, value
);
2630 return flatview_write(subpage
->fv
, addr
+ subpage
->base
, attrs
, buf
, len
);
2633 static bool subpage_accepts(void *opaque
, hwaddr addr
,
2634 unsigned len
, bool is_write
)
2636 subpage_t
*subpage
= opaque
;
2637 #if defined(DEBUG_SUBPAGE)
2638 printf("%s: subpage %p %c len %u addr " TARGET_FMT_plx
"\n",
2639 __func__
, subpage
, is_write
? 'w' : 'r', len
, addr
);
2642 return flatview_access_valid(subpage
->fv
, addr
+ subpage
->base
,
2646 static const MemoryRegionOps subpage_ops
= {
2647 .read_with_attrs
= subpage_read
,
2648 .write_with_attrs
= subpage_write
,
2649 .impl
.min_access_size
= 1,
2650 .impl
.max_access_size
= 8,
2651 .valid
.min_access_size
= 1,
2652 .valid
.max_access_size
= 8,
2653 .valid
.accepts
= subpage_accepts
,
2654 .endianness
= DEVICE_NATIVE_ENDIAN
,
2657 static int subpage_register (subpage_t
*mmio
, uint32_t start
, uint32_t end
,
2662 if (start
>= TARGET_PAGE_SIZE
|| end
>= TARGET_PAGE_SIZE
)
2664 idx
= SUBPAGE_IDX(start
);
2665 eidx
= SUBPAGE_IDX(end
);
2666 #if defined(DEBUG_SUBPAGE)
2667 printf("%s: %p start %08x end %08x idx %08x eidx %08x section %d\n",
2668 __func__
, mmio
, start
, end
, idx
, eidx
, section
);
2670 for (; idx
<= eidx
; idx
++) {
2671 mmio
->sub_section
[idx
] = section
;
2677 static subpage_t
*subpage_init(FlatView
*fv
, hwaddr base
)
2681 mmio
= g_malloc0(sizeof(subpage_t
) + TARGET_PAGE_SIZE
* sizeof(uint16_t));
2684 memory_region_init_io(&mmio
->iomem
, NULL
, &subpage_ops
, mmio
,
2685 NULL
, TARGET_PAGE_SIZE
);
2686 mmio
->iomem
.subpage
= true;
2687 #if defined(DEBUG_SUBPAGE)
2688 printf("%s: %p base " TARGET_FMT_plx
" len %08x\n", __func__
,
2689 mmio
, base
, TARGET_PAGE_SIZE
);
2691 subpage_register(mmio
, 0, TARGET_PAGE_SIZE
-1, PHYS_SECTION_UNASSIGNED
);
2696 static uint16_t dummy_section(PhysPageMap
*map
, FlatView
*fv
, MemoryRegion
*mr
)
2699 MemoryRegionSection section
= {
2702 .offset_within_address_space
= 0,
2703 .offset_within_region
= 0,
2704 .size
= int128_2_64(),
2707 return phys_section_add(map
, §ion
);
2710 MemoryRegion
*iotlb_to_region(CPUState
*cpu
, hwaddr index
, MemTxAttrs attrs
)
2712 int asidx
= cpu_asidx_from_attrs(cpu
, attrs
);
2713 CPUAddressSpace
*cpuas
= &cpu
->cpu_ases
[asidx
];
2714 AddressSpaceDispatch
*d
= atomic_rcu_read(&cpuas
->memory_dispatch
);
2715 MemoryRegionSection
*sections
= d
->map
.sections
;
2717 return sections
[index
& ~TARGET_PAGE_MASK
].mr
;
2720 static void io_mem_init(void)
2722 memory_region_init_io(&io_mem_rom
, NULL
, &unassigned_mem_ops
, NULL
, NULL
, UINT64_MAX
);
2723 memory_region_init_io(&io_mem_unassigned
, NULL
, &unassigned_mem_ops
, NULL
,
2726 /* io_mem_notdirty calls tb_invalidate_phys_page_fast,
2727 * which can be called without the iothread mutex.
2729 memory_region_init_io(&io_mem_notdirty
, NULL
, ¬dirty_mem_ops
, NULL
,
2731 memory_region_clear_global_locking(&io_mem_notdirty
);
2733 memory_region_init_io(&io_mem_watch
, NULL
, &watch_mem_ops
, NULL
,
2737 AddressSpaceDispatch
*address_space_dispatch_new(FlatView
*fv
)
2739 AddressSpaceDispatch
*d
= g_new0(AddressSpaceDispatch
, 1);
2742 n
= dummy_section(&d
->map
, fv
, &io_mem_unassigned
);
2743 assert(n
== PHYS_SECTION_UNASSIGNED
);
2744 n
= dummy_section(&d
->map
, fv
, &io_mem_notdirty
);
2745 assert(n
== PHYS_SECTION_NOTDIRTY
);
2746 n
= dummy_section(&d
->map
, fv
, &io_mem_rom
);
2747 assert(n
== PHYS_SECTION_ROM
);
2748 n
= dummy_section(&d
->map
, fv
, &io_mem_watch
);
2749 assert(n
== PHYS_SECTION_WATCH
);
2751 d
->phys_map
= (PhysPageEntry
) { .ptr
= PHYS_MAP_NODE_NIL
, .skip
= 1 };
2756 void address_space_dispatch_free(AddressSpaceDispatch
*d
)
2758 phys_sections_free(&d
->map
);
2762 static void tcg_commit(MemoryListener
*listener
)
2764 CPUAddressSpace
*cpuas
;
2765 AddressSpaceDispatch
*d
;
2767 /* since each CPU stores ram addresses in its TLB cache, we must
2768 reset the modified entries */
2769 cpuas
= container_of(listener
, CPUAddressSpace
, tcg_as_listener
);
2770 cpu_reloading_memory_map();
2771 /* The CPU and TLB are protected by the iothread lock.
2772 * We reload the dispatch pointer now because cpu_reloading_memory_map()
2773 * may have split the RCU critical section.
2775 d
= address_space_to_dispatch(cpuas
->as
);
2776 atomic_rcu_set(&cpuas
->memory_dispatch
, d
);
2777 tlb_flush(cpuas
->cpu
);
2780 static void memory_map_init(void)
2782 system_memory
= g_malloc(sizeof(*system_memory
));
2784 memory_region_init(system_memory
, NULL
, "system", UINT64_MAX
);
2785 address_space_init(&address_space_memory
, system_memory
, "memory");
2787 system_io
= g_malloc(sizeof(*system_io
));
2788 memory_region_init_io(system_io
, NULL
, &unassigned_io_ops
, NULL
, "io",
2790 address_space_init(&address_space_io
, system_io
, "I/O");
2793 MemoryRegion
*get_system_memory(void)
2795 return system_memory
;
2798 MemoryRegion
*get_system_io(void)
2803 #endif /* !defined(CONFIG_USER_ONLY) */
2805 /* physical memory access (slow version, mainly for debug) */
2806 #if defined(CONFIG_USER_ONLY)
2807 int cpu_memory_rw_debug(CPUState
*cpu
, target_ulong addr
,
2808 uint8_t *buf
, int len
, int is_write
)
2815 page
= addr
& TARGET_PAGE_MASK
;
2816 l
= (page
+ TARGET_PAGE_SIZE
) - addr
;
2819 flags
= page_get_flags(page
);
2820 if (!(flags
& PAGE_VALID
))
2823 if (!(flags
& PAGE_WRITE
))
2825 /* XXX: this code should not depend on lock_user */
2826 if (!(p
= lock_user(VERIFY_WRITE
, addr
, l
, 0)))
2829 unlock_user(p
, addr
, l
);
2831 if (!(flags
& PAGE_READ
))
2833 /* XXX: this code should not depend on lock_user */
2834 if (!(p
= lock_user(VERIFY_READ
, addr
, l
, 1)))
2837 unlock_user(p
, addr
, 0);
2848 static void invalidate_and_set_dirty(MemoryRegion
*mr
, hwaddr addr
,
2851 uint8_t dirty_log_mask
= memory_region_get_dirty_log_mask(mr
);
2852 addr
+= memory_region_get_ram_addr(mr
);
2854 /* No early return if dirty_log_mask is or becomes 0, because
2855 * cpu_physical_memory_set_dirty_range will still call
2856 * xen_modified_memory.
2858 if (dirty_log_mask
) {
2860 cpu_physical_memory_range_includes_clean(addr
, length
, dirty_log_mask
);
2862 if (dirty_log_mask
& (1 << DIRTY_MEMORY_CODE
)) {
2863 assert(tcg_enabled());
2865 tb_invalidate_phys_range(addr
, addr
+ length
);
2867 dirty_log_mask
&= ~(1 << DIRTY_MEMORY_CODE
);
2869 cpu_physical_memory_set_dirty_range(addr
, length
, dirty_log_mask
);
2872 static int memory_access_size(MemoryRegion
*mr
, unsigned l
, hwaddr addr
)
2874 unsigned access_size_max
= mr
->ops
->valid
.max_access_size
;
2876 /* Regions are assumed to support 1-4 byte accesses unless
2877 otherwise specified. */
2878 if (access_size_max
== 0) {
2879 access_size_max
= 4;
2882 /* Bound the maximum access by the alignment of the address. */
2883 if (!mr
->ops
->impl
.unaligned
) {
2884 unsigned align_size_max
= addr
& -addr
;
2885 if (align_size_max
!= 0 && align_size_max
< access_size_max
) {
2886 access_size_max
= align_size_max
;
2890 /* Don't attempt accesses larger than the maximum. */
2891 if (l
> access_size_max
) {
2892 l
= access_size_max
;
2899 static bool prepare_mmio_access(MemoryRegion
*mr
)
2901 bool unlocked
= !qemu_mutex_iothread_locked();
2902 bool release_lock
= false;
2904 if (unlocked
&& mr
->global_locking
) {
2905 qemu_mutex_lock_iothread();
2907 release_lock
= true;
2909 if (mr
->flush_coalesced_mmio
) {
2911 qemu_mutex_lock_iothread();
2913 qemu_flush_coalesced_mmio_buffer();
2915 qemu_mutex_unlock_iothread();
2919 return release_lock
;
2922 /* Called within RCU critical section. */
2923 static MemTxResult
flatview_write_continue(FlatView
*fv
, hwaddr addr
,
2926 int len
, hwaddr addr1
,
2927 hwaddr l
, MemoryRegion
*mr
)
2931 MemTxResult result
= MEMTX_OK
;
2932 bool release_lock
= false;
2935 if (!memory_access_is_direct(mr
, true)) {
2936 release_lock
|= prepare_mmio_access(mr
);
2937 l
= memory_access_size(mr
, l
, addr1
);
2938 /* XXX: could force current_cpu to NULL to avoid
2942 /* 64 bit write access */
2944 result
|= memory_region_dispatch_write(mr
, addr1
, val
, 8,
2948 /* 32 bit write access */
2949 val
= (uint32_t)ldl_p(buf
);
2950 result
|= memory_region_dispatch_write(mr
, addr1
, val
, 4,
2954 /* 16 bit write access */
2956 result
|= memory_region_dispatch_write(mr
, addr1
, val
, 2,
2960 /* 8 bit write access */
2962 result
|= memory_region_dispatch_write(mr
, addr1
, val
, 1,
2970 ptr
= qemu_ram_ptr_length(mr
->ram_block
, addr1
, &l
, false);
2971 memcpy(ptr
, buf
, l
);
2972 invalidate_and_set_dirty(mr
, addr1
, l
);
2976 qemu_mutex_unlock_iothread();
2977 release_lock
= false;
2989 mr
= flatview_translate(fv
, addr
, &addr1
, &l
, true);
2995 static MemTxResult
flatview_write(FlatView
*fv
, hwaddr addr
, MemTxAttrs attrs
,
2996 const uint8_t *buf
, int len
)
3001 MemTxResult result
= MEMTX_OK
;
3006 mr
= flatview_translate(fv
, addr
, &addr1
, &l
, true);
3007 result
= flatview_write_continue(fv
, addr
, attrs
, buf
, len
,
3015 MemTxResult
address_space_write(AddressSpace
*as
, hwaddr addr
,
3017 const uint8_t *buf
, int len
)
3019 return flatview_write(address_space_to_flatview(as
), addr
, attrs
, buf
, len
);
3022 /* Called within RCU critical section. */
3023 MemTxResult
flatview_read_continue(FlatView
*fv
, hwaddr addr
,
3024 MemTxAttrs attrs
, uint8_t *buf
,
3025 int len
, hwaddr addr1
, hwaddr l
,
3030 MemTxResult result
= MEMTX_OK
;
3031 bool release_lock
= false;
3034 if (!memory_access_is_direct(mr
, false)) {
3036 release_lock
|= prepare_mmio_access(mr
);
3037 l
= memory_access_size(mr
, l
, addr1
);
3040 /* 64 bit read access */
3041 result
|= memory_region_dispatch_read(mr
, addr1
, &val
, 8,
3046 /* 32 bit read access */
3047 result
|= memory_region_dispatch_read(mr
, addr1
, &val
, 4,
3052 /* 16 bit read access */
3053 result
|= memory_region_dispatch_read(mr
, addr1
, &val
, 2,
3058 /* 8 bit read access */
3059 result
|= memory_region_dispatch_read(mr
, addr1
, &val
, 1,
3068 ptr
= qemu_ram_ptr_length(mr
->ram_block
, addr1
, &l
, false);
3069 memcpy(buf
, ptr
, l
);
3073 qemu_mutex_unlock_iothread();
3074 release_lock
= false;
3086 mr
= flatview_translate(fv
, addr
, &addr1
, &l
, false);
3092 MemTxResult
flatview_read_full(FlatView
*fv
, hwaddr addr
,
3093 MemTxAttrs attrs
, uint8_t *buf
, int len
)
3098 MemTxResult result
= MEMTX_OK
;
3103 mr
= flatview_translate(fv
, addr
, &addr1
, &l
, false);
3104 result
= flatview_read_continue(fv
, addr
, attrs
, buf
, len
,
3112 static MemTxResult
flatview_rw(FlatView
*fv
, hwaddr addr
, MemTxAttrs attrs
,
3113 uint8_t *buf
, int len
, bool is_write
)
3116 return flatview_write(fv
, addr
, attrs
, (uint8_t *)buf
, len
);
3118 return flatview_read(fv
, addr
, attrs
, (uint8_t *)buf
, len
);
3122 MemTxResult
address_space_rw(AddressSpace
*as
, hwaddr addr
,
3123 MemTxAttrs attrs
, uint8_t *buf
,
3124 int len
, bool is_write
)
3126 return flatview_rw(address_space_to_flatview(as
),
3127 addr
, attrs
, buf
, len
, is_write
);
3130 void cpu_physical_memory_rw(hwaddr addr
, uint8_t *buf
,
3131 int len
, int is_write
)
3133 address_space_rw(&address_space_memory
, addr
, MEMTXATTRS_UNSPECIFIED
,
3134 buf
, len
, is_write
);
3137 enum write_rom_type
{
3142 static inline void cpu_physical_memory_write_rom_internal(AddressSpace
*as
,
3143 hwaddr addr
, const uint8_t *buf
, int len
, enum write_rom_type type
)
3153 mr
= address_space_translate(as
, addr
, &addr1
, &l
, true);
3155 if (!(memory_region_is_ram(mr
) ||
3156 memory_region_is_romd(mr
))) {
3157 l
= memory_access_size(mr
, l
, addr1
);
3160 ptr
= qemu_map_ram_ptr(mr
->ram_block
, addr1
);
3163 memcpy(ptr
, buf
, l
);
3164 invalidate_and_set_dirty(mr
, addr1
, l
);
3167 flush_icache_range((uintptr_t)ptr
, (uintptr_t)ptr
+ l
);
3178 /* used for ROM loading : can write in RAM and ROM */
3179 void cpu_physical_memory_write_rom(AddressSpace
*as
, hwaddr addr
,
3180 const uint8_t *buf
, int len
)
3182 cpu_physical_memory_write_rom_internal(as
, addr
, buf
, len
, WRITE_DATA
);
3185 void cpu_flush_icache_range(hwaddr start
, int len
)
3188 * This function should do the same thing as an icache flush that was
3189 * triggered from within the guest. For TCG we are always cache coherent,
3190 * so there is no need to flush anything. For KVM / Xen we need to flush
3191 * the host's instruction cache at least.
3193 if (tcg_enabled()) {
3197 cpu_physical_memory_write_rom_internal(&address_space_memory
,
3198 start
, NULL
, len
, FLUSH_CACHE
);
3209 static BounceBuffer bounce
;
3211 typedef struct MapClient
{
3213 QLIST_ENTRY(MapClient
) link
;
3216 QemuMutex map_client_list_lock
;
3217 static QLIST_HEAD(map_client_list
, MapClient
) map_client_list
3218 = QLIST_HEAD_INITIALIZER(map_client_list
);
3220 static void cpu_unregister_map_client_do(MapClient
*client
)
3222 QLIST_REMOVE(client
, link
);
3226 static void cpu_notify_map_clients_locked(void)
3230 while (!QLIST_EMPTY(&map_client_list
)) {
3231 client
= QLIST_FIRST(&map_client_list
);
3232 qemu_bh_schedule(client
->bh
);
3233 cpu_unregister_map_client_do(client
);
3237 void cpu_register_map_client(QEMUBH
*bh
)
3239 MapClient
*client
= g_malloc(sizeof(*client
));
3241 qemu_mutex_lock(&map_client_list_lock
);
3243 QLIST_INSERT_HEAD(&map_client_list
, client
, link
);
3244 if (!atomic_read(&bounce
.in_use
)) {
3245 cpu_notify_map_clients_locked();
3247 qemu_mutex_unlock(&map_client_list_lock
);
3250 void cpu_exec_init_all(void)
3252 qemu_mutex_init(&ram_list
.mutex
);
3253 /* The data structures we set up here depend on knowing the page size,
3254 * so no more changes can be made after this point.
3255 * In an ideal world, nothing we did before we had finished the
3256 * machine setup would care about the target page size, and we could
3257 * do this much later, rather than requiring board models to state
3258 * up front what their requirements are.
3260 finalize_target_page_bits();
3263 qemu_mutex_init(&map_client_list_lock
);
3266 void cpu_unregister_map_client(QEMUBH
*bh
)
3270 qemu_mutex_lock(&map_client_list_lock
);
3271 QLIST_FOREACH(client
, &map_client_list
, link
) {
3272 if (client
->bh
== bh
) {
3273 cpu_unregister_map_client_do(client
);
3277 qemu_mutex_unlock(&map_client_list_lock
);
3280 static void cpu_notify_map_clients(void)
3282 qemu_mutex_lock(&map_client_list_lock
);
3283 cpu_notify_map_clients_locked();
3284 qemu_mutex_unlock(&map_client_list_lock
);
3287 static bool flatview_access_valid(FlatView
*fv
, hwaddr addr
, int len
,
3296 mr
= flatview_translate(fv
, addr
, &xlat
, &l
, is_write
);
3297 if (!memory_access_is_direct(mr
, is_write
)) {
3298 l
= memory_access_size(mr
, l
, addr
);
3299 if (!memory_region_access_valid(mr
, xlat
, l
, is_write
)) {
3312 bool address_space_access_valid(AddressSpace
*as
, hwaddr addr
,
3313 int len
, bool is_write
)
3315 return flatview_access_valid(address_space_to_flatview(as
),
3316 addr
, len
, is_write
);
3320 flatview_extend_translation(FlatView
*fv
, hwaddr addr
,
3322 MemoryRegion
*mr
, hwaddr base
, hwaddr len
,
3327 MemoryRegion
*this_mr
;
3333 if (target_len
== 0) {
3338 this_mr
= flatview_translate(fv
, addr
, &xlat
,
3340 if (this_mr
!= mr
|| xlat
!= base
+ done
) {
3346 /* Map a physical memory region into a host virtual address.
3347 * May map a subset of the requested range, given by and returned in *plen.
3348 * May return NULL if resources needed to perform the mapping are exhausted.
3349 * Use only for reads OR writes - not for read-modify-write operations.
3350 * Use cpu_register_map_client() to know when retrying the map operation is
3351 * likely to succeed.
3353 void *address_space_map(AddressSpace
*as
,
3362 FlatView
*fv
= address_space_to_flatview(as
);
3370 mr
= flatview_translate(fv
, addr
, &xlat
, &l
, is_write
);
3372 if (!memory_access_is_direct(mr
, is_write
)) {
3373 if (atomic_xchg(&bounce
.in_use
, true)) {
3377 /* Avoid unbounded allocations */
3378 l
= MIN(l
, TARGET_PAGE_SIZE
);
3379 bounce
.buffer
= qemu_memalign(TARGET_PAGE_SIZE
, l
);
3383 memory_region_ref(mr
);
3386 flatview_read(fv
, addr
, MEMTXATTRS_UNSPECIFIED
,
3392 return bounce
.buffer
;
3396 memory_region_ref(mr
);
3397 *plen
= flatview_extend_translation(fv
, addr
, len
, mr
, xlat
,
3399 ptr
= qemu_ram_ptr_length(mr
->ram_block
, xlat
, plen
, true);
3405 /* Unmaps a memory region previously mapped by address_space_map().
3406 * Will also mark the memory as dirty if is_write == 1. access_len gives
3407 * the amount of memory that was actually read or written by the caller.
3409 void address_space_unmap(AddressSpace
*as
, void *buffer
, hwaddr len
,
3410 int is_write
, hwaddr access_len
)
3412 if (buffer
!= bounce
.buffer
) {
3416 mr
= memory_region_from_host(buffer
, &addr1
);
3419 invalidate_and_set_dirty(mr
, addr1
, access_len
);
3421 if (xen_enabled()) {
3422 xen_invalidate_map_cache_entry(buffer
);
3424 memory_region_unref(mr
);
3428 address_space_write(as
, bounce
.addr
, MEMTXATTRS_UNSPECIFIED
,
3429 bounce
.buffer
, access_len
);
3431 qemu_vfree(bounce
.buffer
);
3432 bounce
.buffer
= NULL
;
3433 memory_region_unref(bounce
.mr
);
3434 atomic_mb_set(&bounce
.in_use
, false);
3435 cpu_notify_map_clients();
3438 void *cpu_physical_memory_map(hwaddr addr
,
3442 return address_space_map(&address_space_memory
, addr
, plen
, is_write
);
3445 void cpu_physical_memory_unmap(void *buffer
, hwaddr len
,
3446 int is_write
, hwaddr access_len
)
3448 return address_space_unmap(&address_space_memory
, buffer
, len
, is_write
, access_len
);
3451 #define ARG1_DECL AddressSpace *as
3454 #define TRANSLATE(...) address_space_translate(as, __VA_ARGS__)
3455 #define IS_DIRECT(mr, is_write) memory_access_is_direct(mr, is_write)
3456 #define MAP_RAM(mr, ofs) qemu_map_ram_ptr((mr)->ram_block, ofs)
3457 #define INVALIDATE(mr, ofs, len) invalidate_and_set_dirty(mr, ofs, len)
3458 #define RCU_READ_LOCK(...) rcu_read_lock()
3459 #define RCU_READ_UNLOCK(...) rcu_read_unlock()
3460 #include "memory_ldst.inc.c"
3462 int64_t address_space_cache_init(MemoryRegionCache
*cache
,
3474 void address_space_cache_invalidate(MemoryRegionCache
*cache
,
3480 void address_space_cache_destroy(MemoryRegionCache
*cache
)
3485 #define ARG1_DECL MemoryRegionCache *cache
3487 #define SUFFIX _cached
3488 #define TRANSLATE(addr, ...) \
3489 address_space_translate(cache->as, cache->xlat + (addr), __VA_ARGS__)
3490 #define IS_DIRECT(mr, is_write) true
3491 #define MAP_RAM(mr, ofs) qemu_map_ram_ptr((mr)->ram_block, ofs)
3492 #define INVALIDATE(mr, ofs, len) invalidate_and_set_dirty(mr, ofs, len)
3493 #define RCU_READ_LOCK() rcu_read_lock()
3494 #define RCU_READ_UNLOCK() rcu_read_unlock()
3495 #include "memory_ldst.inc.c"
3497 /* virtual memory access for debug (includes writing to ROM) */
3498 int cpu_memory_rw_debug(CPUState
*cpu
, target_ulong addr
,
3499 uint8_t *buf
, int len
, int is_write
)
3505 cpu_synchronize_state(cpu
);
3510 page
= addr
& TARGET_PAGE_MASK
;
3511 phys_addr
= cpu_get_phys_page_attrs_debug(cpu
, page
, &attrs
);
3512 asidx
= cpu_asidx_from_attrs(cpu
, attrs
);
3513 /* if no physical page mapped, return an error */
3514 if (phys_addr
== -1)
3516 l
= (page
+ TARGET_PAGE_SIZE
) - addr
;
3519 phys_addr
+= (addr
& ~TARGET_PAGE_MASK
);
3521 cpu_physical_memory_write_rom(cpu
->cpu_ases
[asidx
].as
,
3524 address_space_rw(cpu
->cpu_ases
[asidx
].as
, phys_addr
,
3525 MEMTXATTRS_UNSPECIFIED
,
3536 * Allows code that needs to deal with migration bitmaps etc to still be built
3537 * target independent.
3539 size_t qemu_target_page_size(void)
3541 return TARGET_PAGE_SIZE
;
3544 int qemu_target_page_bits(void)
3546 return TARGET_PAGE_BITS
;
3549 int qemu_target_page_bits_min(void)
3551 return TARGET_PAGE_BITS_MIN
;
3556 * A helper function for the _utterly broken_ virtio device model to find out if
3557 * it's running on a big endian machine. Don't do this at home kids!
3559 bool target_words_bigendian(void);
3560 bool target_words_bigendian(void)
3562 #if defined(TARGET_WORDS_BIGENDIAN)
3569 #ifndef CONFIG_USER_ONLY
3570 bool cpu_physical_memory_is_io(hwaddr phys_addr
)
3577 mr
= address_space_translate(&address_space_memory
,
3578 phys_addr
, &phys_addr
, &l
, false);
3580 res
= !(memory_region_is_ram(mr
) || memory_region_is_romd(mr
));
3585 int qemu_ram_foreach_block(RAMBlockIterFunc func
, void *opaque
)
3591 RAMBLOCK_FOREACH(block
) {
3592 ret
= func(block
->idstr
, block
->host
, block
->offset
,
3593 block
->used_length
, opaque
);
3603 * Unmap pages of memory from start to start+length such that
3604 * they a) read as 0, b) Trigger whatever fault mechanism
3605 * the OS provides for postcopy.
3606 * The pages must be unmapped by the end of the function.
3607 * Returns: 0 on success, none-0 on failure
3610 int ram_block_discard_range(RAMBlock
*rb
, uint64_t start
, size_t length
)
3614 uint8_t *host_startaddr
= rb
->host
+ start
;
3616 if ((uintptr_t)host_startaddr
& (rb
->page_size
- 1)) {
3617 error_report("ram_block_discard_range: Unaligned start address: %p",
3622 if ((start
+ length
) <= rb
->used_length
) {
3623 uint8_t *host_endaddr
= host_startaddr
+ length
;
3624 if ((uintptr_t)host_endaddr
& (rb
->page_size
- 1)) {
3625 error_report("ram_block_discard_range: Unaligned end address: %p",
3630 errno
= ENOTSUP
; /* If we are missing MADVISE etc */
3632 if (rb
->page_size
== qemu_host_page_size
) {
3633 #if defined(CONFIG_MADVISE)
3634 /* Note: We need the madvise MADV_DONTNEED behaviour of definitely
3637 ret
= madvise(host_startaddr
, length
, MADV_DONTNEED
);
3640 /* Huge page case - unfortunately it can't do DONTNEED, but
3641 * it can do the equivalent by FALLOC_FL_PUNCH_HOLE in the
3644 #ifdef CONFIG_FALLOCATE_PUNCH_HOLE
3645 ret
= fallocate(rb
->fd
, FALLOC_FL_PUNCH_HOLE
| FALLOC_FL_KEEP_SIZE
,
3651 error_report("ram_block_discard_range: Failed to discard range "
3652 "%s:%" PRIx64
" +%zx (%d)",
3653 rb
->idstr
, start
, length
, ret
);
3656 error_report("ram_block_discard_range: Overrun block '%s' (%" PRIu64
3657 "/%zx/" RAM_ADDR_FMT
")",
3658 rb
->idstr
, start
, length
, rb
->used_length
);
3667 void page_size_init(void)
3669 /* NOTE: we can always suppose that qemu_host_page_size >=
3671 if (qemu_host_page_size
== 0) {
3672 qemu_host_page_size
= qemu_real_host_page_size
;
3674 if (qemu_host_page_size
< TARGET_PAGE_SIZE
) {
3675 qemu_host_page_size
= TARGET_PAGE_SIZE
;
3677 qemu_host_page_mask
= -(intptr_t)qemu_host_page_size
;
3680 #if !defined(CONFIG_USER_ONLY)
3682 static void mtree_print_phys_entries(fprintf_function mon
, void *f
,
3683 int start
, int end
, int skip
, int ptr
)
3685 if (start
== end
- 1) {
3686 mon(f
, "\t%3d ", start
);
3688 mon(f
, "\t%3d..%-3d ", start
, end
- 1);
3690 mon(f
, " skip=%d ", skip
);
3691 if (ptr
== PHYS_MAP_NODE_NIL
) {
3694 mon(f
, " ptr=#%d", ptr
);
3696 mon(f
, " ptr=[%d]", ptr
);
3701 #define MR_SIZE(size) (int128_nz(size) ? (hwaddr)int128_get64( \
3702 int128_sub((size), int128_one())) : 0)
3704 void mtree_print_dispatch(fprintf_function mon
, void *f
,
3705 AddressSpaceDispatch
*d
, MemoryRegion
*root
)
3709 mon(f
, " Dispatch\n");
3710 mon(f
, " Physical sections\n");
3712 for (i
= 0; i
< d
->map
.sections_nb
; ++i
) {
3713 MemoryRegionSection
*s
= d
->map
.sections
+ i
;
3714 const char *names
[] = { " [unassigned]", " [not dirty]",
3715 " [ROM]", " [watch]" };
3717 mon(f
, " #%d @" TARGET_FMT_plx
".." TARGET_FMT_plx
" %s%s%s%s%s",
3719 s
->offset_within_address_space
,
3720 s
->offset_within_address_space
+ MR_SIZE(s
->mr
->size
),
3721 s
->mr
->name
? s
->mr
->name
: "(noname)",
3722 i
< ARRAY_SIZE(names
) ? names
[i
] : "",
3723 s
->mr
== root
? " [ROOT]" : "",
3724 s
== d
->mru_section
? " [MRU]" : "",
3725 s
->mr
->is_iommu
? " [iommu]" : "");
3728 mon(f
, " alias=%s", s
->mr
->alias
->name
?
3729 s
->mr
->alias
->name
: "noname");
3734 mon(f
, " Nodes (%d bits per level, %d levels) ptr=[%d] skip=%d\n",
3735 P_L2_BITS
, P_L2_LEVELS
, d
->phys_map
.ptr
, d
->phys_map
.skip
);
3736 for (i
= 0; i
< d
->map
.nodes_nb
; ++i
) {
3739 Node
*n
= d
->map
.nodes
+ i
;
3741 mon(f
, " [%d]\n", i
);
3743 for (j
= 0, jprev
= 0, prev
= *n
[0]; j
< ARRAY_SIZE(*n
); ++j
) {
3744 PhysPageEntry
*pe
= *n
+ j
;
3746 if (pe
->ptr
== prev
.ptr
&& pe
->skip
== prev
.skip
) {
3750 mtree_print_phys_entries(mon
, f
, jprev
, j
, prev
.skip
, prev
.ptr
);
3756 if (jprev
!= ARRAY_SIZE(*n
)) {
3757 mtree_print_phys_entries(mon
, f
, jprev
, j
, prev
.skip
, prev
.ptr
);