target/avr: CPU class: Add migration support
[qemu/ar7.git] / target / arm / Makefile.objs
blobfa39fd7c831e86ade53ff412cb33f0201d41ea79
1 obj-$(CONFIG_TCG) += arm-semi.o
2 obj-y += helper.o vfp_helper.o
3 obj-y += cpu.o gdbstub.o
4 obj-$(TARGET_AARCH64) += cpu64.o gdbstub64.o
6 obj-$(CONFIG_SOFTMMU) += machine.o arch_dump.o monitor.o
7 obj-$(CONFIG_SOFTMMU) += arm-powerctl.o
9 obj-$(CONFIG_KVM) += kvm.o
10 obj-$(call land,$(CONFIG_KVM),$(call lnot,$(TARGET_AARCH64))) += kvm32.o
11 obj-$(call land,$(CONFIG_KVM),$(TARGET_AARCH64)) += kvm64.o
12 obj-$(call lnot,$(CONFIG_KVM)) += kvm-stub.o
14 DECODETREE = $(SRC_PATH)/scripts/decodetree.py
16 target/arm/decode-sve.inc.c: $(SRC_PATH)/target/arm/sve.decode $(DECODETREE)
17         $(call quiet-command,\
18           $(PYTHON) $(DECODETREE) --decode disas_sve -o $@ $<,\
19           "GEN", $(TARGET_DIR)$@)
21 target/arm/decode-neon-shared.inc.c: $(SRC_PATH)/target/arm/neon-shared.decode $(DECODETREE)
22         $(call quiet-command,\
23           $(PYTHON) $(DECODETREE) --static-decode disas_neon_shared -o $@ $<,\
24           "GEN", $(TARGET_DIR)$@)
26 target/arm/decode-neon-dp.inc.c: $(SRC_PATH)/target/arm/neon-dp.decode $(DECODETREE)
27         $(call quiet-command,\
28           $(PYTHON) $(DECODETREE) --static-decode disas_neon_dp -o $@ $<,\
29           "GEN", $(TARGET_DIR)$@)
31 target/arm/decode-neon-ls.inc.c: $(SRC_PATH)/target/arm/neon-ls.decode $(DECODETREE)
32         $(call quiet-command,\
33           $(PYTHON) $(DECODETREE) --static-decode disas_neon_ls -o $@ $<,\
34           "GEN", $(TARGET_DIR)$@)
36 target/arm/decode-vfp.inc.c: $(SRC_PATH)/target/arm/vfp.decode $(DECODETREE)
37         $(call quiet-command,\
38           $(PYTHON) $(DECODETREE) --static-decode disas_vfp -o $@ $<,\
39           "GEN", $(TARGET_DIR)$@)
41 target/arm/decode-vfp-uncond.inc.c: $(SRC_PATH)/target/arm/vfp-uncond.decode $(DECODETREE)
42         $(call quiet-command,\
43           $(PYTHON) $(DECODETREE) --static-decode disas_vfp_uncond -o $@ $<,\
44           "GEN", $(TARGET_DIR)$@)
46 target/arm/decode-a32.inc.c: $(SRC_PATH)/target/arm/a32.decode $(DECODETREE)
47         $(call quiet-command,\
48           $(PYTHON) $(DECODETREE) --static-decode disas_a32 -o $@ $<,\
49           "GEN", $(TARGET_DIR)$@)
51 target/arm/decode-a32-uncond.inc.c: $(SRC_PATH)/target/arm/a32-uncond.decode $(DECODETREE)
52         $(call quiet-command,\
53           $(PYTHON) $(DECODETREE) --static-decode disas_a32_uncond -o $@ $<,\
54           "GEN", $(TARGET_DIR)$@)
56 target/arm/decode-t32.inc.c: $(SRC_PATH)/target/arm/t32.decode $(DECODETREE)
57         $(call quiet-command,\
58           $(PYTHON) $(DECODETREE) --static-decode disas_t32 -o $@ $<,\
59           "GEN", $(TARGET_DIR)$@)
61 target/arm/decode-t16.inc.c: $(SRC_PATH)/target/arm/t16.decode $(DECODETREE)
62         $(call quiet-command,\
63           $(PYTHON) $(DECODETREE) -w 16 --static-decode disas_t16 -o $@ $<,\
64           "GEN", $(TARGET_DIR)$@)
66 target/arm/translate-sve.o: target/arm/decode-sve.inc.c
67 target/arm/translate.o: target/arm/decode-neon-shared.inc.c
68 target/arm/translate.o: target/arm/decode-neon-dp.inc.c
69 target/arm/translate.o: target/arm/decode-neon-ls.inc.c
70 target/arm/translate.o: target/arm/decode-vfp.inc.c
71 target/arm/translate.o: target/arm/decode-vfp-uncond.inc.c
72 target/arm/translate.o: target/arm/decode-a32.inc.c
73 target/arm/translate.o: target/arm/decode-a32-uncond.inc.c
74 target/arm/translate.o: target/arm/decode-t32.inc.c
75 target/arm/translate.o: target/arm/decode-t16.inc.c
77 obj-y += tlb_helper.o debug_helper.o
78 obj-y += translate.o op_helper.o
79 obj-y += crypto_helper.o
80 obj-y += iwmmxt_helper.o vec_helper.o neon_helper.o
81 obj-y += m_helper.o
82 obj-y += cpu_tcg.o
84 obj-$(CONFIG_SOFTMMU) += psci.o
86 obj-$(TARGET_AARCH64) += translate-a64.o helper-a64.o
87 obj-$(TARGET_AARCH64) += translate-sve.o sve_helper.o
88 obj-$(TARGET_AARCH64) += pauth_helper.o
89 obj-$(TARGET_AARCH64) += mte_helper.o