2 * QEMU PowerPC pSeries Logical Partition (aka sPAPR) hardware System Emulator
4 * Copyright (c) 2004-2007 Fabrice Bellard
5 * Copyright (c) 2007 Jocelyn Mayer
6 * Copyright (c) 2010 David Gibson, IBM Corporation.
8 * Permission is hereby granted, free of charge, to any person obtaining a copy
9 * of this software and associated documentation files (the "Software"), to deal
10 * in the Software without restriction, including without limitation the rights
11 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
12 * copies of the Software, and to permit persons to whom the Software is
13 * furnished to do so, subject to the following conditions:
15 * The above copyright notice and this permission notice shall be included in
16 * all copies or substantial portions of the Software.
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
23 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
27 #include "sysemu/sysemu.h"
28 #include "sysemu/numa.h"
30 #include "hw/fw-path-provider.h"
33 #include "sysemu/block-backend.h"
34 #include "sysemu/cpus.h"
35 #include "sysemu/kvm.h"
37 #include "migration/migration.h"
38 #include "mmu-hash64.h"
41 #include "hw/boards.h"
42 #include "hw/ppc/ppc.h"
43 #include "hw/loader.h"
45 #include "hw/ppc/spapr.h"
46 #include "hw/ppc/spapr_vio.h"
47 #include "hw/pci-host/spapr.h"
48 #include "hw/ppc/xics.h"
49 #include "hw/pci/msi.h"
51 #include "hw/pci/pci.h"
52 #include "hw/scsi/scsi.h"
53 #include "hw/virtio/virtio-scsi.h"
55 #include "exec/address-spaces.h"
57 #include "qemu/config-file.h"
58 #include "qemu/error-report.h"
62 #include "hw/compat.h"
66 /* SLOF memory layout:
68 * SLOF raw image loaded at 0, copies its romfs right below the flat
69 * device-tree, then position SLOF itself 31M below that
71 * So we set FW_OVERHEAD to 40MB which should account for all of that
74 * We load our kernel at 4M, leaving space for SLOF initial image
76 #define FDT_MAX_SIZE 0x40000
77 #define RTAS_MAX_SIZE 0x10000
78 #define RTAS_MAX_ADDR 0x80000000 /* RTAS must stay below that */
79 #define FW_MAX_SIZE 0x400000
80 #define FW_FILE_NAME "slof.bin"
81 #define FW_OVERHEAD 0x2800000
82 #define KERNEL_LOAD_ADDR FW_MAX_SIZE
84 #define MIN_RMA_SLOF 128UL
86 #define TIMEBASE_FREQ 512000000ULL
90 #define PHANDLE_XICP 0x00001111
92 #define HTAB_SIZE(spapr) (1ULL << ((spapr)->htab_shift))
94 static XICSState
*try_create_xics(const char *type
, int nr_servers
,
95 int nr_irqs
, Error
**errp
)
100 dev
= qdev_create(NULL
, type
);
101 qdev_prop_set_uint32(dev
, "nr_servers", nr_servers
);
102 qdev_prop_set_uint32(dev
, "nr_irqs", nr_irqs
);
103 object_property_set_bool(OBJECT(dev
), true, "realized", &err
);
105 error_propagate(errp
, err
);
106 object_unparent(OBJECT(dev
));
109 return XICS_COMMON(dev
);
112 static XICSState
*xics_system_init(MachineState
*machine
,
113 int nr_servers
, int nr_irqs
)
115 XICSState
*icp
= NULL
;
120 if (machine_kernel_irqchip_allowed(machine
)) {
121 icp
= try_create_xics(TYPE_KVM_XICS
, nr_servers
, nr_irqs
, &err
);
123 if (machine_kernel_irqchip_required(machine
) && !icp
) {
124 error_report("kernel_irqchip requested but unavailable: %s",
125 error_get_pretty(err
));
130 icp
= try_create_xics(TYPE_XICS
, nr_servers
, nr_irqs
, &error_abort
);
136 static int spapr_fixup_cpu_smt_dt(void *fdt
, int offset
, PowerPCCPU
*cpu
,
140 uint32_t servers_prop
[smt_threads
];
141 uint32_t gservers_prop
[smt_threads
* 2];
142 int index
= ppc_get_vcpu_dt_id(cpu
);
144 if (cpu
->cpu_version
) {
145 ret
= fdt_setprop_cell(fdt
, offset
, "cpu-version", cpu
->cpu_version
);
151 /* Build interrupt servers and gservers properties */
152 for (i
= 0; i
< smt_threads
; i
++) {
153 servers_prop
[i
] = cpu_to_be32(index
+ i
);
154 /* Hack, direct the group queues back to cpu 0 */
155 gservers_prop
[i
*2] = cpu_to_be32(index
+ i
);
156 gservers_prop
[i
*2 + 1] = 0;
158 ret
= fdt_setprop(fdt
, offset
, "ibm,ppc-interrupt-server#s",
159 servers_prop
, sizeof(servers_prop
));
163 ret
= fdt_setprop(fdt
, offset
, "ibm,ppc-interrupt-gserver#s",
164 gservers_prop
, sizeof(gservers_prop
));
169 static int spapr_fixup_cpu_numa_dt(void *fdt
, int offset
, CPUState
*cs
)
172 PowerPCCPU
*cpu
= POWERPC_CPU(cs
);
173 int index
= ppc_get_vcpu_dt_id(cpu
);
174 uint32_t associativity
[] = {cpu_to_be32(0x5),
178 cpu_to_be32(cs
->numa_node
),
181 /* Advertise NUMA via ibm,associativity */
182 if (nb_numa_nodes
> 1) {
183 ret
= fdt_setprop(fdt
, offset
, "ibm,associativity", associativity
,
184 sizeof(associativity
));
190 static int spapr_fixup_cpu_dt(void *fdt
, sPAPRMachineState
*spapr
)
192 int ret
= 0, offset
, cpus_offset
;
195 int smt
= kvmppc_smt_threads();
196 uint32_t pft_size_prop
[] = {0, cpu_to_be32(spapr
->htab_shift
)};
199 PowerPCCPU
*cpu
= POWERPC_CPU(cs
);
200 DeviceClass
*dc
= DEVICE_GET_CLASS(cs
);
201 int index
= ppc_get_vcpu_dt_id(cpu
);
203 if ((index
% smt
) != 0) {
207 snprintf(cpu_model
, 32, "%s@%x", dc
->fw_name
, index
);
209 cpus_offset
= fdt_path_offset(fdt
, "/cpus");
210 if (cpus_offset
< 0) {
211 cpus_offset
= fdt_add_subnode(fdt
, fdt_path_offset(fdt
, "/"),
213 if (cpus_offset
< 0) {
217 offset
= fdt_subnode_offset(fdt
, cpus_offset
, cpu_model
);
219 offset
= fdt_add_subnode(fdt
, cpus_offset
, cpu_model
);
225 ret
= fdt_setprop(fdt
, offset
, "ibm,pft-size",
226 pft_size_prop
, sizeof(pft_size_prop
));
231 ret
= spapr_fixup_cpu_numa_dt(fdt
, offset
, cs
);
236 ret
= spapr_fixup_cpu_smt_dt(fdt
, offset
, cpu
,
237 ppc_get_compat_smt_threads(cpu
));
246 static size_t create_page_sizes_prop(CPUPPCState
*env
, uint32_t *prop
,
249 size_t maxcells
= maxsize
/ sizeof(uint32_t);
253 for (i
= 0; i
< PPC_PAGE_SIZES_MAX_SZ
; i
++) {
254 struct ppc_one_seg_page_size
*sps
= &env
->sps
.sps
[i
];
256 if (!sps
->page_shift
) {
259 for (count
= 0; count
< PPC_PAGE_SIZES_MAX_SZ
; count
++) {
260 if (sps
->enc
[count
].page_shift
== 0) {
264 if ((p
- prop
) >= (maxcells
- 3 - count
* 2)) {
267 *(p
++) = cpu_to_be32(sps
->page_shift
);
268 *(p
++) = cpu_to_be32(sps
->slb_enc
);
269 *(p
++) = cpu_to_be32(count
);
270 for (j
= 0; j
< count
; j
++) {
271 *(p
++) = cpu_to_be32(sps
->enc
[j
].page_shift
);
272 *(p
++) = cpu_to_be32(sps
->enc
[j
].pte_enc
);
276 return (p
- prop
) * sizeof(uint32_t);
279 static hwaddr
spapr_node0_size(void)
281 MachineState
*machine
= MACHINE(qdev_get_machine());
285 for (i
= 0; i
< nb_numa_nodes
; ++i
) {
286 if (numa_info
[i
].node_mem
) {
287 return MIN(pow2floor(numa_info
[i
].node_mem
),
292 return machine
->ram_size
;
299 fprintf(stderr, "qemu: error creating device tree: %s: %s\n", \
300 #exp, fdt_strerror(ret)); \
305 static void add_str(GString
*s
, const gchar
*s1
)
307 g_string_append_len(s
, s1
, strlen(s1
) + 1);
310 static void *spapr_create_fdt_skel(hwaddr initrd_base
,
314 const char *kernel_cmdline
,
318 uint32_t start_prop
= cpu_to_be32(initrd_base
);
319 uint32_t end_prop
= cpu_to_be32(initrd_base
+ initrd_size
);
320 GString
*hypertas
= g_string_sized_new(256);
321 GString
*qemu_hypertas
= g_string_sized_new(256);
322 uint32_t refpoints
[] = {cpu_to_be32(0x4), cpu_to_be32(0x4)};
323 uint32_t interrupt_server_ranges_prop
[] = {0, cpu_to_be32(max_cpus
)};
324 unsigned char vec5
[] = {0x0, 0x0, 0x0, 0x0, 0x0, 0x80};
327 add_str(hypertas
, "hcall-pft");
328 add_str(hypertas
, "hcall-term");
329 add_str(hypertas
, "hcall-dabr");
330 add_str(hypertas
, "hcall-interrupt");
331 add_str(hypertas
, "hcall-tce");
332 add_str(hypertas
, "hcall-vio");
333 add_str(hypertas
, "hcall-splpar");
334 add_str(hypertas
, "hcall-bulk");
335 add_str(hypertas
, "hcall-set-mode");
336 add_str(qemu_hypertas
, "hcall-memop1");
338 fdt
= g_malloc0(FDT_MAX_SIZE
);
339 _FDT((fdt_create(fdt
, FDT_MAX_SIZE
)));
342 _FDT((fdt_add_reservemap_entry(fdt
, KERNEL_LOAD_ADDR
, kernel_size
)));
345 _FDT((fdt_add_reservemap_entry(fdt
, initrd_base
, initrd_size
)));
347 _FDT((fdt_finish_reservemap(fdt
)));
350 _FDT((fdt_begin_node(fdt
, "")));
351 _FDT((fdt_property_string(fdt
, "device_type", "chrp")));
352 _FDT((fdt_property_string(fdt
, "model", "IBM pSeries (emulated by qemu)")));
353 _FDT((fdt_property_string(fdt
, "compatible", "qemu,pseries")));
356 * Add info to guest to indentify which host is it being run on
357 * and what is the uuid of the guest
359 if (kvmppc_get_host_model(&buf
)) {
360 _FDT((fdt_property_string(fdt
, "host-model", buf
)));
363 if (kvmppc_get_host_serial(&buf
)) {
364 _FDT((fdt_property_string(fdt
, "host-serial", buf
)));
368 buf
= g_strdup_printf(UUID_FMT
, qemu_uuid
[0], qemu_uuid
[1],
369 qemu_uuid
[2], qemu_uuid
[3], qemu_uuid
[4],
370 qemu_uuid
[5], qemu_uuid
[6], qemu_uuid
[7],
371 qemu_uuid
[8], qemu_uuid
[9], qemu_uuid
[10],
372 qemu_uuid
[11], qemu_uuid
[12], qemu_uuid
[13],
373 qemu_uuid
[14], qemu_uuid
[15]);
375 _FDT((fdt_property_string(fdt
, "vm,uuid", buf
)));
378 _FDT((fdt_property_cell(fdt
, "#address-cells", 0x2)));
379 _FDT((fdt_property_cell(fdt
, "#size-cells", 0x2)));
382 _FDT((fdt_begin_node(fdt
, "chosen")));
384 /* Set Form1_affinity */
385 _FDT((fdt_property(fdt
, "ibm,architecture-vec-5", vec5
, sizeof(vec5
))));
387 _FDT((fdt_property_string(fdt
, "bootargs", kernel_cmdline
)));
388 _FDT((fdt_property(fdt
, "linux,initrd-start",
389 &start_prop
, sizeof(start_prop
))));
390 _FDT((fdt_property(fdt
, "linux,initrd-end",
391 &end_prop
, sizeof(end_prop
))));
393 uint64_t kprop
[2] = { cpu_to_be64(KERNEL_LOAD_ADDR
),
394 cpu_to_be64(kernel_size
) };
396 _FDT((fdt_property(fdt
, "qemu,boot-kernel", &kprop
, sizeof(kprop
))));
398 _FDT((fdt_property(fdt
, "qemu,boot-kernel-le", NULL
, 0)));
402 _FDT((fdt_property_cell(fdt
, "qemu,boot-menu", boot_menu
)));
404 _FDT((fdt_property_cell(fdt
, "qemu,graphic-width", graphic_width
)));
405 _FDT((fdt_property_cell(fdt
, "qemu,graphic-height", graphic_height
)));
406 _FDT((fdt_property_cell(fdt
, "qemu,graphic-depth", graphic_depth
)));
408 _FDT((fdt_end_node(fdt
)));
411 _FDT((fdt_begin_node(fdt
, "rtas")));
413 if (!kvm_enabled() || kvmppc_spapr_use_multitce()) {
414 add_str(hypertas
, "hcall-multi-tce");
416 _FDT((fdt_property(fdt
, "ibm,hypertas-functions", hypertas
->str
,
418 g_string_free(hypertas
, TRUE
);
419 _FDT((fdt_property(fdt
, "qemu,hypertas-functions", qemu_hypertas
->str
,
420 qemu_hypertas
->len
)));
421 g_string_free(qemu_hypertas
, TRUE
);
423 _FDT((fdt_property(fdt
, "ibm,associativity-reference-points",
424 refpoints
, sizeof(refpoints
))));
426 _FDT((fdt_property_cell(fdt
, "rtas-error-log-max", RTAS_ERROR_LOG_MAX
)));
427 _FDT((fdt_property_cell(fdt
, "rtas-event-scan-rate",
428 RTAS_EVENT_SCAN_RATE
)));
431 * According to PAPR, rtas ibm,os-term does not guarantee a return
432 * back to the guest cpu.
434 * While an additional ibm,extended-os-term property indicates that
435 * rtas call return will always occur. Set this property.
437 _FDT((fdt_property(fdt
, "ibm,extended-os-term", NULL
, 0)));
439 _FDT((fdt_end_node(fdt
)));
441 /* interrupt controller */
442 _FDT((fdt_begin_node(fdt
, "interrupt-controller")));
444 _FDT((fdt_property_string(fdt
, "device_type",
445 "PowerPC-External-Interrupt-Presentation")));
446 _FDT((fdt_property_string(fdt
, "compatible", "IBM,ppc-xicp")));
447 _FDT((fdt_property(fdt
, "interrupt-controller", NULL
, 0)));
448 _FDT((fdt_property(fdt
, "ibm,interrupt-server-ranges",
449 interrupt_server_ranges_prop
,
450 sizeof(interrupt_server_ranges_prop
))));
451 _FDT((fdt_property_cell(fdt
, "#interrupt-cells", 2)));
452 _FDT((fdt_property_cell(fdt
, "linux,phandle", PHANDLE_XICP
)));
453 _FDT((fdt_property_cell(fdt
, "phandle", PHANDLE_XICP
)));
455 _FDT((fdt_end_node(fdt
)));
458 _FDT((fdt_begin_node(fdt
, "vdevice")));
460 _FDT((fdt_property_string(fdt
, "device_type", "vdevice")));
461 _FDT((fdt_property_string(fdt
, "compatible", "IBM,vdevice")));
462 _FDT((fdt_property_cell(fdt
, "#address-cells", 0x1)));
463 _FDT((fdt_property_cell(fdt
, "#size-cells", 0x0)));
464 _FDT((fdt_property_cell(fdt
, "#interrupt-cells", 0x2)));
465 _FDT((fdt_property(fdt
, "interrupt-controller", NULL
, 0)));
467 _FDT((fdt_end_node(fdt
)));
470 spapr_events_fdt_skel(fdt
, epow_irq
);
472 /* /hypervisor node */
474 uint8_t hypercall
[16];
476 /* indicate KVM hypercall interface */
477 _FDT((fdt_begin_node(fdt
, "hypervisor")));
478 _FDT((fdt_property_string(fdt
, "compatible", "linux,kvm")));
479 if (kvmppc_has_cap_fixup_hcalls()) {
481 * Older KVM versions with older guest kernels were broken with the
482 * magic page, don't allow the guest to map it.
484 kvmppc_get_hypercall(first_cpu
->env_ptr
, hypercall
,
486 _FDT((fdt_property(fdt
, "hcall-instructions", hypercall
,
487 sizeof(hypercall
))));
489 _FDT((fdt_end_node(fdt
)));
492 _FDT((fdt_end_node(fdt
))); /* close root node */
493 _FDT((fdt_finish(fdt
)));
498 int spapr_h_cas_compose_response(sPAPRMachineState
*spapr
,
499 target_ulong addr
, target_ulong size
)
501 void *fdt
, *fdt_skel
;
502 sPAPRDeviceTreeUpdateHeader hdr
= { .version_id
= 1 };
506 /* Create sceleton */
507 fdt_skel
= g_malloc0(size
);
508 _FDT((fdt_create(fdt_skel
, size
)));
509 _FDT((fdt_begin_node(fdt_skel
, "")));
510 _FDT((fdt_end_node(fdt_skel
)));
511 _FDT((fdt_finish(fdt_skel
)));
512 fdt
= g_malloc0(size
);
513 _FDT((fdt_open_into(fdt_skel
, fdt
, size
)));
516 /* Fix skeleton up */
517 _FDT((spapr_fixup_cpu_dt(fdt
, spapr
)));
519 /* Pack resulting tree */
520 _FDT((fdt_pack(fdt
)));
522 if (fdt_totalsize(fdt
) + sizeof(hdr
) > size
) {
523 trace_spapr_cas_failed(size
);
527 cpu_physical_memory_write(addr
, &hdr
, sizeof(hdr
));
528 cpu_physical_memory_write(addr
+ sizeof(hdr
), fdt
, fdt_totalsize(fdt
));
529 trace_spapr_cas_continue(fdt_totalsize(fdt
) + sizeof(hdr
));
535 static void spapr_populate_memory_node(void *fdt
, int nodeid
, hwaddr start
,
538 uint32_t associativity
[] = {
539 cpu_to_be32(0x4), /* length */
540 cpu_to_be32(0x0), cpu_to_be32(0x0),
541 cpu_to_be32(0x0), cpu_to_be32(nodeid
)
544 uint64_t mem_reg_property
[2];
547 mem_reg_property
[0] = cpu_to_be64(start
);
548 mem_reg_property
[1] = cpu_to_be64(size
);
550 sprintf(mem_name
, "memory@" TARGET_FMT_lx
, start
);
551 off
= fdt_add_subnode(fdt
, 0, mem_name
);
553 _FDT((fdt_setprop_string(fdt
, off
, "device_type", "memory")));
554 _FDT((fdt_setprop(fdt
, off
, "reg", mem_reg_property
,
555 sizeof(mem_reg_property
))));
556 _FDT((fdt_setprop(fdt
, off
, "ibm,associativity", associativity
,
557 sizeof(associativity
))));
560 static int spapr_populate_memory(sPAPRMachineState
*spapr
, void *fdt
)
562 MachineState
*machine
= MACHINE(spapr
);
563 hwaddr mem_start
, node_size
;
564 int i
, nb_nodes
= nb_numa_nodes
;
565 NodeInfo
*nodes
= numa_info
;
568 /* No NUMA nodes, assume there is just one node with whole RAM */
569 if (!nb_numa_nodes
) {
571 ramnode
.node_mem
= machine
->ram_size
;
575 for (i
= 0, mem_start
= 0; i
< nb_nodes
; ++i
) {
576 if (!nodes
[i
].node_mem
) {
579 if (mem_start
>= machine
->ram_size
) {
582 node_size
= nodes
[i
].node_mem
;
583 if (node_size
> machine
->ram_size
- mem_start
) {
584 node_size
= machine
->ram_size
- mem_start
;
588 /* ppc_spapr_init() checks for rma_size <= node0_size already */
589 spapr_populate_memory_node(fdt
, i
, 0, spapr
->rma_size
);
590 mem_start
+= spapr
->rma_size
;
591 node_size
-= spapr
->rma_size
;
593 for ( ; node_size
; ) {
594 hwaddr sizetmp
= pow2floor(node_size
);
596 /* mem_start != 0 here */
597 if (ctzl(mem_start
) < ctzl(sizetmp
)) {
598 sizetmp
= 1ULL << ctzl(mem_start
);
601 spapr_populate_memory_node(fdt
, i
, mem_start
, sizetmp
);
602 node_size
-= sizetmp
;
603 mem_start
+= sizetmp
;
610 static void spapr_populate_cpu_dt(CPUState
*cs
, void *fdt
, int offset
,
611 sPAPRMachineState
*spapr
)
613 PowerPCCPU
*cpu
= POWERPC_CPU(cs
);
614 CPUPPCState
*env
= &cpu
->env
;
615 PowerPCCPUClass
*pcc
= POWERPC_CPU_GET_CLASS(cs
);
616 int index
= ppc_get_vcpu_dt_id(cpu
);
617 uint32_t segs
[] = {cpu_to_be32(28), cpu_to_be32(40),
618 0xffffffff, 0xffffffff};
619 uint32_t tbfreq
= kvm_enabled() ? kvmppc_get_tbfreq() : TIMEBASE_FREQ
;
620 uint32_t cpufreq
= kvm_enabled() ? kvmppc_get_clockfreq() : 1000000000;
621 uint32_t page_sizes_prop
[64];
622 size_t page_sizes_prop_size
;
623 QemuOpts
*opts
= qemu_opts_find(qemu_find_opts("smp-opts"), NULL
);
624 unsigned sockets
= opts
? qemu_opt_get_number(opts
, "sockets", 0) : 0;
625 uint32_t cpus_per_socket
= sockets
? (smp_cpus
/ sockets
) : 1;
626 uint32_t pft_size_prop
[] = {0, cpu_to_be32(spapr
->htab_shift
)};
628 _FDT((fdt_setprop_cell(fdt
, offset
, "reg", index
)));
629 _FDT((fdt_setprop_string(fdt
, offset
, "device_type", "cpu")));
631 _FDT((fdt_setprop_cell(fdt
, offset
, "cpu-version", env
->spr
[SPR_PVR
])));
632 _FDT((fdt_setprop_cell(fdt
, offset
, "d-cache-block-size",
633 env
->dcache_line_size
)));
634 _FDT((fdt_setprop_cell(fdt
, offset
, "d-cache-line-size",
635 env
->dcache_line_size
)));
636 _FDT((fdt_setprop_cell(fdt
, offset
, "i-cache-block-size",
637 env
->icache_line_size
)));
638 _FDT((fdt_setprop_cell(fdt
, offset
, "i-cache-line-size",
639 env
->icache_line_size
)));
641 if (pcc
->l1_dcache_size
) {
642 _FDT((fdt_setprop_cell(fdt
, offset
, "d-cache-size",
643 pcc
->l1_dcache_size
)));
645 fprintf(stderr
, "Warning: Unknown L1 dcache size for cpu\n");
647 if (pcc
->l1_icache_size
) {
648 _FDT((fdt_setprop_cell(fdt
, offset
, "i-cache-size",
649 pcc
->l1_icache_size
)));
651 fprintf(stderr
, "Warning: Unknown L1 icache size for cpu\n");
654 _FDT((fdt_setprop_cell(fdt
, offset
, "timebase-frequency", tbfreq
)));
655 _FDT((fdt_setprop_cell(fdt
, offset
, "clock-frequency", cpufreq
)));
656 _FDT((fdt_setprop_cell(fdt
, offset
, "ibm,slb-size", env
->slb_nr
)));
657 _FDT((fdt_setprop_string(fdt
, offset
, "status", "okay")));
658 _FDT((fdt_setprop(fdt
, offset
, "64-bit", NULL
, 0)));
660 if (env
->spr_cb
[SPR_PURR
].oea_read
) {
661 _FDT((fdt_setprop(fdt
, offset
, "ibm,purr", NULL
, 0)));
664 if (env
->mmu_model
& POWERPC_MMU_1TSEG
) {
665 _FDT((fdt_setprop(fdt
, offset
, "ibm,processor-segment-sizes",
666 segs
, sizeof(segs
))));
669 /* Advertise VMX/VSX (vector extensions) if available
670 * 0 / no property == no vector extensions
671 * 1 == VMX / Altivec available
672 * 2 == VSX available */
673 if (env
->insns_flags
& PPC_ALTIVEC
) {
674 uint32_t vmx
= (env
->insns_flags2
& PPC2_VSX
) ? 2 : 1;
676 _FDT((fdt_setprop_cell(fdt
, offset
, "ibm,vmx", vmx
)));
679 /* Advertise DFP (Decimal Floating Point) if available
680 * 0 / no property == no DFP
681 * 1 == DFP available */
682 if (env
->insns_flags2
& PPC2_DFP
) {
683 _FDT((fdt_setprop_cell(fdt
, offset
, "ibm,dfp", 1)));
686 page_sizes_prop_size
= create_page_sizes_prop(env
, page_sizes_prop
,
687 sizeof(page_sizes_prop
));
688 if (page_sizes_prop_size
) {
689 _FDT((fdt_setprop(fdt
, offset
, "ibm,segment-page-sizes",
690 page_sizes_prop
, page_sizes_prop_size
)));
693 _FDT((fdt_setprop_cell(fdt
, offset
, "ibm,chip-id",
694 cs
->cpu_index
/ cpus_per_socket
)));
696 _FDT((fdt_setprop(fdt
, offset
, "ibm,pft-size",
697 pft_size_prop
, sizeof(pft_size_prop
))));
699 _FDT(spapr_fixup_cpu_numa_dt(fdt
, offset
, cs
));
701 _FDT(spapr_fixup_cpu_smt_dt(fdt
, offset
, cpu
,
702 ppc_get_compat_smt_threads(cpu
)));
705 static void spapr_populate_cpus_dt_node(void *fdt
, sPAPRMachineState
*spapr
)
710 int smt
= kvmppc_smt_threads();
712 cpus_offset
= fdt_add_subnode(fdt
, 0, "cpus");
714 _FDT((fdt_setprop_cell(fdt
, cpus_offset
, "#address-cells", 0x1)));
715 _FDT((fdt_setprop_cell(fdt
, cpus_offset
, "#size-cells", 0x0)));
718 * We walk the CPUs in reverse order to ensure that CPU DT nodes
719 * created by fdt_add_subnode() end up in the right order in FDT
720 * for the guest kernel the enumerate the CPUs correctly.
722 CPU_FOREACH_REVERSE(cs
) {
723 PowerPCCPU
*cpu
= POWERPC_CPU(cs
);
724 int index
= ppc_get_vcpu_dt_id(cpu
);
725 DeviceClass
*dc
= DEVICE_GET_CLASS(cs
);
728 if ((index
% smt
) != 0) {
732 nodename
= g_strdup_printf("%s@%x", dc
->fw_name
, index
);
733 offset
= fdt_add_subnode(fdt
, cpus_offset
, nodename
);
736 spapr_populate_cpu_dt(cs
, fdt
, offset
, spapr
);
741 static void spapr_finalize_fdt(sPAPRMachineState
*spapr
,
746 MachineState
*machine
= MACHINE(qdev_get_machine());
747 const char *boot_device
= machine
->boot_order
;
754 fdt
= g_malloc(FDT_MAX_SIZE
);
756 /* open out the base tree into a temp buffer for the final tweaks */
757 _FDT((fdt_open_into(spapr
->fdt_skel
, fdt
, FDT_MAX_SIZE
)));
759 ret
= spapr_populate_memory(spapr
, fdt
);
761 fprintf(stderr
, "couldn't setup memory nodes in fdt\n");
765 ret
= spapr_populate_vdevice(spapr
->vio_bus
, fdt
);
767 fprintf(stderr
, "couldn't setup vio devices in fdt\n");
771 QLIST_FOREACH(phb
, &spapr
->phbs
, list
) {
772 ret
= spapr_populate_pci_dt(phb
, PHANDLE_XICP
, fdt
);
776 fprintf(stderr
, "couldn't setup PCI devices in fdt\n");
781 ret
= spapr_rtas_device_tree_setup(fdt
, rtas_addr
, rtas_size
);
783 fprintf(stderr
, "Couldn't set up RTAS device tree properties\n");
787 spapr_populate_cpus_dt_node(fdt
, spapr
);
789 bootlist
= get_boot_devices_list(&cb
, true);
790 if (cb
&& bootlist
) {
791 int offset
= fdt_path_offset(fdt
, "/chosen");
795 for (i
= 0; i
< cb
; i
++) {
796 if (bootlist
[i
] == '\n') {
801 ret
= fdt_setprop_string(fdt
, offset
, "qemu,boot-list", bootlist
);
804 if (boot_device
&& strlen(boot_device
)) {
805 int offset
= fdt_path_offset(fdt
, "/chosen");
810 fdt_setprop_string(fdt
, offset
, "qemu,boot-device", boot_device
);
813 if (!spapr
->has_graphics
) {
814 spapr_populate_chosen_stdout(fdt
, spapr
->vio_bus
);
817 _FDT((fdt_pack(fdt
)));
819 if (fdt_totalsize(fdt
) > FDT_MAX_SIZE
) {
820 error_report("FDT too big ! 0x%x bytes (max is 0x%x)",
821 fdt_totalsize(fdt
), FDT_MAX_SIZE
);
825 cpu_physical_memory_write(fdt_addr
, fdt
, fdt_totalsize(fdt
));
831 static uint64_t translate_kernel_address(void *opaque
, uint64_t addr
)
833 return (addr
& 0x0fffffff) + KERNEL_LOAD_ADDR
;
836 static void emulate_spapr_hypercall(PowerPCCPU
*cpu
)
838 CPUPPCState
*env
= &cpu
->env
;
841 hcall_dprintf("Hypercall made with MSR[PR]=1\n");
842 env
->gpr
[3] = H_PRIVILEGE
;
844 env
->gpr
[3] = spapr_hypercall(cpu
, env
->gpr
[3], &env
->gpr
[4]);
848 #define HPTE(_table, _i) (void *)(((uint64_t *)(_table)) + ((_i) * 2))
849 #define HPTE_VALID(_hpte) (tswap64(*((uint64_t *)(_hpte))) & HPTE64_V_VALID)
850 #define HPTE_DIRTY(_hpte) (tswap64(*((uint64_t *)(_hpte))) & HPTE64_V_HPTE_DIRTY)
851 #define CLEAN_HPTE(_hpte) ((*(uint64_t *)(_hpte)) &= tswap64(~HPTE64_V_HPTE_DIRTY))
852 #define DIRTY_HPTE(_hpte) ((*(uint64_t *)(_hpte)) |= tswap64(HPTE64_V_HPTE_DIRTY))
854 static void spapr_reset_htab(sPAPRMachineState
*spapr
)
859 /* allocate hash page table. For now we always make this 16mb,
860 * later we should probably make it scale to the size of guest
863 shift
= kvmppc_reset_htab(spapr
->htab_shift
);
866 /* Kernel handles htab, we don't need to allocate one */
867 spapr
->htab_shift
= shift
;
868 kvmppc_kern_htab
= true;
870 /* Tell readers to update their file descriptor */
871 if (spapr
->htab_fd
>= 0) {
872 spapr
->htab_fd_stale
= true;
876 /* Allocate an htab if we don't yet have one */
877 spapr
->htab
= qemu_memalign(HTAB_SIZE(spapr
), HTAB_SIZE(spapr
));
881 memset(spapr
->htab
, 0, HTAB_SIZE(spapr
));
883 for (index
= 0; index
< HTAB_SIZE(spapr
) / HASH_PTE_SIZE_64
; index
++) {
884 DIRTY_HPTE(HPTE(spapr
->htab
, index
));
888 /* Update the RMA size if necessary */
889 if (spapr
->vrma_adjust
) {
890 spapr
->rma_size
= kvmppc_rma_size(spapr_node0_size(),
895 static int find_unknown_sysbus_device(SysBusDevice
*sbdev
, void *opaque
)
897 bool matched
= false;
899 if (object_dynamic_cast(OBJECT(sbdev
), TYPE_SPAPR_PCI_HOST_BRIDGE
)) {
904 error_report("Device %s is not supported by this machine yet.",
905 qdev_fw_name(DEVICE(sbdev
)));
913 * A guest reset will cause spapr->htab_fd to become stale if being used.
914 * Reopen the file descriptor to make sure the whole HTAB is properly read.
916 static int spapr_check_htab_fd(sPAPRMachineState
*spapr
)
920 if (spapr
->htab_fd_stale
) {
921 close(spapr
->htab_fd
);
922 spapr
->htab_fd
= kvmppc_get_htab_fd(false);
923 if (spapr
->htab_fd
< 0) {
924 error_report("Unable to open fd for reading hash table from KVM: "
925 "%s", strerror(errno
));
928 spapr
->htab_fd_stale
= false;
934 static void ppc_spapr_reset(void)
936 sPAPRMachineState
*spapr
= SPAPR_MACHINE(qdev_get_machine());
937 PowerPCCPU
*first_ppc_cpu
;
940 /* Check for unknown sysbus devices */
941 foreach_dynamic_sysbus_device(find_unknown_sysbus_device
, NULL
);
943 /* Reset the hash table & recalc the RMA */
944 spapr_reset_htab(spapr
);
946 qemu_devices_reset();
949 * We place the device tree and RTAS just below either the top of the RMA,
950 * or just below 2GB, whichever is lowere, so that it can be
951 * processed with 32-bit real mode code if necessary
953 rtas_limit
= MIN(spapr
->rma_size
, RTAS_MAX_ADDR
);
954 spapr
->rtas_addr
= rtas_limit
- RTAS_MAX_SIZE
;
955 spapr
->fdt_addr
= spapr
->rtas_addr
- FDT_MAX_SIZE
;
958 spapr_finalize_fdt(spapr
, spapr
->fdt_addr
, spapr
->rtas_addr
,
962 cpu_physical_memory_write(spapr
->rtas_addr
, spapr
->rtas_blob
,
965 /* Set up the entry state */
966 first_ppc_cpu
= POWERPC_CPU(first_cpu
);
967 first_ppc_cpu
->env
.gpr
[3] = spapr
->fdt_addr
;
968 first_ppc_cpu
->env
.gpr
[5] = 0;
969 first_cpu
->halted
= 0;
970 first_ppc_cpu
->env
.nip
= SPAPR_ENTRY_POINT
;
974 static void spapr_cpu_reset(void *opaque
)
976 sPAPRMachineState
*spapr
= SPAPR_MACHINE(qdev_get_machine());
977 PowerPCCPU
*cpu
= opaque
;
978 CPUState
*cs
= CPU(cpu
);
979 CPUPPCState
*env
= &cpu
->env
;
983 /* All CPUs start halted. CPU0 is unhalted from the machine level
984 * reset code and the rest are explicitly started up by the guest
985 * using an RTAS call */
988 env
->spr
[SPR_HIOR
] = 0;
990 env
->external_htab
= (uint8_t *)spapr
->htab
;
991 if (kvm_enabled() && !env
->external_htab
) {
993 * HV KVM, set external_htab to 1 so our ppc_hash64_load_hpte*
994 * functions do the right thing.
996 env
->external_htab
= (void *)1;
1000 * htab_mask is the mask used to normalize hash value to PTEG index.
1001 * htab_shift is log2 of hash table size.
1002 * We have 8 hpte per group, and each hpte is 16 bytes.
1003 * ie have 128 bytes per hpte entry.
1005 env
->htab_mask
= (1ULL << (spapr
->htab_shift
- 7)) - 1;
1006 // TODO: can next assignment to target_ulong loose significant bits?
1007 env
->spr
[SPR_SDR1
] = (target_ulong
)(uintptr_t)spapr
->htab
|
1008 (spapr
->htab_shift
- 18);
1011 static void spapr_create_nvram(sPAPRMachineState
*spapr
)
1013 DeviceState
*dev
= qdev_create(&spapr
->vio_bus
->bus
, "spapr-nvram");
1014 DriveInfo
*dinfo
= drive_get(IF_PFLASH
, 0, 0);
1017 qdev_prop_set_drive_nofail(dev
, "drive", blk_by_legacy_dinfo(dinfo
));
1020 qdev_init_nofail(dev
);
1022 spapr
->nvram
= (struct sPAPRNVRAM
*)dev
;
1025 static void spapr_rtc_create(sPAPRMachineState
*spapr
)
1027 DeviceState
*dev
= qdev_create(NULL
, TYPE_SPAPR_RTC
);
1029 qdev_init_nofail(dev
);
1032 object_property_add_alias(qdev_get_machine(), "rtc-time",
1033 OBJECT(spapr
->rtc
), "date", NULL
);
1036 /* Returns whether we want to use VGA or not */
1037 static int spapr_vga_init(PCIBus
*pci_bus
)
1039 switch (vga_interface_type
) {
1045 return pci_vga_init(pci_bus
) != NULL
;
1047 fprintf(stderr
, "This vga model is not supported,"
1048 "currently it only supports -vga std\n");
1053 static int spapr_post_load(void *opaque
, int version_id
)
1055 sPAPRMachineState
*spapr
= (sPAPRMachineState
*)opaque
;
1058 /* In earlier versions, there was no separate qdev for the PAPR
1059 * RTC, so the RTC offset was stored directly in sPAPREnvironment.
1060 * So when migrating from those versions, poke the incoming offset
1061 * value into the RTC device */
1062 if (version_id
< 3) {
1063 err
= spapr_rtc_import_offset(spapr
->rtc
, spapr
->rtc_offset
);
1069 static bool version_before_3(void *opaque
, int version_id
)
1071 return version_id
< 3;
1074 static const VMStateDescription vmstate_spapr
= {
1077 .minimum_version_id
= 1,
1078 .post_load
= spapr_post_load
,
1079 .fields
= (VMStateField
[]) {
1080 /* used to be @next_irq */
1081 VMSTATE_UNUSED_BUFFER(version_before_3
, 0, 4),
1084 VMSTATE_UINT64_TEST(rtc_offset
, sPAPRMachineState
, version_before_3
),
1086 VMSTATE_PPC_TIMEBASE_V(tb
, sPAPRMachineState
, 2),
1087 VMSTATE_END_OF_LIST()
1091 static int htab_save_setup(QEMUFile
*f
, void *opaque
)
1093 sPAPRMachineState
*spapr
= opaque
;
1095 /* "Iteration" header */
1096 qemu_put_be32(f
, spapr
->htab_shift
);
1099 spapr
->htab_save_index
= 0;
1100 spapr
->htab_first_pass
= true;
1102 assert(kvm_enabled());
1104 spapr
->htab_fd
= kvmppc_get_htab_fd(false);
1105 spapr
->htab_fd_stale
= false;
1106 if (spapr
->htab_fd
< 0) {
1107 fprintf(stderr
, "Unable to open fd for reading hash table from KVM: %s\n",
1117 static void htab_save_first_pass(QEMUFile
*f
, sPAPRMachineState
*spapr
,
1120 int htabslots
= HTAB_SIZE(spapr
) / HASH_PTE_SIZE_64
;
1121 int index
= spapr
->htab_save_index
;
1122 int64_t starttime
= qemu_clock_get_ns(QEMU_CLOCK_REALTIME
);
1124 assert(spapr
->htab_first_pass
);
1129 /* Consume invalid HPTEs */
1130 while ((index
< htabslots
)
1131 && !HPTE_VALID(HPTE(spapr
->htab
, index
))) {
1133 CLEAN_HPTE(HPTE(spapr
->htab
, index
));
1136 /* Consume valid HPTEs */
1138 while ((index
< htabslots
) && (index
- chunkstart
< USHRT_MAX
)
1139 && HPTE_VALID(HPTE(spapr
->htab
, index
))) {
1141 CLEAN_HPTE(HPTE(spapr
->htab
, index
));
1144 if (index
> chunkstart
) {
1145 int n_valid
= index
- chunkstart
;
1147 qemu_put_be32(f
, chunkstart
);
1148 qemu_put_be16(f
, n_valid
);
1149 qemu_put_be16(f
, 0);
1150 qemu_put_buffer(f
, HPTE(spapr
->htab
, chunkstart
),
1151 HASH_PTE_SIZE_64
* n_valid
);
1153 if ((qemu_clock_get_ns(QEMU_CLOCK_REALTIME
) - starttime
) > max_ns
) {
1157 } while ((index
< htabslots
) && !qemu_file_rate_limit(f
));
1159 if (index
>= htabslots
) {
1160 assert(index
== htabslots
);
1162 spapr
->htab_first_pass
= false;
1164 spapr
->htab_save_index
= index
;
1167 static int htab_save_later_pass(QEMUFile
*f
, sPAPRMachineState
*spapr
,
1170 bool final
= max_ns
< 0;
1171 int htabslots
= HTAB_SIZE(spapr
) / HASH_PTE_SIZE_64
;
1172 int examined
= 0, sent
= 0;
1173 int index
= spapr
->htab_save_index
;
1174 int64_t starttime
= qemu_clock_get_ns(QEMU_CLOCK_REALTIME
);
1176 assert(!spapr
->htab_first_pass
);
1179 int chunkstart
, invalidstart
;
1181 /* Consume non-dirty HPTEs */
1182 while ((index
< htabslots
)
1183 && !HPTE_DIRTY(HPTE(spapr
->htab
, index
))) {
1189 /* Consume valid dirty HPTEs */
1190 while ((index
< htabslots
) && (index
- chunkstart
< USHRT_MAX
)
1191 && HPTE_DIRTY(HPTE(spapr
->htab
, index
))
1192 && HPTE_VALID(HPTE(spapr
->htab
, index
))) {
1193 CLEAN_HPTE(HPTE(spapr
->htab
, index
));
1198 invalidstart
= index
;
1199 /* Consume invalid dirty HPTEs */
1200 while ((index
< htabslots
) && (index
- invalidstart
< USHRT_MAX
)
1201 && HPTE_DIRTY(HPTE(spapr
->htab
, index
))
1202 && !HPTE_VALID(HPTE(spapr
->htab
, index
))) {
1203 CLEAN_HPTE(HPTE(spapr
->htab
, index
));
1208 if (index
> chunkstart
) {
1209 int n_valid
= invalidstart
- chunkstart
;
1210 int n_invalid
= index
- invalidstart
;
1212 qemu_put_be32(f
, chunkstart
);
1213 qemu_put_be16(f
, n_valid
);
1214 qemu_put_be16(f
, n_invalid
);
1215 qemu_put_buffer(f
, HPTE(spapr
->htab
, chunkstart
),
1216 HASH_PTE_SIZE_64
* n_valid
);
1217 sent
+= index
- chunkstart
;
1219 if (!final
&& (qemu_clock_get_ns(QEMU_CLOCK_REALTIME
) - starttime
) > max_ns
) {
1224 if (examined
>= htabslots
) {
1228 if (index
>= htabslots
) {
1229 assert(index
== htabslots
);
1232 } while ((examined
< htabslots
) && (!qemu_file_rate_limit(f
) || final
));
1234 if (index
>= htabslots
) {
1235 assert(index
== htabslots
);
1239 spapr
->htab_save_index
= index
;
1241 return (examined
>= htabslots
) && (sent
== 0) ? 1 : 0;
1244 #define MAX_ITERATION_NS 5000000 /* 5 ms */
1245 #define MAX_KVM_BUF_SIZE 2048
1247 static int htab_save_iterate(QEMUFile
*f
, void *opaque
)
1249 sPAPRMachineState
*spapr
= opaque
;
1252 /* Iteration header */
1253 qemu_put_be32(f
, 0);
1256 assert(kvm_enabled());
1258 rc
= spapr_check_htab_fd(spapr
);
1263 rc
= kvmppc_save_htab(f
, spapr
->htab_fd
,
1264 MAX_KVM_BUF_SIZE
, MAX_ITERATION_NS
);
1268 } else if (spapr
->htab_first_pass
) {
1269 htab_save_first_pass(f
, spapr
, MAX_ITERATION_NS
);
1271 rc
= htab_save_later_pass(f
, spapr
, MAX_ITERATION_NS
);
1275 qemu_put_be32(f
, 0);
1276 qemu_put_be16(f
, 0);
1277 qemu_put_be16(f
, 0);
1282 static int htab_save_complete(QEMUFile
*f
, void *opaque
)
1284 sPAPRMachineState
*spapr
= opaque
;
1286 /* Iteration header */
1287 qemu_put_be32(f
, 0);
1292 assert(kvm_enabled());
1294 rc
= spapr_check_htab_fd(spapr
);
1299 rc
= kvmppc_save_htab(f
, spapr
->htab_fd
, MAX_KVM_BUF_SIZE
, -1);
1303 close(spapr
->htab_fd
);
1304 spapr
->htab_fd
= -1;
1306 htab_save_later_pass(f
, spapr
, -1);
1310 qemu_put_be32(f
, 0);
1311 qemu_put_be16(f
, 0);
1312 qemu_put_be16(f
, 0);
1317 static int htab_load(QEMUFile
*f
, void *opaque
, int version_id
)
1319 sPAPRMachineState
*spapr
= opaque
;
1320 uint32_t section_hdr
;
1323 if (version_id
< 1 || version_id
> 1) {
1324 fprintf(stderr
, "htab_load() bad version\n");
1328 section_hdr
= qemu_get_be32(f
);
1331 /* First section, just the hash shift */
1332 if (spapr
->htab_shift
!= section_hdr
) {
1339 assert(kvm_enabled());
1341 fd
= kvmppc_get_htab_fd(true);
1343 fprintf(stderr
, "Unable to open fd to restore KVM hash table: %s\n",
1350 uint16_t n_valid
, n_invalid
;
1352 index
= qemu_get_be32(f
);
1353 n_valid
= qemu_get_be16(f
);
1354 n_invalid
= qemu_get_be16(f
);
1356 if ((index
== 0) && (n_valid
== 0) && (n_invalid
== 0)) {
1361 if ((index
+ n_valid
+ n_invalid
) >
1362 (HTAB_SIZE(spapr
) / HASH_PTE_SIZE_64
)) {
1363 /* Bad index in stream */
1364 fprintf(stderr
, "htab_load() bad index %d (%hd+%hd entries) "
1365 "in htab stream (htab_shift=%d)\n", index
, n_valid
, n_invalid
,
1372 qemu_get_buffer(f
, HPTE(spapr
->htab
, index
),
1373 HASH_PTE_SIZE_64
* n_valid
);
1376 memset(HPTE(spapr
->htab
, index
+ n_valid
), 0,
1377 HASH_PTE_SIZE_64
* n_invalid
);
1384 rc
= kvmppc_load_htab_chunk(f
, fd
, index
, n_valid
, n_invalid
);
1399 static SaveVMHandlers savevm_htab_handlers
= {
1400 .save_live_setup
= htab_save_setup
,
1401 .save_live_iterate
= htab_save_iterate
,
1402 .save_live_complete
= htab_save_complete
,
1403 .load_state
= htab_load
,
1406 static void spapr_boot_set(void *opaque
, const char *boot_device
,
1409 MachineState
*machine
= MACHINE(qdev_get_machine());
1410 machine
->boot_order
= g_strdup(boot_device
);
1413 static void spapr_cpu_init(sPAPRMachineState
*spapr
, PowerPCCPU
*cpu
)
1415 CPUPPCState
*env
= &cpu
->env
;
1417 /* Set time-base frequency to 512 MHz */
1418 cpu_ppc_tb_init(env
, TIMEBASE_FREQ
);
1420 /* PAPR always has exception vectors in RAM not ROM. To ensure this,
1421 * MSR[IP] should never be set.
1423 env
->msr_mask
&= ~(1 << 6);
1425 /* Tell KVM that we're in PAPR mode */
1426 if (kvm_enabled()) {
1427 kvmppc_set_papr(cpu
);
1430 if (cpu
->max_compat
) {
1431 if (ppc_set_compat(cpu
, cpu
->max_compat
) < 0) {
1436 xics_cpu_setup(spapr
->icp
, cpu
);
1438 qemu_register_reset(spapr_cpu_reset
, cpu
);
1441 /* pSeries LPAR / sPAPR hardware init */
1442 static void ppc_spapr_init(MachineState
*machine
)
1444 sPAPRMachineState
*spapr
= SPAPR_MACHINE(machine
);
1445 const char *kernel_filename
= machine
->kernel_filename
;
1446 const char *kernel_cmdline
= machine
->kernel_cmdline
;
1447 const char *initrd_filename
= machine
->initrd_filename
;
1451 MemoryRegion
*sysmem
= get_system_memory();
1452 MemoryRegion
*ram
= g_new(MemoryRegion
, 1);
1453 MemoryRegion
*rma_region
;
1455 hwaddr rma_alloc_size
;
1456 hwaddr node0_size
= spapr_node0_size();
1457 uint32_t initrd_base
= 0;
1458 long kernel_size
= 0, initrd_size
= 0;
1459 long load_limit
, fw_size
;
1460 bool kernel_le
= false;
1463 msi_supported
= true;
1465 QLIST_INIT(&spapr
->phbs
);
1467 cpu_ppc_hypercall
= emulate_spapr_hypercall
;
1469 /* Allocate RMA if necessary */
1470 rma_alloc_size
= kvmppc_alloc_rma(&rma
);
1472 if (rma_alloc_size
== -1) {
1473 error_report("Unable to create RMA");
1477 if (rma_alloc_size
&& (rma_alloc_size
< node0_size
)) {
1478 spapr
->rma_size
= rma_alloc_size
;
1480 spapr
->rma_size
= node0_size
;
1482 /* With KVM, we don't actually know whether KVM supports an
1483 * unbounded RMA (PR KVM) or is limited by the hash table size
1484 * (HV KVM using VRMA), so we always assume the latter
1486 * In that case, we also limit the initial allocations for RTAS
1487 * etc... to 256M since we have no way to know what the VRMA size
1488 * is going to be as it depends on the size of the hash table
1489 * isn't determined yet.
1491 if (kvm_enabled()) {
1492 spapr
->vrma_adjust
= 1;
1493 spapr
->rma_size
= MIN(spapr
->rma_size
, 0x10000000);
1497 if (spapr
->rma_size
> node0_size
) {
1498 fprintf(stderr
, "Error: Numa node 0 has to span the RMA (%#08"HWADDR_PRIx
")\n",
1503 /* Setup a load limit for the ramdisk leaving room for SLOF and FDT */
1504 load_limit
= MIN(spapr
->rma_size
, RTAS_MAX_ADDR
) - FW_OVERHEAD
;
1506 /* We aim for a hash table of size 1/128 the size of RAM. The
1507 * normal rule of thumb is 1/64 the size of RAM, but that's much
1508 * more than needed for the Linux guests we support. */
1509 spapr
->htab_shift
= 18; /* Minimum architected size */
1510 while (spapr
->htab_shift
<= 46) {
1511 if ((1ULL << (spapr
->htab_shift
+ 7)) >= machine
->ram_size
) {
1514 spapr
->htab_shift
++;
1517 /* Set up Interrupt Controller before we create the VCPUs */
1518 spapr
->icp
= xics_system_init(machine
,
1519 DIV_ROUND_UP(max_cpus
* kvmppc_smt_threads(),
1524 if (machine
->cpu_model
== NULL
) {
1525 machine
->cpu_model
= kvm_enabled() ? "host" : "POWER7";
1527 for (i
= 0; i
< smp_cpus
; i
++) {
1528 cpu
= cpu_ppc_init(machine
->cpu_model
);
1530 fprintf(stderr
, "Unable to find PowerPC CPU definition\n");
1533 spapr_cpu_init(spapr
, cpu
);
1536 if (kvm_enabled()) {
1537 /* Enable H_LOGICAL_CI_* so SLOF can talk to in-kernel devices */
1538 kvmppc_enable_logical_ci_hcalls();
1542 memory_region_allocate_system_memory(ram
, NULL
, "ppc_spapr.ram",
1544 memory_region_add_subregion(sysmem
, 0, ram
);
1546 if (rma_alloc_size
&& rma
) {
1547 rma_region
= g_new(MemoryRegion
, 1);
1548 memory_region_init_ram_ptr(rma_region
, NULL
, "ppc_spapr.rma",
1549 rma_alloc_size
, rma
);
1550 vmstate_register_ram_global(rma_region
);
1551 memory_region_add_subregion(sysmem
, 0, rma_region
);
1554 filename
= qemu_find_file(QEMU_FILE_TYPE_BIOS
, "spapr-rtas.bin");
1556 error_report("Could not find LPAR rtas '%s'", "spapr-rtas.bin");
1559 spapr
->rtas_size
= get_image_size(filename
);
1560 spapr
->rtas_blob
= g_malloc(spapr
->rtas_size
);
1561 if (load_image_size(filename
, spapr
->rtas_blob
, spapr
->rtas_size
) < 0) {
1562 error_report("Could not load LPAR rtas '%s'", filename
);
1565 if (spapr
->rtas_size
> RTAS_MAX_SIZE
) {
1566 error_report("RTAS too big ! 0x%zx bytes (max is 0x%x)",
1567 (size_t)spapr
->rtas_size
, RTAS_MAX_SIZE
);
1572 /* Set up EPOW events infrastructure */
1573 spapr_events_init(spapr
);
1575 /* Set up the RTC RTAS interfaces */
1576 spapr_rtc_create(spapr
);
1578 /* Set up VIO bus */
1579 spapr
->vio_bus
= spapr_vio_bus_init();
1581 for (i
= 0; i
< MAX_SERIAL_PORTS
; i
++) {
1582 if (serial_hds
[i
]) {
1583 spapr_vty_create(spapr
->vio_bus
, serial_hds
[i
]);
1587 /* We always have at least the nvram device on VIO */
1588 spapr_create_nvram(spapr
);
1591 spapr_pci_rtas_init();
1593 phb
= spapr_create_phb(spapr
, 0);
1595 for (i
= 0; i
< nb_nics
; i
++) {
1596 NICInfo
*nd
= &nd_table
[i
];
1599 nd
->model
= g_strdup("ibmveth");
1602 if (strcmp(nd
->model
, "ibmveth") == 0) {
1603 spapr_vlan_create(spapr
->vio_bus
, nd
);
1605 pci_nic_init_nofail(&nd_table
[i
], phb
->bus
, nd
->model
, NULL
);
1609 for (i
= 0; i
<= drive_get_max_bus(IF_SCSI
); i
++) {
1610 spapr_vscsi_create(spapr
->vio_bus
);
1614 if (spapr_vga_init(phb
->bus
)) {
1615 spapr
->has_graphics
= true;
1616 machine
->usb
|= defaults_enabled() && !machine
->usb_disabled
;
1620 pci_create_simple(phb
->bus
, -1, "pci-ohci");
1622 if (spapr
->has_graphics
) {
1623 USBBus
*usb_bus
= usb_bus_find(-1);
1625 usb_create_simple(usb_bus
, "usb-kbd");
1626 usb_create_simple(usb_bus
, "usb-mouse");
1630 if (spapr
->rma_size
< (MIN_RMA_SLOF
<< 20)) {
1631 fprintf(stderr
, "qemu: pSeries SLOF firmware requires >= "
1632 "%ldM guest RMA (Real Mode Area memory)\n", MIN_RMA_SLOF
);
1636 if (kernel_filename
) {
1637 uint64_t lowaddr
= 0;
1639 kernel_size
= load_elf(kernel_filename
, translate_kernel_address
, NULL
,
1640 NULL
, &lowaddr
, NULL
, 1, ELF_MACHINE
, 0);
1641 if (kernel_size
== ELF_LOAD_WRONG_ENDIAN
) {
1642 kernel_size
= load_elf(kernel_filename
,
1643 translate_kernel_address
, NULL
,
1644 NULL
, &lowaddr
, NULL
, 0, ELF_MACHINE
, 0);
1645 kernel_le
= kernel_size
> 0;
1647 if (kernel_size
< 0) {
1648 fprintf(stderr
, "qemu: error loading %s: %s\n",
1649 kernel_filename
, load_elf_strerror(kernel_size
));
1654 if (initrd_filename
) {
1655 /* Try to locate the initrd in the gap between the kernel
1656 * and the firmware. Add a bit of space just in case
1658 initrd_base
= (KERNEL_LOAD_ADDR
+ kernel_size
+ 0x1ffff) & ~0xffff;
1659 initrd_size
= load_image_targphys(initrd_filename
, initrd_base
,
1660 load_limit
- initrd_base
);
1661 if (initrd_size
< 0) {
1662 fprintf(stderr
, "qemu: could not load initial ram disk '%s'\n",
1672 if (bios_name
== NULL
) {
1673 bios_name
= FW_FILE_NAME
;
1675 filename
= qemu_find_file(QEMU_FILE_TYPE_BIOS
, bios_name
);
1677 error_report("Could not find LPAR firmware '%s'", bios_name
);
1680 fw_size
= load_image_targphys(filename
, 0, FW_MAX_SIZE
);
1682 error_report("Could not load LPAR firmware '%s'", filename
);
1687 /* FIXME: Should register things through the MachineState's qdev
1688 * interface, this is a legacy from the sPAPREnvironment structure
1689 * which predated MachineState but had a similar function */
1690 vmstate_register(NULL
, 0, &vmstate_spapr
, spapr
);
1691 register_savevm_live(NULL
, "spapr/htab", -1, 1,
1692 &savevm_htab_handlers
, spapr
);
1694 /* Prepare the device tree */
1695 spapr
->fdt_skel
= spapr_create_fdt_skel(initrd_base
, initrd_size
,
1696 kernel_size
, kernel_le
,
1698 spapr
->check_exception_irq
);
1699 assert(spapr
->fdt_skel
!= NULL
);
1702 QTAILQ_INIT(&spapr
->ccs_list
);
1703 qemu_register_reset(spapr_ccs_reset_hook
, spapr
);
1705 qemu_register_boot_set(spapr_boot_set
, spapr
);
1708 static int spapr_kvm_type(const char *vm_type
)
1714 if (!strcmp(vm_type
, "HV")) {
1718 if (!strcmp(vm_type
, "PR")) {
1722 error_report("Unknown kvm-type specified '%s'", vm_type
);
1727 * Implementation of an interface to adjust firmware path
1728 * for the bootindex property handling.
1730 static char *spapr_get_fw_dev_path(FWPathProvider
*p
, BusState
*bus
,
1733 #define CAST(type, obj, name) \
1734 ((type *)object_dynamic_cast(OBJECT(obj), (name)))
1735 SCSIDevice
*d
= CAST(SCSIDevice
, dev
, TYPE_SCSI_DEVICE
);
1736 sPAPRPHBState
*phb
= CAST(sPAPRPHBState
, dev
, TYPE_SPAPR_PCI_HOST_BRIDGE
);
1739 void *spapr
= CAST(void, bus
->parent
, "spapr-vscsi");
1740 VirtIOSCSI
*virtio
= CAST(VirtIOSCSI
, bus
->parent
, TYPE_VIRTIO_SCSI
);
1741 USBDevice
*usb
= CAST(USBDevice
, bus
->parent
, TYPE_USB_DEVICE
);
1745 * Replace "channel@0/disk@0,0" with "disk@8000000000000000":
1746 * We use SRP luns of the form 8000 | (bus << 8) | (id << 5) | lun
1747 * in the top 16 bits of the 64-bit LUN
1749 unsigned id
= 0x8000 | (d
->id
<< 8) | d
->lun
;
1750 return g_strdup_printf("%s@%"PRIX64
, qdev_fw_name(dev
),
1751 (uint64_t)id
<< 48);
1752 } else if (virtio
) {
1754 * We use SRP luns of the form 01000000 | (target << 8) | lun
1755 * in the top 32 bits of the 64-bit LUN
1756 * Note: the quote above is from SLOF and it is wrong,
1757 * the actual binding is:
1758 * swap 0100 or 10 << or 20 << ( target lun-id -- srplun )
1760 unsigned id
= 0x1000000 | (d
->id
<< 16) | d
->lun
;
1761 return g_strdup_printf("%s@%"PRIX64
, qdev_fw_name(dev
),
1762 (uint64_t)id
<< 32);
1765 * We use SRP luns of the form 01000000 | (usb-port << 16) | lun
1766 * in the top 32 bits of the 64-bit LUN
1768 unsigned usb_port
= atoi(usb
->port
->path
);
1769 unsigned id
= 0x1000000 | (usb_port
<< 16) | d
->lun
;
1770 return g_strdup_printf("%s@%"PRIX64
, qdev_fw_name(dev
),
1771 (uint64_t)id
<< 32);
1776 /* Replace "pci" with "pci@800000020000000" */
1777 return g_strdup_printf("pci@%"PRIX64
, phb
->buid
);
1783 static char *spapr_get_kvm_type(Object
*obj
, Error
**errp
)
1785 sPAPRMachineState
*spapr
= SPAPR_MACHINE(obj
);
1787 return g_strdup(spapr
->kvm_type
);
1790 static void spapr_set_kvm_type(Object
*obj
, const char *value
, Error
**errp
)
1792 sPAPRMachineState
*spapr
= SPAPR_MACHINE(obj
);
1794 g_free(spapr
->kvm_type
);
1795 spapr
->kvm_type
= g_strdup(value
);
1798 static void spapr_machine_initfn(Object
*obj
)
1800 object_property_add_str(obj
, "kvm-type",
1801 spapr_get_kvm_type
, spapr_set_kvm_type
, NULL
);
1802 object_property_set_description(obj
, "kvm-type",
1803 "Specifies the KVM virtualization mode (HV, PR)",
1807 static void ppc_cpu_do_nmi_on_cpu(void *arg
)
1811 cpu_synchronize_state(cs
);
1812 ppc_cpu_do_system_reset(cs
);
1815 static void spapr_nmi(NMIState
*n
, int cpu_index
, Error
**errp
)
1820 async_run_on_cpu(cs
, ppc_cpu_do_nmi_on_cpu
, cs
);
1824 static void spapr_machine_class_init(ObjectClass
*oc
, void *data
)
1826 MachineClass
*mc
= MACHINE_CLASS(oc
);
1827 FWPathProviderClass
*fwc
= FW_PATH_PROVIDER_CLASS(oc
);
1828 NMIClass
*nc
= NMI_CLASS(oc
);
1830 mc
->init
= ppc_spapr_init
;
1831 mc
->reset
= ppc_spapr_reset
;
1832 mc
->block_default_type
= IF_SCSI
;
1833 mc
->max_cpus
= MAX_CPUS
;
1834 mc
->no_parallel
= 1;
1835 mc
->default_boot_order
= "";
1836 mc
->default_ram_size
= 512 * M_BYTE
;
1837 mc
->kvm_type
= spapr_kvm_type
;
1838 mc
->has_dynamic_sysbus
= true;
1839 mc
->pci_allow_0_address
= true;
1841 fwc
->get_dev_path
= spapr_get_fw_dev_path
;
1842 nc
->nmi_monitor_handler
= spapr_nmi
;
1845 static const TypeInfo spapr_machine_info
= {
1846 .name
= TYPE_SPAPR_MACHINE
,
1847 .parent
= TYPE_MACHINE
,
1849 .instance_size
= sizeof(sPAPRMachineState
),
1850 .instance_init
= spapr_machine_initfn
,
1851 .class_size
= sizeof(sPAPRMachineClass
),
1852 .class_init
= spapr_machine_class_init
,
1853 .interfaces
= (InterfaceInfo
[]) {
1854 { TYPE_FW_PATH_PROVIDER
},
1860 #define SPAPR_COMPAT_2_3 \
1863 .driver = "spapr-pci-host-bridge",\
1864 .property = "dynamic-reconfiguration",\
1868 #define SPAPR_COMPAT_2_2 \
1872 .driver = TYPE_SPAPR_PCI_HOST_BRIDGE,\
1873 .property = "mem_win_size",\
1874 .value = "0x20000000",\
1877 #define SPAPR_COMPAT_2_1 \
1881 static void spapr_compat_2_3(Object
*obj
)
1883 savevm_skip_section_footers();
1884 global_state_set_optional();
1887 static void spapr_compat_2_2(Object
*obj
)
1889 spapr_compat_2_3(obj
);
1892 static void spapr_compat_2_1(Object
*obj
)
1894 spapr_compat_2_2(obj
);
1897 static void spapr_machine_2_3_instance_init(Object
*obj
)
1899 spapr_compat_2_3(obj
);
1900 spapr_machine_initfn(obj
);
1903 static void spapr_machine_2_2_instance_init(Object
*obj
)
1905 spapr_compat_2_2(obj
);
1906 spapr_machine_initfn(obj
);
1909 static void spapr_machine_2_1_instance_init(Object
*obj
)
1911 spapr_compat_2_1(obj
);
1912 spapr_machine_initfn(obj
);
1915 static void spapr_machine_2_1_class_init(ObjectClass
*oc
, void *data
)
1917 MachineClass
*mc
= MACHINE_CLASS(oc
);
1918 static GlobalProperty compat_props
[] = {
1920 { /* end of list */ }
1923 mc
->name
= "pseries-2.1";
1924 mc
->desc
= "pSeries Logical Partition (PAPR compliant) v2.1";
1925 mc
->compat_props
= compat_props
;
1928 static const TypeInfo spapr_machine_2_1_info
= {
1929 .name
= TYPE_SPAPR_MACHINE
"2.1",
1930 .parent
= TYPE_SPAPR_MACHINE
,
1931 .class_init
= spapr_machine_2_1_class_init
,
1932 .instance_init
= spapr_machine_2_1_instance_init
,
1935 static void spapr_machine_2_2_class_init(ObjectClass
*oc
, void *data
)
1937 static GlobalProperty compat_props
[] = {
1939 { /* end of list */ }
1941 MachineClass
*mc
= MACHINE_CLASS(oc
);
1943 mc
->name
= "pseries-2.2";
1944 mc
->desc
= "pSeries Logical Partition (PAPR compliant) v2.2";
1945 mc
->compat_props
= compat_props
;
1948 static const TypeInfo spapr_machine_2_2_info
= {
1949 .name
= TYPE_SPAPR_MACHINE
"2.2",
1950 .parent
= TYPE_SPAPR_MACHINE
,
1951 .class_init
= spapr_machine_2_2_class_init
,
1952 .instance_init
= spapr_machine_2_2_instance_init
,
1955 static void spapr_machine_2_3_class_init(ObjectClass
*oc
, void *data
)
1957 static GlobalProperty compat_props
[] = {
1959 { /* end of list */ }
1961 MachineClass
*mc
= MACHINE_CLASS(oc
);
1963 mc
->name
= "pseries-2.3";
1964 mc
->desc
= "pSeries Logical Partition (PAPR compliant) v2.3";
1965 mc
->compat_props
= compat_props
;
1968 static const TypeInfo spapr_machine_2_3_info
= {
1969 .name
= TYPE_SPAPR_MACHINE
"2.3",
1970 .parent
= TYPE_SPAPR_MACHINE
,
1971 .class_init
= spapr_machine_2_3_class_init
,
1972 .instance_init
= spapr_machine_2_3_instance_init
,
1975 static void spapr_machine_2_4_class_init(ObjectClass
*oc
, void *data
)
1977 MachineClass
*mc
= MACHINE_CLASS(oc
);
1979 mc
->name
= "pseries-2.4";
1980 mc
->desc
= "pSeries Logical Partition (PAPR compliant) v2.4";
1981 mc
->alias
= "pseries";
1985 static const TypeInfo spapr_machine_2_4_info
= {
1986 .name
= TYPE_SPAPR_MACHINE
"2.4",
1987 .parent
= TYPE_SPAPR_MACHINE
,
1988 .class_init
= spapr_machine_2_4_class_init
,
1991 static void spapr_machine_register_types(void)
1993 type_register_static(&spapr_machine_info
);
1994 type_register_static(&spapr_machine_2_1_info
);
1995 type_register_static(&spapr_machine_2_2_info
);
1996 type_register_static(&spapr_machine_2_3_info
);
1997 type_register_static(&spapr_machine_2_4_info
);
2000 type_init(spapr_machine_register_types
)