target/ppc: Add support for scv and rfscv instructions
[qemu/ar7.git] / target / mips / fpu_helper.c
blob5287c86c619290e3156dd18b3ddfdb38b7785d9e
1 /*
2 * Helpers for emulation of FPU-related MIPS instructions.
4 * Copyright (C) 2004-2005 Jocelyn Mayer
5 * Copyright (C) 2020 Wave Computing, Inc.
6 * Copyright (C) 2020 Aleksandar Markovic <amarkovic@wavecomp.com>
8 * This library is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU Lesser General Public
10 * License as published by the Free Software Foundation; either
11 * version 2 of the License, or (at your option) any later version.
13 * This library is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * Lesser General Public License for more details.
18 * You should have received a copy of the GNU Lesser General Public
19 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
23 #include "qemu/osdep.h"
24 #include "qemu/main-loop.h"
25 #include "cpu.h"
26 #include "internal.h"
27 #include "qemu/host-utils.h"
28 #include "exec/helper-proto.h"
29 #include "exec/exec-all.h"
30 #include "exec/cpu_ldst.h"
31 #include "exec/memop.h"
32 #include "sysemu/kvm.h"
33 #include "fpu/softfloat.h"
36 /* Complex FPU operations which may need stack space. */
38 #define FLOAT_TWO32 make_float32(1 << 30)
39 #define FLOAT_TWO64 make_float64(1ULL << 62)
41 #define FP_TO_INT32_OVERFLOW 0x7fffffff
42 #define FP_TO_INT64_OVERFLOW 0x7fffffffffffffffULL
44 /* convert MIPS rounding mode in FCR31 to IEEE library */
45 unsigned int ieee_rm[] = {
46 float_round_nearest_even,
47 float_round_to_zero,
48 float_round_up,
49 float_round_down
52 target_ulong helper_cfc1(CPUMIPSState *env, uint32_t reg)
54 target_ulong arg1 = 0;
56 switch (reg) {
57 case 0:
58 arg1 = (int32_t)env->active_fpu.fcr0;
59 break;
60 case 1:
61 /* UFR Support - Read Status FR */
62 if (env->active_fpu.fcr0 & (1 << FCR0_UFRP)) {
63 if (env->CP0_Config5 & (1 << CP0C5_UFR)) {
64 arg1 = (int32_t)
65 ((env->CP0_Status & (1 << CP0St_FR)) >> CP0St_FR);
66 } else {
67 do_raise_exception(env, EXCP_RI, GETPC());
70 break;
71 case 5:
72 /* FRE Support - read Config5.FRE bit */
73 if (env->active_fpu.fcr0 & (1 << FCR0_FREP)) {
74 if (env->CP0_Config5 & (1 << CP0C5_UFE)) {
75 arg1 = (env->CP0_Config5 >> CP0C5_FRE) & 1;
76 } else {
77 helper_raise_exception(env, EXCP_RI);
80 break;
81 case 25:
82 arg1 = ((env->active_fpu.fcr31 >> 24) & 0xfe) |
83 ((env->active_fpu.fcr31 >> 23) & 0x1);
84 break;
85 case 26:
86 arg1 = env->active_fpu.fcr31 & 0x0003f07c;
87 break;
88 case 28:
89 arg1 = (env->active_fpu.fcr31 & 0x00000f83) |
90 ((env->active_fpu.fcr31 >> 22) & 0x4);
91 break;
92 default:
93 arg1 = (int32_t)env->active_fpu.fcr31;
94 break;
97 return arg1;
100 void helper_ctc1(CPUMIPSState *env, target_ulong arg1, uint32_t fs, uint32_t rt)
102 switch (fs) {
103 case 1:
104 /* UFR Alias - Reset Status FR */
105 if (!((env->active_fpu.fcr0 & (1 << FCR0_UFRP)) && (rt == 0))) {
106 return;
108 if (env->CP0_Config5 & (1 << CP0C5_UFR)) {
109 env->CP0_Status &= ~(1 << CP0St_FR);
110 compute_hflags(env);
111 } else {
112 do_raise_exception(env, EXCP_RI, GETPC());
114 break;
115 case 4:
116 /* UNFR Alias - Set Status FR */
117 if (!((env->active_fpu.fcr0 & (1 << FCR0_UFRP)) && (rt == 0))) {
118 return;
120 if (env->CP0_Config5 & (1 << CP0C5_UFR)) {
121 env->CP0_Status |= (1 << CP0St_FR);
122 compute_hflags(env);
123 } else {
124 do_raise_exception(env, EXCP_RI, GETPC());
126 break;
127 case 5:
128 /* FRE Support - clear Config5.FRE bit */
129 if (!((env->active_fpu.fcr0 & (1 << FCR0_FREP)) && (rt == 0))) {
130 return;
132 if (env->CP0_Config5 & (1 << CP0C5_UFE)) {
133 env->CP0_Config5 &= ~(1 << CP0C5_FRE);
134 compute_hflags(env);
135 } else {
136 helper_raise_exception(env, EXCP_RI);
138 break;
139 case 6:
140 /* FRE Support - set Config5.FRE bit */
141 if (!((env->active_fpu.fcr0 & (1 << FCR0_FREP)) && (rt == 0))) {
142 return;
144 if (env->CP0_Config5 & (1 << CP0C5_UFE)) {
145 env->CP0_Config5 |= (1 << CP0C5_FRE);
146 compute_hflags(env);
147 } else {
148 helper_raise_exception(env, EXCP_RI);
150 break;
151 case 25:
152 if ((env->insn_flags & ISA_MIPS32R6) || (arg1 & 0xffffff00)) {
153 return;
155 env->active_fpu.fcr31 = (env->active_fpu.fcr31 & 0x017fffff) |
156 ((arg1 & 0xfe) << 24) |
157 ((arg1 & 0x1) << 23);
158 break;
159 case 26:
160 if (arg1 & 0x007c0000) {
161 return;
163 env->active_fpu.fcr31 = (env->active_fpu.fcr31 & 0xfffc0f83) |
164 (arg1 & 0x0003f07c);
165 break;
166 case 28:
167 if (arg1 & 0x007c0000) {
168 return;
170 env->active_fpu.fcr31 = (env->active_fpu.fcr31 & 0xfefff07c) |
171 (arg1 & 0x00000f83) |
172 ((arg1 & 0x4) << 22);
173 break;
174 case 31:
175 env->active_fpu.fcr31 = (arg1 & env->active_fpu.fcr31_rw_bitmask) |
176 (env->active_fpu.fcr31 & ~(env->active_fpu.fcr31_rw_bitmask));
177 break;
178 default:
179 if (env->insn_flags & ISA_MIPS32R6) {
180 do_raise_exception(env, EXCP_RI, GETPC());
182 return;
184 restore_fp_status(env);
185 set_float_exception_flags(0, &env->active_fpu.fp_status);
186 if ((GET_FP_ENABLE(env->active_fpu.fcr31) | 0x20) &
187 GET_FP_CAUSE(env->active_fpu.fcr31)) {
188 do_raise_exception(env, EXCP_FPE, GETPC());
192 int ieee_ex_to_mips(int xcpt)
194 int ret = 0;
195 if (xcpt) {
196 if (xcpt & float_flag_invalid) {
197 ret |= FP_INVALID;
199 if (xcpt & float_flag_overflow) {
200 ret |= FP_OVERFLOW;
202 if (xcpt & float_flag_underflow) {
203 ret |= FP_UNDERFLOW;
205 if (xcpt & float_flag_divbyzero) {
206 ret |= FP_DIV0;
208 if (xcpt & float_flag_inexact) {
209 ret |= FP_INEXACT;
212 return ret;
215 static inline void update_fcr31(CPUMIPSState *env, uintptr_t pc)
217 int tmp = ieee_ex_to_mips(get_float_exception_flags(
218 &env->active_fpu.fp_status));
220 SET_FP_CAUSE(env->active_fpu.fcr31, tmp);
222 if (tmp) {
223 set_float_exception_flags(0, &env->active_fpu.fp_status);
225 if (GET_FP_ENABLE(env->active_fpu.fcr31) & tmp) {
226 do_raise_exception(env, EXCP_FPE, pc);
227 } else {
228 UPDATE_FP_FLAGS(env->active_fpu.fcr31, tmp);
234 * Float support.
235 * Single precition routines have a "s" suffix, double precision a
236 * "d" suffix, 32bit integer "w", 64bit integer "l", paired single "ps",
237 * paired single lower "pl", paired single upper "pu".
240 /* unary operations, modifying fp status */
241 uint64_t helper_float_sqrt_d(CPUMIPSState *env, uint64_t fdt0)
243 fdt0 = float64_sqrt(fdt0, &env->active_fpu.fp_status);
244 update_fcr31(env, GETPC());
245 return fdt0;
248 uint32_t helper_float_sqrt_s(CPUMIPSState *env, uint32_t fst0)
250 fst0 = float32_sqrt(fst0, &env->active_fpu.fp_status);
251 update_fcr31(env, GETPC());
252 return fst0;
255 uint64_t helper_float_cvtd_s(CPUMIPSState *env, uint32_t fst0)
257 uint64_t fdt2;
259 fdt2 = float32_to_float64(fst0, &env->active_fpu.fp_status);
260 update_fcr31(env, GETPC());
261 return fdt2;
264 uint64_t helper_float_cvtd_w(CPUMIPSState *env, uint32_t wt0)
266 uint64_t fdt2;
268 fdt2 = int32_to_float64(wt0, &env->active_fpu.fp_status);
269 update_fcr31(env, GETPC());
270 return fdt2;
273 uint64_t helper_float_cvtd_l(CPUMIPSState *env, uint64_t dt0)
275 uint64_t fdt2;
277 fdt2 = int64_to_float64(dt0, &env->active_fpu.fp_status);
278 update_fcr31(env, GETPC());
279 return fdt2;
282 uint64_t helper_float_cvt_l_d(CPUMIPSState *env, uint64_t fdt0)
284 uint64_t dt2;
286 dt2 = float64_to_int64(fdt0, &env->active_fpu.fp_status);
287 if (get_float_exception_flags(&env->active_fpu.fp_status)
288 & (float_flag_invalid | float_flag_overflow)) {
289 dt2 = FP_TO_INT64_OVERFLOW;
291 update_fcr31(env, GETPC());
292 return dt2;
295 uint64_t helper_float_cvt_l_s(CPUMIPSState *env, uint32_t fst0)
297 uint64_t dt2;
299 dt2 = float32_to_int64(fst0, &env->active_fpu.fp_status);
300 if (get_float_exception_flags(&env->active_fpu.fp_status)
301 & (float_flag_invalid | float_flag_overflow)) {
302 dt2 = FP_TO_INT64_OVERFLOW;
304 update_fcr31(env, GETPC());
305 return dt2;
308 uint64_t helper_float_cvtps_pw(CPUMIPSState *env, uint64_t dt0)
310 uint32_t fst2;
311 uint32_t fsth2;
313 fst2 = int32_to_float32(dt0 & 0XFFFFFFFF, &env->active_fpu.fp_status);
314 fsth2 = int32_to_float32(dt0 >> 32, &env->active_fpu.fp_status);
315 update_fcr31(env, GETPC());
316 return ((uint64_t)fsth2 << 32) | fst2;
319 uint64_t helper_float_cvtpw_ps(CPUMIPSState *env, uint64_t fdt0)
321 uint32_t wt2;
322 uint32_t wth2;
323 int excp, excph;
325 wt2 = float32_to_int32(fdt0 & 0XFFFFFFFF, &env->active_fpu.fp_status);
326 excp = get_float_exception_flags(&env->active_fpu.fp_status);
327 if (excp & (float_flag_overflow | float_flag_invalid)) {
328 wt2 = FP_TO_INT32_OVERFLOW;
331 set_float_exception_flags(0, &env->active_fpu.fp_status);
332 wth2 = float32_to_int32(fdt0 >> 32, &env->active_fpu.fp_status);
333 excph = get_float_exception_flags(&env->active_fpu.fp_status);
334 if (excph & (float_flag_overflow | float_flag_invalid)) {
335 wth2 = FP_TO_INT32_OVERFLOW;
338 set_float_exception_flags(excp | excph, &env->active_fpu.fp_status);
339 update_fcr31(env, GETPC());
341 return ((uint64_t)wth2 << 32) | wt2;
344 uint32_t helper_float_cvts_d(CPUMIPSState *env, uint64_t fdt0)
346 uint32_t fst2;
348 fst2 = float64_to_float32(fdt0, &env->active_fpu.fp_status);
349 update_fcr31(env, GETPC());
350 return fst2;
353 uint32_t helper_float_cvts_w(CPUMIPSState *env, uint32_t wt0)
355 uint32_t fst2;
357 fst2 = int32_to_float32(wt0, &env->active_fpu.fp_status);
358 update_fcr31(env, GETPC());
359 return fst2;
362 uint32_t helper_float_cvts_l(CPUMIPSState *env, uint64_t dt0)
364 uint32_t fst2;
366 fst2 = int64_to_float32(dt0, &env->active_fpu.fp_status);
367 update_fcr31(env, GETPC());
368 return fst2;
371 uint32_t helper_float_cvts_pl(CPUMIPSState *env, uint32_t wt0)
373 uint32_t wt2;
375 wt2 = wt0;
376 update_fcr31(env, GETPC());
377 return wt2;
380 uint32_t helper_float_cvts_pu(CPUMIPSState *env, uint32_t wth0)
382 uint32_t wt2;
384 wt2 = wth0;
385 update_fcr31(env, GETPC());
386 return wt2;
389 uint32_t helper_float_cvt_w_s(CPUMIPSState *env, uint32_t fst0)
391 uint32_t wt2;
393 wt2 = float32_to_int32(fst0, &env->active_fpu.fp_status);
394 if (get_float_exception_flags(&env->active_fpu.fp_status)
395 & (float_flag_invalid | float_flag_overflow)) {
396 wt2 = FP_TO_INT32_OVERFLOW;
398 update_fcr31(env, GETPC());
399 return wt2;
402 uint32_t helper_float_cvt_w_d(CPUMIPSState *env, uint64_t fdt0)
404 uint32_t wt2;
406 wt2 = float64_to_int32(fdt0, &env->active_fpu.fp_status);
407 if (get_float_exception_flags(&env->active_fpu.fp_status)
408 & (float_flag_invalid | float_flag_overflow)) {
409 wt2 = FP_TO_INT32_OVERFLOW;
411 update_fcr31(env, GETPC());
412 return wt2;
415 uint64_t helper_float_round_l_d(CPUMIPSState *env, uint64_t fdt0)
417 uint64_t dt2;
419 set_float_rounding_mode(float_round_nearest_even,
420 &env->active_fpu.fp_status);
421 dt2 = float64_to_int64(fdt0, &env->active_fpu.fp_status);
422 restore_rounding_mode(env);
423 if (get_float_exception_flags(&env->active_fpu.fp_status)
424 & (float_flag_invalid | float_flag_overflow)) {
425 dt2 = FP_TO_INT64_OVERFLOW;
427 update_fcr31(env, GETPC());
428 return dt2;
431 uint64_t helper_float_round_l_s(CPUMIPSState *env, uint32_t fst0)
433 uint64_t dt2;
435 set_float_rounding_mode(float_round_nearest_even,
436 &env->active_fpu.fp_status);
437 dt2 = float32_to_int64(fst0, &env->active_fpu.fp_status);
438 restore_rounding_mode(env);
439 if (get_float_exception_flags(&env->active_fpu.fp_status)
440 & (float_flag_invalid | float_flag_overflow)) {
441 dt2 = FP_TO_INT64_OVERFLOW;
443 update_fcr31(env, GETPC());
444 return dt2;
447 uint32_t helper_float_round_w_d(CPUMIPSState *env, uint64_t fdt0)
449 uint32_t wt2;
451 set_float_rounding_mode(float_round_nearest_even,
452 &env->active_fpu.fp_status);
453 wt2 = float64_to_int32(fdt0, &env->active_fpu.fp_status);
454 restore_rounding_mode(env);
455 if (get_float_exception_flags(&env->active_fpu.fp_status)
456 & (float_flag_invalid | float_flag_overflow)) {
457 wt2 = FP_TO_INT32_OVERFLOW;
459 update_fcr31(env, GETPC());
460 return wt2;
463 uint32_t helper_float_round_w_s(CPUMIPSState *env, uint32_t fst0)
465 uint32_t wt2;
467 set_float_rounding_mode(float_round_nearest_even,
468 &env->active_fpu.fp_status);
469 wt2 = float32_to_int32(fst0, &env->active_fpu.fp_status);
470 restore_rounding_mode(env);
471 if (get_float_exception_flags(&env->active_fpu.fp_status)
472 & (float_flag_invalid | float_flag_overflow)) {
473 wt2 = FP_TO_INT32_OVERFLOW;
475 update_fcr31(env, GETPC());
476 return wt2;
479 uint64_t helper_float_trunc_l_d(CPUMIPSState *env, uint64_t fdt0)
481 uint64_t dt2;
483 dt2 = float64_to_int64_round_to_zero(fdt0,
484 &env->active_fpu.fp_status);
485 if (get_float_exception_flags(&env->active_fpu.fp_status)
486 & (float_flag_invalid | float_flag_overflow)) {
487 dt2 = FP_TO_INT64_OVERFLOW;
489 update_fcr31(env, GETPC());
490 return dt2;
493 uint64_t helper_float_trunc_l_s(CPUMIPSState *env, uint32_t fst0)
495 uint64_t dt2;
497 dt2 = float32_to_int64_round_to_zero(fst0, &env->active_fpu.fp_status);
498 if (get_float_exception_flags(&env->active_fpu.fp_status)
499 & (float_flag_invalid | float_flag_overflow)) {
500 dt2 = FP_TO_INT64_OVERFLOW;
502 update_fcr31(env, GETPC());
503 return dt2;
506 uint32_t helper_float_trunc_w_d(CPUMIPSState *env, uint64_t fdt0)
508 uint32_t wt2;
510 wt2 = float64_to_int32_round_to_zero(fdt0, &env->active_fpu.fp_status);
511 if (get_float_exception_flags(&env->active_fpu.fp_status)
512 & (float_flag_invalid | float_flag_overflow)) {
513 wt2 = FP_TO_INT32_OVERFLOW;
515 update_fcr31(env, GETPC());
516 return wt2;
519 uint32_t helper_float_trunc_w_s(CPUMIPSState *env, uint32_t fst0)
521 uint32_t wt2;
523 wt2 = float32_to_int32_round_to_zero(fst0, &env->active_fpu.fp_status);
524 if (get_float_exception_flags(&env->active_fpu.fp_status)
525 & (float_flag_invalid | float_flag_overflow)) {
526 wt2 = FP_TO_INT32_OVERFLOW;
528 update_fcr31(env, GETPC());
529 return wt2;
532 uint64_t helper_float_ceil_l_d(CPUMIPSState *env, uint64_t fdt0)
534 uint64_t dt2;
536 set_float_rounding_mode(float_round_up, &env->active_fpu.fp_status);
537 dt2 = float64_to_int64(fdt0, &env->active_fpu.fp_status);
538 restore_rounding_mode(env);
539 if (get_float_exception_flags(&env->active_fpu.fp_status)
540 & (float_flag_invalid | float_flag_overflow)) {
541 dt2 = FP_TO_INT64_OVERFLOW;
543 update_fcr31(env, GETPC());
544 return dt2;
547 uint64_t helper_float_ceil_l_s(CPUMIPSState *env, uint32_t fst0)
549 uint64_t dt2;
551 set_float_rounding_mode(float_round_up, &env->active_fpu.fp_status);
552 dt2 = float32_to_int64(fst0, &env->active_fpu.fp_status);
553 restore_rounding_mode(env);
554 if (get_float_exception_flags(&env->active_fpu.fp_status)
555 & (float_flag_invalid | float_flag_overflow)) {
556 dt2 = FP_TO_INT64_OVERFLOW;
558 update_fcr31(env, GETPC());
559 return dt2;
562 uint32_t helper_float_ceil_w_d(CPUMIPSState *env, uint64_t fdt0)
564 uint32_t wt2;
566 set_float_rounding_mode(float_round_up, &env->active_fpu.fp_status);
567 wt2 = float64_to_int32(fdt0, &env->active_fpu.fp_status);
568 restore_rounding_mode(env);
569 if (get_float_exception_flags(&env->active_fpu.fp_status)
570 & (float_flag_invalid | float_flag_overflow)) {
571 wt2 = FP_TO_INT32_OVERFLOW;
573 update_fcr31(env, GETPC());
574 return wt2;
577 uint32_t helper_float_ceil_w_s(CPUMIPSState *env, uint32_t fst0)
579 uint32_t wt2;
581 set_float_rounding_mode(float_round_up, &env->active_fpu.fp_status);
582 wt2 = float32_to_int32(fst0, &env->active_fpu.fp_status);
583 restore_rounding_mode(env);
584 if (get_float_exception_flags(&env->active_fpu.fp_status)
585 & (float_flag_invalid | float_flag_overflow)) {
586 wt2 = FP_TO_INT32_OVERFLOW;
588 update_fcr31(env, GETPC());
589 return wt2;
592 uint64_t helper_float_floor_l_d(CPUMIPSState *env, uint64_t fdt0)
594 uint64_t dt2;
596 set_float_rounding_mode(float_round_down, &env->active_fpu.fp_status);
597 dt2 = float64_to_int64(fdt0, &env->active_fpu.fp_status);
598 restore_rounding_mode(env);
599 if (get_float_exception_flags(&env->active_fpu.fp_status)
600 & (float_flag_invalid | float_flag_overflow)) {
601 dt2 = FP_TO_INT64_OVERFLOW;
603 update_fcr31(env, GETPC());
604 return dt2;
607 uint64_t helper_float_floor_l_s(CPUMIPSState *env, uint32_t fst0)
609 uint64_t dt2;
611 set_float_rounding_mode(float_round_down, &env->active_fpu.fp_status);
612 dt2 = float32_to_int64(fst0, &env->active_fpu.fp_status);
613 restore_rounding_mode(env);
614 if (get_float_exception_flags(&env->active_fpu.fp_status)
615 & (float_flag_invalid | float_flag_overflow)) {
616 dt2 = FP_TO_INT64_OVERFLOW;
618 update_fcr31(env, GETPC());
619 return dt2;
622 uint32_t helper_float_floor_w_d(CPUMIPSState *env, uint64_t fdt0)
624 uint32_t wt2;
626 set_float_rounding_mode(float_round_down, &env->active_fpu.fp_status);
627 wt2 = float64_to_int32(fdt0, &env->active_fpu.fp_status);
628 restore_rounding_mode(env);
629 if (get_float_exception_flags(&env->active_fpu.fp_status)
630 & (float_flag_invalid | float_flag_overflow)) {
631 wt2 = FP_TO_INT32_OVERFLOW;
633 update_fcr31(env, GETPC());
634 return wt2;
637 uint32_t helper_float_floor_w_s(CPUMIPSState *env, uint32_t fst0)
639 uint32_t wt2;
641 set_float_rounding_mode(float_round_down, &env->active_fpu.fp_status);
642 wt2 = float32_to_int32(fst0, &env->active_fpu.fp_status);
643 restore_rounding_mode(env);
644 if (get_float_exception_flags(&env->active_fpu.fp_status)
645 & (float_flag_invalid | float_flag_overflow)) {
646 wt2 = FP_TO_INT32_OVERFLOW;
648 update_fcr31(env, GETPC());
649 return wt2;
652 uint64_t helper_float_cvt_2008_l_d(CPUMIPSState *env, uint64_t fdt0)
654 uint64_t dt2;
656 dt2 = float64_to_int64(fdt0, &env->active_fpu.fp_status);
657 if (get_float_exception_flags(&env->active_fpu.fp_status)
658 & float_flag_invalid) {
659 if (float64_is_any_nan(fdt0)) {
660 dt2 = 0;
663 update_fcr31(env, GETPC());
664 return dt2;
667 uint64_t helper_float_cvt_2008_l_s(CPUMIPSState *env, uint32_t fst0)
669 uint64_t dt2;
671 dt2 = float32_to_int64(fst0, &env->active_fpu.fp_status);
672 if (get_float_exception_flags(&env->active_fpu.fp_status)
673 & float_flag_invalid) {
674 if (float32_is_any_nan(fst0)) {
675 dt2 = 0;
678 update_fcr31(env, GETPC());
679 return dt2;
682 uint32_t helper_float_cvt_2008_w_d(CPUMIPSState *env, uint64_t fdt0)
684 uint32_t wt2;
686 wt2 = float64_to_int32(fdt0, &env->active_fpu.fp_status);
687 if (get_float_exception_flags(&env->active_fpu.fp_status)
688 & float_flag_invalid) {
689 if (float64_is_any_nan(fdt0)) {
690 wt2 = 0;
693 update_fcr31(env, GETPC());
694 return wt2;
697 uint32_t helper_float_cvt_2008_w_s(CPUMIPSState *env, uint32_t fst0)
699 uint32_t wt2;
701 wt2 = float32_to_int32(fst0, &env->active_fpu.fp_status);
702 if (get_float_exception_flags(&env->active_fpu.fp_status)
703 & float_flag_invalid) {
704 if (float32_is_any_nan(fst0)) {
705 wt2 = 0;
708 update_fcr31(env, GETPC());
709 return wt2;
712 uint64_t helper_float_round_2008_l_d(CPUMIPSState *env, uint64_t fdt0)
714 uint64_t dt2;
716 set_float_rounding_mode(float_round_nearest_even,
717 &env->active_fpu.fp_status);
718 dt2 = float64_to_int64(fdt0, &env->active_fpu.fp_status);
719 restore_rounding_mode(env);
720 if (get_float_exception_flags(&env->active_fpu.fp_status)
721 & float_flag_invalid) {
722 if (float64_is_any_nan(fdt0)) {
723 dt2 = 0;
726 update_fcr31(env, GETPC());
727 return dt2;
730 uint64_t helper_float_round_2008_l_s(CPUMIPSState *env, uint32_t fst0)
732 uint64_t dt2;
734 set_float_rounding_mode(float_round_nearest_even,
735 &env->active_fpu.fp_status);
736 dt2 = float32_to_int64(fst0, &env->active_fpu.fp_status);
737 restore_rounding_mode(env);
738 if (get_float_exception_flags(&env->active_fpu.fp_status)
739 & float_flag_invalid) {
740 if (float32_is_any_nan(fst0)) {
741 dt2 = 0;
744 update_fcr31(env, GETPC());
745 return dt2;
748 uint32_t helper_float_round_2008_w_d(CPUMIPSState *env, uint64_t fdt0)
750 uint32_t wt2;
752 set_float_rounding_mode(float_round_nearest_even,
753 &env->active_fpu.fp_status);
754 wt2 = float64_to_int32(fdt0, &env->active_fpu.fp_status);
755 restore_rounding_mode(env);
756 if (get_float_exception_flags(&env->active_fpu.fp_status)
757 & float_flag_invalid) {
758 if (float64_is_any_nan(fdt0)) {
759 wt2 = 0;
762 update_fcr31(env, GETPC());
763 return wt2;
766 uint32_t helper_float_round_2008_w_s(CPUMIPSState *env, uint32_t fst0)
768 uint32_t wt2;
770 set_float_rounding_mode(float_round_nearest_even,
771 &env->active_fpu.fp_status);
772 wt2 = float32_to_int32(fst0, &env->active_fpu.fp_status);
773 restore_rounding_mode(env);
774 if (get_float_exception_flags(&env->active_fpu.fp_status)
775 & float_flag_invalid) {
776 if (float32_is_any_nan(fst0)) {
777 wt2 = 0;
780 update_fcr31(env, GETPC());
781 return wt2;
784 uint64_t helper_float_trunc_2008_l_d(CPUMIPSState *env, uint64_t fdt0)
786 uint64_t dt2;
788 dt2 = float64_to_int64_round_to_zero(fdt0, &env->active_fpu.fp_status);
789 if (get_float_exception_flags(&env->active_fpu.fp_status)
790 & float_flag_invalid) {
791 if (float64_is_any_nan(fdt0)) {
792 dt2 = 0;
795 update_fcr31(env, GETPC());
796 return dt2;
799 uint64_t helper_float_trunc_2008_l_s(CPUMIPSState *env, uint32_t fst0)
801 uint64_t dt2;
803 dt2 = float32_to_int64_round_to_zero(fst0, &env->active_fpu.fp_status);
804 if (get_float_exception_flags(&env->active_fpu.fp_status)
805 & float_flag_invalid) {
806 if (float32_is_any_nan(fst0)) {
807 dt2 = 0;
810 update_fcr31(env, GETPC());
811 return dt2;
814 uint32_t helper_float_trunc_2008_w_d(CPUMIPSState *env, uint64_t fdt0)
816 uint32_t wt2;
818 wt2 = float64_to_int32_round_to_zero(fdt0, &env->active_fpu.fp_status);
819 if (get_float_exception_flags(&env->active_fpu.fp_status)
820 & float_flag_invalid) {
821 if (float64_is_any_nan(fdt0)) {
822 wt2 = 0;
825 update_fcr31(env, GETPC());
826 return wt2;
829 uint32_t helper_float_trunc_2008_w_s(CPUMIPSState *env, uint32_t fst0)
831 uint32_t wt2;
833 wt2 = float32_to_int32_round_to_zero(fst0, &env->active_fpu.fp_status);
834 if (get_float_exception_flags(&env->active_fpu.fp_status)
835 & float_flag_invalid) {
836 if (float32_is_any_nan(fst0)) {
837 wt2 = 0;
840 update_fcr31(env, GETPC());
841 return wt2;
844 uint64_t helper_float_ceil_2008_l_d(CPUMIPSState *env, uint64_t fdt0)
846 uint64_t dt2;
848 set_float_rounding_mode(float_round_up, &env->active_fpu.fp_status);
849 dt2 = float64_to_int64(fdt0, &env->active_fpu.fp_status);
850 restore_rounding_mode(env);
851 if (get_float_exception_flags(&env->active_fpu.fp_status)
852 & float_flag_invalid) {
853 if (float64_is_any_nan(fdt0)) {
854 dt2 = 0;
857 update_fcr31(env, GETPC());
858 return dt2;
861 uint64_t helper_float_ceil_2008_l_s(CPUMIPSState *env, uint32_t fst0)
863 uint64_t dt2;
865 set_float_rounding_mode(float_round_up, &env->active_fpu.fp_status);
866 dt2 = float32_to_int64(fst0, &env->active_fpu.fp_status);
867 restore_rounding_mode(env);
868 if (get_float_exception_flags(&env->active_fpu.fp_status)
869 & float_flag_invalid) {
870 if (float32_is_any_nan(fst0)) {
871 dt2 = 0;
874 update_fcr31(env, GETPC());
875 return dt2;
878 uint32_t helper_float_ceil_2008_w_d(CPUMIPSState *env, uint64_t fdt0)
880 uint32_t wt2;
882 set_float_rounding_mode(float_round_up, &env->active_fpu.fp_status);
883 wt2 = float64_to_int32(fdt0, &env->active_fpu.fp_status);
884 restore_rounding_mode(env);
885 if (get_float_exception_flags(&env->active_fpu.fp_status)
886 & float_flag_invalid) {
887 if (float64_is_any_nan(fdt0)) {
888 wt2 = 0;
891 update_fcr31(env, GETPC());
892 return wt2;
895 uint32_t helper_float_ceil_2008_w_s(CPUMIPSState *env, uint32_t fst0)
897 uint32_t wt2;
899 set_float_rounding_mode(float_round_up, &env->active_fpu.fp_status);
900 wt2 = float32_to_int32(fst0, &env->active_fpu.fp_status);
901 restore_rounding_mode(env);
902 if (get_float_exception_flags(&env->active_fpu.fp_status)
903 & float_flag_invalid) {
904 if (float32_is_any_nan(fst0)) {
905 wt2 = 0;
908 update_fcr31(env, GETPC());
909 return wt2;
912 uint64_t helper_float_floor_2008_l_d(CPUMIPSState *env, uint64_t fdt0)
914 uint64_t dt2;
916 set_float_rounding_mode(float_round_down, &env->active_fpu.fp_status);
917 dt2 = float64_to_int64(fdt0, &env->active_fpu.fp_status);
918 restore_rounding_mode(env);
919 if (get_float_exception_flags(&env->active_fpu.fp_status)
920 & float_flag_invalid) {
921 if (float64_is_any_nan(fdt0)) {
922 dt2 = 0;
925 update_fcr31(env, GETPC());
926 return dt2;
929 uint64_t helper_float_floor_2008_l_s(CPUMIPSState *env, uint32_t fst0)
931 uint64_t dt2;
933 set_float_rounding_mode(float_round_down, &env->active_fpu.fp_status);
934 dt2 = float32_to_int64(fst0, &env->active_fpu.fp_status);
935 restore_rounding_mode(env);
936 if (get_float_exception_flags(&env->active_fpu.fp_status)
937 & float_flag_invalid) {
938 if (float32_is_any_nan(fst0)) {
939 dt2 = 0;
942 update_fcr31(env, GETPC());
943 return dt2;
946 uint32_t helper_float_floor_2008_w_d(CPUMIPSState *env, uint64_t fdt0)
948 uint32_t wt2;
950 set_float_rounding_mode(float_round_down, &env->active_fpu.fp_status);
951 wt2 = float64_to_int32(fdt0, &env->active_fpu.fp_status);
952 restore_rounding_mode(env);
953 if (get_float_exception_flags(&env->active_fpu.fp_status)
954 & float_flag_invalid) {
955 if (float64_is_any_nan(fdt0)) {
956 wt2 = 0;
959 update_fcr31(env, GETPC());
960 return wt2;
963 uint32_t helper_float_floor_2008_w_s(CPUMIPSState *env, uint32_t fst0)
965 uint32_t wt2;
967 set_float_rounding_mode(float_round_down, &env->active_fpu.fp_status);
968 wt2 = float32_to_int32(fst0, &env->active_fpu.fp_status);
969 restore_rounding_mode(env);
970 if (get_float_exception_flags(&env->active_fpu.fp_status)
971 & float_flag_invalid) {
972 if (float32_is_any_nan(fst0)) {
973 wt2 = 0;
976 update_fcr31(env, GETPC());
977 return wt2;
980 /* unary operations, not modifying fp status */
981 #define FLOAT_UNOP(name) \
982 uint64_t helper_float_ ## name ## _d(uint64_t fdt0) \
984 return float64_ ## name(fdt0); \
986 uint32_t helper_float_ ## name ## _s(uint32_t fst0) \
988 return float32_ ## name(fst0); \
990 uint64_t helper_float_ ## name ## _ps(uint64_t fdt0) \
992 uint32_t wt0; \
993 uint32_t wth0; \
995 wt0 = float32_ ## name(fdt0 & 0XFFFFFFFF); \
996 wth0 = float32_ ## name(fdt0 >> 32); \
997 return ((uint64_t)wth0 << 32) | wt0; \
999 FLOAT_UNOP(abs)
1000 FLOAT_UNOP(chs)
1001 #undef FLOAT_UNOP
1003 /* MIPS specific unary operations */
1004 uint64_t helper_float_recip_d(CPUMIPSState *env, uint64_t fdt0)
1006 uint64_t fdt2;
1008 fdt2 = float64_div(float64_one, fdt0, &env->active_fpu.fp_status);
1009 update_fcr31(env, GETPC());
1010 return fdt2;
1013 uint32_t helper_float_recip_s(CPUMIPSState *env, uint32_t fst0)
1015 uint32_t fst2;
1017 fst2 = float32_div(float32_one, fst0, &env->active_fpu.fp_status);
1018 update_fcr31(env, GETPC());
1019 return fst2;
1022 uint64_t helper_float_rsqrt_d(CPUMIPSState *env, uint64_t fdt0)
1024 uint64_t fdt2;
1026 fdt2 = float64_sqrt(fdt0, &env->active_fpu.fp_status);
1027 fdt2 = float64_div(float64_one, fdt2, &env->active_fpu.fp_status);
1028 update_fcr31(env, GETPC());
1029 return fdt2;
1032 uint32_t helper_float_rsqrt_s(CPUMIPSState *env, uint32_t fst0)
1034 uint32_t fst2;
1036 fst2 = float32_sqrt(fst0, &env->active_fpu.fp_status);
1037 fst2 = float32_div(float32_one, fst2, &env->active_fpu.fp_status);
1038 update_fcr31(env, GETPC());
1039 return fst2;
1042 uint64_t helper_float_recip1_d(CPUMIPSState *env, uint64_t fdt0)
1044 uint64_t fdt2;
1046 fdt2 = float64_div(float64_one, fdt0, &env->active_fpu.fp_status);
1047 update_fcr31(env, GETPC());
1048 return fdt2;
1051 uint32_t helper_float_recip1_s(CPUMIPSState *env, uint32_t fst0)
1053 uint32_t fst2;
1055 fst2 = float32_div(float32_one, fst0, &env->active_fpu.fp_status);
1056 update_fcr31(env, GETPC());
1057 return fst2;
1060 uint64_t helper_float_recip1_ps(CPUMIPSState *env, uint64_t fdt0)
1062 uint32_t fst2;
1063 uint32_t fsth2;
1065 fst2 = float32_div(float32_one, fdt0 & 0XFFFFFFFF,
1066 &env->active_fpu.fp_status);
1067 fsth2 = float32_div(float32_one, fdt0 >> 32, &env->active_fpu.fp_status);
1068 update_fcr31(env, GETPC());
1069 return ((uint64_t)fsth2 << 32) | fst2;
1072 uint64_t helper_float_rsqrt1_d(CPUMIPSState *env, uint64_t fdt0)
1074 uint64_t fdt2;
1076 fdt2 = float64_sqrt(fdt0, &env->active_fpu.fp_status);
1077 fdt2 = float64_div(float64_one, fdt2, &env->active_fpu.fp_status);
1078 update_fcr31(env, GETPC());
1079 return fdt2;
1082 uint32_t helper_float_rsqrt1_s(CPUMIPSState *env, uint32_t fst0)
1084 uint32_t fst2;
1086 fst2 = float32_sqrt(fst0, &env->active_fpu.fp_status);
1087 fst2 = float32_div(float32_one, fst2, &env->active_fpu.fp_status);
1088 update_fcr31(env, GETPC());
1089 return fst2;
1092 uint64_t helper_float_rsqrt1_ps(CPUMIPSState *env, uint64_t fdt0)
1094 uint32_t fst2;
1095 uint32_t fsth2;
1097 fst2 = float32_sqrt(fdt0 & 0XFFFFFFFF, &env->active_fpu.fp_status);
1098 fsth2 = float32_sqrt(fdt0 >> 32, &env->active_fpu.fp_status);
1099 fst2 = float32_div(float32_one, fst2, &env->active_fpu.fp_status);
1100 fsth2 = float32_div(float32_one, fsth2, &env->active_fpu.fp_status);
1101 update_fcr31(env, GETPC());
1102 return ((uint64_t)fsth2 << 32) | fst2;
1105 #define FLOAT_RINT(name, bits) \
1106 uint ## bits ## _t helper_float_ ## name(CPUMIPSState *env, \
1107 uint ## bits ## _t fs) \
1109 uint ## bits ## _t fdret; \
1111 fdret = float ## bits ## _round_to_int(fs, &env->active_fpu.fp_status); \
1112 update_fcr31(env, GETPC()); \
1113 return fdret; \
1116 FLOAT_RINT(rint_s, 32)
1117 FLOAT_RINT(rint_d, 64)
1118 #undef FLOAT_RINT
1120 #define FLOAT_CLASS_SIGNALING_NAN 0x001
1121 #define FLOAT_CLASS_QUIET_NAN 0x002
1122 #define FLOAT_CLASS_NEGATIVE_INFINITY 0x004
1123 #define FLOAT_CLASS_NEGATIVE_NORMAL 0x008
1124 #define FLOAT_CLASS_NEGATIVE_SUBNORMAL 0x010
1125 #define FLOAT_CLASS_NEGATIVE_ZERO 0x020
1126 #define FLOAT_CLASS_POSITIVE_INFINITY 0x040
1127 #define FLOAT_CLASS_POSITIVE_NORMAL 0x080
1128 #define FLOAT_CLASS_POSITIVE_SUBNORMAL 0x100
1129 #define FLOAT_CLASS_POSITIVE_ZERO 0x200
1131 #define FLOAT_CLASS(name, bits) \
1132 uint ## bits ## _t float_ ## name(uint ## bits ## _t arg, \
1133 float_status *status) \
1135 if (float ## bits ## _is_signaling_nan(arg, status)) { \
1136 return FLOAT_CLASS_SIGNALING_NAN; \
1137 } else if (float ## bits ## _is_quiet_nan(arg, status)) { \
1138 return FLOAT_CLASS_QUIET_NAN; \
1139 } else if (float ## bits ## _is_neg(arg)) { \
1140 if (float ## bits ## _is_infinity(arg)) { \
1141 return FLOAT_CLASS_NEGATIVE_INFINITY; \
1142 } else if (float ## bits ## _is_zero(arg)) { \
1143 return FLOAT_CLASS_NEGATIVE_ZERO; \
1144 } else if (float ## bits ## _is_zero_or_denormal(arg)) { \
1145 return FLOAT_CLASS_NEGATIVE_SUBNORMAL; \
1146 } else { \
1147 return FLOAT_CLASS_NEGATIVE_NORMAL; \
1149 } else { \
1150 if (float ## bits ## _is_infinity(arg)) { \
1151 return FLOAT_CLASS_POSITIVE_INFINITY; \
1152 } else if (float ## bits ## _is_zero(arg)) { \
1153 return FLOAT_CLASS_POSITIVE_ZERO; \
1154 } else if (float ## bits ## _is_zero_or_denormal(arg)) { \
1155 return FLOAT_CLASS_POSITIVE_SUBNORMAL; \
1156 } else { \
1157 return FLOAT_CLASS_POSITIVE_NORMAL; \
1162 uint ## bits ## _t helper_float_ ## name(CPUMIPSState *env, \
1163 uint ## bits ## _t arg) \
1165 return float_ ## name(arg, &env->active_fpu.fp_status); \
1168 FLOAT_CLASS(class_s, 32)
1169 FLOAT_CLASS(class_d, 64)
1170 #undef FLOAT_CLASS
1172 /* binary operations */
1173 #define FLOAT_BINOP(name) \
1174 uint64_t helper_float_ ## name ## _d(CPUMIPSState *env, \
1175 uint64_t fdt0, uint64_t fdt1) \
1177 uint64_t dt2; \
1179 dt2 = float64_ ## name(fdt0, fdt1, &env->active_fpu.fp_status);\
1180 update_fcr31(env, GETPC()); \
1181 return dt2; \
1184 uint32_t helper_float_ ## name ## _s(CPUMIPSState *env, \
1185 uint32_t fst0, uint32_t fst1) \
1187 uint32_t wt2; \
1189 wt2 = float32_ ## name(fst0, fst1, &env->active_fpu.fp_status);\
1190 update_fcr31(env, GETPC()); \
1191 return wt2; \
1194 uint64_t helper_float_ ## name ## _ps(CPUMIPSState *env, \
1195 uint64_t fdt0, \
1196 uint64_t fdt1) \
1198 uint32_t fst0 = fdt0 & 0XFFFFFFFF; \
1199 uint32_t fsth0 = fdt0 >> 32; \
1200 uint32_t fst1 = fdt1 & 0XFFFFFFFF; \
1201 uint32_t fsth1 = fdt1 >> 32; \
1202 uint32_t wt2; \
1203 uint32_t wth2; \
1205 wt2 = float32_ ## name(fst0, fst1, &env->active_fpu.fp_status); \
1206 wth2 = float32_ ## name(fsth0, fsth1, &env->active_fpu.fp_status); \
1207 update_fcr31(env, GETPC()); \
1208 return ((uint64_t)wth2 << 32) | wt2; \
1211 FLOAT_BINOP(add)
1212 FLOAT_BINOP(sub)
1213 FLOAT_BINOP(mul)
1214 FLOAT_BINOP(div)
1215 #undef FLOAT_BINOP
1217 /* MIPS specific binary operations */
1218 uint64_t helper_float_recip2_d(CPUMIPSState *env, uint64_t fdt0, uint64_t fdt2)
1220 fdt2 = float64_mul(fdt0, fdt2, &env->active_fpu.fp_status);
1221 fdt2 = float64_chs(float64_sub(fdt2, float64_one,
1222 &env->active_fpu.fp_status));
1223 update_fcr31(env, GETPC());
1224 return fdt2;
1227 uint32_t helper_float_recip2_s(CPUMIPSState *env, uint32_t fst0, uint32_t fst2)
1229 fst2 = float32_mul(fst0, fst2, &env->active_fpu.fp_status);
1230 fst2 = float32_chs(float32_sub(fst2, float32_one,
1231 &env->active_fpu.fp_status));
1232 update_fcr31(env, GETPC());
1233 return fst2;
1236 uint64_t helper_float_recip2_ps(CPUMIPSState *env, uint64_t fdt0, uint64_t fdt2)
1238 uint32_t fst0 = fdt0 & 0XFFFFFFFF;
1239 uint32_t fsth0 = fdt0 >> 32;
1240 uint32_t fst2 = fdt2 & 0XFFFFFFFF;
1241 uint32_t fsth2 = fdt2 >> 32;
1243 fst2 = float32_mul(fst0, fst2, &env->active_fpu.fp_status);
1244 fsth2 = float32_mul(fsth0, fsth2, &env->active_fpu.fp_status);
1245 fst2 = float32_chs(float32_sub(fst2, float32_one,
1246 &env->active_fpu.fp_status));
1247 fsth2 = float32_chs(float32_sub(fsth2, float32_one,
1248 &env->active_fpu.fp_status));
1249 update_fcr31(env, GETPC());
1250 return ((uint64_t)fsth2 << 32) | fst2;
1253 uint64_t helper_float_rsqrt2_d(CPUMIPSState *env, uint64_t fdt0, uint64_t fdt2)
1255 fdt2 = float64_mul(fdt0, fdt2, &env->active_fpu.fp_status);
1256 fdt2 = float64_sub(fdt2, float64_one, &env->active_fpu.fp_status);
1257 fdt2 = float64_chs(float64_div(fdt2, FLOAT_TWO64,
1258 &env->active_fpu.fp_status));
1259 update_fcr31(env, GETPC());
1260 return fdt2;
1263 uint32_t helper_float_rsqrt2_s(CPUMIPSState *env, uint32_t fst0, uint32_t fst2)
1265 fst2 = float32_mul(fst0, fst2, &env->active_fpu.fp_status);
1266 fst2 = float32_sub(fst2, float32_one, &env->active_fpu.fp_status);
1267 fst2 = float32_chs(float32_div(fst2, FLOAT_TWO32,
1268 &env->active_fpu.fp_status));
1269 update_fcr31(env, GETPC());
1270 return fst2;
1273 uint64_t helper_float_rsqrt2_ps(CPUMIPSState *env, uint64_t fdt0, uint64_t fdt2)
1275 uint32_t fst0 = fdt0 & 0XFFFFFFFF;
1276 uint32_t fsth0 = fdt0 >> 32;
1277 uint32_t fst2 = fdt2 & 0XFFFFFFFF;
1278 uint32_t fsth2 = fdt2 >> 32;
1280 fst2 = float32_mul(fst0, fst2, &env->active_fpu.fp_status);
1281 fsth2 = float32_mul(fsth0, fsth2, &env->active_fpu.fp_status);
1282 fst2 = float32_sub(fst2, float32_one, &env->active_fpu.fp_status);
1283 fsth2 = float32_sub(fsth2, float32_one, &env->active_fpu.fp_status);
1284 fst2 = float32_chs(float32_div(fst2, FLOAT_TWO32,
1285 &env->active_fpu.fp_status));
1286 fsth2 = float32_chs(float32_div(fsth2, FLOAT_TWO32,
1287 &env->active_fpu.fp_status));
1288 update_fcr31(env, GETPC());
1289 return ((uint64_t)fsth2 << 32) | fst2;
1292 uint64_t helper_float_addr_ps(CPUMIPSState *env, uint64_t fdt0, uint64_t fdt1)
1294 uint32_t fst0 = fdt0 & 0XFFFFFFFF;
1295 uint32_t fsth0 = fdt0 >> 32;
1296 uint32_t fst1 = fdt1 & 0XFFFFFFFF;
1297 uint32_t fsth1 = fdt1 >> 32;
1298 uint32_t fst2;
1299 uint32_t fsth2;
1301 fst2 = float32_add(fst0, fsth0, &env->active_fpu.fp_status);
1302 fsth2 = float32_add(fst1, fsth1, &env->active_fpu.fp_status);
1303 update_fcr31(env, GETPC());
1304 return ((uint64_t)fsth2 << 32) | fst2;
1307 uint64_t helper_float_mulr_ps(CPUMIPSState *env, uint64_t fdt0, uint64_t fdt1)
1309 uint32_t fst0 = fdt0 & 0XFFFFFFFF;
1310 uint32_t fsth0 = fdt0 >> 32;
1311 uint32_t fst1 = fdt1 & 0XFFFFFFFF;
1312 uint32_t fsth1 = fdt1 >> 32;
1313 uint32_t fst2;
1314 uint32_t fsth2;
1316 fst2 = float32_mul(fst0, fsth0, &env->active_fpu.fp_status);
1317 fsth2 = float32_mul(fst1, fsth1, &env->active_fpu.fp_status);
1318 update_fcr31(env, GETPC());
1319 return ((uint64_t)fsth2 << 32) | fst2;
1322 #define FLOAT_MINMAX(name, bits, minmaxfunc) \
1323 uint ## bits ## _t helper_float_ ## name(CPUMIPSState *env, \
1324 uint ## bits ## _t fs, \
1325 uint ## bits ## _t ft) \
1327 uint ## bits ## _t fdret; \
1329 fdret = float ## bits ## _ ## minmaxfunc(fs, ft, \
1330 &env->active_fpu.fp_status); \
1331 update_fcr31(env, GETPC()); \
1332 return fdret; \
1335 FLOAT_MINMAX(max_s, 32, maxnum)
1336 FLOAT_MINMAX(max_d, 64, maxnum)
1337 FLOAT_MINMAX(maxa_s, 32, maxnummag)
1338 FLOAT_MINMAX(maxa_d, 64, maxnummag)
1340 FLOAT_MINMAX(min_s, 32, minnum)
1341 FLOAT_MINMAX(min_d, 64, minnum)
1342 FLOAT_MINMAX(mina_s, 32, minnummag)
1343 FLOAT_MINMAX(mina_d, 64, minnummag)
1344 #undef FLOAT_MINMAX
1346 /* ternary operations */
1347 #define UNFUSED_FMA(prefix, a, b, c, flags) \
1349 a = prefix##_mul(a, b, &env->active_fpu.fp_status); \
1350 if ((flags) & float_muladd_negate_c) { \
1351 a = prefix##_sub(a, c, &env->active_fpu.fp_status); \
1352 } else { \
1353 a = prefix##_add(a, c, &env->active_fpu.fp_status); \
1355 if ((flags) & float_muladd_negate_result) { \
1356 a = prefix##_chs(a); \
1360 /* FMA based operations */
1361 #define FLOAT_FMA(name, type) \
1362 uint64_t helper_float_ ## name ## _d(CPUMIPSState *env, \
1363 uint64_t fdt0, uint64_t fdt1, \
1364 uint64_t fdt2) \
1366 UNFUSED_FMA(float64, fdt0, fdt1, fdt2, type); \
1367 update_fcr31(env, GETPC()); \
1368 return fdt0; \
1371 uint32_t helper_float_ ## name ## _s(CPUMIPSState *env, \
1372 uint32_t fst0, uint32_t fst1, \
1373 uint32_t fst2) \
1375 UNFUSED_FMA(float32, fst0, fst1, fst2, type); \
1376 update_fcr31(env, GETPC()); \
1377 return fst0; \
1380 uint64_t helper_float_ ## name ## _ps(CPUMIPSState *env, \
1381 uint64_t fdt0, uint64_t fdt1, \
1382 uint64_t fdt2) \
1384 uint32_t fst0 = fdt0 & 0XFFFFFFFF; \
1385 uint32_t fsth0 = fdt0 >> 32; \
1386 uint32_t fst1 = fdt1 & 0XFFFFFFFF; \
1387 uint32_t fsth1 = fdt1 >> 32; \
1388 uint32_t fst2 = fdt2 & 0XFFFFFFFF; \
1389 uint32_t fsth2 = fdt2 >> 32; \
1391 UNFUSED_FMA(float32, fst0, fst1, fst2, type); \
1392 UNFUSED_FMA(float32, fsth0, fsth1, fsth2, type); \
1393 update_fcr31(env, GETPC()); \
1394 return ((uint64_t)fsth0 << 32) | fst0; \
1396 FLOAT_FMA(madd, 0)
1397 FLOAT_FMA(msub, float_muladd_negate_c)
1398 FLOAT_FMA(nmadd, float_muladd_negate_result)
1399 FLOAT_FMA(nmsub, float_muladd_negate_result | float_muladd_negate_c)
1400 #undef FLOAT_FMA
1402 #define FLOAT_FMADDSUB(name, bits, muladd_arg) \
1403 uint ## bits ## _t helper_float_ ## name(CPUMIPSState *env, \
1404 uint ## bits ## _t fs, \
1405 uint ## bits ## _t ft, \
1406 uint ## bits ## _t fd) \
1408 uint ## bits ## _t fdret; \
1410 fdret = float ## bits ## _muladd(fs, ft, fd, muladd_arg, \
1411 &env->active_fpu.fp_status); \
1412 update_fcr31(env, GETPC()); \
1413 return fdret; \
1416 FLOAT_FMADDSUB(maddf_s, 32, 0)
1417 FLOAT_FMADDSUB(maddf_d, 64, 0)
1418 FLOAT_FMADDSUB(msubf_s, 32, float_muladd_negate_product)
1419 FLOAT_FMADDSUB(msubf_d, 64, float_muladd_negate_product)
1420 #undef FLOAT_FMADDSUB
1422 /* compare operations */
1423 #define FOP_COND_D(op, cond) \
1424 void helper_cmp_d_ ## op(CPUMIPSState *env, uint64_t fdt0, \
1425 uint64_t fdt1, int cc) \
1427 int c; \
1428 c = cond; \
1429 update_fcr31(env, GETPC()); \
1430 if (c) \
1431 SET_FP_COND(cc, env->active_fpu); \
1432 else \
1433 CLEAR_FP_COND(cc, env->active_fpu); \
1435 void helper_cmpabs_d_ ## op(CPUMIPSState *env, uint64_t fdt0, \
1436 uint64_t fdt1, int cc) \
1438 int c; \
1439 fdt0 = float64_abs(fdt0); \
1440 fdt1 = float64_abs(fdt1); \
1441 c = cond; \
1442 update_fcr31(env, GETPC()); \
1443 if (c) \
1444 SET_FP_COND(cc, env->active_fpu); \
1445 else \
1446 CLEAR_FP_COND(cc, env->active_fpu); \
1450 * NOTE: the comma operator will make "cond" to eval to false,
1451 * but float64_unordered_quiet() is still called.
1453 FOP_COND_D(f, (float64_unordered_quiet(fdt1, fdt0,
1454 &env->active_fpu.fp_status), 0))
1455 FOP_COND_D(un, float64_unordered_quiet(fdt1, fdt0,
1456 &env->active_fpu.fp_status))
1457 FOP_COND_D(eq, float64_eq_quiet(fdt0, fdt1,
1458 &env->active_fpu.fp_status))
1459 FOP_COND_D(ueq, float64_unordered_quiet(fdt1, fdt0,
1460 &env->active_fpu.fp_status)
1461 || float64_eq_quiet(fdt0, fdt1,
1462 &env->active_fpu.fp_status))
1463 FOP_COND_D(olt, float64_lt_quiet(fdt0, fdt1,
1464 &env->active_fpu.fp_status))
1465 FOP_COND_D(ult, float64_unordered_quiet(fdt1, fdt0,
1466 &env->active_fpu.fp_status)
1467 || float64_lt_quiet(fdt0, fdt1,
1468 &env->active_fpu.fp_status))
1469 FOP_COND_D(ole, float64_le_quiet(fdt0, fdt1,
1470 &env->active_fpu.fp_status))
1471 FOP_COND_D(ule, float64_unordered_quiet(fdt1, fdt0,
1472 &env->active_fpu.fp_status)
1473 || float64_le_quiet(fdt0, fdt1,
1474 &env->active_fpu.fp_status))
1476 * NOTE: the comma operator will make "cond" to eval to false,
1477 * but float64_unordered() is still called.
1479 FOP_COND_D(sf, (float64_unordered(fdt1, fdt0,
1480 &env->active_fpu.fp_status), 0))
1481 FOP_COND_D(ngle, float64_unordered(fdt1, fdt0,
1482 &env->active_fpu.fp_status))
1483 FOP_COND_D(seq, float64_eq(fdt0, fdt1,
1484 &env->active_fpu.fp_status))
1485 FOP_COND_D(ngl, float64_unordered(fdt1, fdt0,
1486 &env->active_fpu.fp_status)
1487 || float64_eq(fdt0, fdt1,
1488 &env->active_fpu.fp_status))
1489 FOP_COND_D(lt, float64_lt(fdt0, fdt1,
1490 &env->active_fpu.fp_status))
1491 FOP_COND_D(nge, float64_unordered(fdt1, fdt0,
1492 &env->active_fpu.fp_status)
1493 || float64_lt(fdt0, fdt1,
1494 &env->active_fpu.fp_status))
1495 FOP_COND_D(le, float64_le(fdt0, fdt1,
1496 &env->active_fpu.fp_status))
1497 FOP_COND_D(ngt, float64_unordered(fdt1, fdt0,
1498 &env->active_fpu.fp_status)
1499 || float64_le(fdt0, fdt1,
1500 &env->active_fpu.fp_status))
1502 #define FOP_COND_S(op, cond) \
1503 void helper_cmp_s_ ## op(CPUMIPSState *env, uint32_t fst0, \
1504 uint32_t fst1, int cc) \
1506 int c; \
1507 c = cond; \
1508 update_fcr31(env, GETPC()); \
1509 if (c) \
1510 SET_FP_COND(cc, env->active_fpu); \
1511 else \
1512 CLEAR_FP_COND(cc, env->active_fpu); \
1514 void helper_cmpabs_s_ ## op(CPUMIPSState *env, uint32_t fst0, \
1515 uint32_t fst1, int cc) \
1517 int c; \
1518 fst0 = float32_abs(fst0); \
1519 fst1 = float32_abs(fst1); \
1520 c = cond; \
1521 update_fcr31(env, GETPC()); \
1522 if (c) \
1523 SET_FP_COND(cc, env->active_fpu); \
1524 else \
1525 CLEAR_FP_COND(cc, env->active_fpu); \
1529 * NOTE: the comma operator will make "cond" to eval to false,
1530 * but float32_unordered_quiet() is still called.
1532 FOP_COND_S(f, (float32_unordered_quiet(fst1, fst0,
1533 &env->active_fpu.fp_status), 0))
1534 FOP_COND_S(un, float32_unordered_quiet(fst1, fst0,
1535 &env->active_fpu.fp_status))
1536 FOP_COND_S(eq, float32_eq_quiet(fst0, fst1,
1537 &env->active_fpu.fp_status))
1538 FOP_COND_S(ueq, float32_unordered_quiet(fst1, fst0,
1539 &env->active_fpu.fp_status)
1540 || float32_eq_quiet(fst0, fst1,
1541 &env->active_fpu.fp_status))
1542 FOP_COND_S(olt, float32_lt_quiet(fst0, fst1,
1543 &env->active_fpu.fp_status))
1544 FOP_COND_S(ult, float32_unordered_quiet(fst1, fst0,
1545 &env->active_fpu.fp_status)
1546 || float32_lt_quiet(fst0, fst1,
1547 &env->active_fpu.fp_status))
1548 FOP_COND_S(ole, float32_le_quiet(fst0, fst1,
1549 &env->active_fpu.fp_status))
1550 FOP_COND_S(ule, float32_unordered_quiet(fst1, fst0,
1551 &env->active_fpu.fp_status)
1552 || float32_le_quiet(fst0, fst1,
1553 &env->active_fpu.fp_status))
1555 * NOTE: the comma operator will make "cond" to eval to false,
1556 * but float32_unordered() is still called.
1558 FOP_COND_S(sf, (float32_unordered(fst1, fst0,
1559 &env->active_fpu.fp_status), 0))
1560 FOP_COND_S(ngle, float32_unordered(fst1, fst0,
1561 &env->active_fpu.fp_status))
1562 FOP_COND_S(seq, float32_eq(fst0, fst1,
1563 &env->active_fpu.fp_status))
1564 FOP_COND_S(ngl, float32_unordered(fst1, fst0,
1565 &env->active_fpu.fp_status)
1566 || float32_eq(fst0, fst1,
1567 &env->active_fpu.fp_status))
1568 FOP_COND_S(lt, float32_lt(fst0, fst1,
1569 &env->active_fpu.fp_status))
1570 FOP_COND_S(nge, float32_unordered(fst1, fst0,
1571 &env->active_fpu.fp_status)
1572 || float32_lt(fst0, fst1,
1573 &env->active_fpu.fp_status))
1574 FOP_COND_S(le, float32_le(fst0, fst1,
1575 &env->active_fpu.fp_status))
1576 FOP_COND_S(ngt, float32_unordered(fst1, fst0,
1577 &env->active_fpu.fp_status)
1578 || float32_le(fst0, fst1,
1579 &env->active_fpu.fp_status))
1581 #define FOP_COND_PS(op, condl, condh) \
1582 void helper_cmp_ps_ ## op(CPUMIPSState *env, uint64_t fdt0, \
1583 uint64_t fdt1, int cc) \
1585 uint32_t fst0, fsth0, fst1, fsth1; \
1586 int ch, cl; \
1587 fst0 = fdt0 & 0XFFFFFFFF; \
1588 fsth0 = fdt0 >> 32; \
1589 fst1 = fdt1 & 0XFFFFFFFF; \
1590 fsth1 = fdt1 >> 32; \
1591 cl = condl; \
1592 ch = condh; \
1593 update_fcr31(env, GETPC()); \
1594 if (cl) \
1595 SET_FP_COND(cc, env->active_fpu); \
1596 else \
1597 CLEAR_FP_COND(cc, env->active_fpu); \
1598 if (ch) \
1599 SET_FP_COND(cc + 1, env->active_fpu); \
1600 else \
1601 CLEAR_FP_COND(cc + 1, env->active_fpu); \
1603 void helper_cmpabs_ps_ ## op(CPUMIPSState *env, uint64_t fdt0, \
1604 uint64_t fdt1, int cc) \
1606 uint32_t fst0, fsth0, fst1, fsth1; \
1607 int ch, cl; \
1608 fst0 = float32_abs(fdt0 & 0XFFFFFFFF); \
1609 fsth0 = float32_abs(fdt0 >> 32); \
1610 fst1 = float32_abs(fdt1 & 0XFFFFFFFF); \
1611 fsth1 = float32_abs(fdt1 >> 32); \
1612 cl = condl; \
1613 ch = condh; \
1614 update_fcr31(env, GETPC()); \
1615 if (cl) \
1616 SET_FP_COND(cc, env->active_fpu); \
1617 else \
1618 CLEAR_FP_COND(cc, env->active_fpu); \
1619 if (ch) \
1620 SET_FP_COND(cc + 1, env->active_fpu); \
1621 else \
1622 CLEAR_FP_COND(cc + 1, env->active_fpu); \
1626 * NOTE: the comma operator will make "cond" to eval to false,
1627 * but float32_unordered_quiet() is still called.
1629 FOP_COND_PS(f, (float32_unordered_quiet(fst1, fst0,
1630 &env->active_fpu.fp_status), 0),
1631 (float32_unordered_quiet(fsth1, fsth0,
1632 &env->active_fpu.fp_status), 0))
1633 FOP_COND_PS(un, float32_unordered_quiet(fst1, fst0,
1634 &env->active_fpu.fp_status),
1635 float32_unordered_quiet(fsth1, fsth0,
1636 &env->active_fpu.fp_status))
1637 FOP_COND_PS(eq, float32_eq_quiet(fst0, fst1,
1638 &env->active_fpu.fp_status),
1639 float32_eq_quiet(fsth0, fsth1,
1640 &env->active_fpu.fp_status))
1641 FOP_COND_PS(ueq, float32_unordered_quiet(fst1, fst0,
1642 &env->active_fpu.fp_status)
1643 || float32_eq_quiet(fst0, fst1,
1644 &env->active_fpu.fp_status),
1645 float32_unordered_quiet(fsth1, fsth0,
1646 &env->active_fpu.fp_status)
1647 || float32_eq_quiet(fsth0, fsth1,
1648 &env->active_fpu.fp_status))
1649 FOP_COND_PS(olt, float32_lt_quiet(fst0, fst1,
1650 &env->active_fpu.fp_status),
1651 float32_lt_quiet(fsth0, fsth1,
1652 &env->active_fpu.fp_status))
1653 FOP_COND_PS(ult, float32_unordered_quiet(fst1, fst0,
1654 &env->active_fpu.fp_status)
1655 || float32_lt_quiet(fst0, fst1,
1656 &env->active_fpu.fp_status),
1657 float32_unordered_quiet(fsth1, fsth0,
1658 &env->active_fpu.fp_status)
1659 || float32_lt_quiet(fsth0, fsth1,
1660 &env->active_fpu.fp_status))
1661 FOP_COND_PS(ole, float32_le_quiet(fst0, fst1,
1662 &env->active_fpu.fp_status),
1663 float32_le_quiet(fsth0, fsth1,
1664 &env->active_fpu.fp_status))
1665 FOP_COND_PS(ule, float32_unordered_quiet(fst1, fst0,
1666 &env->active_fpu.fp_status)
1667 || float32_le_quiet(fst0, fst1,
1668 &env->active_fpu.fp_status),
1669 float32_unordered_quiet(fsth1, fsth0,
1670 &env->active_fpu.fp_status)
1671 || float32_le_quiet(fsth0, fsth1,
1672 &env->active_fpu.fp_status))
1674 * NOTE: the comma operator will make "cond" to eval to false,
1675 * but float32_unordered() is still called.
1677 FOP_COND_PS(sf, (float32_unordered(fst1, fst0,
1678 &env->active_fpu.fp_status), 0),
1679 (float32_unordered(fsth1, fsth0,
1680 &env->active_fpu.fp_status), 0))
1681 FOP_COND_PS(ngle, float32_unordered(fst1, fst0,
1682 &env->active_fpu.fp_status),
1683 float32_unordered(fsth1, fsth0,
1684 &env->active_fpu.fp_status))
1685 FOP_COND_PS(seq, float32_eq(fst0, fst1,
1686 &env->active_fpu.fp_status),
1687 float32_eq(fsth0, fsth1,
1688 &env->active_fpu.fp_status))
1689 FOP_COND_PS(ngl, float32_unordered(fst1, fst0,
1690 &env->active_fpu.fp_status)
1691 || float32_eq(fst0, fst1,
1692 &env->active_fpu.fp_status),
1693 float32_unordered(fsth1, fsth0,
1694 &env->active_fpu.fp_status)
1695 || float32_eq(fsth0, fsth1,
1696 &env->active_fpu.fp_status))
1697 FOP_COND_PS(lt, float32_lt(fst0, fst1,
1698 &env->active_fpu.fp_status),
1699 float32_lt(fsth0, fsth1,
1700 &env->active_fpu.fp_status))
1701 FOP_COND_PS(nge, float32_unordered(fst1, fst0,
1702 &env->active_fpu.fp_status)
1703 || float32_lt(fst0, fst1,
1704 &env->active_fpu.fp_status),
1705 float32_unordered(fsth1, fsth0,
1706 &env->active_fpu.fp_status)
1707 || float32_lt(fsth0, fsth1,
1708 &env->active_fpu.fp_status))
1709 FOP_COND_PS(le, float32_le(fst0, fst1,
1710 &env->active_fpu.fp_status),
1711 float32_le(fsth0, fsth1,
1712 &env->active_fpu.fp_status))
1713 FOP_COND_PS(ngt, float32_unordered(fst1, fst0,
1714 &env->active_fpu.fp_status)
1715 || float32_le(fst0, fst1,
1716 &env->active_fpu.fp_status),
1717 float32_unordered(fsth1, fsth0,
1718 &env->active_fpu.fp_status)
1719 || float32_le(fsth0, fsth1,
1720 &env->active_fpu.fp_status))
1722 /* R6 compare operations */
1723 #define FOP_CONDN_D(op, cond) \
1724 uint64_t helper_r6_cmp_d_ ## op(CPUMIPSState *env, uint64_t fdt0, \
1725 uint64_t fdt1) \
1727 uint64_t c; \
1728 c = cond; \
1729 update_fcr31(env, GETPC()); \
1730 if (c) { \
1731 return -1; \
1732 } else { \
1733 return 0; \
1738 * NOTE: the comma operator will make "cond" to eval to false,
1739 * but float64_unordered_quiet() is still called.
1741 FOP_CONDN_D(af, (float64_unordered_quiet(fdt1, fdt0,
1742 &env->active_fpu.fp_status), 0))
1743 FOP_CONDN_D(un, (float64_unordered_quiet(fdt1, fdt0,
1744 &env->active_fpu.fp_status)))
1745 FOP_CONDN_D(eq, (float64_eq_quiet(fdt0, fdt1,
1746 &env->active_fpu.fp_status)))
1747 FOP_CONDN_D(ueq, (float64_unordered_quiet(fdt1, fdt0,
1748 &env->active_fpu.fp_status)
1749 || float64_eq_quiet(fdt0, fdt1,
1750 &env->active_fpu.fp_status)))
1751 FOP_CONDN_D(lt, (float64_lt_quiet(fdt0, fdt1,
1752 &env->active_fpu.fp_status)))
1753 FOP_CONDN_D(ult, (float64_unordered_quiet(fdt1, fdt0,
1754 &env->active_fpu.fp_status)
1755 || float64_lt_quiet(fdt0, fdt1,
1756 &env->active_fpu.fp_status)))
1757 FOP_CONDN_D(le, (float64_le_quiet(fdt0, fdt1,
1758 &env->active_fpu.fp_status)))
1759 FOP_CONDN_D(ule, (float64_unordered_quiet(fdt1, fdt0,
1760 &env->active_fpu.fp_status)
1761 || float64_le_quiet(fdt0, fdt1,
1762 &env->active_fpu.fp_status)))
1764 * NOTE: the comma operator will make "cond" to eval to false,
1765 * but float64_unordered() is still called.\
1767 FOP_CONDN_D(saf, (float64_unordered(fdt1, fdt0,
1768 &env->active_fpu.fp_status), 0))
1769 FOP_CONDN_D(sun, (float64_unordered(fdt1, fdt0,
1770 &env->active_fpu.fp_status)))
1771 FOP_CONDN_D(seq, (float64_eq(fdt0, fdt1,
1772 &env->active_fpu.fp_status)))
1773 FOP_CONDN_D(sueq, (float64_unordered(fdt1, fdt0,
1774 &env->active_fpu.fp_status)
1775 || float64_eq(fdt0, fdt1,
1776 &env->active_fpu.fp_status)))
1777 FOP_CONDN_D(slt, (float64_lt(fdt0, fdt1,
1778 &env->active_fpu.fp_status)))
1779 FOP_CONDN_D(sult, (float64_unordered(fdt1, fdt0,
1780 &env->active_fpu.fp_status)
1781 || float64_lt(fdt0, fdt1,
1782 &env->active_fpu.fp_status)))
1783 FOP_CONDN_D(sle, (float64_le(fdt0, fdt1,
1784 &env->active_fpu.fp_status)))
1785 FOP_CONDN_D(sule, (float64_unordered(fdt1, fdt0,
1786 &env->active_fpu.fp_status)
1787 || float64_le(fdt0, fdt1,
1788 &env->active_fpu.fp_status)))
1789 FOP_CONDN_D(or, (float64_le_quiet(fdt1, fdt0,
1790 &env->active_fpu.fp_status)
1791 || float64_le_quiet(fdt0, fdt1,
1792 &env->active_fpu.fp_status)))
1793 FOP_CONDN_D(une, (float64_unordered_quiet(fdt1, fdt0,
1794 &env->active_fpu.fp_status)
1795 || float64_lt_quiet(fdt1, fdt0,
1796 &env->active_fpu.fp_status)
1797 || float64_lt_quiet(fdt0, fdt1,
1798 &env->active_fpu.fp_status)))
1799 FOP_CONDN_D(ne, (float64_lt_quiet(fdt1, fdt0,
1800 &env->active_fpu.fp_status)
1801 || float64_lt_quiet(fdt0, fdt1,
1802 &env->active_fpu.fp_status)))
1803 FOP_CONDN_D(sor, (float64_le(fdt1, fdt0,
1804 &env->active_fpu.fp_status)
1805 || float64_le(fdt0, fdt1,
1806 &env->active_fpu.fp_status)))
1807 FOP_CONDN_D(sune, (float64_unordered(fdt1, fdt0,
1808 &env->active_fpu.fp_status)
1809 || float64_lt(fdt1, fdt0,
1810 &env->active_fpu.fp_status)
1811 || float64_lt(fdt0, fdt1,
1812 &env->active_fpu.fp_status)))
1813 FOP_CONDN_D(sne, (float64_lt(fdt1, fdt0,
1814 &env->active_fpu.fp_status)
1815 || float64_lt(fdt0, fdt1,
1816 &env->active_fpu.fp_status)))
1818 #define FOP_CONDN_S(op, cond) \
1819 uint32_t helper_r6_cmp_s_ ## op(CPUMIPSState *env, uint32_t fst0, \
1820 uint32_t fst1) \
1822 uint64_t c; \
1823 c = cond; \
1824 update_fcr31(env, GETPC()); \
1825 if (c) { \
1826 return -1; \
1827 } else { \
1828 return 0; \
1833 * NOTE: the comma operator will make "cond" to eval to false,
1834 * but float32_unordered_quiet() is still called.
1836 FOP_CONDN_S(af, (float32_unordered_quiet(fst1, fst0,
1837 &env->active_fpu.fp_status), 0))
1838 FOP_CONDN_S(un, (float32_unordered_quiet(fst1, fst0,
1839 &env->active_fpu.fp_status)))
1840 FOP_CONDN_S(eq, (float32_eq_quiet(fst0, fst1,
1841 &env->active_fpu.fp_status)))
1842 FOP_CONDN_S(ueq, (float32_unordered_quiet(fst1, fst0,
1843 &env->active_fpu.fp_status)
1844 || float32_eq_quiet(fst0, fst1,
1845 &env->active_fpu.fp_status)))
1846 FOP_CONDN_S(lt, (float32_lt_quiet(fst0, fst1,
1847 &env->active_fpu.fp_status)))
1848 FOP_CONDN_S(ult, (float32_unordered_quiet(fst1, fst0,
1849 &env->active_fpu.fp_status)
1850 || float32_lt_quiet(fst0, fst1,
1851 &env->active_fpu.fp_status)))
1852 FOP_CONDN_S(le, (float32_le_quiet(fst0, fst1,
1853 &env->active_fpu.fp_status)))
1854 FOP_CONDN_S(ule, (float32_unordered_quiet(fst1, fst0,
1855 &env->active_fpu.fp_status)
1856 || float32_le_quiet(fst0, fst1,
1857 &env->active_fpu.fp_status)))
1859 * NOTE: the comma operator will make "cond" to eval to false,
1860 * but float32_unordered() is still called.
1862 FOP_CONDN_S(saf, (float32_unordered(fst1, fst0,
1863 &env->active_fpu.fp_status), 0))
1864 FOP_CONDN_S(sun, (float32_unordered(fst1, fst0,
1865 &env->active_fpu.fp_status)))
1866 FOP_CONDN_S(seq, (float32_eq(fst0, fst1,
1867 &env->active_fpu.fp_status)))
1868 FOP_CONDN_S(sueq, (float32_unordered(fst1, fst0,
1869 &env->active_fpu.fp_status)
1870 || float32_eq(fst0, fst1,
1871 &env->active_fpu.fp_status)))
1872 FOP_CONDN_S(slt, (float32_lt(fst0, fst1,
1873 &env->active_fpu.fp_status)))
1874 FOP_CONDN_S(sult, (float32_unordered(fst1, fst0,
1875 &env->active_fpu.fp_status)
1876 || float32_lt(fst0, fst1,
1877 &env->active_fpu.fp_status)))
1878 FOP_CONDN_S(sle, (float32_le(fst0, fst1,
1879 &env->active_fpu.fp_status)))
1880 FOP_CONDN_S(sule, (float32_unordered(fst1, fst0,
1881 &env->active_fpu.fp_status)
1882 || float32_le(fst0, fst1,
1883 &env->active_fpu.fp_status)))
1884 FOP_CONDN_S(or, (float32_le_quiet(fst1, fst0,
1885 &env->active_fpu.fp_status)
1886 || float32_le_quiet(fst0, fst1,
1887 &env->active_fpu.fp_status)))
1888 FOP_CONDN_S(une, (float32_unordered_quiet(fst1, fst0,
1889 &env->active_fpu.fp_status)
1890 || float32_lt_quiet(fst1, fst0,
1891 &env->active_fpu.fp_status)
1892 || float32_lt_quiet(fst0, fst1,
1893 &env->active_fpu.fp_status)))
1894 FOP_CONDN_S(ne, (float32_lt_quiet(fst1, fst0,
1895 &env->active_fpu.fp_status)
1896 || float32_lt_quiet(fst0, fst1,
1897 &env->active_fpu.fp_status)))
1898 FOP_CONDN_S(sor, (float32_le(fst1, fst0,
1899 &env->active_fpu.fp_status)
1900 || float32_le(fst0, fst1,
1901 &env->active_fpu.fp_status)))
1902 FOP_CONDN_S(sune, (float32_unordered(fst1, fst0,
1903 &env->active_fpu.fp_status)
1904 || float32_lt(fst1, fst0,
1905 &env->active_fpu.fp_status)
1906 || float32_lt(fst0, fst1,
1907 &env->active_fpu.fp_status)))
1908 FOP_CONDN_S(sne, (float32_lt(fst1, fst0,
1909 &env->active_fpu.fp_status)
1910 || float32_lt(fst0, fst1,
1911 &env->active_fpu.fp_status)))