2 * Helpers for emulation of FPU-related MIPS instructions.
4 * Copyright (C) 2004-2005 Jocelyn Mayer
5 * Copyright (C) 2020 Wave Computing, Inc.
6 * Copyright (C) 2020 Aleksandar Markovic <amarkovic@wavecomp.com>
8 * This library is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU Lesser General Public
10 * License as published by the Free Software Foundation; either
11 * version 2 of the License, or (at your option) any later version.
13 * This library is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * Lesser General Public License for more details.
18 * You should have received a copy of the GNU Lesser General Public
19 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
23 #include "qemu/osdep.h"
24 #include "qemu/main-loop.h"
27 #include "qemu/host-utils.h"
28 #include "exec/helper-proto.h"
29 #include "exec/exec-all.h"
30 #include "exec/cpu_ldst.h"
31 #include "exec/memop.h"
32 #include "sysemu/kvm.h"
33 #include "fpu/softfloat.h"
36 /* Complex FPU operations which may need stack space. */
38 #define FLOAT_TWO32 make_float32(1 << 30)
39 #define FLOAT_TWO64 make_float64(1ULL << 62)
41 #define FP_TO_INT32_OVERFLOW 0x7fffffff
42 #define FP_TO_INT64_OVERFLOW 0x7fffffffffffffffULL
44 /* convert MIPS rounding mode in FCR31 to IEEE library */
45 unsigned int ieee_rm
[] = {
46 float_round_nearest_even
,
52 target_ulong
helper_cfc1(CPUMIPSState
*env
, uint32_t reg
)
54 target_ulong arg1
= 0;
58 arg1
= (int32_t)env
->active_fpu
.fcr0
;
61 /* UFR Support - Read Status FR */
62 if (env
->active_fpu
.fcr0
& (1 << FCR0_UFRP
)) {
63 if (env
->CP0_Config5
& (1 << CP0C5_UFR
)) {
65 ((env
->CP0_Status
& (1 << CP0St_FR
)) >> CP0St_FR
);
67 do_raise_exception(env
, EXCP_RI
, GETPC());
72 /* FRE Support - read Config5.FRE bit */
73 if (env
->active_fpu
.fcr0
& (1 << FCR0_FREP
)) {
74 if (env
->CP0_Config5
& (1 << CP0C5_UFE
)) {
75 arg1
= (env
->CP0_Config5
>> CP0C5_FRE
) & 1;
77 helper_raise_exception(env
, EXCP_RI
);
82 arg1
= ((env
->active_fpu
.fcr31
>> 24) & 0xfe) |
83 ((env
->active_fpu
.fcr31
>> 23) & 0x1);
86 arg1
= env
->active_fpu
.fcr31
& 0x0003f07c;
89 arg1
= (env
->active_fpu
.fcr31
& 0x00000f83) |
90 ((env
->active_fpu
.fcr31
>> 22) & 0x4);
93 arg1
= (int32_t)env
->active_fpu
.fcr31
;
100 void helper_ctc1(CPUMIPSState
*env
, target_ulong arg1
, uint32_t fs
, uint32_t rt
)
104 /* UFR Alias - Reset Status FR */
105 if (!((env
->active_fpu
.fcr0
& (1 << FCR0_UFRP
)) && (rt
== 0))) {
108 if (env
->CP0_Config5
& (1 << CP0C5_UFR
)) {
109 env
->CP0_Status
&= ~(1 << CP0St_FR
);
112 do_raise_exception(env
, EXCP_RI
, GETPC());
116 /* UNFR Alias - Set Status FR */
117 if (!((env
->active_fpu
.fcr0
& (1 << FCR0_UFRP
)) && (rt
== 0))) {
120 if (env
->CP0_Config5
& (1 << CP0C5_UFR
)) {
121 env
->CP0_Status
|= (1 << CP0St_FR
);
124 do_raise_exception(env
, EXCP_RI
, GETPC());
128 /* FRE Support - clear Config5.FRE bit */
129 if (!((env
->active_fpu
.fcr0
& (1 << FCR0_FREP
)) && (rt
== 0))) {
132 if (env
->CP0_Config5
& (1 << CP0C5_UFE
)) {
133 env
->CP0_Config5
&= ~(1 << CP0C5_FRE
);
136 helper_raise_exception(env
, EXCP_RI
);
140 /* FRE Support - set Config5.FRE bit */
141 if (!((env
->active_fpu
.fcr0
& (1 << FCR0_FREP
)) && (rt
== 0))) {
144 if (env
->CP0_Config5
& (1 << CP0C5_UFE
)) {
145 env
->CP0_Config5
|= (1 << CP0C5_FRE
);
148 helper_raise_exception(env
, EXCP_RI
);
152 if ((env
->insn_flags
& ISA_MIPS32R6
) || (arg1
& 0xffffff00)) {
155 env
->active_fpu
.fcr31
= (env
->active_fpu
.fcr31
& 0x017fffff) |
156 ((arg1
& 0xfe) << 24) |
157 ((arg1
& 0x1) << 23);
160 if (arg1
& 0x007c0000) {
163 env
->active_fpu
.fcr31
= (env
->active_fpu
.fcr31
& 0xfffc0f83) |
167 if (arg1
& 0x007c0000) {
170 env
->active_fpu
.fcr31
= (env
->active_fpu
.fcr31
& 0xfefff07c) |
171 (arg1
& 0x00000f83) |
172 ((arg1
& 0x4) << 22);
175 env
->active_fpu
.fcr31
= (arg1
& env
->active_fpu
.fcr31_rw_bitmask
) |
176 (env
->active_fpu
.fcr31
& ~(env
->active_fpu
.fcr31_rw_bitmask
));
179 if (env
->insn_flags
& ISA_MIPS32R6
) {
180 do_raise_exception(env
, EXCP_RI
, GETPC());
184 restore_fp_status(env
);
185 set_float_exception_flags(0, &env
->active_fpu
.fp_status
);
186 if ((GET_FP_ENABLE(env
->active_fpu
.fcr31
) | 0x20) &
187 GET_FP_CAUSE(env
->active_fpu
.fcr31
)) {
188 do_raise_exception(env
, EXCP_FPE
, GETPC());
192 int ieee_ex_to_mips(int xcpt
)
196 if (xcpt
& float_flag_invalid
) {
199 if (xcpt
& float_flag_overflow
) {
202 if (xcpt
& float_flag_underflow
) {
205 if (xcpt
& float_flag_divbyzero
) {
208 if (xcpt
& float_flag_inexact
) {
215 static inline void update_fcr31(CPUMIPSState
*env
, uintptr_t pc
)
217 int tmp
= ieee_ex_to_mips(get_float_exception_flags(
218 &env
->active_fpu
.fp_status
));
220 SET_FP_CAUSE(env
->active_fpu
.fcr31
, tmp
);
223 set_float_exception_flags(0, &env
->active_fpu
.fp_status
);
225 if (GET_FP_ENABLE(env
->active_fpu
.fcr31
) & tmp
) {
226 do_raise_exception(env
, EXCP_FPE
, pc
);
228 UPDATE_FP_FLAGS(env
->active_fpu
.fcr31
, tmp
);
235 * Single precition routines have a "s" suffix, double precision a
236 * "d" suffix, 32bit integer "w", 64bit integer "l", paired single "ps",
237 * paired single lower "pl", paired single upper "pu".
240 /* unary operations, modifying fp status */
241 uint64_t helper_float_sqrt_d(CPUMIPSState
*env
, uint64_t fdt0
)
243 fdt0
= float64_sqrt(fdt0
, &env
->active_fpu
.fp_status
);
244 update_fcr31(env
, GETPC());
248 uint32_t helper_float_sqrt_s(CPUMIPSState
*env
, uint32_t fst0
)
250 fst0
= float32_sqrt(fst0
, &env
->active_fpu
.fp_status
);
251 update_fcr31(env
, GETPC());
255 uint64_t helper_float_cvtd_s(CPUMIPSState
*env
, uint32_t fst0
)
259 fdt2
= float32_to_float64(fst0
, &env
->active_fpu
.fp_status
);
260 update_fcr31(env
, GETPC());
264 uint64_t helper_float_cvtd_w(CPUMIPSState
*env
, uint32_t wt0
)
268 fdt2
= int32_to_float64(wt0
, &env
->active_fpu
.fp_status
);
269 update_fcr31(env
, GETPC());
273 uint64_t helper_float_cvtd_l(CPUMIPSState
*env
, uint64_t dt0
)
277 fdt2
= int64_to_float64(dt0
, &env
->active_fpu
.fp_status
);
278 update_fcr31(env
, GETPC());
282 uint64_t helper_float_cvt_l_d(CPUMIPSState
*env
, uint64_t fdt0
)
286 dt2
= float64_to_int64(fdt0
, &env
->active_fpu
.fp_status
);
287 if (get_float_exception_flags(&env
->active_fpu
.fp_status
)
288 & (float_flag_invalid
| float_flag_overflow
)) {
289 dt2
= FP_TO_INT64_OVERFLOW
;
291 update_fcr31(env
, GETPC());
295 uint64_t helper_float_cvt_l_s(CPUMIPSState
*env
, uint32_t fst0
)
299 dt2
= float32_to_int64(fst0
, &env
->active_fpu
.fp_status
);
300 if (get_float_exception_flags(&env
->active_fpu
.fp_status
)
301 & (float_flag_invalid
| float_flag_overflow
)) {
302 dt2
= FP_TO_INT64_OVERFLOW
;
304 update_fcr31(env
, GETPC());
308 uint64_t helper_float_cvtps_pw(CPUMIPSState
*env
, uint64_t dt0
)
313 fst2
= int32_to_float32(dt0
& 0XFFFFFFFF, &env
->active_fpu
.fp_status
);
314 fsth2
= int32_to_float32(dt0
>> 32, &env
->active_fpu
.fp_status
);
315 update_fcr31(env
, GETPC());
316 return ((uint64_t)fsth2
<< 32) | fst2
;
319 uint64_t helper_float_cvtpw_ps(CPUMIPSState
*env
, uint64_t fdt0
)
325 wt2
= float32_to_int32(fdt0
& 0XFFFFFFFF, &env
->active_fpu
.fp_status
);
326 excp
= get_float_exception_flags(&env
->active_fpu
.fp_status
);
327 if (excp
& (float_flag_overflow
| float_flag_invalid
)) {
328 wt2
= FP_TO_INT32_OVERFLOW
;
331 set_float_exception_flags(0, &env
->active_fpu
.fp_status
);
332 wth2
= float32_to_int32(fdt0
>> 32, &env
->active_fpu
.fp_status
);
333 excph
= get_float_exception_flags(&env
->active_fpu
.fp_status
);
334 if (excph
& (float_flag_overflow
| float_flag_invalid
)) {
335 wth2
= FP_TO_INT32_OVERFLOW
;
338 set_float_exception_flags(excp
| excph
, &env
->active_fpu
.fp_status
);
339 update_fcr31(env
, GETPC());
341 return ((uint64_t)wth2
<< 32) | wt2
;
344 uint32_t helper_float_cvts_d(CPUMIPSState
*env
, uint64_t fdt0
)
348 fst2
= float64_to_float32(fdt0
, &env
->active_fpu
.fp_status
);
349 update_fcr31(env
, GETPC());
353 uint32_t helper_float_cvts_w(CPUMIPSState
*env
, uint32_t wt0
)
357 fst2
= int32_to_float32(wt0
, &env
->active_fpu
.fp_status
);
358 update_fcr31(env
, GETPC());
362 uint32_t helper_float_cvts_l(CPUMIPSState
*env
, uint64_t dt0
)
366 fst2
= int64_to_float32(dt0
, &env
->active_fpu
.fp_status
);
367 update_fcr31(env
, GETPC());
371 uint32_t helper_float_cvts_pl(CPUMIPSState
*env
, uint32_t wt0
)
376 update_fcr31(env
, GETPC());
380 uint32_t helper_float_cvts_pu(CPUMIPSState
*env
, uint32_t wth0
)
385 update_fcr31(env
, GETPC());
389 uint32_t helper_float_cvt_w_s(CPUMIPSState
*env
, uint32_t fst0
)
393 wt2
= float32_to_int32(fst0
, &env
->active_fpu
.fp_status
);
394 if (get_float_exception_flags(&env
->active_fpu
.fp_status
)
395 & (float_flag_invalid
| float_flag_overflow
)) {
396 wt2
= FP_TO_INT32_OVERFLOW
;
398 update_fcr31(env
, GETPC());
402 uint32_t helper_float_cvt_w_d(CPUMIPSState
*env
, uint64_t fdt0
)
406 wt2
= float64_to_int32(fdt0
, &env
->active_fpu
.fp_status
);
407 if (get_float_exception_flags(&env
->active_fpu
.fp_status
)
408 & (float_flag_invalid
| float_flag_overflow
)) {
409 wt2
= FP_TO_INT32_OVERFLOW
;
411 update_fcr31(env
, GETPC());
415 uint64_t helper_float_round_l_d(CPUMIPSState
*env
, uint64_t fdt0
)
419 set_float_rounding_mode(float_round_nearest_even
,
420 &env
->active_fpu
.fp_status
);
421 dt2
= float64_to_int64(fdt0
, &env
->active_fpu
.fp_status
);
422 restore_rounding_mode(env
);
423 if (get_float_exception_flags(&env
->active_fpu
.fp_status
)
424 & (float_flag_invalid
| float_flag_overflow
)) {
425 dt2
= FP_TO_INT64_OVERFLOW
;
427 update_fcr31(env
, GETPC());
431 uint64_t helper_float_round_l_s(CPUMIPSState
*env
, uint32_t fst0
)
435 set_float_rounding_mode(float_round_nearest_even
,
436 &env
->active_fpu
.fp_status
);
437 dt2
= float32_to_int64(fst0
, &env
->active_fpu
.fp_status
);
438 restore_rounding_mode(env
);
439 if (get_float_exception_flags(&env
->active_fpu
.fp_status
)
440 & (float_flag_invalid
| float_flag_overflow
)) {
441 dt2
= FP_TO_INT64_OVERFLOW
;
443 update_fcr31(env
, GETPC());
447 uint32_t helper_float_round_w_d(CPUMIPSState
*env
, uint64_t fdt0
)
451 set_float_rounding_mode(float_round_nearest_even
,
452 &env
->active_fpu
.fp_status
);
453 wt2
= float64_to_int32(fdt0
, &env
->active_fpu
.fp_status
);
454 restore_rounding_mode(env
);
455 if (get_float_exception_flags(&env
->active_fpu
.fp_status
)
456 & (float_flag_invalid
| float_flag_overflow
)) {
457 wt2
= FP_TO_INT32_OVERFLOW
;
459 update_fcr31(env
, GETPC());
463 uint32_t helper_float_round_w_s(CPUMIPSState
*env
, uint32_t fst0
)
467 set_float_rounding_mode(float_round_nearest_even
,
468 &env
->active_fpu
.fp_status
);
469 wt2
= float32_to_int32(fst0
, &env
->active_fpu
.fp_status
);
470 restore_rounding_mode(env
);
471 if (get_float_exception_flags(&env
->active_fpu
.fp_status
)
472 & (float_flag_invalid
| float_flag_overflow
)) {
473 wt2
= FP_TO_INT32_OVERFLOW
;
475 update_fcr31(env
, GETPC());
479 uint64_t helper_float_trunc_l_d(CPUMIPSState
*env
, uint64_t fdt0
)
483 dt2
= float64_to_int64_round_to_zero(fdt0
,
484 &env
->active_fpu
.fp_status
);
485 if (get_float_exception_flags(&env
->active_fpu
.fp_status
)
486 & (float_flag_invalid
| float_flag_overflow
)) {
487 dt2
= FP_TO_INT64_OVERFLOW
;
489 update_fcr31(env
, GETPC());
493 uint64_t helper_float_trunc_l_s(CPUMIPSState
*env
, uint32_t fst0
)
497 dt2
= float32_to_int64_round_to_zero(fst0
, &env
->active_fpu
.fp_status
);
498 if (get_float_exception_flags(&env
->active_fpu
.fp_status
)
499 & (float_flag_invalid
| float_flag_overflow
)) {
500 dt2
= FP_TO_INT64_OVERFLOW
;
502 update_fcr31(env
, GETPC());
506 uint32_t helper_float_trunc_w_d(CPUMIPSState
*env
, uint64_t fdt0
)
510 wt2
= float64_to_int32_round_to_zero(fdt0
, &env
->active_fpu
.fp_status
);
511 if (get_float_exception_flags(&env
->active_fpu
.fp_status
)
512 & (float_flag_invalid
| float_flag_overflow
)) {
513 wt2
= FP_TO_INT32_OVERFLOW
;
515 update_fcr31(env
, GETPC());
519 uint32_t helper_float_trunc_w_s(CPUMIPSState
*env
, uint32_t fst0
)
523 wt2
= float32_to_int32_round_to_zero(fst0
, &env
->active_fpu
.fp_status
);
524 if (get_float_exception_flags(&env
->active_fpu
.fp_status
)
525 & (float_flag_invalid
| float_flag_overflow
)) {
526 wt2
= FP_TO_INT32_OVERFLOW
;
528 update_fcr31(env
, GETPC());
532 uint64_t helper_float_ceil_l_d(CPUMIPSState
*env
, uint64_t fdt0
)
536 set_float_rounding_mode(float_round_up
, &env
->active_fpu
.fp_status
);
537 dt2
= float64_to_int64(fdt0
, &env
->active_fpu
.fp_status
);
538 restore_rounding_mode(env
);
539 if (get_float_exception_flags(&env
->active_fpu
.fp_status
)
540 & (float_flag_invalid
| float_flag_overflow
)) {
541 dt2
= FP_TO_INT64_OVERFLOW
;
543 update_fcr31(env
, GETPC());
547 uint64_t helper_float_ceil_l_s(CPUMIPSState
*env
, uint32_t fst0
)
551 set_float_rounding_mode(float_round_up
, &env
->active_fpu
.fp_status
);
552 dt2
= float32_to_int64(fst0
, &env
->active_fpu
.fp_status
);
553 restore_rounding_mode(env
);
554 if (get_float_exception_flags(&env
->active_fpu
.fp_status
)
555 & (float_flag_invalid
| float_flag_overflow
)) {
556 dt2
= FP_TO_INT64_OVERFLOW
;
558 update_fcr31(env
, GETPC());
562 uint32_t helper_float_ceil_w_d(CPUMIPSState
*env
, uint64_t fdt0
)
566 set_float_rounding_mode(float_round_up
, &env
->active_fpu
.fp_status
);
567 wt2
= float64_to_int32(fdt0
, &env
->active_fpu
.fp_status
);
568 restore_rounding_mode(env
);
569 if (get_float_exception_flags(&env
->active_fpu
.fp_status
)
570 & (float_flag_invalid
| float_flag_overflow
)) {
571 wt2
= FP_TO_INT32_OVERFLOW
;
573 update_fcr31(env
, GETPC());
577 uint32_t helper_float_ceil_w_s(CPUMIPSState
*env
, uint32_t fst0
)
581 set_float_rounding_mode(float_round_up
, &env
->active_fpu
.fp_status
);
582 wt2
= float32_to_int32(fst0
, &env
->active_fpu
.fp_status
);
583 restore_rounding_mode(env
);
584 if (get_float_exception_flags(&env
->active_fpu
.fp_status
)
585 & (float_flag_invalid
| float_flag_overflow
)) {
586 wt2
= FP_TO_INT32_OVERFLOW
;
588 update_fcr31(env
, GETPC());
592 uint64_t helper_float_floor_l_d(CPUMIPSState
*env
, uint64_t fdt0
)
596 set_float_rounding_mode(float_round_down
, &env
->active_fpu
.fp_status
);
597 dt2
= float64_to_int64(fdt0
, &env
->active_fpu
.fp_status
);
598 restore_rounding_mode(env
);
599 if (get_float_exception_flags(&env
->active_fpu
.fp_status
)
600 & (float_flag_invalid
| float_flag_overflow
)) {
601 dt2
= FP_TO_INT64_OVERFLOW
;
603 update_fcr31(env
, GETPC());
607 uint64_t helper_float_floor_l_s(CPUMIPSState
*env
, uint32_t fst0
)
611 set_float_rounding_mode(float_round_down
, &env
->active_fpu
.fp_status
);
612 dt2
= float32_to_int64(fst0
, &env
->active_fpu
.fp_status
);
613 restore_rounding_mode(env
);
614 if (get_float_exception_flags(&env
->active_fpu
.fp_status
)
615 & (float_flag_invalid
| float_flag_overflow
)) {
616 dt2
= FP_TO_INT64_OVERFLOW
;
618 update_fcr31(env
, GETPC());
622 uint32_t helper_float_floor_w_d(CPUMIPSState
*env
, uint64_t fdt0
)
626 set_float_rounding_mode(float_round_down
, &env
->active_fpu
.fp_status
);
627 wt2
= float64_to_int32(fdt0
, &env
->active_fpu
.fp_status
);
628 restore_rounding_mode(env
);
629 if (get_float_exception_flags(&env
->active_fpu
.fp_status
)
630 & (float_flag_invalid
| float_flag_overflow
)) {
631 wt2
= FP_TO_INT32_OVERFLOW
;
633 update_fcr31(env
, GETPC());
637 uint32_t helper_float_floor_w_s(CPUMIPSState
*env
, uint32_t fst0
)
641 set_float_rounding_mode(float_round_down
, &env
->active_fpu
.fp_status
);
642 wt2
= float32_to_int32(fst0
, &env
->active_fpu
.fp_status
);
643 restore_rounding_mode(env
);
644 if (get_float_exception_flags(&env
->active_fpu
.fp_status
)
645 & (float_flag_invalid
| float_flag_overflow
)) {
646 wt2
= FP_TO_INT32_OVERFLOW
;
648 update_fcr31(env
, GETPC());
652 uint64_t helper_float_cvt_2008_l_d(CPUMIPSState
*env
, uint64_t fdt0
)
656 dt2
= float64_to_int64(fdt0
, &env
->active_fpu
.fp_status
);
657 if (get_float_exception_flags(&env
->active_fpu
.fp_status
)
658 & float_flag_invalid
) {
659 if (float64_is_any_nan(fdt0
)) {
663 update_fcr31(env
, GETPC());
667 uint64_t helper_float_cvt_2008_l_s(CPUMIPSState
*env
, uint32_t fst0
)
671 dt2
= float32_to_int64(fst0
, &env
->active_fpu
.fp_status
);
672 if (get_float_exception_flags(&env
->active_fpu
.fp_status
)
673 & float_flag_invalid
) {
674 if (float32_is_any_nan(fst0
)) {
678 update_fcr31(env
, GETPC());
682 uint32_t helper_float_cvt_2008_w_d(CPUMIPSState
*env
, uint64_t fdt0
)
686 wt2
= float64_to_int32(fdt0
, &env
->active_fpu
.fp_status
);
687 if (get_float_exception_flags(&env
->active_fpu
.fp_status
)
688 & float_flag_invalid
) {
689 if (float64_is_any_nan(fdt0
)) {
693 update_fcr31(env
, GETPC());
697 uint32_t helper_float_cvt_2008_w_s(CPUMIPSState
*env
, uint32_t fst0
)
701 wt2
= float32_to_int32(fst0
, &env
->active_fpu
.fp_status
);
702 if (get_float_exception_flags(&env
->active_fpu
.fp_status
)
703 & float_flag_invalid
) {
704 if (float32_is_any_nan(fst0
)) {
708 update_fcr31(env
, GETPC());
712 uint64_t helper_float_round_2008_l_d(CPUMIPSState
*env
, uint64_t fdt0
)
716 set_float_rounding_mode(float_round_nearest_even
,
717 &env
->active_fpu
.fp_status
);
718 dt2
= float64_to_int64(fdt0
, &env
->active_fpu
.fp_status
);
719 restore_rounding_mode(env
);
720 if (get_float_exception_flags(&env
->active_fpu
.fp_status
)
721 & float_flag_invalid
) {
722 if (float64_is_any_nan(fdt0
)) {
726 update_fcr31(env
, GETPC());
730 uint64_t helper_float_round_2008_l_s(CPUMIPSState
*env
, uint32_t fst0
)
734 set_float_rounding_mode(float_round_nearest_even
,
735 &env
->active_fpu
.fp_status
);
736 dt2
= float32_to_int64(fst0
, &env
->active_fpu
.fp_status
);
737 restore_rounding_mode(env
);
738 if (get_float_exception_flags(&env
->active_fpu
.fp_status
)
739 & float_flag_invalid
) {
740 if (float32_is_any_nan(fst0
)) {
744 update_fcr31(env
, GETPC());
748 uint32_t helper_float_round_2008_w_d(CPUMIPSState
*env
, uint64_t fdt0
)
752 set_float_rounding_mode(float_round_nearest_even
,
753 &env
->active_fpu
.fp_status
);
754 wt2
= float64_to_int32(fdt0
, &env
->active_fpu
.fp_status
);
755 restore_rounding_mode(env
);
756 if (get_float_exception_flags(&env
->active_fpu
.fp_status
)
757 & float_flag_invalid
) {
758 if (float64_is_any_nan(fdt0
)) {
762 update_fcr31(env
, GETPC());
766 uint32_t helper_float_round_2008_w_s(CPUMIPSState
*env
, uint32_t fst0
)
770 set_float_rounding_mode(float_round_nearest_even
,
771 &env
->active_fpu
.fp_status
);
772 wt2
= float32_to_int32(fst0
, &env
->active_fpu
.fp_status
);
773 restore_rounding_mode(env
);
774 if (get_float_exception_flags(&env
->active_fpu
.fp_status
)
775 & float_flag_invalid
) {
776 if (float32_is_any_nan(fst0
)) {
780 update_fcr31(env
, GETPC());
784 uint64_t helper_float_trunc_2008_l_d(CPUMIPSState
*env
, uint64_t fdt0
)
788 dt2
= float64_to_int64_round_to_zero(fdt0
, &env
->active_fpu
.fp_status
);
789 if (get_float_exception_flags(&env
->active_fpu
.fp_status
)
790 & float_flag_invalid
) {
791 if (float64_is_any_nan(fdt0
)) {
795 update_fcr31(env
, GETPC());
799 uint64_t helper_float_trunc_2008_l_s(CPUMIPSState
*env
, uint32_t fst0
)
803 dt2
= float32_to_int64_round_to_zero(fst0
, &env
->active_fpu
.fp_status
);
804 if (get_float_exception_flags(&env
->active_fpu
.fp_status
)
805 & float_flag_invalid
) {
806 if (float32_is_any_nan(fst0
)) {
810 update_fcr31(env
, GETPC());
814 uint32_t helper_float_trunc_2008_w_d(CPUMIPSState
*env
, uint64_t fdt0
)
818 wt2
= float64_to_int32_round_to_zero(fdt0
, &env
->active_fpu
.fp_status
);
819 if (get_float_exception_flags(&env
->active_fpu
.fp_status
)
820 & float_flag_invalid
) {
821 if (float64_is_any_nan(fdt0
)) {
825 update_fcr31(env
, GETPC());
829 uint32_t helper_float_trunc_2008_w_s(CPUMIPSState
*env
, uint32_t fst0
)
833 wt2
= float32_to_int32_round_to_zero(fst0
, &env
->active_fpu
.fp_status
);
834 if (get_float_exception_flags(&env
->active_fpu
.fp_status
)
835 & float_flag_invalid
) {
836 if (float32_is_any_nan(fst0
)) {
840 update_fcr31(env
, GETPC());
844 uint64_t helper_float_ceil_2008_l_d(CPUMIPSState
*env
, uint64_t fdt0
)
848 set_float_rounding_mode(float_round_up
, &env
->active_fpu
.fp_status
);
849 dt2
= float64_to_int64(fdt0
, &env
->active_fpu
.fp_status
);
850 restore_rounding_mode(env
);
851 if (get_float_exception_flags(&env
->active_fpu
.fp_status
)
852 & float_flag_invalid
) {
853 if (float64_is_any_nan(fdt0
)) {
857 update_fcr31(env
, GETPC());
861 uint64_t helper_float_ceil_2008_l_s(CPUMIPSState
*env
, uint32_t fst0
)
865 set_float_rounding_mode(float_round_up
, &env
->active_fpu
.fp_status
);
866 dt2
= float32_to_int64(fst0
, &env
->active_fpu
.fp_status
);
867 restore_rounding_mode(env
);
868 if (get_float_exception_flags(&env
->active_fpu
.fp_status
)
869 & float_flag_invalid
) {
870 if (float32_is_any_nan(fst0
)) {
874 update_fcr31(env
, GETPC());
878 uint32_t helper_float_ceil_2008_w_d(CPUMIPSState
*env
, uint64_t fdt0
)
882 set_float_rounding_mode(float_round_up
, &env
->active_fpu
.fp_status
);
883 wt2
= float64_to_int32(fdt0
, &env
->active_fpu
.fp_status
);
884 restore_rounding_mode(env
);
885 if (get_float_exception_flags(&env
->active_fpu
.fp_status
)
886 & float_flag_invalid
) {
887 if (float64_is_any_nan(fdt0
)) {
891 update_fcr31(env
, GETPC());
895 uint32_t helper_float_ceil_2008_w_s(CPUMIPSState
*env
, uint32_t fst0
)
899 set_float_rounding_mode(float_round_up
, &env
->active_fpu
.fp_status
);
900 wt2
= float32_to_int32(fst0
, &env
->active_fpu
.fp_status
);
901 restore_rounding_mode(env
);
902 if (get_float_exception_flags(&env
->active_fpu
.fp_status
)
903 & float_flag_invalid
) {
904 if (float32_is_any_nan(fst0
)) {
908 update_fcr31(env
, GETPC());
912 uint64_t helper_float_floor_2008_l_d(CPUMIPSState
*env
, uint64_t fdt0
)
916 set_float_rounding_mode(float_round_down
, &env
->active_fpu
.fp_status
);
917 dt2
= float64_to_int64(fdt0
, &env
->active_fpu
.fp_status
);
918 restore_rounding_mode(env
);
919 if (get_float_exception_flags(&env
->active_fpu
.fp_status
)
920 & float_flag_invalid
) {
921 if (float64_is_any_nan(fdt0
)) {
925 update_fcr31(env
, GETPC());
929 uint64_t helper_float_floor_2008_l_s(CPUMIPSState
*env
, uint32_t fst0
)
933 set_float_rounding_mode(float_round_down
, &env
->active_fpu
.fp_status
);
934 dt2
= float32_to_int64(fst0
, &env
->active_fpu
.fp_status
);
935 restore_rounding_mode(env
);
936 if (get_float_exception_flags(&env
->active_fpu
.fp_status
)
937 & float_flag_invalid
) {
938 if (float32_is_any_nan(fst0
)) {
942 update_fcr31(env
, GETPC());
946 uint32_t helper_float_floor_2008_w_d(CPUMIPSState
*env
, uint64_t fdt0
)
950 set_float_rounding_mode(float_round_down
, &env
->active_fpu
.fp_status
);
951 wt2
= float64_to_int32(fdt0
, &env
->active_fpu
.fp_status
);
952 restore_rounding_mode(env
);
953 if (get_float_exception_flags(&env
->active_fpu
.fp_status
)
954 & float_flag_invalid
) {
955 if (float64_is_any_nan(fdt0
)) {
959 update_fcr31(env
, GETPC());
963 uint32_t helper_float_floor_2008_w_s(CPUMIPSState
*env
, uint32_t fst0
)
967 set_float_rounding_mode(float_round_down
, &env
->active_fpu
.fp_status
);
968 wt2
= float32_to_int32(fst0
, &env
->active_fpu
.fp_status
);
969 restore_rounding_mode(env
);
970 if (get_float_exception_flags(&env
->active_fpu
.fp_status
)
971 & float_flag_invalid
) {
972 if (float32_is_any_nan(fst0
)) {
976 update_fcr31(env
, GETPC());
980 /* unary operations, not modifying fp status */
981 #define FLOAT_UNOP(name) \
982 uint64_t helper_float_ ## name ## _d(uint64_t fdt0) \
984 return float64_ ## name(fdt0); \
986 uint32_t helper_float_ ## name ## _s(uint32_t fst0) \
988 return float32_ ## name(fst0); \
990 uint64_t helper_float_ ## name ## _ps(uint64_t fdt0) \
995 wt0 = float32_ ## name(fdt0 & 0XFFFFFFFF); \
996 wth0 = float32_ ## name(fdt0 >> 32); \
997 return ((uint64_t)wth0 << 32) | wt0; \
1003 /* MIPS specific unary operations */
1004 uint64_t helper_float_recip_d(CPUMIPSState
*env
, uint64_t fdt0
)
1008 fdt2
= float64_div(float64_one
, fdt0
, &env
->active_fpu
.fp_status
);
1009 update_fcr31(env
, GETPC());
1013 uint32_t helper_float_recip_s(CPUMIPSState
*env
, uint32_t fst0
)
1017 fst2
= float32_div(float32_one
, fst0
, &env
->active_fpu
.fp_status
);
1018 update_fcr31(env
, GETPC());
1022 uint64_t helper_float_rsqrt_d(CPUMIPSState
*env
, uint64_t fdt0
)
1026 fdt2
= float64_sqrt(fdt0
, &env
->active_fpu
.fp_status
);
1027 fdt2
= float64_div(float64_one
, fdt2
, &env
->active_fpu
.fp_status
);
1028 update_fcr31(env
, GETPC());
1032 uint32_t helper_float_rsqrt_s(CPUMIPSState
*env
, uint32_t fst0
)
1036 fst2
= float32_sqrt(fst0
, &env
->active_fpu
.fp_status
);
1037 fst2
= float32_div(float32_one
, fst2
, &env
->active_fpu
.fp_status
);
1038 update_fcr31(env
, GETPC());
1042 uint64_t helper_float_recip1_d(CPUMIPSState
*env
, uint64_t fdt0
)
1046 fdt2
= float64_div(float64_one
, fdt0
, &env
->active_fpu
.fp_status
);
1047 update_fcr31(env
, GETPC());
1051 uint32_t helper_float_recip1_s(CPUMIPSState
*env
, uint32_t fst0
)
1055 fst2
= float32_div(float32_one
, fst0
, &env
->active_fpu
.fp_status
);
1056 update_fcr31(env
, GETPC());
1060 uint64_t helper_float_recip1_ps(CPUMIPSState
*env
, uint64_t fdt0
)
1065 fst2
= float32_div(float32_one
, fdt0
& 0XFFFFFFFF,
1066 &env
->active_fpu
.fp_status
);
1067 fsth2
= float32_div(float32_one
, fdt0
>> 32, &env
->active_fpu
.fp_status
);
1068 update_fcr31(env
, GETPC());
1069 return ((uint64_t)fsth2
<< 32) | fst2
;
1072 uint64_t helper_float_rsqrt1_d(CPUMIPSState
*env
, uint64_t fdt0
)
1076 fdt2
= float64_sqrt(fdt0
, &env
->active_fpu
.fp_status
);
1077 fdt2
= float64_div(float64_one
, fdt2
, &env
->active_fpu
.fp_status
);
1078 update_fcr31(env
, GETPC());
1082 uint32_t helper_float_rsqrt1_s(CPUMIPSState
*env
, uint32_t fst0
)
1086 fst2
= float32_sqrt(fst0
, &env
->active_fpu
.fp_status
);
1087 fst2
= float32_div(float32_one
, fst2
, &env
->active_fpu
.fp_status
);
1088 update_fcr31(env
, GETPC());
1092 uint64_t helper_float_rsqrt1_ps(CPUMIPSState
*env
, uint64_t fdt0
)
1097 fst2
= float32_sqrt(fdt0
& 0XFFFFFFFF, &env
->active_fpu
.fp_status
);
1098 fsth2
= float32_sqrt(fdt0
>> 32, &env
->active_fpu
.fp_status
);
1099 fst2
= float32_div(float32_one
, fst2
, &env
->active_fpu
.fp_status
);
1100 fsth2
= float32_div(float32_one
, fsth2
, &env
->active_fpu
.fp_status
);
1101 update_fcr31(env
, GETPC());
1102 return ((uint64_t)fsth2
<< 32) | fst2
;
1105 #define FLOAT_RINT(name, bits) \
1106 uint ## bits ## _t helper_float_ ## name(CPUMIPSState *env, \
1107 uint ## bits ## _t fs) \
1109 uint ## bits ## _t fdret; \
1111 fdret = float ## bits ## _round_to_int(fs, &env->active_fpu.fp_status); \
1112 update_fcr31(env, GETPC()); \
1116 FLOAT_RINT(rint_s
, 32)
1117 FLOAT_RINT(rint_d
, 64)
1120 #define FLOAT_CLASS_SIGNALING_NAN 0x001
1121 #define FLOAT_CLASS_QUIET_NAN 0x002
1122 #define FLOAT_CLASS_NEGATIVE_INFINITY 0x004
1123 #define FLOAT_CLASS_NEGATIVE_NORMAL 0x008
1124 #define FLOAT_CLASS_NEGATIVE_SUBNORMAL 0x010
1125 #define FLOAT_CLASS_NEGATIVE_ZERO 0x020
1126 #define FLOAT_CLASS_POSITIVE_INFINITY 0x040
1127 #define FLOAT_CLASS_POSITIVE_NORMAL 0x080
1128 #define FLOAT_CLASS_POSITIVE_SUBNORMAL 0x100
1129 #define FLOAT_CLASS_POSITIVE_ZERO 0x200
1131 #define FLOAT_CLASS(name, bits) \
1132 uint ## bits ## _t float_ ## name(uint ## bits ## _t arg, \
1133 float_status *status) \
1135 if (float ## bits ## _is_signaling_nan(arg, status)) { \
1136 return FLOAT_CLASS_SIGNALING_NAN; \
1137 } else if (float ## bits ## _is_quiet_nan(arg, status)) { \
1138 return FLOAT_CLASS_QUIET_NAN; \
1139 } else if (float ## bits ## _is_neg(arg)) { \
1140 if (float ## bits ## _is_infinity(arg)) { \
1141 return FLOAT_CLASS_NEGATIVE_INFINITY; \
1142 } else if (float ## bits ## _is_zero(arg)) { \
1143 return FLOAT_CLASS_NEGATIVE_ZERO; \
1144 } else if (float ## bits ## _is_zero_or_denormal(arg)) { \
1145 return FLOAT_CLASS_NEGATIVE_SUBNORMAL; \
1147 return FLOAT_CLASS_NEGATIVE_NORMAL; \
1150 if (float ## bits ## _is_infinity(arg)) { \
1151 return FLOAT_CLASS_POSITIVE_INFINITY; \
1152 } else if (float ## bits ## _is_zero(arg)) { \
1153 return FLOAT_CLASS_POSITIVE_ZERO; \
1154 } else if (float ## bits ## _is_zero_or_denormal(arg)) { \
1155 return FLOAT_CLASS_POSITIVE_SUBNORMAL; \
1157 return FLOAT_CLASS_POSITIVE_NORMAL; \
1162 uint ## bits ## _t helper_float_ ## name(CPUMIPSState *env, \
1163 uint ## bits ## _t arg) \
1165 return float_ ## name(arg, &env->active_fpu.fp_status); \
1168 FLOAT_CLASS(class_s
, 32)
1169 FLOAT_CLASS(class_d
, 64)
1172 /* binary operations */
1173 #define FLOAT_BINOP(name) \
1174 uint64_t helper_float_ ## name ## _d(CPUMIPSState *env, \
1175 uint64_t fdt0, uint64_t fdt1) \
1179 dt2 = float64_ ## name(fdt0, fdt1, &env->active_fpu.fp_status);\
1180 update_fcr31(env, GETPC()); \
1184 uint32_t helper_float_ ## name ## _s(CPUMIPSState *env, \
1185 uint32_t fst0, uint32_t fst1) \
1189 wt2 = float32_ ## name(fst0, fst1, &env->active_fpu.fp_status);\
1190 update_fcr31(env, GETPC()); \
1194 uint64_t helper_float_ ## name ## _ps(CPUMIPSState *env, \
1198 uint32_t fst0 = fdt0 & 0XFFFFFFFF; \
1199 uint32_t fsth0 = fdt0 >> 32; \
1200 uint32_t fst1 = fdt1 & 0XFFFFFFFF; \
1201 uint32_t fsth1 = fdt1 >> 32; \
1205 wt2 = float32_ ## name(fst0, fst1, &env->active_fpu.fp_status); \
1206 wth2 = float32_ ## name(fsth0, fsth1, &env->active_fpu.fp_status); \
1207 update_fcr31(env, GETPC()); \
1208 return ((uint64_t)wth2 << 32) | wt2; \
1217 /* MIPS specific binary operations */
1218 uint64_t helper_float_recip2_d(CPUMIPSState
*env
, uint64_t fdt0
, uint64_t fdt2
)
1220 fdt2
= float64_mul(fdt0
, fdt2
, &env
->active_fpu
.fp_status
);
1221 fdt2
= float64_chs(float64_sub(fdt2
, float64_one
,
1222 &env
->active_fpu
.fp_status
));
1223 update_fcr31(env
, GETPC());
1227 uint32_t helper_float_recip2_s(CPUMIPSState
*env
, uint32_t fst0
, uint32_t fst2
)
1229 fst2
= float32_mul(fst0
, fst2
, &env
->active_fpu
.fp_status
);
1230 fst2
= float32_chs(float32_sub(fst2
, float32_one
,
1231 &env
->active_fpu
.fp_status
));
1232 update_fcr31(env
, GETPC());
1236 uint64_t helper_float_recip2_ps(CPUMIPSState
*env
, uint64_t fdt0
, uint64_t fdt2
)
1238 uint32_t fst0
= fdt0
& 0XFFFFFFFF;
1239 uint32_t fsth0
= fdt0
>> 32;
1240 uint32_t fst2
= fdt2
& 0XFFFFFFFF;
1241 uint32_t fsth2
= fdt2
>> 32;
1243 fst2
= float32_mul(fst0
, fst2
, &env
->active_fpu
.fp_status
);
1244 fsth2
= float32_mul(fsth0
, fsth2
, &env
->active_fpu
.fp_status
);
1245 fst2
= float32_chs(float32_sub(fst2
, float32_one
,
1246 &env
->active_fpu
.fp_status
));
1247 fsth2
= float32_chs(float32_sub(fsth2
, float32_one
,
1248 &env
->active_fpu
.fp_status
));
1249 update_fcr31(env
, GETPC());
1250 return ((uint64_t)fsth2
<< 32) | fst2
;
1253 uint64_t helper_float_rsqrt2_d(CPUMIPSState
*env
, uint64_t fdt0
, uint64_t fdt2
)
1255 fdt2
= float64_mul(fdt0
, fdt2
, &env
->active_fpu
.fp_status
);
1256 fdt2
= float64_sub(fdt2
, float64_one
, &env
->active_fpu
.fp_status
);
1257 fdt2
= float64_chs(float64_div(fdt2
, FLOAT_TWO64
,
1258 &env
->active_fpu
.fp_status
));
1259 update_fcr31(env
, GETPC());
1263 uint32_t helper_float_rsqrt2_s(CPUMIPSState
*env
, uint32_t fst0
, uint32_t fst2
)
1265 fst2
= float32_mul(fst0
, fst2
, &env
->active_fpu
.fp_status
);
1266 fst2
= float32_sub(fst2
, float32_one
, &env
->active_fpu
.fp_status
);
1267 fst2
= float32_chs(float32_div(fst2
, FLOAT_TWO32
,
1268 &env
->active_fpu
.fp_status
));
1269 update_fcr31(env
, GETPC());
1273 uint64_t helper_float_rsqrt2_ps(CPUMIPSState
*env
, uint64_t fdt0
, uint64_t fdt2
)
1275 uint32_t fst0
= fdt0
& 0XFFFFFFFF;
1276 uint32_t fsth0
= fdt0
>> 32;
1277 uint32_t fst2
= fdt2
& 0XFFFFFFFF;
1278 uint32_t fsth2
= fdt2
>> 32;
1280 fst2
= float32_mul(fst0
, fst2
, &env
->active_fpu
.fp_status
);
1281 fsth2
= float32_mul(fsth0
, fsth2
, &env
->active_fpu
.fp_status
);
1282 fst2
= float32_sub(fst2
, float32_one
, &env
->active_fpu
.fp_status
);
1283 fsth2
= float32_sub(fsth2
, float32_one
, &env
->active_fpu
.fp_status
);
1284 fst2
= float32_chs(float32_div(fst2
, FLOAT_TWO32
,
1285 &env
->active_fpu
.fp_status
));
1286 fsth2
= float32_chs(float32_div(fsth2
, FLOAT_TWO32
,
1287 &env
->active_fpu
.fp_status
));
1288 update_fcr31(env
, GETPC());
1289 return ((uint64_t)fsth2
<< 32) | fst2
;
1292 uint64_t helper_float_addr_ps(CPUMIPSState
*env
, uint64_t fdt0
, uint64_t fdt1
)
1294 uint32_t fst0
= fdt0
& 0XFFFFFFFF;
1295 uint32_t fsth0
= fdt0
>> 32;
1296 uint32_t fst1
= fdt1
& 0XFFFFFFFF;
1297 uint32_t fsth1
= fdt1
>> 32;
1301 fst2
= float32_add(fst0
, fsth0
, &env
->active_fpu
.fp_status
);
1302 fsth2
= float32_add(fst1
, fsth1
, &env
->active_fpu
.fp_status
);
1303 update_fcr31(env
, GETPC());
1304 return ((uint64_t)fsth2
<< 32) | fst2
;
1307 uint64_t helper_float_mulr_ps(CPUMIPSState
*env
, uint64_t fdt0
, uint64_t fdt1
)
1309 uint32_t fst0
= fdt0
& 0XFFFFFFFF;
1310 uint32_t fsth0
= fdt0
>> 32;
1311 uint32_t fst1
= fdt1
& 0XFFFFFFFF;
1312 uint32_t fsth1
= fdt1
>> 32;
1316 fst2
= float32_mul(fst0
, fsth0
, &env
->active_fpu
.fp_status
);
1317 fsth2
= float32_mul(fst1
, fsth1
, &env
->active_fpu
.fp_status
);
1318 update_fcr31(env
, GETPC());
1319 return ((uint64_t)fsth2
<< 32) | fst2
;
1322 #define FLOAT_MINMAX(name, bits, minmaxfunc) \
1323 uint ## bits ## _t helper_float_ ## name(CPUMIPSState *env, \
1324 uint ## bits ## _t fs, \
1325 uint ## bits ## _t ft) \
1327 uint ## bits ## _t fdret; \
1329 fdret = float ## bits ## _ ## minmaxfunc(fs, ft, \
1330 &env->active_fpu.fp_status); \
1331 update_fcr31(env, GETPC()); \
1335 FLOAT_MINMAX(max_s
, 32, maxnum
)
1336 FLOAT_MINMAX(max_d
, 64, maxnum
)
1337 FLOAT_MINMAX(maxa_s
, 32, maxnummag
)
1338 FLOAT_MINMAX(maxa_d
, 64, maxnummag
)
1340 FLOAT_MINMAX(min_s
, 32, minnum
)
1341 FLOAT_MINMAX(min_d
, 64, minnum
)
1342 FLOAT_MINMAX(mina_s
, 32, minnummag
)
1343 FLOAT_MINMAX(mina_d
, 64, minnummag
)
1346 /* ternary operations */
1347 #define UNFUSED_FMA(prefix, a, b, c, flags) \
1349 a = prefix##_mul(a, b, &env->active_fpu.fp_status); \
1350 if ((flags) & float_muladd_negate_c) { \
1351 a = prefix##_sub(a, c, &env->active_fpu.fp_status); \
1353 a = prefix##_add(a, c, &env->active_fpu.fp_status); \
1355 if ((flags) & float_muladd_negate_result) { \
1356 a = prefix##_chs(a); \
1360 /* FMA based operations */
1361 #define FLOAT_FMA(name, type) \
1362 uint64_t helper_float_ ## name ## _d(CPUMIPSState *env, \
1363 uint64_t fdt0, uint64_t fdt1, \
1366 UNFUSED_FMA(float64, fdt0, fdt1, fdt2, type); \
1367 update_fcr31(env, GETPC()); \
1371 uint32_t helper_float_ ## name ## _s(CPUMIPSState *env, \
1372 uint32_t fst0, uint32_t fst1, \
1375 UNFUSED_FMA(float32, fst0, fst1, fst2, type); \
1376 update_fcr31(env, GETPC()); \
1380 uint64_t helper_float_ ## name ## _ps(CPUMIPSState *env, \
1381 uint64_t fdt0, uint64_t fdt1, \
1384 uint32_t fst0 = fdt0 & 0XFFFFFFFF; \
1385 uint32_t fsth0 = fdt0 >> 32; \
1386 uint32_t fst1 = fdt1 & 0XFFFFFFFF; \
1387 uint32_t fsth1 = fdt1 >> 32; \
1388 uint32_t fst2 = fdt2 & 0XFFFFFFFF; \
1389 uint32_t fsth2 = fdt2 >> 32; \
1391 UNFUSED_FMA(float32, fst0, fst1, fst2, type); \
1392 UNFUSED_FMA(float32, fsth0, fsth1, fsth2, type); \
1393 update_fcr31(env, GETPC()); \
1394 return ((uint64_t)fsth0 << 32) | fst0; \
1397 FLOAT_FMA(msub
, float_muladd_negate_c
)
1398 FLOAT_FMA(nmadd
, float_muladd_negate_result
)
1399 FLOAT_FMA(nmsub
, float_muladd_negate_result
| float_muladd_negate_c
)
1402 #define FLOAT_FMADDSUB(name, bits, muladd_arg) \
1403 uint ## bits ## _t helper_float_ ## name(CPUMIPSState *env, \
1404 uint ## bits ## _t fs, \
1405 uint ## bits ## _t ft, \
1406 uint ## bits ## _t fd) \
1408 uint ## bits ## _t fdret; \
1410 fdret = float ## bits ## _muladd(fs, ft, fd, muladd_arg, \
1411 &env->active_fpu.fp_status); \
1412 update_fcr31(env, GETPC()); \
1416 FLOAT_FMADDSUB(maddf_s
, 32, 0)
1417 FLOAT_FMADDSUB(maddf_d
, 64, 0)
1418 FLOAT_FMADDSUB(msubf_s
, 32, float_muladd_negate_product
)
1419 FLOAT_FMADDSUB(msubf_d
, 64, float_muladd_negate_product
)
1420 #undef FLOAT_FMADDSUB
1422 /* compare operations */
1423 #define FOP_COND_D(op, cond) \
1424 void helper_cmp_d_ ## op(CPUMIPSState *env, uint64_t fdt0, \
1425 uint64_t fdt1, int cc) \
1429 update_fcr31(env, GETPC()); \
1431 SET_FP_COND(cc, env->active_fpu); \
1433 CLEAR_FP_COND(cc, env->active_fpu); \
1435 void helper_cmpabs_d_ ## op(CPUMIPSState *env, uint64_t fdt0, \
1436 uint64_t fdt1, int cc) \
1439 fdt0 = float64_abs(fdt0); \
1440 fdt1 = float64_abs(fdt1); \
1442 update_fcr31(env, GETPC()); \
1444 SET_FP_COND(cc, env->active_fpu); \
1446 CLEAR_FP_COND(cc, env->active_fpu); \
1450 * NOTE: the comma operator will make "cond" to eval to false,
1451 * but float64_unordered_quiet() is still called.
1453 FOP_COND_D(f
, (float64_unordered_quiet(fdt1
, fdt0
,
1454 &env
->active_fpu
.fp_status
), 0))
1455 FOP_COND_D(un
, float64_unordered_quiet(fdt1
, fdt0
,
1456 &env
->active_fpu
.fp_status
))
1457 FOP_COND_D(eq
, float64_eq_quiet(fdt0
, fdt1
,
1458 &env
->active_fpu
.fp_status
))
1459 FOP_COND_D(ueq
, float64_unordered_quiet(fdt1
, fdt0
,
1460 &env
->active_fpu
.fp_status
)
1461 || float64_eq_quiet(fdt0
, fdt1
,
1462 &env
->active_fpu
.fp_status
))
1463 FOP_COND_D(olt
, float64_lt_quiet(fdt0
, fdt1
,
1464 &env
->active_fpu
.fp_status
))
1465 FOP_COND_D(ult
, float64_unordered_quiet(fdt1
, fdt0
,
1466 &env
->active_fpu
.fp_status
)
1467 || float64_lt_quiet(fdt0
, fdt1
,
1468 &env
->active_fpu
.fp_status
))
1469 FOP_COND_D(ole
, float64_le_quiet(fdt0
, fdt1
,
1470 &env
->active_fpu
.fp_status
))
1471 FOP_COND_D(ule
, float64_unordered_quiet(fdt1
, fdt0
,
1472 &env
->active_fpu
.fp_status
)
1473 || float64_le_quiet(fdt0
, fdt1
,
1474 &env
->active_fpu
.fp_status
))
1476 * NOTE: the comma operator will make "cond" to eval to false,
1477 * but float64_unordered() is still called.
1479 FOP_COND_D(sf
, (float64_unordered(fdt1
, fdt0
,
1480 &env
->active_fpu
.fp_status
), 0))
1481 FOP_COND_D(ngle
, float64_unordered(fdt1
, fdt0
,
1482 &env
->active_fpu
.fp_status
))
1483 FOP_COND_D(seq
, float64_eq(fdt0
, fdt1
,
1484 &env
->active_fpu
.fp_status
))
1485 FOP_COND_D(ngl
, float64_unordered(fdt1
, fdt0
,
1486 &env
->active_fpu
.fp_status
)
1487 || float64_eq(fdt0
, fdt1
,
1488 &env
->active_fpu
.fp_status
))
1489 FOP_COND_D(lt
, float64_lt(fdt0
, fdt1
,
1490 &env
->active_fpu
.fp_status
))
1491 FOP_COND_D(nge
, float64_unordered(fdt1
, fdt0
,
1492 &env
->active_fpu
.fp_status
)
1493 || float64_lt(fdt0
, fdt1
,
1494 &env
->active_fpu
.fp_status
))
1495 FOP_COND_D(le
, float64_le(fdt0
, fdt1
,
1496 &env
->active_fpu
.fp_status
))
1497 FOP_COND_D(ngt
, float64_unordered(fdt1
, fdt0
,
1498 &env
->active_fpu
.fp_status
)
1499 || float64_le(fdt0
, fdt1
,
1500 &env
->active_fpu
.fp_status
))
1502 #define FOP_COND_S(op, cond) \
1503 void helper_cmp_s_ ## op(CPUMIPSState *env, uint32_t fst0, \
1504 uint32_t fst1, int cc) \
1508 update_fcr31(env, GETPC()); \
1510 SET_FP_COND(cc, env->active_fpu); \
1512 CLEAR_FP_COND(cc, env->active_fpu); \
1514 void helper_cmpabs_s_ ## op(CPUMIPSState *env, uint32_t fst0, \
1515 uint32_t fst1, int cc) \
1518 fst0 = float32_abs(fst0); \
1519 fst1 = float32_abs(fst1); \
1521 update_fcr31(env, GETPC()); \
1523 SET_FP_COND(cc, env->active_fpu); \
1525 CLEAR_FP_COND(cc, env->active_fpu); \
1529 * NOTE: the comma operator will make "cond" to eval to false,
1530 * but float32_unordered_quiet() is still called.
1532 FOP_COND_S(f
, (float32_unordered_quiet(fst1
, fst0
,
1533 &env
->active_fpu
.fp_status
), 0))
1534 FOP_COND_S(un
, float32_unordered_quiet(fst1
, fst0
,
1535 &env
->active_fpu
.fp_status
))
1536 FOP_COND_S(eq
, float32_eq_quiet(fst0
, fst1
,
1537 &env
->active_fpu
.fp_status
))
1538 FOP_COND_S(ueq
, float32_unordered_quiet(fst1
, fst0
,
1539 &env
->active_fpu
.fp_status
)
1540 || float32_eq_quiet(fst0
, fst1
,
1541 &env
->active_fpu
.fp_status
))
1542 FOP_COND_S(olt
, float32_lt_quiet(fst0
, fst1
,
1543 &env
->active_fpu
.fp_status
))
1544 FOP_COND_S(ult
, float32_unordered_quiet(fst1
, fst0
,
1545 &env
->active_fpu
.fp_status
)
1546 || float32_lt_quiet(fst0
, fst1
,
1547 &env
->active_fpu
.fp_status
))
1548 FOP_COND_S(ole
, float32_le_quiet(fst0
, fst1
,
1549 &env
->active_fpu
.fp_status
))
1550 FOP_COND_S(ule
, float32_unordered_quiet(fst1
, fst0
,
1551 &env
->active_fpu
.fp_status
)
1552 || float32_le_quiet(fst0
, fst1
,
1553 &env
->active_fpu
.fp_status
))
1555 * NOTE: the comma operator will make "cond" to eval to false,
1556 * but float32_unordered() is still called.
1558 FOP_COND_S(sf
, (float32_unordered(fst1
, fst0
,
1559 &env
->active_fpu
.fp_status
), 0))
1560 FOP_COND_S(ngle
, float32_unordered(fst1
, fst0
,
1561 &env
->active_fpu
.fp_status
))
1562 FOP_COND_S(seq
, float32_eq(fst0
, fst1
,
1563 &env
->active_fpu
.fp_status
))
1564 FOP_COND_S(ngl
, float32_unordered(fst1
, fst0
,
1565 &env
->active_fpu
.fp_status
)
1566 || float32_eq(fst0
, fst1
,
1567 &env
->active_fpu
.fp_status
))
1568 FOP_COND_S(lt
, float32_lt(fst0
, fst1
,
1569 &env
->active_fpu
.fp_status
))
1570 FOP_COND_S(nge
, float32_unordered(fst1
, fst0
,
1571 &env
->active_fpu
.fp_status
)
1572 || float32_lt(fst0
, fst1
,
1573 &env
->active_fpu
.fp_status
))
1574 FOP_COND_S(le
, float32_le(fst0
, fst1
,
1575 &env
->active_fpu
.fp_status
))
1576 FOP_COND_S(ngt
, float32_unordered(fst1
, fst0
,
1577 &env
->active_fpu
.fp_status
)
1578 || float32_le(fst0
, fst1
,
1579 &env
->active_fpu
.fp_status
))
1581 #define FOP_COND_PS(op, condl, condh) \
1582 void helper_cmp_ps_ ## op(CPUMIPSState *env, uint64_t fdt0, \
1583 uint64_t fdt1, int cc) \
1585 uint32_t fst0, fsth0, fst1, fsth1; \
1587 fst0 = fdt0 & 0XFFFFFFFF; \
1588 fsth0 = fdt0 >> 32; \
1589 fst1 = fdt1 & 0XFFFFFFFF; \
1590 fsth1 = fdt1 >> 32; \
1593 update_fcr31(env, GETPC()); \
1595 SET_FP_COND(cc, env->active_fpu); \
1597 CLEAR_FP_COND(cc, env->active_fpu); \
1599 SET_FP_COND(cc + 1, env->active_fpu); \
1601 CLEAR_FP_COND(cc + 1, env->active_fpu); \
1603 void helper_cmpabs_ps_ ## op(CPUMIPSState *env, uint64_t fdt0, \
1604 uint64_t fdt1, int cc) \
1606 uint32_t fst0, fsth0, fst1, fsth1; \
1608 fst0 = float32_abs(fdt0 & 0XFFFFFFFF); \
1609 fsth0 = float32_abs(fdt0 >> 32); \
1610 fst1 = float32_abs(fdt1 & 0XFFFFFFFF); \
1611 fsth1 = float32_abs(fdt1 >> 32); \
1614 update_fcr31(env, GETPC()); \
1616 SET_FP_COND(cc, env->active_fpu); \
1618 CLEAR_FP_COND(cc, env->active_fpu); \
1620 SET_FP_COND(cc + 1, env->active_fpu); \
1622 CLEAR_FP_COND(cc + 1, env->active_fpu); \
1626 * NOTE: the comma operator will make "cond" to eval to false,
1627 * but float32_unordered_quiet() is still called.
1629 FOP_COND_PS(f
, (float32_unordered_quiet(fst1
, fst0
,
1630 &env
->active_fpu
.fp_status
), 0),
1631 (float32_unordered_quiet(fsth1
, fsth0
,
1632 &env
->active_fpu
.fp_status
), 0))
1633 FOP_COND_PS(un
, float32_unordered_quiet(fst1
, fst0
,
1634 &env
->active_fpu
.fp_status
),
1635 float32_unordered_quiet(fsth1
, fsth0
,
1636 &env
->active_fpu
.fp_status
))
1637 FOP_COND_PS(eq
, float32_eq_quiet(fst0
, fst1
,
1638 &env
->active_fpu
.fp_status
),
1639 float32_eq_quiet(fsth0
, fsth1
,
1640 &env
->active_fpu
.fp_status
))
1641 FOP_COND_PS(ueq
, float32_unordered_quiet(fst1
, fst0
,
1642 &env
->active_fpu
.fp_status
)
1643 || float32_eq_quiet(fst0
, fst1
,
1644 &env
->active_fpu
.fp_status
),
1645 float32_unordered_quiet(fsth1
, fsth0
,
1646 &env
->active_fpu
.fp_status
)
1647 || float32_eq_quiet(fsth0
, fsth1
,
1648 &env
->active_fpu
.fp_status
))
1649 FOP_COND_PS(olt
, float32_lt_quiet(fst0
, fst1
,
1650 &env
->active_fpu
.fp_status
),
1651 float32_lt_quiet(fsth0
, fsth1
,
1652 &env
->active_fpu
.fp_status
))
1653 FOP_COND_PS(ult
, float32_unordered_quiet(fst1
, fst0
,
1654 &env
->active_fpu
.fp_status
)
1655 || float32_lt_quiet(fst0
, fst1
,
1656 &env
->active_fpu
.fp_status
),
1657 float32_unordered_quiet(fsth1
, fsth0
,
1658 &env
->active_fpu
.fp_status
)
1659 || float32_lt_quiet(fsth0
, fsth1
,
1660 &env
->active_fpu
.fp_status
))
1661 FOP_COND_PS(ole
, float32_le_quiet(fst0
, fst1
,
1662 &env
->active_fpu
.fp_status
),
1663 float32_le_quiet(fsth0
, fsth1
,
1664 &env
->active_fpu
.fp_status
))
1665 FOP_COND_PS(ule
, float32_unordered_quiet(fst1
, fst0
,
1666 &env
->active_fpu
.fp_status
)
1667 || float32_le_quiet(fst0
, fst1
,
1668 &env
->active_fpu
.fp_status
),
1669 float32_unordered_quiet(fsth1
, fsth0
,
1670 &env
->active_fpu
.fp_status
)
1671 || float32_le_quiet(fsth0
, fsth1
,
1672 &env
->active_fpu
.fp_status
))
1674 * NOTE: the comma operator will make "cond" to eval to false,
1675 * but float32_unordered() is still called.
1677 FOP_COND_PS(sf
, (float32_unordered(fst1
, fst0
,
1678 &env
->active_fpu
.fp_status
), 0),
1679 (float32_unordered(fsth1
, fsth0
,
1680 &env
->active_fpu
.fp_status
), 0))
1681 FOP_COND_PS(ngle
, float32_unordered(fst1
, fst0
,
1682 &env
->active_fpu
.fp_status
),
1683 float32_unordered(fsth1
, fsth0
,
1684 &env
->active_fpu
.fp_status
))
1685 FOP_COND_PS(seq
, float32_eq(fst0
, fst1
,
1686 &env
->active_fpu
.fp_status
),
1687 float32_eq(fsth0
, fsth1
,
1688 &env
->active_fpu
.fp_status
))
1689 FOP_COND_PS(ngl
, float32_unordered(fst1
, fst0
,
1690 &env
->active_fpu
.fp_status
)
1691 || float32_eq(fst0
, fst1
,
1692 &env
->active_fpu
.fp_status
),
1693 float32_unordered(fsth1
, fsth0
,
1694 &env
->active_fpu
.fp_status
)
1695 || float32_eq(fsth0
, fsth1
,
1696 &env
->active_fpu
.fp_status
))
1697 FOP_COND_PS(lt
, float32_lt(fst0
, fst1
,
1698 &env
->active_fpu
.fp_status
),
1699 float32_lt(fsth0
, fsth1
,
1700 &env
->active_fpu
.fp_status
))
1701 FOP_COND_PS(nge
, float32_unordered(fst1
, fst0
,
1702 &env
->active_fpu
.fp_status
)
1703 || float32_lt(fst0
, fst1
,
1704 &env
->active_fpu
.fp_status
),
1705 float32_unordered(fsth1
, fsth0
,
1706 &env
->active_fpu
.fp_status
)
1707 || float32_lt(fsth0
, fsth1
,
1708 &env
->active_fpu
.fp_status
))
1709 FOP_COND_PS(le
, float32_le(fst0
, fst1
,
1710 &env
->active_fpu
.fp_status
),
1711 float32_le(fsth0
, fsth1
,
1712 &env
->active_fpu
.fp_status
))
1713 FOP_COND_PS(ngt
, float32_unordered(fst1
, fst0
,
1714 &env
->active_fpu
.fp_status
)
1715 || float32_le(fst0
, fst1
,
1716 &env
->active_fpu
.fp_status
),
1717 float32_unordered(fsth1
, fsth0
,
1718 &env
->active_fpu
.fp_status
)
1719 || float32_le(fsth0
, fsth1
,
1720 &env
->active_fpu
.fp_status
))
1722 /* R6 compare operations */
1723 #define FOP_CONDN_D(op, cond) \
1724 uint64_t helper_r6_cmp_d_ ## op(CPUMIPSState *env, uint64_t fdt0, \
1729 update_fcr31(env, GETPC()); \
1738 * NOTE: the comma operator will make "cond" to eval to false,
1739 * but float64_unordered_quiet() is still called.
1741 FOP_CONDN_D(af
, (float64_unordered_quiet(fdt1
, fdt0
,
1742 &env
->active_fpu
.fp_status
), 0))
1743 FOP_CONDN_D(un
, (float64_unordered_quiet(fdt1
, fdt0
,
1744 &env
->active_fpu
.fp_status
)))
1745 FOP_CONDN_D(eq
, (float64_eq_quiet(fdt0
, fdt1
,
1746 &env
->active_fpu
.fp_status
)))
1747 FOP_CONDN_D(ueq
, (float64_unordered_quiet(fdt1
, fdt0
,
1748 &env
->active_fpu
.fp_status
)
1749 || float64_eq_quiet(fdt0
, fdt1
,
1750 &env
->active_fpu
.fp_status
)))
1751 FOP_CONDN_D(lt
, (float64_lt_quiet(fdt0
, fdt1
,
1752 &env
->active_fpu
.fp_status
)))
1753 FOP_CONDN_D(ult
, (float64_unordered_quiet(fdt1
, fdt0
,
1754 &env
->active_fpu
.fp_status
)
1755 || float64_lt_quiet(fdt0
, fdt1
,
1756 &env
->active_fpu
.fp_status
)))
1757 FOP_CONDN_D(le
, (float64_le_quiet(fdt0
, fdt1
,
1758 &env
->active_fpu
.fp_status
)))
1759 FOP_CONDN_D(ule
, (float64_unordered_quiet(fdt1
, fdt0
,
1760 &env
->active_fpu
.fp_status
)
1761 || float64_le_quiet(fdt0
, fdt1
,
1762 &env
->active_fpu
.fp_status
)))
1764 * NOTE: the comma operator will make "cond" to eval to false,
1765 * but float64_unordered() is still called.\
1767 FOP_CONDN_D(saf
, (float64_unordered(fdt1
, fdt0
,
1768 &env
->active_fpu
.fp_status
), 0))
1769 FOP_CONDN_D(sun
, (float64_unordered(fdt1
, fdt0
,
1770 &env
->active_fpu
.fp_status
)))
1771 FOP_CONDN_D(seq
, (float64_eq(fdt0
, fdt1
,
1772 &env
->active_fpu
.fp_status
)))
1773 FOP_CONDN_D(sueq
, (float64_unordered(fdt1
, fdt0
,
1774 &env
->active_fpu
.fp_status
)
1775 || float64_eq(fdt0
, fdt1
,
1776 &env
->active_fpu
.fp_status
)))
1777 FOP_CONDN_D(slt
, (float64_lt(fdt0
, fdt1
,
1778 &env
->active_fpu
.fp_status
)))
1779 FOP_CONDN_D(sult
, (float64_unordered(fdt1
, fdt0
,
1780 &env
->active_fpu
.fp_status
)
1781 || float64_lt(fdt0
, fdt1
,
1782 &env
->active_fpu
.fp_status
)))
1783 FOP_CONDN_D(sle
, (float64_le(fdt0
, fdt1
,
1784 &env
->active_fpu
.fp_status
)))
1785 FOP_CONDN_D(sule
, (float64_unordered(fdt1
, fdt0
,
1786 &env
->active_fpu
.fp_status
)
1787 || float64_le(fdt0
, fdt1
,
1788 &env
->active_fpu
.fp_status
)))
1789 FOP_CONDN_D(or, (float64_le_quiet(fdt1
, fdt0
,
1790 &env
->active_fpu
.fp_status
)
1791 || float64_le_quiet(fdt0
, fdt1
,
1792 &env
->active_fpu
.fp_status
)))
1793 FOP_CONDN_D(une
, (float64_unordered_quiet(fdt1
, fdt0
,
1794 &env
->active_fpu
.fp_status
)
1795 || float64_lt_quiet(fdt1
, fdt0
,
1796 &env
->active_fpu
.fp_status
)
1797 || float64_lt_quiet(fdt0
, fdt1
,
1798 &env
->active_fpu
.fp_status
)))
1799 FOP_CONDN_D(ne
, (float64_lt_quiet(fdt1
, fdt0
,
1800 &env
->active_fpu
.fp_status
)
1801 || float64_lt_quiet(fdt0
, fdt1
,
1802 &env
->active_fpu
.fp_status
)))
1803 FOP_CONDN_D(sor
, (float64_le(fdt1
, fdt0
,
1804 &env
->active_fpu
.fp_status
)
1805 || float64_le(fdt0
, fdt1
,
1806 &env
->active_fpu
.fp_status
)))
1807 FOP_CONDN_D(sune
, (float64_unordered(fdt1
, fdt0
,
1808 &env
->active_fpu
.fp_status
)
1809 || float64_lt(fdt1
, fdt0
,
1810 &env
->active_fpu
.fp_status
)
1811 || float64_lt(fdt0
, fdt1
,
1812 &env
->active_fpu
.fp_status
)))
1813 FOP_CONDN_D(sne
, (float64_lt(fdt1
, fdt0
,
1814 &env
->active_fpu
.fp_status
)
1815 || float64_lt(fdt0
, fdt1
,
1816 &env
->active_fpu
.fp_status
)))
1818 #define FOP_CONDN_S(op, cond) \
1819 uint32_t helper_r6_cmp_s_ ## op(CPUMIPSState *env, uint32_t fst0, \
1824 update_fcr31(env, GETPC()); \
1833 * NOTE: the comma operator will make "cond" to eval to false,
1834 * but float32_unordered_quiet() is still called.
1836 FOP_CONDN_S(af
, (float32_unordered_quiet(fst1
, fst0
,
1837 &env
->active_fpu
.fp_status
), 0))
1838 FOP_CONDN_S(un
, (float32_unordered_quiet(fst1
, fst0
,
1839 &env
->active_fpu
.fp_status
)))
1840 FOP_CONDN_S(eq
, (float32_eq_quiet(fst0
, fst1
,
1841 &env
->active_fpu
.fp_status
)))
1842 FOP_CONDN_S(ueq
, (float32_unordered_quiet(fst1
, fst0
,
1843 &env
->active_fpu
.fp_status
)
1844 || float32_eq_quiet(fst0
, fst1
,
1845 &env
->active_fpu
.fp_status
)))
1846 FOP_CONDN_S(lt
, (float32_lt_quiet(fst0
, fst1
,
1847 &env
->active_fpu
.fp_status
)))
1848 FOP_CONDN_S(ult
, (float32_unordered_quiet(fst1
, fst0
,
1849 &env
->active_fpu
.fp_status
)
1850 || float32_lt_quiet(fst0
, fst1
,
1851 &env
->active_fpu
.fp_status
)))
1852 FOP_CONDN_S(le
, (float32_le_quiet(fst0
, fst1
,
1853 &env
->active_fpu
.fp_status
)))
1854 FOP_CONDN_S(ule
, (float32_unordered_quiet(fst1
, fst0
,
1855 &env
->active_fpu
.fp_status
)
1856 || float32_le_quiet(fst0
, fst1
,
1857 &env
->active_fpu
.fp_status
)))
1859 * NOTE: the comma operator will make "cond" to eval to false,
1860 * but float32_unordered() is still called.
1862 FOP_CONDN_S(saf
, (float32_unordered(fst1
, fst0
,
1863 &env
->active_fpu
.fp_status
), 0))
1864 FOP_CONDN_S(sun
, (float32_unordered(fst1
, fst0
,
1865 &env
->active_fpu
.fp_status
)))
1866 FOP_CONDN_S(seq
, (float32_eq(fst0
, fst1
,
1867 &env
->active_fpu
.fp_status
)))
1868 FOP_CONDN_S(sueq
, (float32_unordered(fst1
, fst0
,
1869 &env
->active_fpu
.fp_status
)
1870 || float32_eq(fst0
, fst1
,
1871 &env
->active_fpu
.fp_status
)))
1872 FOP_CONDN_S(slt
, (float32_lt(fst0
, fst1
,
1873 &env
->active_fpu
.fp_status
)))
1874 FOP_CONDN_S(sult
, (float32_unordered(fst1
, fst0
,
1875 &env
->active_fpu
.fp_status
)
1876 || float32_lt(fst0
, fst1
,
1877 &env
->active_fpu
.fp_status
)))
1878 FOP_CONDN_S(sle
, (float32_le(fst0
, fst1
,
1879 &env
->active_fpu
.fp_status
)))
1880 FOP_CONDN_S(sule
, (float32_unordered(fst1
, fst0
,
1881 &env
->active_fpu
.fp_status
)
1882 || float32_le(fst0
, fst1
,
1883 &env
->active_fpu
.fp_status
)))
1884 FOP_CONDN_S(or, (float32_le_quiet(fst1
, fst0
,
1885 &env
->active_fpu
.fp_status
)
1886 || float32_le_quiet(fst0
, fst1
,
1887 &env
->active_fpu
.fp_status
)))
1888 FOP_CONDN_S(une
, (float32_unordered_quiet(fst1
, fst0
,
1889 &env
->active_fpu
.fp_status
)
1890 || float32_lt_quiet(fst1
, fst0
,
1891 &env
->active_fpu
.fp_status
)
1892 || float32_lt_quiet(fst0
, fst1
,
1893 &env
->active_fpu
.fp_status
)))
1894 FOP_CONDN_S(ne
, (float32_lt_quiet(fst1
, fst0
,
1895 &env
->active_fpu
.fp_status
)
1896 || float32_lt_quiet(fst0
, fst1
,
1897 &env
->active_fpu
.fp_status
)))
1898 FOP_CONDN_S(sor
, (float32_le(fst1
, fst0
,
1899 &env
->active_fpu
.fp_status
)
1900 || float32_le(fst0
, fst1
,
1901 &env
->active_fpu
.fp_status
)))
1902 FOP_CONDN_S(sune
, (float32_unordered(fst1
, fst0
,
1903 &env
->active_fpu
.fp_status
)
1904 || float32_lt(fst1
, fst0
,
1905 &env
->active_fpu
.fp_status
)
1906 || float32_lt(fst0
, fst1
,
1907 &env
->active_fpu
.fp_status
)))
1908 FOP_CONDN_S(sne
, (float32_lt(fst1
, fst0
,
1909 &env
->active_fpu
.fp_status
)
1910 || float32_lt(fst0
, fst1
,
1911 &env
->active_fpu
.fp_status
)))