include/disas/dis-asm.h

   1 /* Interface between the opcode library and its callers.
   2    Written by Cygnus Support, 1993.
   3
   4    The opcode library (libopcodes.a) provides instruction decoders for
   5    a large variety of instruction sets, callable with an identical
   6    interface, for making instruction-processing programs more independent
   7    of the instruction set being processed.  */
   8
   9 #ifndef DISAS_DIS_ASM_H
  10 #define DISAS_DIS_ASM_H
  11
  12 typedef void *PTR;
  13 typedef uint64_t bfd_vma;
  14 typedef int64_t bfd_signed_vma;
  15 typedef uint8_t bfd_byte;
  16 #define sprintf_vma(s,x) sprintf (s, "%0" PRIx64, x)
  17 #define snprintf_vma(s,ss,x) snprintf (s, ss, "%0" PRIx64, x)
  18
  19 #define BFD64
  20
  21 enum bfd_flavour {
  22   bfd_target_unknown_flavour,
  23   bfd_target_aout_flavour,
  24   bfd_target_coff_flavour,
  25   bfd_target_ecoff_flavour,
  26   bfd_target_elf_flavour,
  27   bfd_target_ieee_flavour,
  28   bfd_target_nlm_flavour,
  29   bfd_target_oasys_flavour,
  30   bfd_target_tekhex_flavour,
  31   bfd_target_srec_flavour,
  32   bfd_target_ihex_flavour,
  33   bfd_target_som_flavour,
  34   bfd_target_os9k_flavour,
  35   bfd_target_versados_flavour,
  36   bfd_target_msdos_flavour,
  37   bfd_target_evax_flavour
  38 };
  39
  40 enum bfd_endian { BFD_ENDIAN_BIG, BFD_ENDIAN_LITTLE, BFD_ENDIAN_UNKNOWN };
  41
  42 enum bfd_architecture
  43 {
  44   bfd_arch_unknown,    /* File arch not known */
  45   bfd_arch_obscure,    /* Arch known, not one of these */
  46   bfd_arch_m68k,       /* Motorola 68xxx */
  47 #define bfd_mach_m68000 1
  48 #define bfd_mach_m68008 2
  49 #define bfd_mach_m68010 3
  50 #define bfd_mach_m68020 4
  51 #define bfd_mach_m68030 5
  52 #define bfd_mach_m68040 6
  53 #define bfd_mach_m68060 7
  54 #define bfd_mach_cpu32  8
  55 #define bfd_mach_mcf5200  9
  56 #define bfd_mach_mcf5206e 10
  57 #define bfd_mach_mcf5307  11
  58 #define bfd_mach_mcf5407  12
  59 #define bfd_mach_mcf528x  13
  60 #define bfd_mach_mcfv4e   14
  61 #define bfd_mach_mcf521x   15
  62 #define bfd_mach_mcf5249   16
  63 #define bfd_mach_mcf547x   17
  64 #define bfd_mach_mcf548x   18
  65   bfd_arch_vax,        /* DEC Vax */
  66   bfd_arch_i960,       /* Intel 960 */
  67      /* The order of the following is important.
  68        lower number indicates a machine type that
  69        only accepts a subset of the instructions
  70        available to machines with higher numbers.
  71        The exception is the "ca", which is
  72        incompatible with all other machines except
  73        "core". */
  74
  75 #define bfd_mach_i960_core      1
  76 #define bfd_mach_i960_ka_sa     2
  77 #define bfd_mach_i960_kb_sb     3
  78 #define bfd_mach_i960_mc        4
  79 #define bfd_mach_i960_xa        5
  80 #define bfd_mach_i960_ca        6
  81 #define bfd_mach_i960_jx        7
  82 #define bfd_mach_i960_hx        8
  83
  84   bfd_arch_a29k,       /* AMD 29000 */
  85   bfd_arch_sparc,      /* SPARC */
  86 #define bfd_mach_sparc                 1
  87 /* The difference between v8plus and v9 is that v9 is a true 64 bit env.  */
  88 #define bfd_mach_sparc_sparclet        2
  89 #define bfd_mach_sparc_sparclite       3
  90 #define bfd_mach_sparc_v8plus          4
  91 #define bfd_mach_sparc_v8plusa         5 /* with ultrasparc add'ns.  */
  92 #define bfd_mach_sparc_sparclite_le    6
  93 #define bfd_mach_sparc_v9              7
  94 #define bfd_mach_sparc_v9a             8 /* with ultrasparc add'ns.  */
  95 #define bfd_mach_sparc_v8plusb         9 /* with cheetah add'ns.  */
  96 #define bfd_mach_sparc_v9b             10 /* with cheetah add'ns.  */
  97 /* Nonzero if MACH has the v9 instruction set.  */
  98 #define bfd_mach_sparc_v9_p(mach) \
  99   ((mach) >= bfd_mach_sparc_v8plus && (mach) <= bfd_mach_sparc_v9b \
 100    && (mach) != bfd_mach_sparc_sparclite_le)
 101   bfd_arch_mips,       /* MIPS Rxxxx */
 102 #define bfd_mach_mips3000              3000
 103 #define bfd_mach_mips3900              3900
 104 #define bfd_mach_mips4000              4000
 105 #define bfd_mach_mips4010              4010
 106 #define bfd_mach_mips4100              4100
 107 #define bfd_mach_mips4300              4300
 108 #define bfd_mach_mips4400              4400
 109 #define bfd_mach_mips4600              4600
 110 #define bfd_mach_mips4650              4650
 111 #define bfd_mach_mips5000              5000
 112 #define bfd_mach_mips6000              6000
 113 #define bfd_mach_mips8000              8000
 114 #define bfd_mach_mips10000             10000
 115 #define bfd_mach_mips16                16
 116   bfd_arch_i386,       /* Intel 386 */
 117 #define bfd_mach_i386_i386 0
 118 #define bfd_mach_i386_i8086 1
 119 #define bfd_mach_i386_i386_intel_syntax 2
 120 #define bfd_mach_x86_64 3
 121 #define bfd_mach_x86_64_intel_syntax 4
 122   bfd_arch_we32k,      /* AT&T WE32xxx */
 123   bfd_arch_tahoe,      /* CCI/Harris Tahoe */
 124   bfd_arch_i860,       /* Intel 860 */
 125   bfd_arch_romp,       /* IBM ROMP PC/RT */
 126   bfd_arch_alliant,    /* Alliant */
 127   bfd_arch_convex,     /* Convex */
 128   bfd_arch_m88k,       /* Motorola 88xxx */
 129   bfd_arch_pyramid,    /* Pyramid Technology */
 130   bfd_arch_h8300,      /* Hitachi H8/300 */
 131 #define bfd_mach_h8300   1
 132 #define bfd_mach_h8300h  2
 133 #define bfd_mach_h8300s  3
 134   bfd_arch_powerpc,    /* PowerPC */
 135 #define bfd_mach_ppc           0
 136 #define bfd_mach_ppc64         1
 137 #define bfd_mach_ppc_403       403
 138 #define bfd_mach_ppc_403gc     4030
 139 #define bfd_mach_ppc_e500      500
 140 #define bfd_mach_ppc_505       505
 141 #define bfd_mach_ppc_601       601
 142 #define bfd_mach_ppc_602       602
 143 #define bfd_mach_ppc_603       603
 144 #define bfd_mach_ppc_ec603e    6031
 145 #define bfd_mach_ppc_604       604
 146 #define bfd_mach_ppc_620       620
 147 #define bfd_mach_ppc_630       630
 148 #define bfd_mach_ppc_750       750
 149 #define bfd_mach_ppc_860       860
 150 #define bfd_mach_ppc_a35       35
 151 #define bfd_mach_ppc_rs64ii    642
 152 #define bfd_mach_ppc_rs64iii   643
 153 #define bfd_mach_ppc_7400      7400
 154   bfd_arch_rs6000,     /* IBM RS/6000 */
 155   bfd_arch_hppa,       /* HP PA RISC */
 156 #define bfd_mach_hppa10        10
 157 #define bfd_mach_hppa11        11
 158 #define bfd_mach_hppa20        20
 159 #define bfd_mach_hppa20w       25
 160   bfd_arch_d10v,       /* Mitsubishi D10V */
 161   bfd_arch_z8k,        /* Zilog Z8000 */
 162 #define bfd_mach_z8001         1
 163 #define bfd_mach_z8002         2
 164   bfd_arch_h8500,      /* Hitachi H8/500 */
 165   bfd_arch_sh,         /* Hitachi SH */
 166 #define bfd_mach_sh            1
 167 #define bfd_mach_sh2        0x20
 168 #define bfd_mach_sh_dsp     0x2d
 169 #define bfd_mach_sh2a       0x2a
 170 #define bfd_mach_sh2a_nofpu 0x2b
 171 #define bfd_mach_sh2e       0x2e
 172 #define bfd_mach_sh3        0x30
 173 #define bfd_mach_sh3_nommu  0x31
 174 #define bfd_mach_sh3_dsp    0x3d
 175 #define bfd_mach_sh3e       0x3e
 176 #define bfd_mach_sh4        0x40
 177 #define bfd_mach_sh4_nofpu  0x41
 178 #define bfd_mach_sh4_nommu_nofpu  0x42
 179 #define bfd_mach_sh4a       0x4a
 180 #define bfd_mach_sh4a_nofpu 0x4b
 181 #define bfd_mach_sh4al_dsp  0x4d
 182 #define bfd_mach_sh5        0x50
 183   bfd_arch_alpha,      /* Dec Alpha */
 184 #define bfd_mach_alpha 1
 185 #define bfd_mach_alpha_ev4  0x10
 186 #define bfd_mach_alpha_ev5  0x20
 187 #define bfd_mach_alpha_ev6  0x30
 188   bfd_arch_arm,        /* Advanced Risc Machines ARM */
 189 #define bfd_mach_arm_unknown    0
 190 #define bfd_mach_arm_2          1
 191 #define bfd_mach_arm_2a         2
 192 #define bfd_mach_arm_3          3
 193 #define bfd_mach_arm_3M         4
 194 #define bfd_mach_arm_4          5
 195 #define bfd_mach_arm_4T         6
 196 #define bfd_mach_arm_5          7
 197 #define bfd_mach_arm_5T         8
 198 #define bfd_mach_arm_5TE        9
 199 #define bfd_mach_arm_XScale     10
 200 #define bfd_mach_arm_ep9312     11
 201 #define bfd_mach_arm_iWMMXt     12
 202 #define bfd_mach_arm_iWMMXt2    13
 203   bfd_arch_ns32k,      /* National Semiconductors ns32000 */
 204   bfd_arch_w65,        /* WDC 65816 */
 205   bfd_arch_tic30,      /* Texas Instruments TMS320C30 */
 206   bfd_arch_v850,       /* NEC V850 */
 207 #define bfd_mach_v850          0
 208   bfd_arch_arc,        /* Argonaut RISC Core */
 209 #define bfd_mach_arc_base 0
 210   bfd_arch_m32r,       /* Mitsubishi M32R/D */
 211 #define bfd_mach_m32r          0  /* backwards compatibility */
 212   bfd_arch_mn10200,    /* Matsushita MN10200 */
 213   bfd_arch_mn10300,    /* Matsushita MN10300 */
 214   bfd_arch_cris,       /* Axis CRIS */
 215 #define bfd_mach_cris_v0_v10   255
 216 #define bfd_mach_cris_v32      32
 217 #define bfd_mach_cris_v10_v32  1032
 218   bfd_arch_microblaze, /* Xilinx MicroBlaze.  */
 219   bfd_arch_moxie,      /* The Moxie core.  */
 220   bfd_arch_ia64,      /* HP/Intel ia64 */
 221 #define bfd_mach_ia64_elf64    64
 222 #define bfd_mach_ia64_elf32    32
 223   bfd_arch_nios2,       /* Nios II */
 224 #define bfd_mach_nios2          0
 225 #define bfd_mach_nios2r1        1
 226 #define bfd_mach_nios2r2        2
 227   bfd_arch_lm32,       /* Lattice Mico32 */
 228 #define bfd_mach_lm32 1
 229   bfd_arch_rx,       /* Renesas RX */
 230 #define bfd_mach_rx            0x75
 231 #define bfd_mach_rx_v2         0x76
 232 #define bfd_mach_rx_v3         0x77
 233   bfd_arch_last
 234   };
 235 #define bfd_mach_s390_31 31
 236 #define bfd_mach_s390_64 64
 237
 238 typedef struct symbol_cache_entry
 239 {
 240     const char *name;
 241     union
 242     {
 243         PTR p;
 244         bfd_vma i;
 245     } udata;
 246 } asymbol;
 247
 248 typedef int (*fprintf_function)(FILE *f, const char *fmt, ...)
 249     GCC_FMT_ATTR(2, 3);
 250
 251 enum dis_insn_type {
 252   dis_noninsn,                  /* Not a valid instruction */
 253   dis_nonbranch,                /* Not a branch instruction */
 254   dis_branch,                   /* Unconditional branch */
 255   dis_condbranch,               /* Conditional branch */
 256   dis_jsr,                      /* Jump to subroutine */
 257   dis_condjsr,                  /* Conditional jump to subroutine */
 258   dis_dref,                     /* Data reference instruction */
 259   dis_dref2                     /* Two data references in instruction */
 260 };
 261
 262 /* This struct is passed into the instruction decoding routine,
 263    and is passed back out into each callback.  The various fields are used
 264    for conveying information from your main routine into your callbacks,
 265    for passing information into the instruction decoders (such as the
 266    addresses of the callback functions), or for passing information
 267    back from the instruction decoders to their callers.
 268
 269    It must be initialized before it is first passed; this can be done
 270    by hand, or using one of the initialization macros below.  */
 271
 272 typedef struct disassemble_info {
 273   fprintf_function fprintf_func;
 274   FILE *stream;
 275   PTR application_data;
 276
 277   /* Target description.  We could replace this with a pointer to the bfd,
 278      but that would require one.  There currently isn't any such requirement
 279      so to avoid introducing one we record these explicitly.  */
 280   /* The bfd_flavour.  This can be bfd_target_unknown_flavour.  */
 281   enum bfd_flavour flavour;
 282   /* The bfd_arch value.  */
 283   enum bfd_architecture arch;
 284   /* The bfd_mach value.  */
 285   unsigned long mach;
 286   /* Endianness (for bi-endian cpus).  Mono-endian cpus can ignore this.  */
 287   enum bfd_endian endian;
 288
 289   /* An array of pointers to symbols either at the location being disassembled
 290      or at the start of the function being disassembled.  The array is sorted
 291      so that the first symbol is intended to be the one used.  The others are
 292      present for any misc. purposes.  This is not set reliably, but if it is
 293      not NULL, it is correct.  */
 294   asymbol **symbols;
 295   /* Number of symbols in array.  */
 296   int num_symbols;
 297
 298   /* For use by the disassembler.
 299      The top 16 bits are reserved for public use (and are documented here).
 300      The bottom 16 bits are for the internal use of the disassembler.  */
 301   unsigned long flags;
 302 #define INSN_HAS_RELOC  0x80000000
 303 #define INSN_ARM_BE32   0x00010000
 304   PTR private_data;
 305
 306   /* Function used to get bytes to disassemble.  MEMADDR is the
 307      address of the stuff to be disassembled, MYADDR is the address to
 308      put the bytes in, and LENGTH is the number of bytes to read.
 309      INFO is a pointer to this struct.
 310      Returns an errno value or 0 for success.  */
 311   int (*read_memory_func)
 312     (bfd_vma memaddr, bfd_byte *myaddr, int length,
 313              struct disassemble_info *info);
 314
 315   /* Function which should be called if we get an error that we can't
 316      recover from.  STATUS is the errno value from read_memory_func and
 317      MEMADDR is the address that we were trying to read.  INFO is a
 318      pointer to this struct.  */
 319   void (*memory_error_func)
 320     (int status, bfd_vma memaddr, struct disassemble_info *info);
 321
 322   /* Function called to print ADDR.  */
 323   void (*print_address_func)
 324     (bfd_vma addr, struct disassemble_info *info);
 325
 326     /* Function called to print an instruction. The function is architecture
 327      * specific.
 328      */
 329     int (*print_insn)(bfd_vma addr, struct disassemble_info *info);
 330
 331   /* Function called to determine if there is a symbol at the given ADDR.
 332      If there is, the function returns 1, otherwise it returns 0.
 333      This is used by ports which support an overlay manager where
 334      the overlay number is held in the top part of an address.  In
 335      some circumstances we want to include the overlay number in the
 336      address, (normally because there is a symbol associated with
 337      that address), but sometimes we want to mask out the overlay bits.  */
 338   int (* symbol_at_address_func)
 339     (bfd_vma addr, struct disassemble_info * info);
 340
 341   /* These are for buffer_read_memory.  */
 342   bfd_byte *buffer;
 343   bfd_vma buffer_vma;
 344   int buffer_length;
 345
 346   /* This variable may be set by the instruction decoder.  It suggests
 347       the number of bytes objdump should display on a single line.  If
 348       the instruction decoder sets this, it should always set it to
 349       the same value in order to get reasonable looking output.  */
 350   int bytes_per_line;
 351
 352   /* the next two variables control the way objdump displays the raw data */
 353   /* For example, if bytes_per_line is 8 and bytes_per_chunk is 4, the */
 354   /* output will look like this:
 355      00:   00000000 00000000
 356      with the chunks displayed according to "display_endian". */
 357   int bytes_per_chunk;
 358   enum bfd_endian display_endian;
 359
 360   /* Results from instruction decoders.  Not all decoders yet support
 361      this information.  This info is set each time an instruction is
 362      decoded, and is only valid for the last such instruction.
 363
 364      To determine whether this decoder supports this information, set
 365      insn_info_valid to 0, decode an instruction, then check it.  */
 366
 367   char insn_info_valid;         /* Branch info has been set. */
 368   char branch_delay_insns;      /* How many sequential insn's will run before
 369                                    a branch takes effect.  (0 = normal) */
 370   char data_size;               /* Size of data reference in insn, in bytes */
 371   enum dis_insn_type insn_type; /* Type of instruction */
 372   bfd_vma target;               /* Target address of branch or dref, if known;
 373                                    zero if unknown.  */
 374   bfd_vma target2;              /* Second target address for dref2 */
 375
 376   /* Command line options specific to the target disassembler.  */
 377   char * disassembler_options;
 378
 379   /* Field intended to be used by targets in any way they deem suitable.  */
 380   int64_t target_info;
 381
 382   /* Options for Capstone disassembly.  */
 383   int cap_arch;
 384   int cap_mode;
 385   int cap_insn_unit;
 386   int cap_insn_split;
 387
 388 } disassemble_info;
 389
 390 \f
 391 /* Standard disassemblers.  Disassemble one instruction at the given
 392    target address.  Return number of bytes processed.  */
 393 typedef int (*disassembler_ftype) (bfd_vma, disassemble_info *);
 394
 395 int print_insn_tci(bfd_vma, disassemble_info*);
 396 int print_insn_big_mips         (bfd_vma, disassemble_info*);
 397 int print_insn_little_mips      (bfd_vma, disassemble_info*);
 398 int print_insn_nanomips         (bfd_vma, disassemble_info*);
 399 int print_insn_i386             (bfd_vma, disassemble_info*);
 400 int print_insn_m68k             (bfd_vma, disassemble_info*);
 401 int print_insn_z8001            (bfd_vma, disassemble_info*);
 402 int print_insn_z8002            (bfd_vma, disassemble_info*);
 403 int print_insn_h8300            (bfd_vma, disassemble_info*);
 404 int print_insn_h8300h           (bfd_vma, disassemble_info*);
 405 int print_insn_h8300s           (bfd_vma, disassemble_info*);
 406 int print_insn_h8500            (bfd_vma, disassemble_info*);
 407 int print_insn_arm_a64          (bfd_vma, disassemble_info*);
 408 int print_insn_alpha            (bfd_vma, disassemble_info*);
 409 disassembler_ftype arc_get_disassembler (int, int);
 410 int print_insn_arm              (bfd_vma, disassemble_info*);
 411 int print_insn_sparc            (bfd_vma, disassemble_info*);
 412 int print_insn_big_a29k         (bfd_vma, disassemble_info*);
 413 int print_insn_little_a29k      (bfd_vma, disassemble_info*);
 414 int print_insn_i960             (bfd_vma, disassemble_info*);
 415 int print_insn_sh               (bfd_vma, disassemble_info*);
 416 int print_insn_shl              (bfd_vma, disassemble_info*);
 417 int print_insn_hppa             (bfd_vma, disassemble_info*);
 418 int print_insn_m32r             (bfd_vma, disassemble_info*);
 419 int print_insn_m88k             (bfd_vma, disassemble_info*);
 420 int print_insn_mn10200          (bfd_vma, disassemble_info*);
 421 int print_insn_mn10300          (bfd_vma, disassemble_info*);
 422 int print_insn_moxie            (bfd_vma, disassemble_info*);
 423 int print_insn_ns32k            (bfd_vma, disassemble_info*);
 424 int print_insn_big_powerpc      (bfd_vma, disassemble_info*);
 425 int print_insn_little_powerpc   (bfd_vma, disassemble_info*);
 426 int print_insn_rs6000           (bfd_vma, disassemble_info*);
 427 int print_insn_w65              (bfd_vma, disassemble_info*);
 428 int print_insn_d10v             (bfd_vma, disassemble_info*);
 429 int print_insn_v850             (bfd_vma, disassemble_info*);
 430 int print_insn_tic30            (bfd_vma, disassemble_info*);
 431 int print_insn_ppc              (bfd_vma, disassemble_info*);
 432 int print_insn_s390             (bfd_vma, disassemble_info*);
 433 int print_insn_crisv32          (bfd_vma, disassemble_info*);
 434 int print_insn_crisv10          (bfd_vma, disassemble_info*);
 435 int print_insn_microblaze       (bfd_vma, disassemble_info*);
 436 int print_insn_ia64             (bfd_vma, disassemble_info*);
 437 int print_insn_lm32             (bfd_vma, disassemble_info*);
 438 int print_insn_big_nios2        (bfd_vma, disassemble_info*);
 439 int print_insn_little_nios2     (bfd_vma, disassemble_info*);
 440 int print_insn_xtensa           (bfd_vma, disassemble_info*);
 441 int print_insn_riscv32          (bfd_vma, disassemble_info*);
 442 int print_insn_riscv64          (bfd_vma, disassemble_info*);
 443 int print_insn_rx(bfd_vma, disassemble_info *);
 444
 445 #if 0
 446 /* Fetch the disassembler for a given BFD, if that support is available.  */
 447 disassembler_ftype disassembler(bfd *);
 448 #endif
 449
 450 \f
 451 /* This block of definitions is for particular callers who read instructions
 452    into a buffer before calling the instruction decoder.  */
 453
 454 /* Here is a function which callers may wish to use for read_memory_func.
 455    It gets bytes from a buffer.  */
 456 int buffer_read_memory(bfd_vma, bfd_byte *, int, struct disassemble_info *);
 457
 458 /* This function goes with buffer_read_memory.
 459    It prints a message using info->fprintf_func and info->stream.  */
 460 void perror_memory(int, bfd_vma, struct disassemble_info *);
 461
 462
 463 /* Just print the address in hex.  This is included for completeness even
 464    though both GDB and objdump provide their own (to print symbolic
 465    addresses).  */
 466 void generic_print_address(bfd_vma, struct disassemble_info *);
 467
 468 /* Always true.  */
 469 int generic_symbol_at_address(bfd_vma, struct disassemble_info *);
 470
 471 /* Macro to initialize a disassemble_info struct.  This should be called
 472    by all applications creating such a struct.  */
 473 #define INIT_DISASSEMBLE_INFO(INFO, STREAM, FPRINTF_FUNC) \
 474   (INFO).flavour = bfd_target_unknown_flavour, \
 475   (INFO).arch = bfd_arch_unknown, \
 476   (INFO).mach = 0, \
 477   (INFO).endian = BFD_ENDIAN_UNKNOWN, \
 478   INIT_DISASSEMBLE_INFO_NO_ARCH(INFO, STREAM, FPRINTF_FUNC)
 479
 480 /* Call this macro to initialize only the internal variables for the
 481    disassembler.  Architecture dependent things such as byte order, or machine
 482    variant are not touched by this macro.  This makes things much easier for
 483    GDB which must initialize these things separately.  */
 484
 485 #define INIT_DISASSEMBLE_INFO_NO_ARCH(INFO, STREAM, FPRINTF_FUNC) \
 486   (INFO).fprintf_func = (FPRINTF_FUNC), \
 487   (INFO).stream = (STREAM), \
 488   (INFO).symbols = NULL, \
 489   (INFO).num_symbols = 0, \
 490   (INFO).private_data = NULL, \
 491   (INFO).buffer = NULL, \
 492   (INFO).buffer_vma = 0, \
 493   (INFO).buffer_length = 0, \
 494   (INFO).read_memory_func = buffer_read_memory, \
 495   (INFO).memory_error_func = perror_memory, \
 496   (INFO).print_address_func = generic_print_address, \
 497   (INFO).print_insn = NULL, \
 498   (INFO).symbol_at_address_func = generic_symbol_at_address, \
 499   (INFO).flags = 0, \
 500   (INFO).bytes_per_line = 0, \
 501   (INFO).bytes_per_chunk = 0, \
 502   (INFO).display_endian = BFD_ENDIAN_UNKNOWN, \
 503   (INFO).disassembler_options = NULL, \
 504   (INFO).insn_info_valid = 0
 505
 506 #ifndef ATTRIBUTE_UNUSED
 507 #define ATTRIBUTE_UNUSED __attribute__((unused))
 508 #endif
 509
 510 /* from libbfd */
 511
 512 bfd_vma bfd_getl64 (const bfd_byte *addr);
 513 bfd_vma bfd_getl32 (const bfd_byte *addr);
 514 bfd_vma bfd_getb32 (const bfd_byte *addr);
 515 bfd_vma bfd_getl16 (const bfd_byte *addr);
 516 bfd_vma bfd_getb16 (const bfd_byte *addr);
 517 typedef bool bfd_boolean;
 518
 519 #endif /* DISAS_DIS_ASM_H */