target/ppc: Add support for scv and rfscv instructions
[qemu/ar7.git] / hw / mips / addr.c
blob2f138fe1ea82f5dc112dfaf582d4b57df62e870b
1 /*
2 * QEMU MIPS address translation support
4 * Permission is hereby granted, free of charge, to any person obtaining a copy
5 * of this software and associated documentation files (the "Software"), to deal
6 * in the Software without restriction, including without limitation the rights
7 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
8 * copies of the Software, and to permit persons to whom the Software is
9 * furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
19 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
20 * THE SOFTWARE.
23 #include "qemu/osdep.h"
24 #include "hw/mips/cpudevs.h"
26 static int mips_um_ksegs;
28 uint64_t cpu_mips_kseg0_to_phys(void *opaque, uint64_t addr)
30 return addr & 0x1fffffffll;
33 uint64_t cpu_mips_phys_to_kseg0(void *opaque, uint64_t addr)
35 return addr | ~0x7fffffffll;
38 uint64_t cpu_mips_kvm_um_phys_to_kseg0(void *opaque, uint64_t addr)
40 return addr | 0x40000000ll;
43 bool mips_um_ksegs_enabled(void)
45 return mips_um_ksegs;
48 void mips_um_ksegs_enable(void)
50 mips_um_ksegs = 1;