2 * QEMU IDE disk and CD/DVD-ROM Emulator
4 * Copyright (c) 2003 Fabrice Bellard
5 * Copyright (c) 2006 Openedhand Ltd.
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
26 #include "qemu/osdep.h"
27 #include "hw/isa/isa.h"
28 #include "migration/vmstate.h"
29 #include "qemu/error-report.h"
30 #include "qemu/main-loop.h"
31 #include "qemu/timer.h"
32 #include "sysemu/sysemu.h"
33 #include "sysemu/blockdev.h"
34 #include "sysemu/dma.h"
35 #include "hw/block/block.h"
36 #include "sysemu/block-backend.h"
37 #include "qapi/error.h"
38 #include "qemu/cutils.h"
39 #include "sysemu/replay.h"
40 #include "sysemu/runstate.h"
41 #include "hw/ide/internal.h"
44 /* These values were based on a Seagate ST3500418AS but have been modified
45 to make more sense in QEMU */
46 static const int smart_attributes
[][12] = {
47 /* id, flags, hflags, val, wrst, raw (6 bytes), threshold */
48 /* raw read error rate*/
49 { 0x01, 0x03, 0x00, 0x64, 0x64, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x06},
51 { 0x03, 0x03, 0x00, 0x64, 0x64, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
52 /* start stop count */
53 { 0x04, 0x02, 0x00, 0x64, 0x64, 0x64, 0x00, 0x00, 0x00, 0x00, 0x00, 0x14},
54 /* remapped sectors */
55 { 0x05, 0x03, 0x00, 0x64, 0x64, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x24},
57 { 0x09, 0x03, 0x00, 0x64, 0x64, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
58 /* power cycle count */
59 { 0x0c, 0x03, 0x00, 0x64, 0x64, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
60 /* airflow-temperature-celsius */
61 { 190, 0x03, 0x00, 0x45, 0x45, 0x1f, 0x00, 0x1f, 0x1f, 0x00, 0x00, 0x32},
64 const char *IDE_DMA_CMD_lookup
[IDE_DMA__COUNT
] = {
65 [IDE_DMA_READ
] = "DMA READ",
66 [IDE_DMA_WRITE
] = "DMA WRITE",
67 [IDE_DMA_TRIM
] = "DMA TRIM",
68 [IDE_DMA_ATAPI
] = "DMA ATAPI"
71 static const char *IDE_DMA_CMD_str(enum ide_dma_cmd enval
)
73 if ((unsigned)enval
< IDE_DMA__COUNT
) {
74 return IDE_DMA_CMD_lookup
[enval
];
76 return "DMA UNKNOWN CMD";
79 static void ide_dummy_transfer_stop(IDEState
*s
);
81 static void padstr(char *str
, const char *src
, int len
)
84 for(i
= 0; i
< len
; i
++) {
93 static void put_le16(uint16_t *p
, unsigned int v
)
98 static void ide_identify_size(IDEState
*s
)
100 uint16_t *p
= (uint16_t *)s
->identify_data
;
101 put_le16(p
+ 60, s
->nb_sectors
);
102 put_le16(p
+ 61, s
->nb_sectors
>> 16);
103 put_le16(p
+ 100, s
->nb_sectors
);
104 put_le16(p
+ 101, s
->nb_sectors
>> 16);
105 put_le16(p
+ 102, s
->nb_sectors
>> 32);
106 put_le16(p
+ 103, s
->nb_sectors
>> 48);
109 static void ide_identify(IDEState
*s
)
112 unsigned int oldsize
;
113 IDEDevice
*dev
= s
->unit
? s
->bus
->slave
: s
->bus
->master
;
115 p
= (uint16_t *)s
->identify_data
;
116 if (s
->identify_set
) {
119 memset(p
, 0, sizeof(s
->identify_data
));
121 put_le16(p
+ 0, 0x0040);
122 put_le16(p
+ 1, s
->cylinders
);
123 put_le16(p
+ 3, s
->heads
);
124 put_le16(p
+ 4, 512 * s
->sectors
); /* XXX: retired, remove ? */
125 put_le16(p
+ 5, 512); /* XXX: retired, remove ? */
126 put_le16(p
+ 6, s
->sectors
);
127 padstr((char *)(p
+ 10), s
->drive_serial_str
, 20); /* serial number */
128 put_le16(p
+ 20, 3); /* XXX: retired, remove ? */
129 put_le16(p
+ 21, 512); /* cache size in sectors */
130 put_le16(p
+ 22, 4); /* ecc bytes */
131 padstr((char *)(p
+ 23), s
->version
, 8); /* firmware version */
132 padstr((char *)(p
+ 27), s
->drive_model_str
, 40); /* model */
133 #if MAX_MULT_SECTORS > 1
134 put_le16(p
+ 47, 0x8000 | MAX_MULT_SECTORS
);
136 put_le16(p
+ 48, 1); /* dword I/O */
137 put_le16(p
+ 49, (1 << 11) | (1 << 9) | (1 << 8)); /* DMA and LBA supported */
138 put_le16(p
+ 51, 0x200); /* PIO transfer cycle */
139 put_le16(p
+ 52, 0x200); /* DMA transfer cycle */
140 put_le16(p
+ 53, 1 | (1 << 1) | (1 << 2)); /* words 54-58,64-70,88 are valid */
141 put_le16(p
+ 54, s
->cylinders
);
142 put_le16(p
+ 55, s
->heads
);
143 put_le16(p
+ 56, s
->sectors
);
144 oldsize
= s
->cylinders
* s
->heads
* s
->sectors
;
145 put_le16(p
+ 57, oldsize
);
146 put_le16(p
+ 58, oldsize
>> 16);
148 put_le16(p
+ 59, 0x100 | s
->mult_sectors
);
149 /* *(p + 60) := nb_sectors -- see ide_identify_size */
150 /* *(p + 61) := nb_sectors >> 16 -- see ide_identify_size */
151 put_le16(p
+ 62, 0x07); /* single word dma0-2 supported */
152 put_le16(p
+ 63, 0x07); /* mdma0-2 supported */
153 put_le16(p
+ 64, 0x03); /* pio3-4 supported */
154 put_le16(p
+ 65, 120);
155 put_le16(p
+ 66, 120);
156 put_le16(p
+ 67, 120);
157 put_le16(p
+ 68, 120);
158 if (dev
&& dev
->conf
.discard_granularity
) {
159 put_le16(p
+ 69, (1 << 14)); /* determinate TRIM behavior */
163 put_le16(p
+ 75, s
->ncq_queues
- 1);
165 put_le16(p
+ 76, (1 << 8));
168 put_le16(p
+ 80, 0xf0); /* ata3 -> ata6 supported */
169 put_le16(p
+ 81, 0x16); /* conforms to ata5 */
170 /* 14=NOP supported, 5=WCACHE supported, 0=SMART supported */
171 put_le16(p
+ 82, (1 << 14) | (1 << 5) | 1);
172 /* 13=flush_cache_ext,12=flush_cache,10=lba48 */
173 put_le16(p
+ 83, (1 << 14) | (1 << 13) | (1 <<12) | (1 << 10));
174 /* 14=set to 1, 8=has WWN, 1=SMART self test, 0=SMART error logging */
176 put_le16(p
+ 84, (1 << 14) | (1 << 8) | 0);
178 put_le16(p
+ 84, (1 << 14) | 0);
180 /* 14 = NOP supported, 5=WCACHE enabled, 0=SMART feature set enabled */
181 if (blk_enable_write_cache(s
->blk
)) {
182 put_le16(p
+ 85, (1 << 14) | (1 << 5) | 1);
184 put_le16(p
+ 85, (1 << 14) | 1);
186 /* 13=flush_cache_ext,12=flush_cache,10=lba48 */
187 put_le16(p
+ 86, (1 << 13) | (1 <<12) | (1 << 10));
188 /* 14=set to 1, 8=has WWN, 1=SMART self test, 0=SMART error logging */
190 put_le16(p
+ 87, (1 << 14) | (1 << 8) | 0);
192 put_le16(p
+ 87, (1 << 14) | 0);
194 put_le16(p
+ 88, 0x3f | (1 << 13)); /* udma5 set and supported */
195 put_le16(p
+ 93, 1 | (1 << 14) | 0x2000);
196 /* *(p + 100) := nb_sectors -- see ide_identify_size */
197 /* *(p + 101) := nb_sectors >> 16 -- see ide_identify_size */
198 /* *(p + 102) := nb_sectors >> 32 -- see ide_identify_size */
199 /* *(p + 103) := nb_sectors >> 48 -- see ide_identify_size */
201 if (dev
&& dev
->conf
.physical_block_size
)
202 put_le16(p
+ 106, 0x6000 | get_physical_block_exp(&dev
->conf
));
204 /* LE 16-bit words 111-108 contain 64-bit World Wide Name */
205 put_le16(p
+ 108, s
->wwn
>> 48);
206 put_le16(p
+ 109, s
->wwn
>> 32);
207 put_le16(p
+ 110, s
->wwn
>> 16);
208 put_le16(p
+ 111, s
->wwn
);
210 if (dev
&& dev
->conf
.discard_granularity
) {
211 put_le16(p
+ 169, 1); /* TRIM support */
214 put_le16(p
+ 217, dev
->rotation_rate
); /* Nominal media rotation rate */
217 ide_identify_size(s
);
221 memcpy(s
->io_buffer
, p
, sizeof(s
->identify_data
));
224 static void ide_atapi_identify(IDEState
*s
)
228 p
= (uint16_t *)s
->identify_data
;
229 if (s
->identify_set
) {
232 memset(p
, 0, sizeof(s
->identify_data
));
234 /* Removable CDROM, 50us response, 12 byte packets */
235 put_le16(p
+ 0, (2 << 14) | (5 << 8) | (1 << 7) | (2 << 5) | (0 << 0));
236 padstr((char *)(p
+ 10), s
->drive_serial_str
, 20); /* serial number */
237 put_le16(p
+ 20, 3); /* buffer type */
238 put_le16(p
+ 21, 512); /* cache size in sectors */
239 put_le16(p
+ 22, 4); /* ecc bytes */
240 padstr((char *)(p
+ 23), s
->version
, 8); /* firmware version */
241 padstr((char *)(p
+ 27), s
->drive_model_str
, 40); /* model */
242 put_le16(p
+ 48, 1); /* dword I/O (XXX: should not be set on CDROM) */
244 put_le16(p
+ 49, 1 << 9 | 1 << 8); /* DMA and LBA supported */
245 put_le16(p
+ 53, 7); /* words 64-70, 54-58, 88 valid */
246 put_le16(p
+ 62, 7); /* single word dma0-2 supported */
247 put_le16(p
+ 63, 7); /* mdma0-2 supported */
249 put_le16(p
+ 49, 1 << 9); /* LBA supported, no DMA */
250 put_le16(p
+ 53, 3); /* words 64-70, 54-58 valid */
251 put_le16(p
+ 63, 0x103); /* DMA modes XXX: may be incorrect */
253 put_le16(p
+ 64, 3); /* pio3-4 supported */
254 put_le16(p
+ 65, 0xb4); /* minimum DMA multiword tx cycle time */
255 put_le16(p
+ 66, 0xb4); /* recommended DMA multiword tx cycle time */
256 put_le16(p
+ 67, 0x12c); /* minimum PIO cycle time without flow control */
257 put_le16(p
+ 68, 0xb4); /* minimum PIO cycle time with IORDY flow control */
259 put_le16(p
+ 71, 30); /* in ns */
260 put_le16(p
+ 72, 30); /* in ns */
263 put_le16(p
+ 75, s
->ncq_queues
- 1);
265 put_le16(p
+ 76, (1 << 8));
268 put_le16(p
+ 80, 0x1e); /* support up to ATA/ATAPI-4 */
270 put_le16(p
+ 84, (1 << 8)); /* supports WWN for words 108-111 */
271 put_le16(p
+ 87, (1 << 8)); /* WWN enabled */
275 put_le16(p
+ 88, 0x3f | (1 << 13)); /* udma5 set and supported */
279 /* LE 16-bit words 111-108 contain 64-bit World Wide Name */
280 put_le16(p
+ 108, s
->wwn
>> 48);
281 put_le16(p
+ 109, s
->wwn
>> 32);
282 put_le16(p
+ 110, s
->wwn
>> 16);
283 put_le16(p
+ 111, s
->wwn
);
289 memcpy(s
->io_buffer
, p
, sizeof(s
->identify_data
));
292 static void ide_cfata_identify_size(IDEState
*s
)
294 uint16_t *p
= (uint16_t *)s
->identify_data
;
295 put_le16(p
+ 7, s
->nb_sectors
>> 16); /* Sectors per card */
296 put_le16(p
+ 8, s
->nb_sectors
); /* Sectors per card */
297 put_le16(p
+ 60, s
->nb_sectors
); /* Total LBA sectors */
298 put_le16(p
+ 61, s
->nb_sectors
>> 16); /* Total LBA sectors */
301 static void ide_cfata_identify(IDEState
*s
)
306 p
= (uint16_t *)s
->identify_data
;
307 if (s
->identify_set
) {
310 memset(p
, 0, sizeof(s
->identify_data
));
312 cur_sec
= s
->cylinders
* s
->heads
* s
->sectors
;
314 put_le16(p
+ 0, 0x848a); /* CF Storage Card signature */
315 put_le16(p
+ 1, s
->cylinders
); /* Default cylinders */
316 put_le16(p
+ 3, s
->heads
); /* Default heads */
317 put_le16(p
+ 6, s
->sectors
); /* Default sectors per track */
318 /* *(p + 7) := nb_sectors >> 16 -- see ide_cfata_identify_size */
319 /* *(p + 8) := nb_sectors -- see ide_cfata_identify_size */
320 padstr((char *)(p
+ 10), s
->drive_serial_str
, 20); /* serial number */
321 put_le16(p
+ 22, 0x0004); /* ECC bytes */
322 padstr((char *) (p
+ 23), s
->version
, 8); /* Firmware Revision */
323 padstr((char *) (p
+ 27), s
->drive_model_str
, 40);/* Model number */
324 #if MAX_MULT_SECTORS > 1
325 put_le16(p
+ 47, 0x8000 | MAX_MULT_SECTORS
);
327 put_le16(p
+ 47, 0x0000);
329 put_le16(p
+ 49, 0x0f00); /* Capabilities */
330 put_le16(p
+ 51, 0x0002); /* PIO cycle timing mode */
331 put_le16(p
+ 52, 0x0001); /* DMA cycle timing mode */
332 put_le16(p
+ 53, 0x0003); /* Translation params valid */
333 put_le16(p
+ 54, s
->cylinders
); /* Current cylinders */
334 put_le16(p
+ 55, s
->heads
); /* Current heads */
335 put_le16(p
+ 56, s
->sectors
); /* Current sectors */
336 put_le16(p
+ 57, cur_sec
); /* Current capacity */
337 put_le16(p
+ 58, cur_sec
>> 16); /* Current capacity */
338 if (s
->mult_sectors
) /* Multiple sector setting */
339 put_le16(p
+ 59, 0x100 | s
->mult_sectors
);
340 /* *(p + 60) := nb_sectors -- see ide_cfata_identify_size */
341 /* *(p + 61) := nb_sectors >> 16 -- see ide_cfata_identify_size */
342 put_le16(p
+ 63, 0x0203); /* Multiword DMA capability */
343 put_le16(p
+ 64, 0x0001); /* Flow Control PIO support */
344 put_le16(p
+ 65, 0x0096); /* Min. Multiword DMA cycle */
345 put_le16(p
+ 66, 0x0096); /* Rec. Multiword DMA cycle */
346 put_le16(p
+ 68, 0x00b4); /* Min. PIO cycle time */
347 put_le16(p
+ 82, 0x400c); /* Command Set supported */
348 put_le16(p
+ 83, 0x7068); /* Command Set supported */
349 put_le16(p
+ 84, 0x4000); /* Features supported */
350 put_le16(p
+ 85, 0x000c); /* Command Set enabled */
351 put_le16(p
+ 86, 0x7044); /* Command Set enabled */
352 put_le16(p
+ 87, 0x4000); /* Features enabled */
353 put_le16(p
+ 91, 0x4060); /* Current APM level */
354 put_le16(p
+ 129, 0x0002); /* Current features option */
355 put_le16(p
+ 130, 0x0005); /* Reassigned sectors */
356 put_le16(p
+ 131, 0x0001); /* Initial power mode */
357 put_le16(p
+ 132, 0x0000); /* User signature */
358 put_le16(p
+ 160, 0x8100); /* Power requirement */
359 put_le16(p
+ 161, 0x8001); /* CF command set */
361 ide_cfata_identify_size(s
);
365 memcpy(s
->io_buffer
, p
, sizeof(s
->identify_data
));
368 static void ide_set_signature(IDEState
*s
)
370 s
->select
&= 0xf0; /* clear head */
374 if (s
->drive_kind
== IDE_CD
) {
386 static bool ide_sect_range_ok(IDEState
*s
,
387 uint64_t sector
, uint64_t nb_sectors
)
389 uint64_t total_sectors
;
391 blk_get_geometry(s
->blk
, &total_sectors
);
392 if (sector
> total_sectors
|| nb_sectors
> total_sectors
- sector
) {
398 typedef struct TrimAIOCB
{
408 static void trim_aio_cancel(BlockAIOCB
*acb
)
410 TrimAIOCB
*iocb
= container_of(acb
, TrimAIOCB
, common
);
412 /* Exit the loop so ide_issue_trim_cb will not continue */
413 iocb
->j
= iocb
->qiov
->niov
- 1;
414 iocb
->i
= (iocb
->qiov
->iov
[iocb
->j
].iov_len
/ 8) - 1;
416 iocb
->ret
= -ECANCELED
;
419 blk_aio_cancel_async(iocb
->aiocb
);
424 static const AIOCBInfo trim_aiocb_info
= {
425 .aiocb_size
= sizeof(TrimAIOCB
),
426 .cancel_async
= trim_aio_cancel
,
429 static void ide_trim_bh_cb(void *opaque
)
431 TrimAIOCB
*iocb
= opaque
;
433 iocb
->common
.cb(iocb
->common
.opaque
, iocb
->ret
);
435 qemu_bh_delete(iocb
->bh
);
437 qemu_aio_unref(iocb
);
440 static void ide_issue_trim_cb(void *opaque
, int ret
)
442 TrimAIOCB
*iocb
= opaque
;
443 IDEState
*s
= iocb
->s
;
446 while (iocb
->j
< iocb
->qiov
->niov
) {
448 while (++iocb
->i
< iocb
->qiov
->iov
[j
].iov_len
/ 8) {
450 uint64_t *buffer
= iocb
->qiov
->iov
[j
].iov_base
;
452 /* 6-byte LBA + 2-byte range per entry */
453 uint64_t entry
= le64_to_cpu(buffer
[i
]);
454 uint64_t sector
= entry
& 0x0000ffffffffffffULL
;
455 uint16_t count
= entry
>> 48;
461 if (!ide_sect_range_ok(s
, sector
, count
)) {
466 /* Got an entry! Submit and exit. */
467 iocb
->aiocb
= blk_aio_pdiscard(s
->blk
,
468 sector
<< BDRV_SECTOR_BITS
,
469 count
<< BDRV_SECTOR_BITS
,
470 ide_issue_trim_cb
, opaque
);
484 replay_bh_schedule_event(iocb
->bh
);
488 BlockAIOCB
*ide_issue_trim(
489 int64_t offset
, QEMUIOVector
*qiov
,
490 BlockCompletionFunc
*cb
, void *cb_opaque
, void *opaque
)
492 IDEState
*s
= opaque
;
495 iocb
= blk_aio_get(&trim_aiocb_info
, s
->blk
, cb
, cb_opaque
);
497 iocb
->bh
= qemu_bh_new(ide_trim_bh_cb
, iocb
);
502 ide_issue_trim_cb(iocb
, 0);
503 return &iocb
->common
;
506 void ide_abort_command(IDEState
*s
)
508 ide_transfer_stop(s
);
509 s
->status
= READY_STAT
| ERR_STAT
;
513 static void ide_set_retry(IDEState
*s
)
515 s
->bus
->retry_unit
= s
->unit
;
516 s
->bus
->retry_sector_num
= ide_get_sector(s
);
517 s
->bus
->retry_nsector
= s
->nsector
;
520 static void ide_clear_retry(IDEState
*s
)
522 s
->bus
->retry_unit
= -1;
523 s
->bus
->retry_sector_num
= 0;
524 s
->bus
->retry_nsector
= 0;
527 /* prepare data transfer and tell what to do after */
528 bool ide_transfer_start_norecurse(IDEState
*s
, uint8_t *buf
, int size
,
529 EndTransferFunc
*end_transfer_func
)
532 s
->data_end
= buf
+ size
;
534 if (!(s
->status
& ERR_STAT
)) {
535 s
->status
|= DRQ_STAT
;
537 if (!s
->bus
->dma
->ops
->pio_transfer
) {
538 s
->end_transfer_func
= end_transfer_func
;
541 s
->bus
->dma
->ops
->pio_transfer(s
->bus
->dma
);
545 void ide_transfer_start(IDEState
*s
, uint8_t *buf
, int size
,
546 EndTransferFunc
*end_transfer_func
)
548 if (ide_transfer_start_norecurse(s
, buf
, size
, end_transfer_func
)) {
549 end_transfer_func(s
);
553 static void ide_cmd_done(IDEState
*s
)
555 if (s
->bus
->dma
->ops
->cmd_done
) {
556 s
->bus
->dma
->ops
->cmd_done(s
->bus
->dma
);
560 static void ide_transfer_halt(IDEState
*s
)
562 s
->end_transfer_func
= ide_transfer_stop
;
563 s
->data_ptr
= s
->io_buffer
;
564 s
->data_end
= s
->io_buffer
;
565 s
->status
&= ~DRQ_STAT
;
568 void ide_transfer_stop(IDEState
*s
)
570 ide_transfer_halt(s
);
574 int64_t ide_get_sector(IDEState
*s
)
577 if (s
->select
& 0x40) {
580 sector_num
= ((s
->select
& 0x0f) << 24) | (s
->hcyl
<< 16) |
581 (s
->lcyl
<< 8) | s
->sector
;
583 sector_num
= ((int64_t)s
->hob_hcyl
<< 40) |
584 ((int64_t) s
->hob_lcyl
<< 32) |
585 ((int64_t) s
->hob_sector
<< 24) |
586 ((int64_t) s
->hcyl
<< 16) |
587 ((int64_t) s
->lcyl
<< 8) | s
->sector
;
590 sector_num
= ((s
->hcyl
<< 8) | s
->lcyl
) * s
->heads
* s
->sectors
+
591 (s
->select
& 0x0f) * s
->sectors
+ (s
->sector
- 1);
596 void ide_set_sector(IDEState
*s
, int64_t sector_num
)
599 if (s
->select
& 0x40) {
601 s
->select
= (s
->select
& 0xf0) | (sector_num
>> 24);
602 s
->hcyl
= (sector_num
>> 16);
603 s
->lcyl
= (sector_num
>> 8);
604 s
->sector
= (sector_num
);
606 s
->sector
= sector_num
;
607 s
->lcyl
= sector_num
>> 8;
608 s
->hcyl
= sector_num
>> 16;
609 s
->hob_sector
= sector_num
>> 24;
610 s
->hob_lcyl
= sector_num
>> 32;
611 s
->hob_hcyl
= sector_num
>> 40;
614 cyl
= sector_num
/ (s
->heads
* s
->sectors
);
615 r
= sector_num
% (s
->heads
* s
->sectors
);
618 s
->select
= (s
->select
& 0xf0) | ((r
/ s
->sectors
) & 0x0f);
619 s
->sector
= (r
% s
->sectors
) + 1;
623 static void ide_rw_error(IDEState
*s
) {
624 ide_abort_command(s
);
628 static void ide_buffered_readv_cb(void *opaque
, int ret
)
630 IDEBufferedRequest
*req
= opaque
;
631 if (!req
->orphaned
) {
633 assert(req
->qiov
.size
== req
->original_qiov
->size
);
634 qemu_iovec_from_buf(req
->original_qiov
, 0,
635 req
->qiov
.local_iov
.iov_base
,
636 req
->original_qiov
->size
);
638 req
->original_cb(req
->original_opaque
, ret
);
640 QLIST_REMOVE(req
, list
);
641 qemu_vfree(qemu_iovec_buf(&req
->qiov
));
645 #define MAX_BUFFERED_REQS 16
647 BlockAIOCB
*ide_buffered_readv(IDEState
*s
, int64_t sector_num
,
648 QEMUIOVector
*iov
, int nb_sectors
,
649 BlockCompletionFunc
*cb
, void *opaque
)
652 IDEBufferedRequest
*req
;
655 QLIST_FOREACH(req
, &s
->buffered_requests
, list
) {
658 if (c
> MAX_BUFFERED_REQS
) {
659 return blk_abort_aio_request(s
->blk
, cb
, opaque
, -EIO
);
662 req
= g_new0(IDEBufferedRequest
, 1);
663 req
->original_qiov
= iov
;
664 req
->original_cb
= cb
;
665 req
->original_opaque
= opaque
;
666 qemu_iovec_init_buf(&req
->qiov
, blk_blockalign(s
->blk
, iov
->size
),
669 aioreq
= blk_aio_preadv(s
->blk
, sector_num
<< BDRV_SECTOR_BITS
,
670 &req
->qiov
, 0, ide_buffered_readv_cb
, req
);
672 QLIST_INSERT_HEAD(&s
->buffered_requests
, req
, list
);
677 * Cancel all pending DMA requests.
678 * Any buffered DMA requests are instantly canceled,
679 * but any pending unbuffered DMA requests must be waited on.
681 void ide_cancel_dma_sync(IDEState
*s
)
683 IDEBufferedRequest
*req
;
685 /* First invoke the callbacks of all buffered requests
686 * and flag those requests as orphaned. Ideally there
687 * are no unbuffered (Scatter Gather DMA Requests or
688 * write requests) pending and we can avoid to drain. */
689 QLIST_FOREACH(req
, &s
->buffered_requests
, list
) {
690 if (!req
->orphaned
) {
691 trace_ide_cancel_dma_sync_buffered(req
->original_cb
, req
);
692 req
->original_cb(req
->original_opaque
, -ECANCELED
);
694 req
->orphaned
= true;
698 * We can't cancel Scatter Gather DMA in the middle of the
699 * operation or a partial (not full) DMA transfer would reach
700 * the storage so we wait for completion instead (we beahve
701 * like if the DMA was completed by the time the guest trying
702 * to cancel dma with bmdma_cmd_writeb with BM_CMD_START not
705 * In the future we'll be able to safely cancel the I/O if the
706 * whole DMA operation will be submitted to disk with a single
707 * aio operation with preadv/pwritev.
709 if (s
->bus
->dma
->aiocb
) {
710 trace_ide_cancel_dma_sync_remaining();
712 assert(s
->bus
->dma
->aiocb
== NULL
);
716 static void ide_sector_read(IDEState
*s
);
718 static void ide_sector_read_cb(void *opaque
, int ret
)
720 IDEState
*s
= opaque
;
724 s
->status
&= ~BUSY_STAT
;
727 if (ide_handle_rw_error(s
, -ret
, IDE_RETRY_PIO
|
733 block_acct_done(blk_get_stats(s
->blk
), &s
->acct
);
736 if (n
> s
->req_nb_sectors
) {
737 n
= s
->req_nb_sectors
;
740 ide_set_sector(s
, ide_get_sector(s
) + n
);
742 /* Allow the guest to read the io_buffer */
743 ide_transfer_start(s
, s
->io_buffer
, n
* BDRV_SECTOR_SIZE
, ide_sector_read
);
747 static void ide_sector_read(IDEState
*s
)
752 s
->status
= READY_STAT
| SEEK_STAT
;
753 s
->error
= 0; /* not needed by IDE spec, but needed by Windows */
754 sector_num
= ide_get_sector(s
);
758 ide_transfer_stop(s
);
762 s
->status
|= BUSY_STAT
;
764 if (n
> s
->req_nb_sectors
) {
765 n
= s
->req_nb_sectors
;
768 trace_ide_sector_read(sector_num
, n
);
770 if (!ide_sect_range_ok(s
, sector_num
, n
)) {
772 block_acct_invalid(blk_get_stats(s
->blk
), BLOCK_ACCT_READ
);
776 qemu_iovec_init_buf(&s
->qiov
, s
->io_buffer
, n
* BDRV_SECTOR_SIZE
);
778 block_acct_start(blk_get_stats(s
->blk
), &s
->acct
,
779 n
* BDRV_SECTOR_SIZE
, BLOCK_ACCT_READ
);
780 s
->pio_aiocb
= ide_buffered_readv(s
, sector_num
, &s
->qiov
, n
,
781 ide_sector_read_cb
, s
);
784 void dma_buf_commit(IDEState
*s
, uint32_t tx_bytes
)
786 if (s
->bus
->dma
->ops
->commit_buf
) {
787 s
->bus
->dma
->ops
->commit_buf(s
->bus
->dma
, tx_bytes
);
789 s
->io_buffer_offset
+= tx_bytes
;
790 qemu_sglist_destroy(&s
->sg
);
793 void ide_set_inactive(IDEState
*s
, bool more
)
795 s
->bus
->dma
->aiocb
= NULL
;
797 if (s
->bus
->dma
->ops
->set_inactive
) {
798 s
->bus
->dma
->ops
->set_inactive(s
->bus
->dma
, more
);
803 void ide_dma_error(IDEState
*s
)
805 dma_buf_commit(s
, 0);
806 ide_abort_command(s
);
807 ide_set_inactive(s
, false);
811 int ide_handle_rw_error(IDEState
*s
, int error
, int op
)
813 bool is_read
= (op
& IDE_RETRY_READ
) != 0;
814 BlockErrorAction action
= blk_get_error_action(s
->blk
, is_read
, error
);
816 if (action
== BLOCK_ERROR_ACTION_STOP
) {
817 assert(s
->bus
->retry_unit
== s
->unit
);
818 s
->bus
->error_status
= op
;
819 } else if (action
== BLOCK_ERROR_ACTION_REPORT
) {
820 block_acct_failed(blk_get_stats(s
->blk
), &s
->acct
);
821 if (IS_IDE_RETRY_DMA(op
)) {
823 } else if (IS_IDE_RETRY_ATAPI(op
)) {
824 ide_atapi_io_error(s
, -error
);
829 blk_error_action(s
->blk
, action
, is_read
, error
);
830 return action
!= BLOCK_ERROR_ACTION_IGNORE
;
833 static void ide_dma_cb(void *opaque
, int ret
)
835 IDEState
*s
= opaque
;
839 bool stay_active
= false;
841 if (ret
== -EINVAL
) {
847 if (ide_handle_rw_error(s
, -ret
, ide_dma_cmd_to_retry(s
->dma_cmd
))) {
848 s
->bus
->dma
->aiocb
= NULL
;
849 dma_buf_commit(s
, 0);
854 n
= s
->io_buffer_size
>> 9;
855 if (n
> s
->nsector
) {
856 /* The PRDs were longer than needed for this request. Shorten them so
857 * we don't get a negative remainder. The Active bit must remain set
858 * after the request completes. */
863 sector_num
= ide_get_sector(s
);
865 assert(n
* 512 == s
->sg
.size
);
866 dma_buf_commit(s
, s
->sg
.size
);
868 ide_set_sector(s
, sector_num
);
872 /* end of transfer ? */
873 if (s
->nsector
== 0) {
874 s
->status
= READY_STAT
| SEEK_STAT
;
879 /* launch next transfer */
881 s
->io_buffer_index
= 0;
882 s
->io_buffer_size
= n
* 512;
883 if (s
->bus
->dma
->ops
->prepare_buf(s
->bus
->dma
, s
->io_buffer_size
) < 512) {
884 /* The PRDs were too short. Reset the Active bit, but don't raise an
886 s
->status
= READY_STAT
| SEEK_STAT
;
887 dma_buf_commit(s
, 0);
891 trace_ide_dma_cb(s
, sector_num
, n
, IDE_DMA_CMD_str(s
->dma_cmd
));
893 if ((s
->dma_cmd
== IDE_DMA_READ
|| s
->dma_cmd
== IDE_DMA_WRITE
) &&
894 !ide_sect_range_ok(s
, sector_num
, n
)) {
896 block_acct_invalid(blk_get_stats(s
->blk
), s
->acct
.type
);
900 offset
= sector_num
<< BDRV_SECTOR_BITS
;
901 switch (s
->dma_cmd
) {
903 s
->bus
->dma
->aiocb
= dma_blk_read(s
->blk
, &s
->sg
, offset
,
904 BDRV_SECTOR_SIZE
, ide_dma_cb
, s
);
907 s
->bus
->dma
->aiocb
= dma_blk_write(s
->blk
, &s
->sg
, offset
,
908 BDRV_SECTOR_SIZE
, ide_dma_cb
, s
);
911 s
->bus
->dma
->aiocb
= dma_blk_io(blk_get_aio_context(s
->blk
),
912 &s
->sg
, offset
, BDRV_SECTOR_SIZE
,
913 ide_issue_trim
, s
, ide_dma_cb
, s
,
914 DMA_DIRECTION_TO_DEVICE
);
922 if (s
->dma_cmd
== IDE_DMA_READ
|| s
->dma_cmd
== IDE_DMA_WRITE
) {
923 block_acct_done(blk_get_stats(s
->blk
), &s
->acct
);
925 ide_set_inactive(s
, stay_active
);
928 static void ide_sector_start_dma(IDEState
*s
, enum ide_dma_cmd dma_cmd
)
930 s
->status
= READY_STAT
| SEEK_STAT
| DRQ_STAT
;
931 s
->io_buffer_size
= 0;
932 s
->dma_cmd
= dma_cmd
;
936 block_acct_start(blk_get_stats(s
->blk
), &s
->acct
,
937 s
->nsector
* BDRV_SECTOR_SIZE
, BLOCK_ACCT_READ
);
940 block_acct_start(blk_get_stats(s
->blk
), &s
->acct
,
941 s
->nsector
* BDRV_SECTOR_SIZE
, BLOCK_ACCT_WRITE
);
947 ide_start_dma(s
, ide_dma_cb
);
950 void ide_start_dma(IDEState
*s
, BlockCompletionFunc
*cb
)
952 s
->io_buffer_index
= 0;
954 if (s
->bus
->dma
->ops
->start_dma
) {
955 s
->bus
->dma
->ops
->start_dma(s
->bus
->dma
, s
, cb
);
959 static void ide_sector_write(IDEState
*s
);
961 static void ide_sector_write_timer_cb(void *opaque
)
963 IDEState
*s
= opaque
;
967 static void ide_sector_write_cb(void *opaque
, int ret
)
969 IDEState
*s
= opaque
;
973 s
->status
&= ~BUSY_STAT
;
976 if (ide_handle_rw_error(s
, -ret
, IDE_RETRY_PIO
)) {
981 block_acct_done(blk_get_stats(s
->blk
), &s
->acct
);
984 if (n
> s
->req_nb_sectors
) {
985 n
= s
->req_nb_sectors
;
989 ide_set_sector(s
, ide_get_sector(s
) + n
);
990 if (s
->nsector
== 0) {
991 /* no more sectors to write */
992 ide_transfer_stop(s
);
995 if (n1
> s
->req_nb_sectors
) {
996 n1
= s
->req_nb_sectors
;
998 ide_transfer_start(s
, s
->io_buffer
, n1
* BDRV_SECTOR_SIZE
,
1002 if (win2k_install_hack
&& ((++s
->irq_count
% 16) == 0)) {
1003 /* It seems there is a bug in the Windows 2000 installer HDD
1004 IDE driver which fills the disk with empty logs when the
1005 IDE write IRQ comes too early. This hack tries to correct
1006 that at the expense of slower write performances. Use this
1007 option _only_ to install Windows 2000. You must disable it
1009 timer_mod(s
->sector_write_timer
, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL
) +
1010 (NANOSECONDS_PER_SECOND
/ 1000));
1012 ide_set_irq(s
->bus
);
1016 static void ide_sector_write(IDEState
*s
)
1021 s
->status
= READY_STAT
| SEEK_STAT
| BUSY_STAT
;
1022 sector_num
= ide_get_sector(s
);
1025 if (n
> s
->req_nb_sectors
) {
1026 n
= s
->req_nb_sectors
;
1029 trace_ide_sector_write(sector_num
, n
);
1031 if (!ide_sect_range_ok(s
, sector_num
, n
)) {
1033 block_acct_invalid(blk_get_stats(s
->blk
), BLOCK_ACCT_WRITE
);
1037 qemu_iovec_init_buf(&s
->qiov
, s
->io_buffer
, n
* BDRV_SECTOR_SIZE
);
1039 block_acct_start(blk_get_stats(s
->blk
), &s
->acct
,
1040 n
* BDRV_SECTOR_SIZE
, BLOCK_ACCT_WRITE
);
1041 s
->pio_aiocb
= blk_aio_pwritev(s
->blk
, sector_num
<< BDRV_SECTOR_BITS
,
1042 &s
->qiov
, 0, ide_sector_write_cb
, s
);
1045 static void ide_flush_cb(void *opaque
, int ret
)
1047 IDEState
*s
= opaque
;
1049 s
->pio_aiocb
= NULL
;
1052 /* XXX: What sector number to set here? */
1053 if (ide_handle_rw_error(s
, -ret
, IDE_RETRY_FLUSH
)) {
1059 block_acct_done(blk_get_stats(s
->blk
), &s
->acct
);
1061 s
->status
= READY_STAT
| SEEK_STAT
;
1063 ide_set_irq(s
->bus
);
1066 static void ide_flush_cache(IDEState
*s
)
1068 if (s
->blk
== NULL
) {
1073 s
->status
|= BUSY_STAT
;
1075 block_acct_start(blk_get_stats(s
->blk
), &s
->acct
, 0, BLOCK_ACCT_FLUSH
);
1076 s
->pio_aiocb
= blk_aio_flush(s
->blk
, ide_flush_cb
, s
);
1079 static void ide_cfata_metadata_inquiry(IDEState
*s
)
1084 p
= (uint16_t *) s
->io_buffer
;
1085 memset(p
, 0, 0x200);
1086 spd
= ((s
->mdata_size
- 1) >> 9) + 1;
1088 put_le16(p
+ 0, 0x0001); /* Data format revision */
1089 put_le16(p
+ 1, 0x0000); /* Media property: silicon */
1090 put_le16(p
+ 2, s
->media_changed
); /* Media status */
1091 put_le16(p
+ 3, s
->mdata_size
& 0xffff); /* Capacity in bytes (low) */
1092 put_le16(p
+ 4, s
->mdata_size
>> 16); /* Capacity in bytes (high) */
1093 put_le16(p
+ 5, spd
& 0xffff); /* Sectors per device (low) */
1094 put_le16(p
+ 6, spd
>> 16); /* Sectors per device (high) */
1097 static void ide_cfata_metadata_read(IDEState
*s
)
1101 if (((s
->hcyl
<< 16) | s
->lcyl
) << 9 > s
->mdata_size
+ 2) {
1102 s
->status
= ERR_STAT
;
1103 s
->error
= ABRT_ERR
;
1107 p
= (uint16_t *) s
->io_buffer
;
1108 memset(p
, 0, 0x200);
1110 put_le16(p
+ 0, s
->media_changed
); /* Media status */
1111 memcpy(p
+ 1, s
->mdata_storage
+ (((s
->hcyl
<< 16) | s
->lcyl
) << 9),
1112 MIN(MIN(s
->mdata_size
- (((s
->hcyl
<< 16) | s
->lcyl
) << 9),
1113 s
->nsector
<< 9), 0x200 - 2));
1116 static void ide_cfata_metadata_write(IDEState
*s
)
1118 if (((s
->hcyl
<< 16) | s
->lcyl
) << 9 > s
->mdata_size
+ 2) {
1119 s
->status
= ERR_STAT
;
1120 s
->error
= ABRT_ERR
;
1124 s
->media_changed
= 0;
1126 memcpy(s
->mdata_storage
+ (((s
->hcyl
<< 16) | s
->lcyl
) << 9),
1128 MIN(MIN(s
->mdata_size
- (((s
->hcyl
<< 16) | s
->lcyl
) << 9),
1129 s
->nsector
<< 9), 0x200 - 2));
1132 /* called when the inserted state of the media has changed */
1133 static void ide_cd_change_cb(void *opaque
, bool load
, Error
**errp
)
1135 IDEState
*s
= opaque
;
1136 uint64_t nb_sectors
;
1138 s
->tray_open
= !load
;
1139 blk_get_geometry(s
->blk
, &nb_sectors
);
1140 s
->nb_sectors
= nb_sectors
;
1143 * First indicate to the guest that a CD has been removed. That's
1144 * done on the next command the guest sends us.
1146 * Then we set UNIT_ATTENTION, by which the guest will
1147 * detect a new CD in the drive. See ide_atapi_cmd() for details.
1149 s
->cdrom_changed
= 1;
1150 s
->events
.new_media
= true;
1151 s
->events
.eject_request
= false;
1152 ide_set_irq(s
->bus
);
1155 static void ide_cd_eject_request_cb(void *opaque
, bool force
)
1157 IDEState
*s
= opaque
;
1159 s
->events
.eject_request
= true;
1161 s
->tray_locked
= false;
1163 ide_set_irq(s
->bus
);
1166 static void ide_cmd_lba48_transform(IDEState
*s
, int lba48
)
1170 /* handle the 'magic' 0 nsector count conversion here. to avoid
1171 * fiddling with the rest of the read logic, we just store the
1172 * full sector count in ->nsector and ignore ->hob_nsector from now
1178 if (!s
->nsector
&& !s
->hob_nsector
)
1181 int lo
= s
->nsector
;
1182 int hi
= s
->hob_nsector
;
1184 s
->nsector
= (hi
<< 8) | lo
;
1189 static void ide_clear_hob(IDEBus
*bus
)
1191 /* any write clears HOB high bit of device control register */
1192 bus
->ifs
[0].select
&= ~(1 << 7);
1193 bus
->ifs
[1].select
&= ~(1 << 7);
1196 /* IOport [W]rite [R]egisters */
1197 enum ATA_IOPORT_WR
{
1198 ATA_IOPORT_WR_DATA
= 0,
1199 ATA_IOPORT_WR_FEATURES
= 1,
1200 ATA_IOPORT_WR_SECTOR_COUNT
= 2,
1201 ATA_IOPORT_WR_SECTOR_NUMBER
= 3,
1202 ATA_IOPORT_WR_CYLINDER_LOW
= 4,
1203 ATA_IOPORT_WR_CYLINDER_HIGH
= 5,
1204 ATA_IOPORT_WR_DEVICE_HEAD
= 6,
1205 ATA_IOPORT_WR_COMMAND
= 7,
1206 ATA_IOPORT_WR_NUM_REGISTERS
,
1209 const char *ATA_IOPORT_WR_lookup
[ATA_IOPORT_WR_NUM_REGISTERS
] = {
1210 [ATA_IOPORT_WR_DATA
] = "Data",
1211 [ATA_IOPORT_WR_FEATURES
] = "Features",
1212 [ATA_IOPORT_WR_SECTOR_COUNT
] = "Sector Count",
1213 [ATA_IOPORT_WR_SECTOR_NUMBER
] = "Sector Number",
1214 [ATA_IOPORT_WR_CYLINDER_LOW
] = "Cylinder Low",
1215 [ATA_IOPORT_WR_CYLINDER_HIGH
] = "Cylinder High",
1216 [ATA_IOPORT_WR_DEVICE_HEAD
] = "Device/Head",
1217 [ATA_IOPORT_WR_COMMAND
] = "Command"
1220 void ide_ioport_write(void *opaque
, uint32_t addr
, uint32_t val
)
1222 IDEBus
*bus
= opaque
;
1223 IDEState
*s
= idebus_active_if(bus
);
1224 int reg_num
= addr
& 7;
1226 trace_ide_ioport_write(addr
, ATA_IOPORT_WR_lookup
[reg_num
], val
, bus
, s
);
1228 /* ignore writes to command block while busy with previous command */
1229 if (reg_num
!= 7 && (s
->status
& (BUSY_STAT
|DRQ_STAT
))) {
1236 case ATA_IOPORT_WR_FEATURES
:
1238 /* NOTE: data is written to the two drives */
1239 bus
->ifs
[0].hob_feature
= bus
->ifs
[0].feature
;
1240 bus
->ifs
[1].hob_feature
= bus
->ifs
[1].feature
;
1241 bus
->ifs
[0].feature
= val
;
1242 bus
->ifs
[1].feature
= val
;
1244 case ATA_IOPORT_WR_SECTOR_COUNT
:
1246 bus
->ifs
[0].hob_nsector
= bus
->ifs
[0].nsector
;
1247 bus
->ifs
[1].hob_nsector
= bus
->ifs
[1].nsector
;
1248 bus
->ifs
[0].nsector
= val
;
1249 bus
->ifs
[1].nsector
= val
;
1251 case ATA_IOPORT_WR_SECTOR_NUMBER
:
1253 bus
->ifs
[0].hob_sector
= bus
->ifs
[0].sector
;
1254 bus
->ifs
[1].hob_sector
= bus
->ifs
[1].sector
;
1255 bus
->ifs
[0].sector
= val
;
1256 bus
->ifs
[1].sector
= val
;
1258 case ATA_IOPORT_WR_CYLINDER_LOW
:
1260 bus
->ifs
[0].hob_lcyl
= bus
->ifs
[0].lcyl
;
1261 bus
->ifs
[1].hob_lcyl
= bus
->ifs
[1].lcyl
;
1262 bus
->ifs
[0].lcyl
= val
;
1263 bus
->ifs
[1].lcyl
= val
;
1265 case ATA_IOPORT_WR_CYLINDER_HIGH
:
1267 bus
->ifs
[0].hob_hcyl
= bus
->ifs
[0].hcyl
;
1268 bus
->ifs
[1].hob_hcyl
= bus
->ifs
[1].hcyl
;
1269 bus
->ifs
[0].hcyl
= val
;
1270 bus
->ifs
[1].hcyl
= val
;
1272 case ATA_IOPORT_WR_DEVICE_HEAD
:
1273 /* FIXME: HOB readback uses bit 7 */
1274 bus
->ifs
[0].select
= (val
& ~0x10) | 0xa0;
1275 bus
->ifs
[1].select
= (val
| 0x10) | 0xa0;
1277 bus
->unit
= (val
>> 4) & 1;
1280 case ATA_IOPORT_WR_COMMAND
:
1282 ide_exec_cmd(bus
, val
);
1287 static void ide_reset(IDEState
*s
)
1292 blk_aio_cancel(s
->pio_aiocb
);
1293 s
->pio_aiocb
= NULL
;
1296 if (s
->drive_kind
== IDE_CFATA
)
1297 s
->mult_sectors
= 0;
1299 s
->mult_sectors
= MAX_MULT_SECTORS
;
1316 s
->status
= READY_STAT
| SEEK_STAT
;
1320 /* ATAPI specific */
1323 s
->cdrom_changed
= 0;
1324 s
->packet_transfer_size
= 0;
1325 s
->elementary_transfer_size
= 0;
1326 s
->io_buffer_index
= 0;
1327 s
->cd_sector_size
= 0;
1332 s
->io_buffer_size
= 0;
1333 s
->req_nb_sectors
= 0;
1335 ide_set_signature(s
);
1336 /* init the transfer handler so that 0xffff is returned on data
1338 s
->end_transfer_func
= ide_dummy_transfer_stop
;
1339 ide_dummy_transfer_stop(s
);
1340 s
->media_changed
= 0;
1343 static bool cmd_nop(IDEState
*s
, uint8_t cmd
)
1348 static bool cmd_device_reset(IDEState
*s
, uint8_t cmd
)
1350 /* Halt PIO (in the DRQ phase), then DMA */
1351 ide_transfer_halt(s
);
1352 ide_cancel_dma_sync(s
);
1354 /* Reset any PIO commands, reset signature, etc */
1357 /* RESET: ATA8-ACS3 7.10.4 "Normal Outputs";
1358 * ATA8-ACS3 Table 184 "Device Signatures for Normal Output" */
1361 /* Do not overwrite status register */
1365 static bool cmd_data_set_management(IDEState
*s
, uint8_t cmd
)
1367 switch (s
->feature
) {
1370 ide_sector_start_dma(s
, IDE_DMA_TRIM
);
1376 ide_abort_command(s
);
1380 static bool cmd_identify(IDEState
*s
, uint8_t cmd
)
1382 if (s
->blk
&& s
->drive_kind
!= IDE_CD
) {
1383 if (s
->drive_kind
!= IDE_CFATA
) {
1386 ide_cfata_identify(s
);
1388 s
->status
= READY_STAT
| SEEK_STAT
;
1389 ide_transfer_start(s
, s
->io_buffer
, 512, ide_transfer_stop
);
1390 ide_set_irq(s
->bus
);
1393 if (s
->drive_kind
== IDE_CD
) {
1394 ide_set_signature(s
);
1396 ide_abort_command(s
);
1402 static bool cmd_verify(IDEState
*s
, uint8_t cmd
)
1404 bool lba48
= (cmd
== WIN_VERIFY_EXT
);
1406 /* do sector number check ? */
1407 ide_cmd_lba48_transform(s
, lba48
);
1412 static bool cmd_set_multiple_mode(IDEState
*s
, uint8_t cmd
)
1414 if (s
->drive_kind
== IDE_CFATA
&& s
->nsector
== 0) {
1415 /* Disable Read and Write Multiple */
1416 s
->mult_sectors
= 0;
1417 } else if ((s
->nsector
& 0xff) != 0 &&
1418 ((s
->nsector
& 0xff) > MAX_MULT_SECTORS
||
1419 (s
->nsector
& (s
->nsector
- 1)) != 0)) {
1420 ide_abort_command(s
);
1422 s
->mult_sectors
= s
->nsector
& 0xff;
1428 static bool cmd_read_multiple(IDEState
*s
, uint8_t cmd
)
1430 bool lba48
= (cmd
== WIN_MULTREAD_EXT
);
1432 if (!s
->blk
|| !s
->mult_sectors
) {
1433 ide_abort_command(s
);
1437 ide_cmd_lba48_transform(s
, lba48
);
1438 s
->req_nb_sectors
= s
->mult_sectors
;
1443 static bool cmd_write_multiple(IDEState
*s
, uint8_t cmd
)
1445 bool lba48
= (cmd
== WIN_MULTWRITE_EXT
);
1448 if (!s
->blk
|| !s
->mult_sectors
) {
1449 ide_abort_command(s
);
1453 ide_cmd_lba48_transform(s
, lba48
);
1455 s
->req_nb_sectors
= s
->mult_sectors
;
1456 n
= MIN(s
->nsector
, s
->req_nb_sectors
);
1458 s
->status
= SEEK_STAT
| READY_STAT
;
1459 ide_transfer_start(s
, s
->io_buffer
, 512 * n
, ide_sector_write
);
1461 s
->media_changed
= 1;
1466 static bool cmd_read_pio(IDEState
*s
, uint8_t cmd
)
1468 bool lba48
= (cmd
== WIN_READ_EXT
);
1470 if (s
->drive_kind
== IDE_CD
) {
1471 ide_set_signature(s
); /* odd, but ATA4 8.27.5.2 requires it */
1472 ide_abort_command(s
);
1477 ide_abort_command(s
);
1481 ide_cmd_lba48_transform(s
, lba48
);
1482 s
->req_nb_sectors
= 1;
1488 static bool cmd_write_pio(IDEState
*s
, uint8_t cmd
)
1490 bool lba48
= (cmd
== WIN_WRITE_EXT
);
1493 ide_abort_command(s
);
1497 ide_cmd_lba48_transform(s
, lba48
);
1499 s
->req_nb_sectors
= 1;
1500 s
->status
= SEEK_STAT
| READY_STAT
;
1501 ide_transfer_start(s
, s
->io_buffer
, 512, ide_sector_write
);
1503 s
->media_changed
= 1;
1508 static bool cmd_read_dma(IDEState
*s
, uint8_t cmd
)
1510 bool lba48
= (cmd
== WIN_READDMA_EXT
);
1513 ide_abort_command(s
);
1517 ide_cmd_lba48_transform(s
, lba48
);
1518 ide_sector_start_dma(s
, IDE_DMA_READ
);
1523 static bool cmd_write_dma(IDEState
*s
, uint8_t cmd
)
1525 bool lba48
= (cmd
== WIN_WRITEDMA_EXT
);
1528 ide_abort_command(s
);
1532 ide_cmd_lba48_transform(s
, lba48
);
1533 ide_sector_start_dma(s
, IDE_DMA_WRITE
);
1535 s
->media_changed
= 1;
1540 static bool cmd_flush_cache(IDEState
*s
, uint8_t cmd
)
1546 static bool cmd_seek(IDEState
*s
, uint8_t cmd
)
1548 /* XXX: Check that seek is within bounds */
1552 static bool cmd_read_native_max(IDEState
*s
, uint8_t cmd
)
1554 bool lba48
= (cmd
== WIN_READ_NATIVE_MAX_EXT
);
1556 /* Refuse if no sectors are addressable (e.g. medium not inserted) */
1557 if (s
->nb_sectors
== 0) {
1558 ide_abort_command(s
);
1562 ide_cmd_lba48_transform(s
, lba48
);
1563 ide_set_sector(s
, s
->nb_sectors
- 1);
1568 static bool cmd_check_power_mode(IDEState
*s
, uint8_t cmd
)
1570 s
->nsector
= 0xff; /* device active or idle */
1574 static bool cmd_set_features(IDEState
*s
, uint8_t cmd
)
1576 uint16_t *identify_data
;
1579 ide_abort_command(s
);
1583 /* XXX: valid for CDROM ? */
1584 switch (s
->feature
) {
1585 case 0x02: /* write cache enable */
1586 blk_set_enable_write_cache(s
->blk
, true);
1587 identify_data
= (uint16_t *)s
->identify_data
;
1588 put_le16(identify_data
+ 85, (1 << 14) | (1 << 5) | 1);
1590 case 0x82: /* write cache disable */
1591 blk_set_enable_write_cache(s
->blk
, false);
1592 identify_data
= (uint16_t *)s
->identify_data
;
1593 put_le16(identify_data
+ 85, (1 << 14) | 1);
1596 case 0xcc: /* reverting to power-on defaults enable */
1597 case 0x66: /* reverting to power-on defaults disable */
1598 case 0xaa: /* read look-ahead enable */
1599 case 0x55: /* read look-ahead disable */
1600 case 0x05: /* set advanced power management mode */
1601 case 0x85: /* disable advanced power management mode */
1602 case 0x69: /* NOP */
1603 case 0x67: /* NOP */
1604 case 0x96: /* NOP */
1605 case 0x9a: /* NOP */
1606 case 0x42: /* enable Automatic Acoustic Mode */
1607 case 0xc2: /* disable Automatic Acoustic Mode */
1609 case 0x03: /* set transfer mode */
1611 uint8_t val
= s
->nsector
& 0x07;
1612 identify_data
= (uint16_t *)s
->identify_data
;
1614 switch (s
->nsector
>> 3) {
1615 case 0x00: /* pio default */
1616 case 0x01: /* pio mode */
1617 put_le16(identify_data
+ 62, 0x07);
1618 put_le16(identify_data
+ 63, 0x07);
1619 put_le16(identify_data
+ 88, 0x3f);
1621 case 0x02: /* sigle word dma mode*/
1622 put_le16(identify_data
+ 62, 0x07 | (1 << (val
+ 8)));
1623 put_le16(identify_data
+ 63, 0x07);
1624 put_le16(identify_data
+ 88, 0x3f);
1626 case 0x04: /* mdma mode */
1627 put_le16(identify_data
+ 62, 0x07);
1628 put_le16(identify_data
+ 63, 0x07 | (1 << (val
+ 8)));
1629 put_le16(identify_data
+ 88, 0x3f);
1631 case 0x08: /* udma mode */
1632 put_le16(identify_data
+ 62, 0x07);
1633 put_le16(identify_data
+ 63, 0x07);
1634 put_le16(identify_data
+ 88, 0x3f | (1 << (val
+ 8)));
1644 ide_abort_command(s
);
1649 /*** ATAPI commands ***/
1651 static bool cmd_identify_packet(IDEState
*s
, uint8_t cmd
)
1653 ide_atapi_identify(s
);
1654 s
->status
= READY_STAT
| SEEK_STAT
;
1655 ide_transfer_start(s
, s
->io_buffer
, 512, ide_transfer_stop
);
1656 ide_set_irq(s
->bus
);
1660 static bool cmd_exec_dev_diagnostic(IDEState
*s
, uint8_t cmd
)
1662 ide_set_signature(s
);
1664 if (s
->drive_kind
== IDE_CD
) {
1665 s
->status
= 0; /* ATAPI spec (v6) section 9.10 defines packet
1666 * devices to return a clear status register
1667 * with READY_STAT *not* set. */
1670 s
->status
= READY_STAT
| SEEK_STAT
;
1671 /* The bits of the error register are not as usual for this command!
1672 * They are part of the regular output (this is why ERR_STAT isn't set)
1673 * Device 0 passed, Device 1 passed or not present. */
1675 ide_set_irq(s
->bus
);
1681 static bool cmd_packet(IDEState
*s
, uint8_t cmd
)
1683 /* overlapping commands not supported */
1684 if (s
->feature
& 0x02) {
1685 ide_abort_command(s
);
1689 s
->status
= READY_STAT
| SEEK_STAT
;
1690 s
->atapi_dma
= s
->feature
& 1;
1692 s
->dma_cmd
= IDE_DMA_ATAPI
;
1695 ide_transfer_start(s
, s
->io_buffer
, ATAPI_PACKET_SIZE
,
1701 /*** CF-ATA commands ***/
1703 static bool cmd_cfa_req_ext_error_code(IDEState
*s
, uint8_t cmd
)
1705 s
->error
= 0x09; /* miscellaneous error */
1706 s
->status
= READY_STAT
| SEEK_STAT
;
1707 ide_set_irq(s
->bus
);
1712 static bool cmd_cfa_erase_sectors(IDEState
*s
, uint8_t cmd
)
1714 /* WIN_SECURITY_FREEZE_LOCK has the same ID as CFA_WEAR_LEVEL and is
1715 * required for Windows 8 to work with AHCI */
1717 if (cmd
== CFA_WEAR_LEVEL
) {
1721 if (cmd
== CFA_ERASE_SECTORS
) {
1722 s
->media_changed
= 1;
1728 static bool cmd_cfa_translate_sector(IDEState
*s
, uint8_t cmd
)
1730 s
->status
= READY_STAT
| SEEK_STAT
;
1732 memset(s
->io_buffer
, 0, 0x200);
1733 s
->io_buffer
[0x00] = s
->hcyl
; /* Cyl MSB */
1734 s
->io_buffer
[0x01] = s
->lcyl
; /* Cyl LSB */
1735 s
->io_buffer
[0x02] = s
->select
; /* Head */
1736 s
->io_buffer
[0x03] = s
->sector
; /* Sector */
1737 s
->io_buffer
[0x04] = ide_get_sector(s
) >> 16; /* LBA MSB */
1738 s
->io_buffer
[0x05] = ide_get_sector(s
) >> 8; /* LBA */
1739 s
->io_buffer
[0x06] = ide_get_sector(s
) >> 0; /* LBA LSB */
1740 s
->io_buffer
[0x13] = 0x00; /* Erase flag */
1741 s
->io_buffer
[0x18] = 0x00; /* Hot count */
1742 s
->io_buffer
[0x19] = 0x00; /* Hot count */
1743 s
->io_buffer
[0x1a] = 0x01; /* Hot count */
1745 ide_transfer_start(s
, s
->io_buffer
, 0x200, ide_transfer_stop
);
1746 ide_set_irq(s
->bus
);
1751 static bool cmd_cfa_access_metadata_storage(IDEState
*s
, uint8_t cmd
)
1753 switch (s
->feature
) {
1754 case 0x02: /* Inquiry Metadata Storage */
1755 ide_cfata_metadata_inquiry(s
);
1757 case 0x03: /* Read Metadata Storage */
1758 ide_cfata_metadata_read(s
);
1760 case 0x04: /* Write Metadata Storage */
1761 ide_cfata_metadata_write(s
);
1764 ide_abort_command(s
);
1768 ide_transfer_start(s
, s
->io_buffer
, 0x200, ide_transfer_stop
);
1769 s
->status
= 0x00; /* NOTE: READY is _not_ set */
1770 ide_set_irq(s
->bus
);
1775 static bool cmd_ibm_sense_condition(IDEState
*s
, uint8_t cmd
)
1777 switch (s
->feature
) {
1778 case 0x01: /* sense temperature in device */
1779 s
->nsector
= 0x50; /* +20 C */
1782 ide_abort_command(s
);
1790 /*** SMART commands ***/
1792 static bool cmd_smart(IDEState
*s
, uint8_t cmd
)
1796 if (s
->hcyl
!= 0xc2 || s
->lcyl
!= 0x4f) {
1800 if (!s
->smart_enabled
&& s
->feature
!= SMART_ENABLE
) {
1804 switch (s
->feature
) {
1806 s
->smart_enabled
= 0;
1810 s
->smart_enabled
= 1;
1813 case SMART_ATTR_AUTOSAVE
:
1814 switch (s
->sector
) {
1816 s
->smart_autosave
= 0;
1819 s
->smart_autosave
= 1;
1827 if (!s
->smart_errors
) {
1836 case SMART_READ_THRESH
:
1837 memset(s
->io_buffer
, 0, 0x200);
1838 s
->io_buffer
[0] = 0x01; /* smart struct version */
1840 for (n
= 0; n
< ARRAY_SIZE(smart_attributes
); n
++) {
1841 s
->io_buffer
[2 + 0 + (n
* 12)] = smart_attributes
[n
][0];
1842 s
->io_buffer
[2 + 1 + (n
* 12)] = smart_attributes
[n
][11];
1846 for (n
= 0; n
< 511; n
++) {
1847 s
->io_buffer
[511] += s
->io_buffer
[n
];
1849 s
->io_buffer
[511] = 0x100 - s
->io_buffer
[511];
1851 s
->status
= READY_STAT
| SEEK_STAT
;
1852 ide_transfer_start(s
, s
->io_buffer
, 0x200, ide_transfer_stop
);
1853 ide_set_irq(s
->bus
);
1856 case SMART_READ_DATA
:
1857 memset(s
->io_buffer
, 0, 0x200);
1858 s
->io_buffer
[0] = 0x01; /* smart struct version */
1860 for (n
= 0; n
< ARRAY_SIZE(smart_attributes
); n
++) {
1862 for (i
= 0; i
< 11; i
++) {
1863 s
->io_buffer
[2 + i
+ (n
* 12)] = smart_attributes
[n
][i
];
1867 s
->io_buffer
[362] = 0x02 | (s
->smart_autosave
? 0x80 : 0x00);
1868 if (s
->smart_selftest_count
== 0) {
1869 s
->io_buffer
[363] = 0;
1872 s
->smart_selftest_data
[3 +
1873 (s
->smart_selftest_count
- 1) *
1876 s
->io_buffer
[364] = 0x20;
1877 s
->io_buffer
[365] = 0x01;
1878 /* offline data collection capacity: execute + self-test*/
1879 s
->io_buffer
[367] = (1 << 4 | 1 << 3 | 1);
1880 s
->io_buffer
[368] = 0x03; /* smart capability (1) */
1881 s
->io_buffer
[369] = 0x00; /* smart capability (2) */
1882 s
->io_buffer
[370] = 0x01; /* error logging supported */
1883 s
->io_buffer
[372] = 0x02; /* minutes for poll short test */
1884 s
->io_buffer
[373] = 0x36; /* minutes for poll ext test */
1885 s
->io_buffer
[374] = 0x01; /* minutes for poll conveyance */
1887 for (n
= 0; n
< 511; n
++) {
1888 s
->io_buffer
[511] += s
->io_buffer
[n
];
1890 s
->io_buffer
[511] = 0x100 - s
->io_buffer
[511];
1892 s
->status
= READY_STAT
| SEEK_STAT
;
1893 ide_transfer_start(s
, s
->io_buffer
, 0x200, ide_transfer_stop
);
1894 ide_set_irq(s
->bus
);
1897 case SMART_READ_LOG
:
1898 switch (s
->sector
) {
1899 case 0x01: /* summary smart error log */
1900 memset(s
->io_buffer
, 0, 0x200);
1901 s
->io_buffer
[0] = 0x01;
1902 s
->io_buffer
[1] = 0x00; /* no error entries */
1903 s
->io_buffer
[452] = s
->smart_errors
& 0xff;
1904 s
->io_buffer
[453] = (s
->smart_errors
& 0xff00) >> 8;
1906 for (n
= 0; n
< 511; n
++) {
1907 s
->io_buffer
[511] += s
->io_buffer
[n
];
1909 s
->io_buffer
[511] = 0x100 - s
->io_buffer
[511];
1911 case 0x06: /* smart self test log */
1912 memset(s
->io_buffer
, 0, 0x200);
1913 s
->io_buffer
[0] = 0x01;
1914 if (s
->smart_selftest_count
== 0) {
1915 s
->io_buffer
[508] = 0;
1917 s
->io_buffer
[508] = s
->smart_selftest_count
;
1918 for (n
= 2; n
< 506; n
++) {
1919 s
->io_buffer
[n
] = s
->smart_selftest_data
[n
];
1923 for (n
= 0; n
< 511; n
++) {
1924 s
->io_buffer
[511] += s
->io_buffer
[n
];
1926 s
->io_buffer
[511] = 0x100 - s
->io_buffer
[511];
1931 s
->status
= READY_STAT
| SEEK_STAT
;
1932 ide_transfer_start(s
, s
->io_buffer
, 0x200, ide_transfer_stop
);
1933 ide_set_irq(s
->bus
);
1936 case SMART_EXECUTE_OFFLINE
:
1937 switch (s
->sector
) {
1938 case 0: /* off-line routine */
1939 case 1: /* short self test */
1940 case 2: /* extended self test */
1941 s
->smart_selftest_count
++;
1942 if (s
->smart_selftest_count
> 21) {
1943 s
->smart_selftest_count
= 1;
1945 n
= 2 + (s
->smart_selftest_count
- 1) * 24;
1946 s
->smart_selftest_data
[n
] = s
->sector
;
1947 s
->smart_selftest_data
[n
+ 1] = 0x00; /* OK and finished */
1948 s
->smart_selftest_data
[n
+ 2] = 0x34; /* hour count lsb */
1949 s
->smart_selftest_data
[n
+ 3] = 0x12; /* hour count msb */
1958 ide_abort_command(s
);
1962 #define HD_OK (1u << IDE_HD)
1963 #define CD_OK (1u << IDE_CD)
1964 #define CFA_OK (1u << IDE_CFATA)
1965 #define HD_CFA_OK (HD_OK | CFA_OK)
1966 #define ALL_OK (HD_OK | CD_OK | CFA_OK)
1968 /* Set the Disk Seek Completed status bit during completion */
1969 #define SET_DSC (1u << 8)
1971 /* See ACS-2 T13/2015-D Table B.2 Command codes */
1972 static const struct {
1973 /* Returns true if the completion code should be run */
1974 bool (*handler
)(IDEState
*s
, uint8_t cmd
);
1976 } ide_cmd_table
[0x100] = {
1977 /* NOP not implemented, mandatory for CD */
1978 [CFA_REQ_EXT_ERROR_CODE
] = { cmd_cfa_req_ext_error_code
, CFA_OK
},
1979 [WIN_DSM
] = { cmd_data_set_management
, HD_CFA_OK
},
1980 [WIN_DEVICE_RESET
] = { cmd_device_reset
, CD_OK
},
1981 [WIN_RECAL
] = { cmd_nop
, HD_CFA_OK
| SET_DSC
},
1982 [WIN_READ
] = { cmd_read_pio
, ALL_OK
},
1983 [WIN_READ_ONCE
] = { cmd_read_pio
, HD_CFA_OK
},
1984 [WIN_READ_EXT
] = { cmd_read_pio
, HD_CFA_OK
},
1985 [WIN_READDMA_EXT
] = { cmd_read_dma
, HD_CFA_OK
},
1986 [WIN_READ_NATIVE_MAX_EXT
] = { cmd_read_native_max
, HD_CFA_OK
| SET_DSC
},
1987 [WIN_MULTREAD_EXT
] = { cmd_read_multiple
, HD_CFA_OK
},
1988 [WIN_WRITE
] = { cmd_write_pio
, HD_CFA_OK
},
1989 [WIN_WRITE_ONCE
] = { cmd_write_pio
, HD_CFA_OK
},
1990 [WIN_WRITE_EXT
] = { cmd_write_pio
, HD_CFA_OK
},
1991 [WIN_WRITEDMA_EXT
] = { cmd_write_dma
, HD_CFA_OK
},
1992 [CFA_WRITE_SECT_WO_ERASE
] = { cmd_write_pio
, CFA_OK
},
1993 [WIN_MULTWRITE_EXT
] = { cmd_write_multiple
, HD_CFA_OK
},
1994 [WIN_WRITE_VERIFY
] = { cmd_write_pio
, HD_CFA_OK
},
1995 [WIN_VERIFY
] = { cmd_verify
, HD_CFA_OK
| SET_DSC
},
1996 [WIN_VERIFY_ONCE
] = { cmd_verify
, HD_CFA_OK
| SET_DSC
},
1997 [WIN_VERIFY_EXT
] = { cmd_verify
, HD_CFA_OK
| SET_DSC
},
1998 [WIN_SEEK
] = { cmd_seek
, HD_CFA_OK
| SET_DSC
},
1999 [CFA_TRANSLATE_SECTOR
] = { cmd_cfa_translate_sector
, CFA_OK
},
2000 [WIN_DIAGNOSE
] = { cmd_exec_dev_diagnostic
, ALL_OK
},
2001 [WIN_SPECIFY
] = { cmd_nop
, HD_CFA_OK
| SET_DSC
},
2002 [WIN_STANDBYNOW2
] = { cmd_nop
, HD_CFA_OK
},
2003 [WIN_IDLEIMMEDIATE2
] = { cmd_nop
, HD_CFA_OK
},
2004 [WIN_STANDBY2
] = { cmd_nop
, HD_CFA_OK
},
2005 [WIN_SETIDLE2
] = { cmd_nop
, HD_CFA_OK
},
2006 [WIN_CHECKPOWERMODE2
] = { cmd_check_power_mode
, HD_CFA_OK
| SET_DSC
},
2007 [WIN_SLEEPNOW2
] = { cmd_nop
, HD_CFA_OK
},
2008 [WIN_PACKETCMD
] = { cmd_packet
, CD_OK
},
2009 [WIN_PIDENTIFY
] = { cmd_identify_packet
, CD_OK
},
2010 [WIN_SMART
] = { cmd_smart
, HD_CFA_OK
| SET_DSC
},
2011 [CFA_ACCESS_METADATA_STORAGE
] = { cmd_cfa_access_metadata_storage
, CFA_OK
},
2012 [CFA_ERASE_SECTORS
] = { cmd_cfa_erase_sectors
, CFA_OK
| SET_DSC
},
2013 [WIN_MULTREAD
] = { cmd_read_multiple
, HD_CFA_OK
},
2014 [WIN_MULTWRITE
] = { cmd_write_multiple
, HD_CFA_OK
},
2015 [WIN_SETMULT
] = { cmd_set_multiple_mode
, HD_CFA_OK
| SET_DSC
},
2016 [WIN_READDMA
] = { cmd_read_dma
, HD_CFA_OK
},
2017 [WIN_READDMA_ONCE
] = { cmd_read_dma
, HD_CFA_OK
},
2018 [WIN_WRITEDMA
] = { cmd_write_dma
, HD_CFA_OK
},
2019 [WIN_WRITEDMA_ONCE
] = { cmd_write_dma
, HD_CFA_OK
},
2020 [CFA_WRITE_MULTI_WO_ERASE
] = { cmd_write_multiple
, CFA_OK
},
2021 [WIN_STANDBYNOW1
] = { cmd_nop
, HD_CFA_OK
},
2022 [WIN_IDLEIMMEDIATE
] = { cmd_nop
, HD_CFA_OK
},
2023 [WIN_STANDBY
] = { cmd_nop
, HD_CFA_OK
},
2024 [WIN_SETIDLE1
] = { cmd_nop
, HD_CFA_OK
},
2025 [WIN_CHECKPOWERMODE1
] = { cmd_check_power_mode
, HD_CFA_OK
| SET_DSC
},
2026 [WIN_SLEEPNOW1
] = { cmd_nop
, HD_CFA_OK
},
2027 [WIN_FLUSH_CACHE
] = { cmd_flush_cache
, ALL_OK
},
2028 [WIN_FLUSH_CACHE_EXT
] = { cmd_flush_cache
, HD_CFA_OK
},
2029 [WIN_IDENTIFY
] = { cmd_identify
, ALL_OK
},
2030 [WIN_SETFEATURES
] = { cmd_set_features
, ALL_OK
| SET_DSC
},
2031 [IBM_SENSE_CONDITION
] = { cmd_ibm_sense_condition
, CFA_OK
| SET_DSC
},
2032 [CFA_WEAR_LEVEL
] = { cmd_cfa_erase_sectors
, HD_CFA_OK
| SET_DSC
},
2033 [WIN_READ_NATIVE_MAX
] = { cmd_read_native_max
, HD_CFA_OK
| SET_DSC
},
2036 static bool ide_cmd_permitted(IDEState
*s
, uint32_t cmd
)
2038 return cmd
< ARRAY_SIZE(ide_cmd_table
)
2039 && (ide_cmd_table
[cmd
].flags
& (1u << s
->drive_kind
));
2042 void ide_exec_cmd(IDEBus
*bus
, uint32_t val
)
2047 s
= idebus_active_if(bus
);
2048 trace_ide_exec_cmd(bus
, s
, val
);
2050 /* ignore commands to non existent slave */
2051 if (s
!= bus
->ifs
&& !s
->blk
) {
2055 /* Only RESET is allowed while BSY and/or DRQ are set,
2056 * and only to ATAPI devices. */
2057 if (s
->status
& (BUSY_STAT
|DRQ_STAT
)) {
2058 if (val
!= WIN_DEVICE_RESET
|| s
->drive_kind
!= IDE_CD
) {
2063 if (!ide_cmd_permitted(s
, val
)) {
2064 ide_abort_command(s
);
2065 ide_set_irq(s
->bus
);
2069 s
->status
= READY_STAT
| BUSY_STAT
;
2071 s
->io_buffer_offset
= 0;
2073 complete
= ide_cmd_table
[val
].handler(s
, val
);
2075 s
->status
&= ~BUSY_STAT
;
2076 assert(!!s
->error
== !!(s
->status
& ERR_STAT
));
2078 if ((ide_cmd_table
[val
].flags
& SET_DSC
) && !s
->error
) {
2079 s
->status
|= SEEK_STAT
;
2083 ide_set_irq(s
->bus
);
2087 /* IOport [R]ead [R]egisters */
2088 enum ATA_IOPORT_RR
{
2089 ATA_IOPORT_RR_DATA
= 0,
2090 ATA_IOPORT_RR_ERROR
= 1,
2091 ATA_IOPORT_RR_SECTOR_COUNT
= 2,
2092 ATA_IOPORT_RR_SECTOR_NUMBER
= 3,
2093 ATA_IOPORT_RR_CYLINDER_LOW
= 4,
2094 ATA_IOPORT_RR_CYLINDER_HIGH
= 5,
2095 ATA_IOPORT_RR_DEVICE_HEAD
= 6,
2096 ATA_IOPORT_RR_STATUS
= 7,
2097 ATA_IOPORT_RR_NUM_REGISTERS
,
2100 const char *ATA_IOPORT_RR_lookup
[ATA_IOPORT_RR_NUM_REGISTERS
] = {
2101 [ATA_IOPORT_RR_DATA
] = "Data",
2102 [ATA_IOPORT_RR_ERROR
] = "Error",
2103 [ATA_IOPORT_RR_SECTOR_COUNT
] = "Sector Count",
2104 [ATA_IOPORT_RR_SECTOR_NUMBER
] = "Sector Number",
2105 [ATA_IOPORT_RR_CYLINDER_LOW
] = "Cylinder Low",
2106 [ATA_IOPORT_RR_CYLINDER_HIGH
] = "Cylinder High",
2107 [ATA_IOPORT_RR_DEVICE_HEAD
] = "Device/Head",
2108 [ATA_IOPORT_RR_STATUS
] = "Status"
2111 uint32_t ide_ioport_read(void *opaque
, uint32_t addr
)
2113 IDEBus
*bus
= opaque
;
2114 IDEState
*s
= idebus_active_if(bus
);
2119 /* FIXME: HOB readback uses bit 7, but it's always set right now */
2120 //hob = s->select & (1 << 7);
2123 case ATA_IOPORT_RR_DATA
:
2126 case ATA_IOPORT_RR_ERROR
:
2127 if ((!bus
->ifs
[0].blk
&& !bus
->ifs
[1].blk
) ||
2128 (s
!= bus
->ifs
&& !s
->blk
)) {
2133 ret
= s
->hob_feature
;
2136 case ATA_IOPORT_RR_SECTOR_COUNT
:
2137 if (!bus
->ifs
[0].blk
&& !bus
->ifs
[1].blk
) {
2140 ret
= s
->nsector
& 0xff;
2142 ret
= s
->hob_nsector
;
2145 case ATA_IOPORT_RR_SECTOR_NUMBER
:
2146 if (!bus
->ifs
[0].blk
&& !bus
->ifs
[1].blk
) {
2151 ret
= s
->hob_sector
;
2154 case ATA_IOPORT_RR_CYLINDER_LOW
:
2155 if (!bus
->ifs
[0].blk
&& !bus
->ifs
[1].blk
) {
2163 case ATA_IOPORT_RR_CYLINDER_HIGH
:
2164 if (!bus
->ifs
[0].blk
&& !bus
->ifs
[1].blk
) {
2172 case ATA_IOPORT_RR_DEVICE_HEAD
:
2173 if (!bus
->ifs
[0].blk
&& !bus
->ifs
[1].blk
) {
2180 case ATA_IOPORT_RR_STATUS
:
2181 if ((!bus
->ifs
[0].blk
&& !bus
->ifs
[1].blk
) ||
2182 (s
!= bus
->ifs
&& !s
->blk
)) {
2187 qemu_irq_lower(bus
->irq
);
2191 trace_ide_ioport_read(addr
, ATA_IOPORT_RR_lookup
[reg_num
], ret
, bus
, s
);
2195 uint32_t ide_status_read(void *opaque
, uint32_t addr
)
2197 IDEBus
*bus
= opaque
;
2198 IDEState
*s
= idebus_active_if(bus
);
2201 if ((!bus
->ifs
[0].blk
&& !bus
->ifs
[1].blk
) ||
2202 (s
!= bus
->ifs
&& !s
->blk
)) {
2208 trace_ide_status_read(addr
, ret
, bus
, s
);
2212 void ide_cmd_write(void *opaque
, uint32_t addr
, uint32_t val
)
2214 IDEBus
*bus
= opaque
;
2218 trace_ide_cmd_write(addr
, val
, bus
);
2220 /* common for both drives */
2221 if (!(bus
->cmd
& IDE_CMD_RESET
) &&
2222 (val
& IDE_CMD_RESET
)) {
2223 /* reset low to high */
2224 for(i
= 0;i
< 2; i
++) {
2226 s
->status
= BUSY_STAT
| SEEK_STAT
;
2229 } else if ((bus
->cmd
& IDE_CMD_RESET
) &&
2230 !(val
& IDE_CMD_RESET
)) {
2232 for(i
= 0;i
< 2; i
++) {
2234 if (s
->drive_kind
== IDE_CD
)
2235 s
->status
= 0x00; /* NOTE: READY is _not_ set */
2237 s
->status
= READY_STAT
| SEEK_STAT
;
2238 ide_set_signature(s
);
2246 * Returns true if the running PIO transfer is a PIO out (i.e. data is
2247 * transferred from the device to the guest), false if it's a PIO in
2249 static bool ide_is_pio_out(IDEState
*s
)
2251 if (s
->end_transfer_func
== ide_sector_write
||
2252 s
->end_transfer_func
== ide_atapi_cmd
) {
2254 } else if (s
->end_transfer_func
== ide_sector_read
||
2255 s
->end_transfer_func
== ide_transfer_stop
||
2256 s
->end_transfer_func
== ide_atapi_cmd_reply_end
||
2257 s
->end_transfer_func
== ide_dummy_transfer_stop
) {
2264 void ide_data_writew(void *opaque
, uint32_t addr
, uint32_t val
)
2266 IDEBus
*bus
= opaque
;
2267 IDEState
*s
= idebus_active_if(bus
);
2270 trace_ide_data_writew(addr
, val
, bus
, s
);
2272 /* PIO data access allowed only when DRQ bit is set. The result of a write
2273 * during PIO out is indeterminate, just ignore it. */
2274 if (!(s
->status
& DRQ_STAT
) || ide_is_pio_out(s
)) {
2279 if (p
+ 2 > s
->data_end
) {
2283 *(uint16_t *)p
= le16_to_cpu(val
);
2286 if (p
>= s
->data_end
) {
2287 s
->status
&= ~DRQ_STAT
;
2288 s
->end_transfer_func(s
);
2292 uint32_t ide_data_readw(void *opaque
, uint32_t addr
)
2294 IDEBus
*bus
= opaque
;
2295 IDEState
*s
= idebus_active_if(bus
);
2299 /* PIO data access allowed only when DRQ bit is set. The result of a read
2300 * during PIO in is indeterminate, return 0 and don't move forward. */
2301 if (!(s
->status
& DRQ_STAT
) || !ide_is_pio_out(s
)) {
2306 if (p
+ 2 > s
->data_end
) {
2310 ret
= cpu_to_le16(*(uint16_t *)p
);
2313 if (p
>= s
->data_end
) {
2314 s
->status
&= ~DRQ_STAT
;
2315 s
->end_transfer_func(s
);
2318 trace_ide_data_readw(addr
, ret
, bus
, s
);
2322 void ide_data_writel(void *opaque
, uint32_t addr
, uint32_t val
)
2324 IDEBus
*bus
= opaque
;
2325 IDEState
*s
= idebus_active_if(bus
);
2328 trace_ide_data_writel(addr
, val
, bus
, s
);
2330 /* PIO data access allowed only when DRQ bit is set. The result of a write
2331 * during PIO out is indeterminate, just ignore it. */
2332 if (!(s
->status
& DRQ_STAT
) || ide_is_pio_out(s
)) {
2337 if (p
+ 4 > s
->data_end
) {
2341 *(uint32_t *)p
= le32_to_cpu(val
);
2344 if (p
>= s
->data_end
) {
2345 s
->status
&= ~DRQ_STAT
;
2346 s
->end_transfer_func(s
);
2350 uint32_t ide_data_readl(void *opaque
, uint32_t addr
)
2352 IDEBus
*bus
= opaque
;
2353 IDEState
*s
= idebus_active_if(bus
);
2357 /* PIO data access allowed only when DRQ bit is set. The result of a read
2358 * during PIO in is indeterminate, return 0 and don't move forward. */
2359 if (!(s
->status
& DRQ_STAT
) || !ide_is_pio_out(s
)) {
2365 if (p
+ 4 > s
->data_end
) {
2369 ret
= cpu_to_le32(*(uint32_t *)p
);
2372 if (p
>= s
->data_end
) {
2373 s
->status
&= ~DRQ_STAT
;
2374 s
->end_transfer_func(s
);
2378 trace_ide_data_readl(addr
, ret
, bus
, s
);
2382 static void ide_dummy_transfer_stop(IDEState
*s
)
2384 s
->data_ptr
= s
->io_buffer
;
2385 s
->data_end
= s
->io_buffer
;
2386 s
->io_buffer
[0] = 0xff;
2387 s
->io_buffer
[1] = 0xff;
2388 s
->io_buffer
[2] = 0xff;
2389 s
->io_buffer
[3] = 0xff;
2392 void ide_bus_reset(IDEBus
*bus
)
2396 ide_reset(&bus
->ifs
[0]);
2397 ide_reset(&bus
->ifs
[1]);
2400 /* pending async DMA */
2401 if (bus
->dma
->aiocb
) {
2402 trace_ide_bus_reset_aio();
2403 blk_aio_cancel(bus
->dma
->aiocb
);
2404 bus
->dma
->aiocb
= NULL
;
2407 /* reset dma provider too */
2408 if (bus
->dma
->ops
->reset
) {
2409 bus
->dma
->ops
->reset(bus
->dma
);
2413 static bool ide_cd_is_tray_open(void *opaque
)
2415 return ((IDEState
*)opaque
)->tray_open
;
2418 static bool ide_cd_is_medium_locked(void *opaque
)
2420 return ((IDEState
*)opaque
)->tray_locked
;
2423 static void ide_resize_cb(void *opaque
)
2425 IDEState
*s
= opaque
;
2426 uint64_t nb_sectors
;
2428 if (!s
->identify_set
) {
2432 blk_get_geometry(s
->blk
, &nb_sectors
);
2433 s
->nb_sectors
= nb_sectors
;
2435 /* Update the identify data buffer. */
2436 if (s
->drive_kind
== IDE_CFATA
) {
2437 ide_cfata_identify_size(s
);
2439 /* IDE_CD uses a different set of callbacks entirely. */
2440 assert(s
->drive_kind
!= IDE_CD
);
2441 ide_identify_size(s
);
2445 static const BlockDevOps ide_cd_block_ops
= {
2446 .change_media_cb
= ide_cd_change_cb
,
2447 .eject_request_cb
= ide_cd_eject_request_cb
,
2448 .is_tray_open
= ide_cd_is_tray_open
,
2449 .is_medium_locked
= ide_cd_is_medium_locked
,
2452 static const BlockDevOps ide_hd_block_ops
= {
2453 .resize_cb
= ide_resize_cb
,
2456 int ide_init_drive(IDEState
*s
, BlockBackend
*blk
, IDEDriveKind kind
,
2457 const char *version
, const char *serial
, const char *model
,
2459 uint32_t cylinders
, uint32_t heads
, uint32_t secs
,
2460 int chs_trans
, Error
**errp
)
2462 uint64_t nb_sectors
;
2465 s
->drive_kind
= kind
;
2467 blk_get_geometry(blk
, &nb_sectors
);
2468 s
->cylinders
= cylinders
;
2471 s
->chs_trans
= chs_trans
;
2472 s
->nb_sectors
= nb_sectors
;
2474 /* The SMART values should be preserved across power cycles
2476 s
->smart_enabled
= 1;
2477 s
->smart_autosave
= 1;
2478 s
->smart_errors
= 0;
2479 s
->smart_selftest_count
= 0;
2480 if (kind
== IDE_CD
) {
2481 blk_set_dev_ops(blk
, &ide_cd_block_ops
, s
);
2482 blk_set_guest_block_size(blk
, 2048);
2484 if (!blk_is_inserted(s
->blk
)) {
2485 error_setg(errp
, "Device needs media, but drive is empty");
2488 if (blk_is_read_only(blk
)) {
2489 error_setg(errp
, "Can't use a read-only drive");
2492 blk_set_dev_ops(blk
, &ide_hd_block_ops
, s
);
2495 pstrcpy(s
->drive_serial_str
, sizeof(s
->drive_serial_str
), serial
);
2497 snprintf(s
->drive_serial_str
, sizeof(s
->drive_serial_str
),
2498 "QM%05d", s
->drive_serial
);
2501 pstrcpy(s
->drive_model_str
, sizeof(s
->drive_model_str
), model
);
2505 strcpy(s
->drive_model_str
, "QEMU DVD-ROM");
2508 strcpy(s
->drive_model_str
, "QEMU MICRODRIVE");
2511 strcpy(s
->drive_model_str
, "QEMU HARDDISK");
2517 pstrcpy(s
->version
, sizeof(s
->version
), version
);
2519 pstrcpy(s
->version
, sizeof(s
->version
), qemu_hw_version());
2523 blk_iostatus_enable(blk
);
2527 static void ide_init1(IDEBus
*bus
, int unit
)
2529 static int drive_serial
= 1;
2530 IDEState
*s
= &bus
->ifs
[unit
];
2534 s
->drive_serial
= drive_serial
++;
2535 /* we need at least 2k alignment for accessing CDROMs using O_DIRECT */
2536 s
->io_buffer_total_len
= IDE_DMA_BUF_SECTORS
*512 + 4;
2537 s
->io_buffer
= qemu_memalign(2048, s
->io_buffer_total_len
);
2538 memset(s
->io_buffer
, 0, s
->io_buffer_total_len
);
2540 s
->smart_selftest_data
= blk_blockalign(s
->blk
, 512);
2541 memset(s
->smart_selftest_data
, 0, 512);
2543 s
->sector_write_timer
= timer_new_ns(QEMU_CLOCK_VIRTUAL
,
2544 ide_sector_write_timer_cb
, s
);
2547 static int ide_nop_int(IDEDMA
*dma
, int x
)
2552 static void ide_nop(IDEDMA
*dma
)
2556 static int32_t ide_nop_int32(IDEDMA
*dma
, int32_t l
)
2561 static const IDEDMAOps ide_dma_nop_ops
= {
2562 .prepare_buf
= ide_nop_int32
,
2563 .restart_dma
= ide_nop
,
2564 .rw_buf
= ide_nop_int
,
2567 static void ide_restart_dma(IDEState
*s
, enum ide_dma_cmd dma_cmd
)
2569 s
->unit
= s
->bus
->retry_unit
;
2570 ide_set_sector(s
, s
->bus
->retry_sector_num
);
2571 s
->nsector
= s
->bus
->retry_nsector
;
2572 s
->bus
->dma
->ops
->restart_dma(s
->bus
->dma
);
2573 s
->io_buffer_size
= 0;
2574 s
->dma_cmd
= dma_cmd
;
2575 ide_start_dma(s
, ide_dma_cb
);
2578 static void ide_restart_bh(void *opaque
)
2580 IDEBus
*bus
= opaque
;
2585 qemu_bh_delete(bus
->bh
);
2588 error_status
= bus
->error_status
;
2589 if (bus
->error_status
== 0) {
2593 s
= idebus_active_if(bus
);
2594 is_read
= (bus
->error_status
& IDE_RETRY_READ
) != 0;
2596 /* The error status must be cleared before resubmitting the request: The
2597 * request may fail again, and this case can only be distinguished if the
2598 * called function can set a new error status. */
2599 bus
->error_status
= 0;
2601 /* The HBA has generically asked to be kicked on retry */
2602 if (error_status
& IDE_RETRY_HBA
) {
2603 if (s
->bus
->dma
->ops
->restart
) {
2604 s
->bus
->dma
->ops
->restart(s
->bus
->dma
);
2606 } else if (IS_IDE_RETRY_DMA(error_status
)) {
2607 if (error_status
& IDE_RETRY_TRIM
) {
2608 ide_restart_dma(s
, IDE_DMA_TRIM
);
2610 ide_restart_dma(s
, is_read
? IDE_DMA_READ
: IDE_DMA_WRITE
);
2612 } else if (IS_IDE_RETRY_PIO(error_status
)) {
2616 ide_sector_write(s
);
2618 } else if (error_status
& IDE_RETRY_FLUSH
) {
2620 } else if (IS_IDE_RETRY_ATAPI(error_status
)) {
2621 assert(s
->end_transfer_func
== ide_atapi_cmd
);
2622 ide_atapi_dma_restart(s
);
2628 static void ide_restart_cb(void *opaque
, int running
, RunState state
)
2630 IDEBus
*bus
= opaque
;
2636 bus
->bh
= qemu_bh_new(ide_restart_bh
, bus
);
2637 qemu_bh_schedule(bus
->bh
);
2641 void ide_register_restart_cb(IDEBus
*bus
)
2643 if (bus
->dma
->ops
->restart_dma
) {
2644 bus
->vmstate
= qemu_add_vm_change_state_handler(ide_restart_cb
, bus
);
2648 static IDEDMA ide_dma_nop
= {
2649 .ops
= &ide_dma_nop_ops
,
2653 void ide_init2(IDEBus
*bus
, qemu_irq irq
)
2657 for(i
= 0; i
< 2; i
++) {
2659 ide_reset(&bus
->ifs
[i
]);
2662 bus
->dma
= &ide_dma_nop
;
2665 void ide_exit(IDEState
*s
)
2667 timer_del(s
->sector_write_timer
);
2668 timer_free(s
->sector_write_timer
);
2669 qemu_vfree(s
->smart_selftest_data
);
2670 qemu_vfree(s
->io_buffer
);
2673 static bool is_identify_set(void *opaque
, int version_id
)
2675 IDEState
*s
= opaque
;
2677 return s
->identify_set
!= 0;
2680 static EndTransferFunc
* transfer_end_table
[] = {
2684 ide_atapi_cmd_reply_end
,
2686 ide_dummy_transfer_stop
,
2689 static int transfer_end_table_idx(EndTransferFunc
*fn
)
2693 for (i
= 0; i
< ARRAY_SIZE(transfer_end_table
); i
++)
2694 if (transfer_end_table
[i
] == fn
)
2700 static int ide_drive_post_load(void *opaque
, int version_id
)
2702 IDEState
*s
= opaque
;
2704 if (s
->blk
&& s
->identify_set
) {
2705 blk_set_enable_write_cache(s
->blk
, !!(s
->identify_data
[85] & (1 << 5)));
2710 static int ide_drive_pio_post_load(void *opaque
, int version_id
)
2712 IDEState
*s
= opaque
;
2714 if (s
->end_transfer_fn_idx
>= ARRAY_SIZE(transfer_end_table
)) {
2717 s
->end_transfer_func
= transfer_end_table
[s
->end_transfer_fn_idx
];
2718 s
->data_ptr
= s
->io_buffer
+ s
->cur_io_buffer_offset
;
2719 s
->data_end
= s
->data_ptr
+ s
->cur_io_buffer_len
;
2720 s
->atapi_dma
= s
->feature
& 1; /* as per cmd_packet */
2725 static int ide_drive_pio_pre_save(void *opaque
)
2727 IDEState
*s
= opaque
;
2730 s
->cur_io_buffer_offset
= s
->data_ptr
- s
->io_buffer
;
2731 s
->cur_io_buffer_len
= s
->data_end
- s
->data_ptr
;
2733 idx
= transfer_end_table_idx(s
->end_transfer_func
);
2735 fprintf(stderr
, "%s: invalid end_transfer_func for DRQ_STAT\n",
2737 s
->end_transfer_fn_idx
= 2;
2739 s
->end_transfer_fn_idx
= idx
;
2745 static bool ide_drive_pio_state_needed(void *opaque
)
2747 IDEState
*s
= opaque
;
2749 return ((s
->status
& DRQ_STAT
) != 0)
2750 || (s
->bus
->error_status
& IDE_RETRY_PIO
);
2753 static bool ide_tray_state_needed(void *opaque
)
2755 IDEState
*s
= opaque
;
2757 return s
->tray_open
|| s
->tray_locked
;
2760 static bool ide_atapi_gesn_needed(void *opaque
)
2762 IDEState
*s
= opaque
;
2764 return s
->events
.new_media
|| s
->events
.eject_request
;
2767 static bool ide_error_needed(void *opaque
)
2769 IDEBus
*bus
= opaque
;
2771 return (bus
->error_status
!= 0);
2774 /* Fields for GET_EVENT_STATUS_NOTIFICATION ATAPI command */
2775 static const VMStateDescription vmstate_ide_atapi_gesn_state
= {
2776 .name
="ide_drive/atapi/gesn_state",
2778 .minimum_version_id
= 1,
2779 .needed
= ide_atapi_gesn_needed
,
2780 .fields
= (VMStateField
[]) {
2781 VMSTATE_BOOL(events
.new_media
, IDEState
),
2782 VMSTATE_BOOL(events
.eject_request
, IDEState
),
2783 VMSTATE_END_OF_LIST()
2787 static const VMStateDescription vmstate_ide_tray_state
= {
2788 .name
= "ide_drive/tray_state",
2790 .minimum_version_id
= 1,
2791 .needed
= ide_tray_state_needed
,
2792 .fields
= (VMStateField
[]) {
2793 VMSTATE_BOOL(tray_open
, IDEState
),
2794 VMSTATE_BOOL(tray_locked
, IDEState
),
2795 VMSTATE_END_OF_LIST()
2799 static const VMStateDescription vmstate_ide_drive_pio_state
= {
2800 .name
= "ide_drive/pio_state",
2802 .minimum_version_id
= 1,
2803 .pre_save
= ide_drive_pio_pre_save
,
2804 .post_load
= ide_drive_pio_post_load
,
2805 .needed
= ide_drive_pio_state_needed
,
2806 .fields
= (VMStateField
[]) {
2807 VMSTATE_INT32(req_nb_sectors
, IDEState
),
2808 VMSTATE_VARRAY_INT32(io_buffer
, IDEState
, io_buffer_total_len
, 1,
2809 vmstate_info_uint8
, uint8_t),
2810 VMSTATE_INT32(cur_io_buffer_offset
, IDEState
),
2811 VMSTATE_INT32(cur_io_buffer_len
, IDEState
),
2812 VMSTATE_UINT8(end_transfer_fn_idx
, IDEState
),
2813 VMSTATE_INT32(elementary_transfer_size
, IDEState
),
2814 VMSTATE_INT32(packet_transfer_size
, IDEState
),
2815 VMSTATE_END_OF_LIST()
2819 const VMStateDescription vmstate_ide_drive
= {
2820 .name
= "ide_drive",
2822 .minimum_version_id
= 0,
2823 .post_load
= ide_drive_post_load
,
2824 .fields
= (VMStateField
[]) {
2825 VMSTATE_INT32(mult_sectors
, IDEState
),
2826 VMSTATE_INT32(identify_set
, IDEState
),
2827 VMSTATE_BUFFER_TEST(identify_data
, IDEState
, is_identify_set
),
2828 VMSTATE_UINT8(feature
, IDEState
),
2829 VMSTATE_UINT8(error
, IDEState
),
2830 VMSTATE_UINT32(nsector
, IDEState
),
2831 VMSTATE_UINT8(sector
, IDEState
),
2832 VMSTATE_UINT8(lcyl
, IDEState
),
2833 VMSTATE_UINT8(hcyl
, IDEState
),
2834 VMSTATE_UINT8(hob_feature
, IDEState
),
2835 VMSTATE_UINT8(hob_sector
, IDEState
),
2836 VMSTATE_UINT8(hob_nsector
, IDEState
),
2837 VMSTATE_UINT8(hob_lcyl
, IDEState
),
2838 VMSTATE_UINT8(hob_hcyl
, IDEState
),
2839 VMSTATE_UINT8(select
, IDEState
),
2840 VMSTATE_UINT8(status
, IDEState
),
2841 VMSTATE_UINT8(lba48
, IDEState
),
2842 VMSTATE_UINT8(sense_key
, IDEState
),
2843 VMSTATE_UINT8(asc
, IDEState
),
2844 VMSTATE_UINT8_V(cdrom_changed
, IDEState
, 3),
2845 VMSTATE_END_OF_LIST()
2847 .subsections
= (const VMStateDescription
*[]) {
2848 &vmstate_ide_drive_pio_state
,
2849 &vmstate_ide_tray_state
,
2850 &vmstate_ide_atapi_gesn_state
,
2855 static const VMStateDescription vmstate_ide_error_status
= {
2856 .name
="ide_bus/error",
2858 .minimum_version_id
= 1,
2859 .needed
= ide_error_needed
,
2860 .fields
= (VMStateField
[]) {
2861 VMSTATE_INT32(error_status
, IDEBus
),
2862 VMSTATE_INT64_V(retry_sector_num
, IDEBus
, 2),
2863 VMSTATE_UINT32_V(retry_nsector
, IDEBus
, 2),
2864 VMSTATE_UINT8_V(retry_unit
, IDEBus
, 2),
2865 VMSTATE_END_OF_LIST()
2869 const VMStateDescription vmstate_ide_bus
= {
2872 .minimum_version_id
= 1,
2873 .fields
= (VMStateField
[]) {
2874 VMSTATE_UINT8(cmd
, IDEBus
),
2875 VMSTATE_UINT8(unit
, IDEBus
),
2876 VMSTATE_END_OF_LIST()
2878 .subsections
= (const VMStateDescription
*[]) {
2879 &vmstate_ide_error_status
,
2884 void ide_drive_get(DriveInfo
**hd
, int n
)
2888 for (i
= 0; i
< n
; i
++) {
2889 hd
[i
] = drive_get_by_index(IF_IDE
, i
);