cpu.c

   1 /*
   2  * Target-specific parts of the CPU object
   3  *
   4  *  Copyright (c) 2003 Fabrice Bellard
   5  *
   6  * This library is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU Lesser General Public
   8  * License as published by the Free Software Foundation; either
   9  * version 2 of the License, or (at your option) any later version.
  10  *
  11  * This library is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  * Lesser General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU Lesser General Public
  17  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  18  */
  19
  20 #include "qemu/osdep.h"
  21 #include "qapi/error.h"
  22
  23 #include "exec/target_page.h"
  24 #include "hw/qdev-core.h"
  25 #include "hw/qdev-properties.h"
  26 #include "qemu/error-report.h"
  27 #include "migration/vmstate.h"
  28 #ifdef CONFIG_USER_ONLY
  29 #include "qemu.h"
  30 #else
  31 #include "hw/core/sysemu-cpu-ops.h"
  32 #include "exec/address-spaces.h"
  33 #endif
  34 #include "sysemu/cpus.h"
  35 #include "sysemu/tcg.h"
  36 #include "exec/replay-core.h"
  37 #include "exec/cpu-common.h"
  38 #include "exec/exec-all.h"
  39 #include "exec/tb-flush.h"
  40 #include "exec/translate-all.h"
  41 #include "exec/log.h"
  42 #include "hw/core/accel-cpu.h"
  43 #include "trace/trace-root.h"
  44 #include "qemu/accel.h"
  45 #include "qemu/plugin.h"
  46
  47 uintptr_t qemu_host_page_size;
  48 intptr_t qemu_host_page_mask;
  49
  50 #ifndef CONFIG_USER_ONLY
  51 static int cpu_common_post_load(void *opaque, int version_id)
  52 {
  53     CPUState *cpu = opaque;
  54
  55     /* 0x01 was CPU_INTERRUPT_EXIT. This line can be removed when the
  56        version_id is increased. */
  57     cpu->interrupt_request &= ~0x01;
  58     tlb_flush(cpu);
  59
  60     /* loadvm has just updated the content of RAM, bypassing the
  61      * usual mechanisms that ensure we flush TBs for writes to
  62      * memory we've translated code from. So we must flush all TBs,
  63      * which will now be stale.
  64      */
  65     tb_flush(cpu);
  66
  67     return 0;
  68 }
  69
  70 static int cpu_common_pre_load(void *opaque)
  71 {
  72     CPUState *cpu = opaque;
  73
  74     cpu->exception_index = -1;
  75
  76     return 0;
  77 }
  78
  79 static bool cpu_common_exception_index_needed(void *opaque)
  80 {
  81     CPUState *cpu = opaque;
  82
  83     return tcg_enabled() && cpu->exception_index != -1;
  84 }
  85
  86 static const VMStateDescription vmstate_cpu_common_exception_index = {
  87     .name = "cpu_common/exception_index",
  88     .version_id = 1,
  89     .minimum_version_id = 1,
  90     .needed = cpu_common_exception_index_needed,
  91     .fields = (VMStateField[]) {
  92         VMSTATE_INT32(exception_index, CPUState),
  93         VMSTATE_END_OF_LIST()
  94     }
  95 };
  96
  97 static bool cpu_common_crash_occurred_needed(void *opaque)
  98 {
  99     CPUState *cpu = opaque;
 100
 101     return cpu->crash_occurred;
 102 }
 103
 104 static const VMStateDescription vmstate_cpu_common_crash_occurred = {
 105     .name = "cpu_common/crash_occurred",
 106     .version_id = 1,
 107     .minimum_version_id = 1,
 108     .needed = cpu_common_crash_occurred_needed,
 109     .fields = (VMStateField[]) {
 110         VMSTATE_BOOL(crash_occurred, CPUState),
 111         VMSTATE_END_OF_LIST()
 112     }
 113 };
 114
 115 const VMStateDescription vmstate_cpu_common = {
 116     .name = "cpu_common",
 117     .version_id = 1,
 118     .minimum_version_id = 1,
 119     .pre_load = cpu_common_pre_load,
 120     .post_load = cpu_common_post_load,
 121     .fields = (VMStateField[]) {
 122         VMSTATE_UINT32(halted, CPUState),
 123         VMSTATE_UINT32(interrupt_request, CPUState),
 124         VMSTATE_END_OF_LIST()
 125     },
 126     .subsections = (const VMStateDescription*[]) {
 127         &vmstate_cpu_common_exception_index,
 128         &vmstate_cpu_common_crash_occurred,
 129         NULL
 130     }
 131 };
 132 #endif
 133
 134 void cpu_exec_realizefn(CPUState *cpu, Error **errp)
 135 {
 136     /* cache the cpu class for the hotpath */
 137     cpu->cc = CPU_GET_CLASS(cpu);
 138
 139     if (!accel_cpu_realizefn(cpu, errp)) {
 140         return;
 141     }
 142
 143     /* NB: errp parameter is unused currently */
 144     if (tcg_enabled()) {
 145         tcg_exec_realizefn(cpu, errp);
 146     }
 147
 148     /* Wait until cpu initialization complete before exposing cpu. */
 149     cpu_list_add(cpu);
 150
 151     /* Plugin initialization must wait until cpu_index assigned. */
 152     if (tcg_enabled()) {
 153         qemu_plugin_vcpu_init_hook(cpu);
 154     }
 155
 156 #ifdef CONFIG_USER_ONLY
 157     assert(qdev_get_vmsd(DEVICE(cpu)) == NULL ||
 158            qdev_get_vmsd(DEVICE(cpu))->unmigratable);
 159 #else
 160     if (qdev_get_vmsd(DEVICE(cpu)) == NULL) {
 161         vmstate_register(NULL, cpu->cpu_index, &vmstate_cpu_common, cpu);
 162     }
 163     if (cpu->cc->sysemu_ops->legacy_vmsd != NULL) {
 164         vmstate_register(NULL, cpu->cpu_index, cpu->cc->sysemu_ops->legacy_vmsd, cpu);
 165     }
 166 #endif /* CONFIG_USER_ONLY */
 167 }
 168
 169 void cpu_exec_unrealizefn(CPUState *cpu)
 170 {
 171 #ifndef CONFIG_USER_ONLY
 172     CPUClass *cc = CPU_GET_CLASS(cpu);
 173
 174     if (cc->sysemu_ops->legacy_vmsd != NULL) {
 175         vmstate_unregister(NULL, cc->sysemu_ops->legacy_vmsd, cpu);
 176     }
 177     if (qdev_get_vmsd(DEVICE(cpu)) == NULL) {
 178         vmstate_unregister(NULL, &vmstate_cpu_common, cpu);
 179     }
 180 #endif
 181
 182     /* Call the plugin hook before clearing cpu->cpu_index in cpu_list_remove */
 183     if (tcg_enabled()) {
 184         qemu_plugin_vcpu_exit_hook(cpu);
 185     }
 186
 187     cpu_list_remove(cpu);
 188     /*
 189      * Now that the vCPU has been removed from the RCU list, we can call
 190      * tcg_exec_unrealizefn, which may free fields using call_rcu.
 191      */
 192     if (tcg_enabled()) {
 193         tcg_exec_unrealizefn(cpu);
 194     }
 195 }
 196
 197 /*
 198  * This can't go in hw/core/cpu.c because that file is compiled only
 199  * once for both user-mode and system builds.
 200  */
 201 static Property cpu_common_props[] = {
 202 #ifdef CONFIG_USER_ONLY
 203     /*
 204      * Create a property for the user-only object, so users can
 205      * adjust prctl(PR_SET_UNALIGN) from the command-line.
 206      * Has no effect if the target does not support the feature.
 207      */
 208     DEFINE_PROP_BOOL("prctl-unalign-sigbus", CPUState,
 209                      prctl_unalign_sigbus, false),
 210 #else
 211     /*
 212      * Create a memory property for softmmu CPU object, so users can
 213      * wire up its memory.  The default if no link is set up is to use
 214      * the system address space.
 215      */
 216     DEFINE_PROP_LINK("memory", CPUState, memory, TYPE_MEMORY_REGION,
 217                      MemoryRegion *),
 218 #endif
 219     DEFINE_PROP_END_OF_LIST(),
 220 };
 221
 222 static bool cpu_get_start_powered_off(Object *obj, Error **errp)
 223 {
 224     CPUState *cpu = CPU(obj);
 225     return cpu->start_powered_off;
 226 }
 227
 228 static void cpu_set_start_powered_off(Object *obj, bool value, Error **errp)
 229 {
 230     CPUState *cpu = CPU(obj);
 231     cpu->start_powered_off = value;
 232 }
 233
 234 void cpu_class_init_props(DeviceClass *dc)
 235 {
 236     ObjectClass *oc = OBJECT_CLASS(dc);
 237
 238     device_class_set_props(dc, cpu_common_props);
 239     /*
 240      * We can't use DEFINE_PROP_BOOL in the Property array for this
 241      * property, because we want this to be settable after realize.
 242      */
 243     object_class_property_add_bool(oc, "start-powered-off",
 244                                    cpu_get_start_powered_off,
 245                                    cpu_set_start_powered_off);
 246 }
 247
 248 void cpu_exec_initfn(CPUState *cpu)
 249 {
 250     cpu->as = NULL;
 251     cpu->num_ases = 0;
 252
 253 #ifndef CONFIG_USER_ONLY
 254     cpu->thread_id = qemu_get_thread_id();
 255     cpu->memory = get_system_memory();
 256     object_ref(OBJECT(cpu->memory));
 257 #endif
 258 }
 259
 260 const char *parse_cpu_option(const char *cpu_option)
 261 {
 262     ObjectClass *oc;
 263     CPUClass *cc;
 264     gchar **model_pieces;
 265     const char *cpu_type;
 266
 267     model_pieces = g_strsplit(cpu_option, ",", 2);
 268     if (!model_pieces[0]) {
 269         error_report("-cpu option cannot be empty");
 270         exit(1);
 271     }
 272
 273     oc = cpu_class_by_name(CPU_RESOLVING_TYPE, model_pieces[0]);
 274     if (oc == NULL) {
 275         error_report("unable to find CPU model '%s'", model_pieces[0]);
 276         g_strfreev(model_pieces);
 277         exit(EXIT_FAILURE);
 278     }
 279
 280     cpu_type = object_class_get_name(oc);
 281     cc = CPU_CLASS(oc);
 282     cc->parse_features(cpu_type, model_pieces[1], &error_fatal);
 283     g_strfreev(model_pieces);
 284     return cpu_type;
 285 }
 286
 287 void list_cpus(void)
 288 {
 289     /* XXX: implement xxx_cpu_list for targets that still miss it */
 290 #if defined(cpu_list)
 291     cpu_list();
 292 #endif
 293 }
 294
 295 #if defined(CONFIG_USER_ONLY)
 296 void tb_invalidate_phys_addr(hwaddr addr)
 297 {
 298     mmap_lock();
 299     tb_invalidate_phys_page(addr);
 300     mmap_unlock();
 301 }
 302 #else
 303 void tb_invalidate_phys_addr(AddressSpace *as, hwaddr addr, MemTxAttrs attrs)
 304 {
 305     ram_addr_t ram_addr;
 306     MemoryRegion *mr;
 307     hwaddr l = 1;
 308
 309     if (!tcg_enabled()) {
 310         return;
 311     }
 312
 313     RCU_READ_LOCK_GUARD();
 314     mr = address_space_translate(as, addr, &addr, &l, false, attrs);
 315     if (!(memory_region_is_ram(mr)
 316           || memory_region_is_romd(mr))) {
 317         return;
 318     }
 319     ram_addr = memory_region_get_ram_addr(mr) + addr;
 320     tb_invalidate_phys_page(ram_addr);
 321 }
 322 #endif
 323
 324 /* enable or disable single step mode. EXCP_DEBUG is returned by the
 325    CPU loop after each instruction */
 326 void cpu_single_step(CPUState *cpu, int enabled)
 327 {
 328     if (cpu->singlestep_enabled != enabled) {
 329         cpu->singlestep_enabled = enabled;
 330
 331 #if !defined(CONFIG_USER_ONLY)
 332         const AccelOpsClass *ops = cpus_get_accel();
 333         if (ops->update_guest_debug) {
 334             ops->update_guest_debug(cpu);
 335         }
 336 #endif
 337
 338         trace_breakpoint_singlestep(cpu->cpu_index, enabled);
 339     }
 340 }
 341
 342 void cpu_abort(CPUState *cpu, const char *fmt, ...)
 343 {
 344     va_list ap;
 345     va_list ap2;
 346
 347     va_start(ap, fmt);
 348     va_copy(ap2, ap);
 349     fprintf(stderr, "qemu: fatal: ");
 350     vfprintf(stderr, fmt, ap);
 351     fprintf(stderr, "\n");
 352     cpu_dump_state(cpu, stderr, CPU_DUMP_FPU | CPU_DUMP_CCOP);
 353     if (qemu_log_separate()) {
 354         FILE *logfile = qemu_log_trylock();
 355         if (logfile) {
 356             fprintf(logfile, "qemu: fatal: ");
 357             vfprintf(logfile, fmt, ap2);
 358             fprintf(logfile, "\n");
 359             cpu_dump_state(cpu, logfile, CPU_DUMP_FPU | CPU_DUMP_CCOP);
 360             qemu_log_unlock(logfile);
 361         }
 362     }
 363     va_end(ap2);
 364     va_end(ap);
 365     replay_finish();
 366 #if defined(CONFIG_USER_ONLY)
 367     {
 368         struct sigaction act;
 369         sigfillset(&act.sa_mask);
 370         act.sa_handler = SIG_DFL;
 371         act.sa_flags = 0;
 372         sigaction(SIGABRT, &act, NULL);
 373     }
 374 #endif
 375     abort();
 376 }
 377
 378 /* physical memory access (slow version, mainly for debug) */
 379 #if defined(CONFIG_USER_ONLY)
 380 int cpu_memory_rw_debug(CPUState *cpu, vaddr addr,
 381                         void *ptr, size_t len, bool is_write)
 382 {
 383     int flags;
 384     vaddr l, page;
 385     void * p;
 386     uint8_t *buf = ptr;
 387
 388     while (len > 0) {
 389         page = addr & TARGET_PAGE_MASK;
 390         l = (page + TARGET_PAGE_SIZE) - addr;
 391         if (l > len)
 392             l = len;
 393         flags = page_get_flags(page);
 394         if (!(flags & PAGE_VALID))
 395             return -1;
 396         if (is_write) {
 397             if (!(flags & PAGE_WRITE))
 398                 return -1;
 399             /* XXX: this code should not depend on lock_user */
 400             if (!(p = lock_user(VERIFY_WRITE, addr, l, 0)))
 401                 return -1;
 402             memcpy(p, buf, l);
 403             unlock_user(p, addr, l);
 404         } else {
 405             if (!(flags & PAGE_READ))
 406                 return -1;
 407             /* XXX: this code should not depend on lock_user */
 408             if (!(p = lock_user(VERIFY_READ, addr, l, 1)))
 409                 return -1;
 410             memcpy(buf, p, l);
 411             unlock_user(p, addr, 0);
 412         }
 413         len -= l;
 414         buf += l;
 415         addr += l;
 416     }
 417     return 0;
 418 }
 419 #endif
 420
 421 bool target_words_bigendian(void)
 422 {
 423 #if TARGET_BIG_ENDIAN
 424     return true;
 425 #else
 426     return false;
 427 #endif
 428 }
 429
 430 const char *target_name(void)
 431 {
 432     return TARGET_NAME;
 433 }
 434
 435 void page_size_init(void)
 436 {
 437     /* NOTE: we can always suppose that qemu_host_page_size >=
 438        TARGET_PAGE_SIZE */
 439     if (qemu_host_page_size == 0) {
 440         qemu_host_page_size = qemu_real_host_page_size();
 441     }
 442     if (qemu_host_page_size < TARGET_PAGE_SIZE) {
 443         qemu_host_page_size = TARGET_PAGE_SIZE;
 444     }
 445     qemu_host_page_mask = -(intptr_t)qemu_host_page_size;
 446 }