hw/pci_host_template.h

   1 /*
   2  * QEMU Common PCI Host bridge configuration data space access routines.
   3  *
   4  * Copyright (c) 2006 Fabrice Bellard
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a copy
   7  * of this software and associated documentation files (the "Software"), to deal
   8  * in the Software without restriction, including without limitation the rights
   9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10  * copies of the Software, and to permit persons to whom the Software is
  11  * furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22  * THE SOFTWARE.
  23  */
  24
  25 /* Worker routines for a PCI host controller that uses an {address,data}
  26    register pair to access PCI configuration space.  */
  27
  28 static void glue(pci_host_data_writeb, PCI_HOST_SUFFIX)(
  29     void* opaque, PCI_ADDR_T addr, uint32_t val)
  30 {
  31     PCIHostState *s = opaque;
  32
  33     PCI_DPRINTF("writeb addr " TARGET_FMT_plx " val %x\n",
  34                 (target_phys_addr_t)addr, val);
  35     if (s->config_reg & (1u << 31))
  36         pci_data_write(s->bus, s->config_reg | (addr & 3), val, 1);
  37 }
  38
  39 static void glue(pci_host_data_writew, PCI_HOST_SUFFIX)(
  40     void* opaque, PCI_ADDR_T addr, uint32_t val)
  41 {
  42     PCIHostState *s = opaque;
  43 #ifdef TARGET_WORDS_BIGENDIAN
  44     val = bswap16(val);
  45 #endif
  46     PCI_DPRINTF("writew addr " TARGET_FMT_plx " val %x\n",
  47                 (target_phys_addr_t)addr, val);
  48     if (s->config_reg & (1u << 31))
  49         pci_data_write(s->bus, s->config_reg | (addr & 3), val, 2);
  50 }
  51
  52 static void glue(pci_host_data_writel, PCI_HOST_SUFFIX)(
  53     void* opaque, PCI_ADDR_T addr, uint32_t val)
  54 {
  55     PCIHostState *s = opaque;
  56 #ifdef TARGET_WORDS_BIGENDIAN
  57     val = bswap32(val);
  58 #endif
  59     PCI_DPRINTF("writel addr " TARGET_FMT_plx " val %x\n",
  60                 (target_phys_addr_t)addr, val);
  61     if (s->config_reg & (1u << 31))
  62         pci_data_write(s->bus, s->config_reg, val, 4);
  63 }
  64
  65 static uint32_t glue(pci_host_data_readb, PCI_HOST_SUFFIX)(
  66     void* opaque, PCI_ADDR_T addr)
  67 {
  68     PCIHostState *s = opaque;
  69     uint32_t val;
  70
  71     if (!(s->config_reg & (1 << 31)))
  72         return 0xff;
  73     val = pci_data_read(s->bus, s->config_reg | (addr & 3), 1);
  74     PCI_DPRINTF("readb addr " TARGET_FMT_plx " val %x\n",
  75                 (target_phys_addr_t)addr, val);
  76     return val;
  77 }
  78
  79 static uint32_t glue(pci_host_data_readw, PCI_HOST_SUFFIX)(
  80     void* opaque, PCI_ADDR_T addr)
  81 {
  82     PCIHostState *s = opaque;
  83     uint32_t val;
  84     if (!(s->config_reg & (1 << 31)))
  85         return 0xffff;
  86     val = pci_data_read(s->bus, s->config_reg | (addr & 3), 2);
  87     PCI_DPRINTF("readw addr " TARGET_FMT_plx " val %x\n",
  88                 (target_phys_addr_t)addr, val);
  89 #ifdef TARGET_WORDS_BIGENDIAN
  90     val = bswap16(val);
  91 #endif
  92     return val;
  93 }
  94
  95 static uint32_t glue(pci_host_data_readl, PCI_HOST_SUFFIX)(
  96     void* opaque, PCI_ADDR_T addr)
  97 {
  98     PCIHostState *s = opaque;
  99     uint32_t val;
 100     if (!(s->config_reg & (1 << 31)))
 101         return 0xffffffff;
 102     val = pci_data_read(s->bus, s->config_reg | (addr & 3), 4);
 103     PCI_DPRINTF("readl addr " TARGET_FMT_plx " val %x\n",
 104                 (target_phys_addr_t)addr, val);
 105 #ifdef TARGET_WORDS_BIGENDIAN
 106     val = bswap32(val);
 107 #endif
 108     return val;
 109 }