cpu-exec.c

   1 /*
   2  *  emulator main execution loop
   3  *
   4  *  Copyright (c) 2003-2005 Fabrice Bellard
   5  *
   6  * This library is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU Lesser General Public
   8  * License as published by the Free Software Foundation; either
   9  * version 2 of the License, or (at your option) any later version.
  10  *
  11  * This library is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  * Lesser General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU Lesser General Public
  17  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  18  */
  19 #include "qemu/osdep.h"
  20 #include "cpu.h"
  21 #include "trace.h"
  22 #include "disas/disas.h"
  23 #include "exec/exec-all.h"
  24 #include "tcg.h"
  25 #include "qemu/atomic.h"
  26 #include "sysemu/qtest.h"
  27 #include "qemu/timer.h"
  28 #include "exec/address-spaces.h"
  29 #include "qemu/rcu.h"
  30 #include "exec/tb-hash.h"
  31 #include "exec/log.h"
  32 #if defined(TARGET_I386) && !defined(CONFIG_USER_ONLY)
  33 #include "hw/i386/apic.h"
  34 #endif
  35 #include "sysemu/replay.h"
  36
  37 /* -icount align implementation. */
  38
  39 typedef struct SyncClocks {
  40     int64_t diff_clk;
  41     int64_t last_cpu_icount;
  42     int64_t realtime_clock;
  43 } SyncClocks;
  44
  45 #if !defined(CONFIG_USER_ONLY)
  46 /* Allow the guest to have a max 3ms advance.
  47  * The difference between the 2 clocks could therefore
  48  * oscillate around 0.
  49  */
  50 #define VM_CLOCK_ADVANCE 3000000
  51 #define THRESHOLD_REDUCE 1.5
  52 #define MAX_DELAY_PRINT_RATE 2000000000LL
  53 #define MAX_NB_PRINTS 100
  54
  55 static void align_clocks(SyncClocks *sc, const CPUState *cpu)
  56 {
  57     int64_t cpu_icount;
  58
  59     if (!icount_align_option) {
  60         return;
  61     }
  62
  63     cpu_icount = cpu->icount_extra + cpu->icount_decr.u16.low;
  64     sc->diff_clk += cpu_icount_to_ns(sc->last_cpu_icount - cpu_icount);
  65     sc->last_cpu_icount = cpu_icount;
  66
  67     if (sc->diff_clk > VM_CLOCK_ADVANCE) {
  68 #ifndef _WIN32
  69         struct timespec sleep_delay, rem_delay;
  70         sleep_delay.tv_sec = sc->diff_clk / 1000000000LL;
  71         sleep_delay.tv_nsec = sc->diff_clk % 1000000000LL;
  72         if (nanosleep(&sleep_delay, &rem_delay) < 0) {
  73             sc->diff_clk = rem_delay.tv_sec * 1000000000LL + rem_delay.tv_nsec;
  74         } else {
  75             sc->diff_clk = 0;
  76         }
  77 #else
  78         Sleep(sc->diff_clk / SCALE_MS);
  79         sc->diff_clk = 0;
  80 #endif
  81     }
  82 }
  83
  84 static void print_delay(const SyncClocks *sc)
  85 {
  86     static float threshold_delay;
  87     static int64_t last_realtime_clock;
  88     static int nb_prints;
  89
  90     if (icount_align_option &&
  91         sc->realtime_clock - last_realtime_clock >= MAX_DELAY_PRINT_RATE &&
  92         nb_prints < MAX_NB_PRINTS) {
  93         if ((-sc->diff_clk / (float)1000000000LL > threshold_delay) ||
  94             (-sc->diff_clk / (float)1000000000LL <
  95              (threshold_delay - THRESHOLD_REDUCE))) {
  96             threshold_delay = (-sc->diff_clk / 1000000000LL) + 1;
  97             printf("Warning: The guest is now late by %.1f to %.1f seconds\n",
  98                    threshold_delay - 1,
  99                    threshold_delay);
 100             nb_prints++;
 101             last_realtime_clock = sc->realtime_clock;
 102         }
 103     }
 104 }
 105
 106 static void init_delay_params(SyncClocks *sc,
 107                               const CPUState *cpu)
 108 {
 109     if (!icount_align_option) {
 110         return;
 111     }
 112     sc->realtime_clock = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL_RT);
 113     sc->diff_clk = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) - sc->realtime_clock;
 114     sc->last_cpu_icount = cpu->icount_extra + cpu->icount_decr.u16.low;
 115     if (sc->diff_clk < max_delay) {
 116         max_delay = sc->diff_clk;
 117     }
 118     if (sc->diff_clk > max_advance) {
 119         max_advance = sc->diff_clk;
 120     }
 121
 122     /* Print every 2s max if the guest is late. We limit the number
 123        of printed messages to NB_PRINT_MAX(currently 100) */
 124     print_delay(sc);
 125 }
 126 #else
 127 static void align_clocks(SyncClocks *sc, const CPUState *cpu)
 128 {
 129 }
 130
 131 static void init_delay_params(SyncClocks *sc, const CPUState *cpu)
 132 {
 133 }
 134 #endif /* CONFIG USER ONLY */
 135
 136 /* Execute a TB, and fix up the CPU state afterwards if necessary */
 137 static inline tcg_target_ulong cpu_tb_exec(CPUState *cpu, TranslationBlock *itb)
 138 {
 139     CPUArchState *env = cpu->env_ptr;
 140     uintptr_t ret;
 141     TranslationBlock *last_tb;
 142     int tb_exit;
 143     uint8_t *tb_ptr = itb->tc_ptr;
 144
 145     qemu_log_mask_and_addr(CPU_LOG_EXEC, itb->pc,
 146                            "Trace %p [" TARGET_FMT_lx "] %s\n",
 147                            itb->tc_ptr, itb->pc, lookup_symbol(itb->pc));
 148
 149 #if defined(DEBUG_DISAS)
 150     if (qemu_loglevel_mask(CPU_LOG_TB_CPU)
 151         && qemu_log_in_addr_range(itb->pc)) {
 152 #if defined(TARGET_I386)
 153         log_cpu_state(cpu, CPU_DUMP_CCOP);
 154 #elif defined(TARGET_M68K)
 155         /* ??? Should not modify env state for dumping.  */
 156         cpu_m68k_flush_flags(env, env->cc_op);
 157         env->cc_op = CC_OP_FLAGS;
 158         env->sr = (env->sr & 0xffe0) | env->cc_dest | (env->cc_x << 4);
 159         log_cpu_state(cpu, 0);
 160 #else
 161         log_cpu_state(cpu, 0);
 162 #endif
 163     }
 164 #endif /* DEBUG_DISAS */
 165
 166     cpu->can_do_io = !use_icount;
 167     ret = tcg_qemu_tb_exec(env, tb_ptr);
 168     cpu->can_do_io = 1;
 169     last_tb = (TranslationBlock *)(ret & ~TB_EXIT_MASK);
 170     tb_exit = ret & TB_EXIT_MASK;
 171     trace_exec_tb_exit(last_tb, tb_exit);
 172
 173     if (tb_exit > TB_EXIT_IDX1) {
 174         /* We didn't start executing this TB (eg because the instruction
 175          * counter hit zero); we must restore the guest PC to the address
 176          * of the start of the TB.
 177          */
 178         CPUClass *cc = CPU_GET_CLASS(cpu);
 179         qemu_log_mask_and_addr(CPU_LOG_EXEC, last_tb->pc,
 180                                "Stopped execution of TB chain before %p ["
 181                                TARGET_FMT_lx "] %s\n",
 182                                last_tb->tc_ptr, last_tb->pc,
 183                                lookup_symbol(last_tb->pc));
 184         if (cc->synchronize_from_tb) {
 185             cc->synchronize_from_tb(cpu, last_tb);
 186         } else {
 187             assert(cc->set_pc);
 188             cc->set_pc(cpu, last_tb->pc);
 189         }
 190     }
 191     if (tb_exit == TB_EXIT_REQUESTED) {
 192         /* We were asked to stop executing TBs (probably a pending
 193          * interrupt. We've now stopped, so clear the flag.
 194          */
 195         atomic_set(&cpu->tcg_exit_req, 0);
 196     }
 197     return ret;
 198 }
 199
 200 #ifndef CONFIG_USER_ONLY
 201 /* Execute the code without caching the generated code. An interpreter
 202    could be used if available. */
 203 static void cpu_exec_nocache(CPUState *cpu, int max_cycles,
 204                              TranslationBlock *orig_tb, bool ignore_icount)
 205 {
 206     TranslationBlock *tb;
 207
 208     /* Should never happen.
 209        We only end up here when an existing TB is too long.  */
 210     if (max_cycles > CF_COUNT_MASK)
 211         max_cycles = CF_COUNT_MASK;
 212
 213     tb = tb_gen_code(cpu, orig_tb->pc, orig_tb->cs_base, orig_tb->flags,
 214                      max_cycles | CF_NOCACHE
 215                          | (ignore_icount ? CF_IGNORE_ICOUNT : 0));
 216     tb->orig_tb = orig_tb;
 217     /* execute the generated code */
 218     trace_exec_tb_nocache(tb, tb->pc);
 219     cpu_tb_exec(cpu, tb);
 220     tb_phys_invalidate(tb, -1);
 221     tb_free(tb);
 222 }
 223 #endif
 224
 225 static void cpu_exec_step(CPUState *cpu)
 226 {
 227     CPUArchState *env = (CPUArchState *)cpu->env_ptr;
 228     TranslationBlock *tb;
 229     target_ulong cs_base, pc;
 230     uint32_t flags;
 231
 232     cpu_get_tb_cpu_state(env, &pc, &cs_base, &flags);
 233     tb = tb_gen_code(cpu, pc, cs_base, flags,
 234                      1 | CF_NOCACHE | CF_IGNORE_ICOUNT);
 235     tb->orig_tb = NULL;
 236     /* execute the generated code */
 237     trace_exec_tb_nocache(tb, pc);
 238     cpu_tb_exec(cpu, tb);
 239     tb_phys_invalidate(tb, -1);
 240     tb_free(tb);
 241 }
 242
 243 void cpu_exec_step_atomic(CPUState *cpu)
 244 {
 245     start_exclusive();
 246
 247     /* Since we got here, we know that parallel_cpus must be true.  */
 248     parallel_cpus = false;
 249     cpu_exec_step(cpu);
 250     parallel_cpus = true;
 251
 252     end_exclusive();
 253 }
 254
 255 struct tb_desc {
 256     target_ulong pc;
 257     target_ulong cs_base;
 258     CPUArchState *env;
 259     tb_page_addr_t phys_page1;
 260     uint32_t flags;
 261 };
 262
 263 static bool tb_cmp(const void *p, const void *d)
 264 {
 265     const TranslationBlock *tb = p;
 266     const struct tb_desc *desc = d;
 267
 268     if (tb->pc == desc->pc &&
 269         tb->page_addr[0] == desc->phys_page1 &&
 270         tb->cs_base == desc->cs_base &&
 271         tb->flags == desc->flags &&
 272         !atomic_read(&tb->invalid)) {
 273         /* check next page if needed */
 274         if (tb->page_addr[1] == -1) {
 275             return true;
 276         } else {
 277             tb_page_addr_t phys_page2;
 278             target_ulong virt_page2;
 279
 280             virt_page2 = (desc->pc & TARGET_PAGE_MASK) + TARGET_PAGE_SIZE;
 281             phys_page2 = get_page_addr_code(desc->env, virt_page2);
 282             if (tb->page_addr[1] == phys_page2) {
 283                 return true;
 284             }
 285         }
 286     }
 287     return false;
 288 }
 289
 290 static TranslationBlock *tb_htable_lookup(CPUState *cpu,
 291                                           target_ulong pc,
 292                                           target_ulong cs_base,
 293                                           uint32_t flags)
 294 {
 295     tb_page_addr_t phys_pc;
 296     struct tb_desc desc;
 297     uint32_t h;
 298
 299     desc.env = (CPUArchState *)cpu->env_ptr;
 300     desc.cs_base = cs_base;
 301     desc.flags = flags;
 302     desc.pc = pc;
 303     phys_pc = get_page_addr_code(desc.env, pc);
 304     desc.phys_page1 = phys_pc & TARGET_PAGE_MASK;
 305     h = tb_hash_func(phys_pc, pc, flags);
 306     return qht_lookup(&tcg_ctx.tb_ctx.htable, tb_cmp, &desc, h);
 307 }
 308
 309 static inline TranslationBlock *tb_find(CPUState *cpu,
 310                                         TranslationBlock *last_tb,
 311                                         int tb_exit)
 312 {
 313     CPUArchState *env = (CPUArchState *)cpu->env_ptr;
 314     TranslationBlock *tb;
 315     target_ulong cs_base, pc;
 316     uint32_t flags;
 317     bool have_tb_lock = false;
 318
 319     /* we record a subset of the CPU state. It will
 320        always be the same before a given translated block
 321        is executed. */
 322     cpu_get_tb_cpu_state(env, &pc, &cs_base, &flags);
 323     tb = atomic_rcu_read(&cpu->tb_jmp_cache[tb_jmp_cache_hash_func(pc)]);
 324     if (unlikely(!tb || tb->pc != pc || tb->cs_base != cs_base ||
 325                  tb->flags != flags)) {
 326         tb = tb_htable_lookup(cpu, pc, cs_base, flags);
 327         if (!tb) {
 328
 329             /* mmap_lock is needed by tb_gen_code, and mmap_lock must be
 330              * taken outside tb_lock. As system emulation is currently
 331              * single threaded the locks are NOPs.
 332              */
 333             mmap_lock();
 334             tb_lock();
 335             have_tb_lock = true;
 336
 337             /* There's a chance that our desired tb has been translated while
 338              * taking the locks so we check again inside the lock.
 339              */
 340             tb = tb_htable_lookup(cpu, pc, cs_base, flags);
 341             if (!tb) {
 342                 /* if no translated code available, then translate it now */
 343                 tb = tb_gen_code(cpu, pc, cs_base, flags, 0);
 344             }
 345
 346             mmap_unlock();
 347         }
 348
 349         /* We add the TB in the virtual pc hash table for the fast lookup */
 350         atomic_set(&cpu->tb_jmp_cache[tb_jmp_cache_hash_func(pc)], tb);
 351     }
 352 #ifndef CONFIG_USER_ONLY
 353     /* We don't take care of direct jumps when address mapping changes in
 354      * system emulation. So it's not safe to make a direct jump to a TB
 355      * spanning two pages because the mapping for the second page can change.
 356      */
 357     if (tb->page_addr[1] != -1) {
 358         last_tb = NULL;
 359     }
 360 #endif
 361     /* See if we can patch the calling TB. */
 362     if (last_tb && !qemu_loglevel_mask(CPU_LOG_TB_NOCHAIN)) {
 363         if (!have_tb_lock) {
 364             tb_lock();
 365             have_tb_lock = true;
 366         }
 367         if (!tb->invalid) {
 368             tb_add_jump(last_tb, tb_exit, tb);
 369         }
 370     }
 371     if (have_tb_lock) {
 372         tb_unlock();
 373     }
 374     return tb;
 375 }
 376
 377 static inline bool cpu_handle_halt(CPUState *cpu)
 378 {
 379     if (cpu->halted) {
 380 #if defined(TARGET_I386) && !defined(CONFIG_USER_ONLY)
 381         if ((cpu->interrupt_request & CPU_INTERRUPT_POLL)
 382             && replay_interrupt()) {
 383             X86CPU *x86_cpu = X86_CPU(cpu);
 384             apic_poll_irq(x86_cpu->apic_state);
 385             cpu_reset_interrupt(cpu, CPU_INTERRUPT_POLL);
 386         }
 387 #endif
 388         if (!cpu_has_work(cpu)) {
 389             current_cpu = NULL;
 390             return true;
 391         }
 392
 393         cpu->halted = 0;
 394     }
 395
 396     return false;
 397 }
 398
 399 static inline void cpu_handle_debug_exception(CPUState *cpu)
 400 {
 401     CPUClass *cc = CPU_GET_CLASS(cpu);
 402     CPUWatchpoint *wp;
 403
 404     if (!cpu->watchpoint_hit) {
 405         QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) {
 406             wp->flags &= ~BP_WATCHPOINT_HIT;
 407         }
 408     }
 409
 410     cc->debug_excp_handler(cpu);
 411 }
 412
 413 static inline bool cpu_handle_exception(CPUState *cpu, int *ret)
 414 {
 415     if (cpu->exception_index >= 0) {
 416         if (cpu->exception_index >= EXCP_INTERRUPT) {
 417             /* exit request from the cpu execution loop */
 418             *ret = cpu->exception_index;
 419             if (*ret == EXCP_DEBUG) {
 420                 cpu_handle_debug_exception(cpu);
 421             }
 422             cpu->exception_index = -1;
 423             return true;
 424         } else {
 425 #if defined(CONFIG_USER_ONLY)
 426             /* if user mode only, we simulate a fake exception
 427                which will be handled outside the cpu execution
 428                loop */
 429 #if defined(TARGET_I386)
 430             CPUClass *cc = CPU_GET_CLASS(cpu);
 431             cc->do_interrupt(cpu);
 432 #endif
 433             *ret = cpu->exception_index;
 434             cpu->exception_index = -1;
 435             return true;
 436 #else
 437             if (replay_exception()) {
 438                 CPUClass *cc = CPU_GET_CLASS(cpu);
 439                 cc->do_interrupt(cpu);
 440                 cpu->exception_index = -1;
 441             } else if (!replay_has_interrupt()) {
 442                 /* give a chance to iothread in replay mode */
 443                 *ret = EXCP_INTERRUPT;
 444                 return true;
 445             }
 446 #endif
 447         }
 448 #ifndef CONFIG_USER_ONLY
 449     } else if (replay_has_exception()
 450                && cpu->icount_decr.u16.low + cpu->icount_extra == 0) {
 451         /* try to cause an exception pending in the log */
 452         cpu_exec_nocache(cpu, 1, tb_find(cpu, NULL, 0), true);
 453         *ret = -1;
 454         return true;
 455 #endif
 456     }
 457
 458     return false;
 459 }
 460
 461 static inline void cpu_handle_interrupt(CPUState *cpu,
 462                                         TranslationBlock **last_tb)
 463 {
 464     CPUClass *cc = CPU_GET_CLASS(cpu);
 465     int interrupt_request = cpu->interrupt_request;
 466
 467     if (unlikely(interrupt_request)) {
 468         if (unlikely(cpu->singlestep_enabled & SSTEP_NOIRQ)) {
 469             /* Mask out external interrupts for this step. */
 470             interrupt_request &= ~CPU_INTERRUPT_SSTEP_MASK;
 471         }
 472         if (interrupt_request & CPU_INTERRUPT_DEBUG) {
 473             cpu->interrupt_request &= ~CPU_INTERRUPT_DEBUG;
 474             cpu->exception_index = EXCP_DEBUG;
 475             cpu_loop_exit(cpu);
 476         }
 477         if (replay_mode == REPLAY_MODE_PLAY && !replay_has_interrupt()) {
 478             /* Do nothing */
 479         } else if (interrupt_request & CPU_INTERRUPT_HALT) {
 480             replay_interrupt();
 481             cpu->interrupt_request &= ~CPU_INTERRUPT_HALT;
 482             cpu->halted = 1;
 483             cpu->exception_index = EXCP_HLT;
 484             cpu_loop_exit(cpu);
 485         }
 486 #if defined(TARGET_I386)
 487         else if (interrupt_request & CPU_INTERRUPT_INIT) {
 488             X86CPU *x86_cpu = X86_CPU(cpu);
 489             CPUArchState *env = &x86_cpu->env;
 490             replay_interrupt();
 491             cpu_svm_check_intercept_param(env, SVM_EXIT_INIT, 0);
 492             do_cpu_init(x86_cpu);
 493             cpu->exception_index = EXCP_HALTED;
 494             cpu_loop_exit(cpu);
 495         }
 496 #else
 497         else if (interrupt_request & CPU_INTERRUPT_RESET) {
 498             replay_interrupt();
 499             cpu_reset(cpu);
 500             cpu_loop_exit(cpu);
 501         }
 502 #endif
 503         /* The target hook has 3 exit conditions:
 504            False when the interrupt isn't processed,
 505            True when it is, and we should restart on a new TB,
 506            and via longjmp via cpu_loop_exit.  */
 507         else {
 508             replay_interrupt();
 509             if (cc->cpu_exec_interrupt(cpu, interrupt_request)) {
 510                 *last_tb = NULL;
 511             }
 512             /* The target hook may have updated the 'cpu->interrupt_request';
 513              * reload the 'interrupt_request' value */
 514             interrupt_request = cpu->interrupt_request;
 515         }
 516         if (interrupt_request & CPU_INTERRUPT_EXITTB) {
 517             cpu->interrupt_request &= ~CPU_INTERRUPT_EXITTB;
 518             /* ensure that no TB jump will be modified as
 519                the program flow was changed */
 520             *last_tb = NULL;
 521         }
 522     }
 523     if (unlikely(atomic_read(&cpu->exit_request) || replay_has_interrupt())) {
 524         atomic_set(&cpu->exit_request, 0);
 525         cpu->exception_index = EXCP_INTERRUPT;
 526         cpu_loop_exit(cpu);
 527     }
 528 }
 529
 530 static inline void cpu_loop_exec_tb(CPUState *cpu, TranslationBlock *tb,
 531                                     TranslationBlock **last_tb, int *tb_exit,
 532                                     SyncClocks *sc)
 533 {
 534     uintptr_t ret;
 535
 536     if (unlikely(atomic_read(&cpu->exit_request))) {
 537         return;
 538     }
 539
 540     trace_exec_tb(tb, tb->pc);
 541     ret = cpu_tb_exec(cpu, tb);
 542     *last_tb = (TranslationBlock *)(ret & ~TB_EXIT_MASK);
 543     *tb_exit = ret & TB_EXIT_MASK;
 544     switch (*tb_exit) {
 545     case TB_EXIT_REQUESTED:
 546         /* Something asked us to stop executing
 547          * chained TBs; just continue round the main
 548          * loop. Whatever requested the exit will also
 549          * have set something else (eg exit_request or
 550          * interrupt_request) which we will handle
 551          * next time around the loop.  But we need to
 552          * ensure the tcg_exit_req read in generated code
 553          * comes before the next read of cpu->exit_request
 554          * or cpu->interrupt_request.
 555          */
 556         smp_rmb();
 557         *last_tb = NULL;
 558         break;
 559     case TB_EXIT_ICOUNT_EXPIRED:
 560     {
 561         /* Instruction counter expired.  */
 562 #ifdef CONFIG_USER_ONLY
 563         abort();
 564 #else
 565         int insns_left = cpu->icount_decr.u32;
 566         if (cpu->icount_extra && insns_left >= 0) {
 567             /* Refill decrementer and continue execution.  */
 568             cpu->icount_extra += insns_left;
 569             insns_left = MIN(0xffff, cpu->icount_extra);
 570             cpu->icount_extra -= insns_left;
 571             cpu->icount_decr.u16.low = insns_left;
 572         } else {
 573             if (insns_left > 0) {
 574                 /* Execute remaining instructions.  */
 575                 cpu_exec_nocache(cpu, insns_left, *last_tb, false);
 576                 align_clocks(sc, cpu);
 577             }
 578             cpu->exception_index = EXCP_INTERRUPT;
 579             *last_tb = NULL;
 580             cpu_loop_exit(cpu);
 581         }
 582         break;
 583 #endif
 584     }
 585     default:
 586         break;
 587     }
 588 }
 589
 590 /* main execution loop */
 591
 592 int cpu_exec(CPUState *cpu)
 593 {
 594     CPUClass *cc = CPU_GET_CLASS(cpu);
 595     int ret;
 596     SyncClocks sc;
 597
 598     /* replay_interrupt may need current_cpu */
 599     current_cpu = cpu;
 600
 601     if (cpu_handle_halt(cpu)) {
 602         return EXCP_HALTED;
 603     }
 604
 605     atomic_mb_set(&tcg_current_cpu, cpu);
 606     rcu_read_lock();
 607
 608     if (unlikely(atomic_mb_read(&exit_request))) {
 609         cpu->exit_request = 1;
 610     }
 611
 612     cc->cpu_exec_enter(cpu);
 613
 614     /* Calculate difference between guest clock and host clock.
 615      * This delay includes the delay of the last cycle, so
 616      * what we have to do is sleep until it is 0. As for the
 617      * advance/delay we gain here, we try to fix it next time.
 618      */
 619     init_delay_params(&sc, cpu);
 620
 621     for(;;) {
 622         /* prepare setjmp context for exception handling */
 623         if (sigsetjmp(cpu->jmp_env, 0) == 0) {
 624             TranslationBlock *tb, *last_tb = NULL;
 625             int tb_exit = 0;
 626
 627             /* if an exception is pending, we execute it here */
 628             if (cpu_handle_exception(cpu, &ret)) {
 629                 break;
 630             }
 631
 632             for(;;) {
 633                 cpu_handle_interrupt(cpu, &last_tb);
 634                 tb = tb_find(cpu, last_tb, tb_exit);
 635                 cpu_loop_exec_tb(cpu, tb, &last_tb, &tb_exit, &sc);
 636                 /* Try to align the host and virtual clocks
 637                    if the guest is in advance */
 638                 align_clocks(&sc, cpu);
 639             } /* for(;;) */
 640         } else {
 641 #if defined(__clang__) || !QEMU_GNUC_PREREQ(4, 6)
 642             /* Some compilers wrongly smash all local variables after
 643              * siglongjmp. There were bug reports for gcc 4.5.0 and clang.
 644              * Reload essential local variables here for those compilers.
 645              * Newer versions of gcc would complain about this code (-Wclobbered). */
 646             cpu = current_cpu;
 647             cc = CPU_GET_CLASS(cpu);
 648 #else /* buggy compiler */
 649             /* Assert that the compiler does not smash local variables. */
 650             g_assert(cpu == current_cpu);
 651             g_assert(cc == CPU_GET_CLASS(cpu));
 652 #endif /* buggy compiler */
 653             cpu->can_do_io = 1;
 654             tb_lock_reset();
 655         }
 656     } /* for(;;) */
 657
 658     cc->cpu_exec_exit(cpu);
 659     rcu_read_unlock();
 660
 661     /* fail safe : never use current_cpu outside cpu_exec() */
 662     current_cpu = NULL;
 663
 664     /* Does not need atomic_mb_set because a spurious wakeup is okay.  */
 665     atomic_set(&tcg_current_cpu, NULL);
 666     return ret;
 667 }