2 * Xilinx ZynqMP ZCU102 board
4 * Copyright (C) 2015 Xilinx Inc
5 * Written by Peter Crosthwaite <peter.crosthwaite@xilinx.com>
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 #include "qemu/osdep.h"
19 #include "qapi/error.h"
21 #include "hw/arm/xlnx-zynqmp.h"
22 #include "hw/boards.h"
23 #include "qemu/error-report.h"
25 #include "sysemu/qtest.h"
26 #include "sysemu/device_tree.h"
27 #include "qom/object.h"
28 #include "net/can_emu.h"
31 MachineState parent_obj
;
38 CanBusState
*canbus
[XLNX_ZYNQMP_NUM_CAN
];
40 struct arm_boot_info binfo
;
43 #define TYPE_ZCU102_MACHINE MACHINE_TYPE_NAME("xlnx-zcu102")
44 OBJECT_DECLARE_SIMPLE_TYPE(XlnxZCU102
, ZCU102_MACHINE
)
47 static bool zcu102_get_secure(Object
*obj
, Error
**errp
)
49 XlnxZCU102
*s
= ZCU102_MACHINE(obj
);
54 static void zcu102_set_secure(Object
*obj
, bool value
, Error
**errp
)
56 XlnxZCU102
*s
= ZCU102_MACHINE(obj
);
61 static bool zcu102_get_virt(Object
*obj
, Error
**errp
)
63 XlnxZCU102
*s
= ZCU102_MACHINE(obj
);
68 static void zcu102_set_virt(Object
*obj
, bool value
, Error
**errp
)
70 XlnxZCU102
*s
= ZCU102_MACHINE(obj
);
75 static void zcu102_modify_dtb(const struct arm_boot_info
*binfo
, void *fdt
)
77 XlnxZCU102
*s
= container_of(binfo
, XlnxZCU102
, binfo
);
84 /* If EL3 is enabled, we keep all firmware nodes active. */
86 node_path
= qemu_fdt_node_path(fdt
, NULL
, "xlnx,zynqmp-firmware",
89 for (i
= 0; node_path
&& node_path
[i
]; i
++) {
90 r
= qemu_fdt_getprop(fdt
, node_path
[i
], "method", &prop_len
, NULL
);
91 method_is_hvc
= r
&& !strcmp("hvc", r
);
93 /* Allow HVC based firmware if EL2 is enabled. */
94 if (method_is_hvc
&& s
->virt
) {
97 qemu_fdt_setprop_string(fdt
, node_path
[i
], "status", "disabled");
99 g_strfreev(node_path
);
103 static void xlnx_zcu102_init(MachineState
*machine
)
105 XlnxZCU102
*s
= ZCU102_MACHINE(machine
);
107 uint64_t ram_size
= machine
->ram_size
;
109 /* Create the memory region to pass to the SoC */
110 if (ram_size
> XLNX_ZYNQMP_MAX_RAM_SIZE
) {
111 error_report("ERROR: RAM size 0x%" PRIx64
" above max supported of "
113 XLNX_ZYNQMP_MAX_RAM_SIZE
);
117 if (ram_size
< 0x08000000) {
118 qemu_log("WARNING: RAM size 0x%" PRIx64
" is small for ZCU102",
122 object_initialize_child(OBJECT(machine
), "soc", &s
->soc
, TYPE_XLNX_ZYNQMP
);
124 object_property_set_link(OBJECT(&s
->soc
), "ddr-ram", OBJECT(machine
->ram
),
126 object_property_set_bool(OBJECT(&s
->soc
), "secure", s
->secure
,
128 object_property_set_bool(OBJECT(&s
->soc
), "virtualization", s
->virt
,
131 for (i
= 0; i
< XLNX_ZYNQMP_NUM_CAN
; i
++) {
132 gchar
*bus_name
= g_strdup_printf("canbus%d", i
);
134 object_property_set_link(OBJECT(&s
->soc
), bus_name
,
135 OBJECT(s
->canbus
[i
]), &error_fatal
);
139 qdev_realize(DEVICE(&s
->soc
), NULL
, &error_fatal
);
141 /* Create and plug in the SD cards */
142 for (i
= 0; i
< XLNX_ZYNQMP_NUM_SDHCI
; i
++) {
144 DriveInfo
*di
= drive_get_next(IF_SD
);
145 BlockBackend
*blk
= di
? blk_by_legacy_dinfo(di
) : NULL
;
146 DeviceState
*carddev
;
149 bus_name
= g_strdup_printf("sd-bus%d", i
);
150 bus
= qdev_get_child_bus(DEVICE(&s
->soc
), bus_name
);
153 error_report("No SD bus found for SD card %d", i
);
156 carddev
= qdev_new(TYPE_SD_CARD
);
157 qdev_prop_set_drive_err(carddev
, "drive", blk
, &error_fatal
);
158 qdev_realize_and_unref(carddev
, bus
, &error_fatal
);
161 for (i
= 0; i
< XLNX_ZYNQMP_NUM_SPIS
; i
++) {
163 DeviceState
*flash_dev
;
165 DriveInfo
*dinfo
= drive_get_next(IF_MTD
);
166 gchar
*bus_name
= g_strdup_printf("spi%d", i
);
168 spi_bus
= qdev_get_child_bus(DEVICE(&s
->soc
), bus_name
);
171 flash_dev
= qdev_new("sst25wf080");
173 qdev_prop_set_drive_err(flash_dev
, "drive",
174 blk_by_legacy_dinfo(dinfo
), &error_fatal
);
176 qdev_realize_and_unref(flash_dev
, spi_bus
, &error_fatal
);
178 cs_line
= qdev_get_gpio_in_named(flash_dev
, SSI_GPIO_CS
, 0);
180 sysbus_connect_irq(SYS_BUS_DEVICE(&s
->soc
.spi
[i
]), 1, cs_line
);
183 for (i
= 0; i
< XLNX_ZYNQMP_NUM_QSPI_FLASH
; i
++) {
185 DeviceState
*flash_dev
;
187 DriveInfo
*dinfo
= drive_get_next(IF_MTD
);
188 int bus
= i
/ XLNX_ZYNQMP_NUM_QSPI_BUS_CS
;
189 gchar
*bus_name
= g_strdup_printf("qspi%d", bus
);
191 spi_bus
= qdev_get_child_bus(DEVICE(&s
->soc
), bus_name
);
194 flash_dev
= qdev_new("n25q512a11");
196 qdev_prop_set_drive_err(flash_dev
, "drive",
197 blk_by_legacy_dinfo(dinfo
), &error_fatal
);
199 qdev_realize_and_unref(flash_dev
, spi_bus
, &error_fatal
);
201 cs_line
= qdev_get_gpio_in_named(flash_dev
, SSI_GPIO_CS
, 0);
203 sysbus_connect_irq(SYS_BUS_DEVICE(&s
->soc
.qspi
), i
+ 1, cs_line
);
206 /* TODO create and connect IDE devices for ide_drive_get() */
208 s
->binfo
.ram_size
= ram_size
;
209 s
->binfo
.loader_start
= 0;
210 s
->binfo
.modify_dtb
= zcu102_modify_dtb
;
211 arm_load_kernel(s
->soc
.boot_cpu_ptr
, machine
, &s
->binfo
);
214 static void xlnx_zcu102_machine_instance_init(Object
*obj
)
216 XlnxZCU102
*s
= ZCU102_MACHINE(obj
);
218 /* Default to secure mode being disabled */
220 /* Default to virt (EL2) being disabled */
222 object_property_add_link(obj
, "xlnx-zcu102.canbus0", TYPE_CAN_BUS
,
223 (Object
**)&s
->canbus
[0],
224 object_property_allow_set_link
,
227 object_property_add_link(obj
, "xlnx-zcu102.canbus1", TYPE_CAN_BUS
,
228 (Object
**)&s
->canbus
[1],
229 object_property_allow_set_link
,
233 static void xlnx_zcu102_machine_class_init(ObjectClass
*oc
, void *data
)
235 MachineClass
*mc
= MACHINE_CLASS(oc
);
237 mc
->desc
= "Xilinx ZynqMP ZCU102 board with 4xA53s and 2xR5Fs based on " \
239 mc
->init
= xlnx_zcu102_init
;
240 mc
->block_default_type
= IF_IDE
;
241 mc
->units_per_default_bus
= 1;
242 mc
->ignore_memory_transaction_failures
= true;
243 mc
->max_cpus
= XLNX_ZYNQMP_NUM_APU_CPUS
+ XLNX_ZYNQMP_NUM_RPU_CPUS
;
244 mc
->default_cpus
= XLNX_ZYNQMP_NUM_APU_CPUS
;
245 mc
->default_ram_id
= "ddr-ram";
247 object_class_property_add_bool(oc
, "secure", zcu102_get_secure
,
249 object_class_property_set_description(oc
, "secure",
250 "Set on/off to enable/disable the ARM "
251 "Security Extensions (TrustZone)");
253 object_class_property_add_bool(oc
, "virtualization", zcu102_get_virt
,
255 object_class_property_set_description(oc
, "virtualization",
256 "Set on/off to enable/disable emulating a "
257 "guest CPU which implements the ARM "
258 "Virtualization Extensions");
261 static const TypeInfo xlnx_zcu102_machine_init_typeinfo
= {
262 .name
= TYPE_ZCU102_MACHINE
,
263 .parent
= TYPE_MACHINE
,
264 .class_init
= xlnx_zcu102_machine_class_init
,
265 .instance_init
= xlnx_zcu102_machine_instance_init
,
266 .instance_size
= sizeof(XlnxZCU102
),
269 static void xlnx_zcu102_machine_init_register_types(void)
271 type_register_static(&xlnx_zcu102_machine_init_typeinfo
);
274 type_init(xlnx_zcu102_machine_init_register_types
)