rtl8139: avoid nested ifs in IP header parsing (CVE-2015-5165)
[qemu/ar7.git] / target-unicore32 / helper.c
blobae63277c84cc672f9656b8d50100578589366cfb
1 /*
2 * Copyright (C) 2010-2012 Guan Xuetao
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
8 * Contributions from 2012-04-01 on are considered under GPL version 2,
9 * or (at your option) any later version.
12 #include "cpu.h"
13 #include "exec/gdbstub.h"
14 #include "exec/helper-proto.h"
15 #include "qemu/host-utils.h"
16 #ifndef CONFIG_USER_ONLY
17 #include "ui/console.h"
18 #endif
20 #undef DEBUG_UC32
22 #ifdef DEBUG_UC32
23 #define DPRINTF(fmt, ...) printf("%s: " fmt , __func__, ## __VA_ARGS__)
24 #else
25 #define DPRINTF(fmt, ...) do {} while (0)
26 #endif
28 UniCore32CPU *uc32_cpu_init(const char *cpu_model)
30 return UNICORE32_CPU(cpu_generic_init(TYPE_UNICORE32_CPU, cpu_model));
33 uint32_t HELPER(clo)(uint32_t x)
35 return clo32(x);
38 uint32_t HELPER(clz)(uint32_t x)
40 return clz32(x);
43 #ifndef CONFIG_USER_ONLY
44 void helper_cp0_set(CPUUniCore32State *env, uint32_t val, uint32_t creg,
45 uint32_t cop)
47 UniCore32CPU *cpu = uc32_env_get_cpu(env);
50 * movc pp.nn, rn, #imm9
51 * rn: UCOP_REG_D
52 * nn: UCOP_REG_N
53 * 1: sys control reg.
54 * 2: page table base reg.
55 * 3: data fault status reg.
56 * 4: insn fault status reg.
57 * 5: cache op. reg.
58 * 6: tlb op. reg.
59 * imm9: split UCOP_IMM10 with bit5 is 0
61 switch (creg) {
62 case 1:
63 if (cop != 0) {
64 goto unrecognized;
66 env->cp0.c1_sys = val;
67 break;
68 case 2:
69 if (cop != 0) {
70 goto unrecognized;
72 env->cp0.c2_base = val;
73 break;
74 case 3:
75 if (cop != 0) {
76 goto unrecognized;
78 env->cp0.c3_faultstatus = val;
79 break;
80 case 4:
81 if (cop != 0) {
82 goto unrecognized;
84 env->cp0.c4_faultaddr = val;
85 break;
86 case 5:
87 switch (cop) {
88 case 28:
89 DPRINTF("Invalidate Entire I&D cache\n");
90 return;
91 case 20:
92 DPRINTF("Invalidate Entire Icache\n");
93 return;
94 case 12:
95 DPRINTF("Invalidate Entire Dcache\n");
96 return;
97 case 10:
98 DPRINTF("Clean Entire Dcache\n");
99 return;
100 case 14:
101 DPRINTF("Flush Entire Dcache\n");
102 return;
103 case 13:
104 DPRINTF("Invalidate Dcache line\n");
105 return;
106 case 11:
107 DPRINTF("Clean Dcache line\n");
108 return;
109 case 15:
110 DPRINTF("Flush Dcache line\n");
111 return;
113 break;
114 case 6:
115 if ((cop <= 6) && (cop >= 2)) {
116 /* invalid all tlb */
117 tlb_flush(CPU(cpu), 1);
118 return;
120 break;
121 default:
122 goto unrecognized;
124 return;
125 unrecognized:
126 DPRINTF("Wrong register (%d) or wrong operation (%d) in cp0_set!\n",
127 creg, cop);
130 uint32_t helper_cp0_get(CPUUniCore32State *env, uint32_t creg, uint32_t cop)
133 * movc rd, pp.nn, #imm9
134 * rd: UCOP_REG_D
135 * nn: UCOP_REG_N
136 * 0: cpuid and cachetype
137 * 1: sys control reg.
138 * 2: page table base reg.
139 * 3: data fault status reg.
140 * 4: insn fault status reg.
141 * imm9: split UCOP_IMM10 with bit5 is 0
143 switch (creg) {
144 case 0:
145 switch (cop) {
146 case 0:
147 return env->cp0.c0_cpuid;
148 case 1:
149 return env->cp0.c0_cachetype;
151 break;
152 case 1:
153 if (cop == 0) {
154 return env->cp0.c1_sys;
156 break;
157 case 2:
158 if (cop == 0) {
159 return env->cp0.c2_base;
161 break;
162 case 3:
163 if (cop == 0) {
164 return env->cp0.c3_faultstatus;
166 break;
167 case 4:
168 if (cop == 0) {
169 return env->cp0.c4_faultaddr;
171 break;
173 DPRINTF("Wrong register (%d) or wrong operation (%d) in cp0_set!\n",
174 creg, cop);
175 return 0;
178 #ifdef CONFIG_CURSES
180 * FIXME:
181 * 1. curses windows will be blank when switching back
182 * 2. backspace is not handled yet
184 static void putc_on_screen(unsigned char ch)
186 static WINDOW *localwin;
187 static int init;
189 if (!init) {
190 /* Assume 80 * 30 screen to minimize the implementation */
191 localwin = newwin(30, 80, 0, 0);
192 scrollok(localwin, TRUE);
193 init = TRUE;
196 if (isprint(ch)) {
197 wprintw(localwin, "%c", ch);
198 } else {
199 switch (ch) {
200 case '\n':
201 wprintw(localwin, "%c", ch);
202 break;
203 case '\r':
204 /* If '\r' is put before '\n', the curses window will destroy the
205 * last print line. And meanwhile, '\n' implifies '\r' inside. */
206 break;
207 default: /* Not handled, so just print it hex code */
208 wprintw(localwin, "-- 0x%x --", ch);
212 wrefresh(localwin);
214 #else
215 #define putc_on_screen(c) do { } while (0)
216 #endif
218 void helper_cp1_putc(target_ulong x)
220 putc_on_screen((unsigned char)x); /* Output to screen */
221 DPRINTF("%c", x); /* Output to stdout */
223 #endif
225 #ifdef CONFIG_USER_ONLY
226 void switch_mode(CPUUniCore32State *env, int mode)
228 UniCore32CPU *cpu = uc32_env_get_cpu(env);
230 if (mode != ASR_MODE_USER) {
231 cpu_abort(CPU(cpu), "Tried to switch out of user mode\n");
235 void uc32_cpu_do_interrupt(CPUState *cs)
237 cpu_abort(cs, "NO interrupt in user mode\n");
240 int uc32_cpu_handle_mmu_fault(CPUState *cs, vaddr address,
241 int access_type, int mmu_idx)
243 cpu_abort(cs, "NO mmu fault in user mode\n");
244 return 1;
246 #endif
248 bool uc32_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
250 if (interrupt_request & CPU_INTERRUPT_HARD) {
251 UniCore32CPU *cpu = UNICORE32_CPU(cs);
252 CPUUniCore32State *env = &cpu->env;
254 if (!(env->uncached_asr & ASR_I)) {
255 cs->exception_index = UC32_EXCP_INTR;
256 uc32_cpu_do_interrupt(cs);
257 return true;
260 return false;