hw/misc/mps2-fpgaio: Support AN547 DBGCTRL register
[qemu/ar7.git] / include / hw / i2c / pm_smbus.h
blob0d74207efb5a8fbf129f3369dcba6ac980a853c9
1 #ifndef PM_SMBUS_H
2 #define PM_SMBUS_H
4 #include "exec/memory.h"
5 #include "hw/i2c/smbus_master.h"
7 #define PM_SMBUS_MAX_MSG_SIZE 32
9 typedef struct PMSMBus {
10 I2CBus *smbus;
11 MemoryRegion io;
13 uint8_t smb_stat;
14 uint8_t smb_ctl;
15 uint8_t smb_cmd;
16 uint8_t smb_addr;
17 uint8_t smb_data0;
18 uint8_t smb_data1;
19 uint8_t smb_data[PM_SMBUS_MAX_MSG_SIZE];
20 uint8_t smb_blkdata;
21 uint8_t smb_auxctl;
22 uint32_t smb_index;
24 /* Set by pm_smbus.c */
25 void (*reset)(struct PMSMBus *s);
27 /* Set by the user. */
28 bool i2c_enable;
29 void (*set_irq)(struct PMSMBus *s, bool enabled);
30 void *opaque;
32 /* Internally used by pm_smbus. */
34 /* Set on block transfers after the last byte has been read, so the
35 INTR bit can be set at the right time. */
36 bool op_done;
38 /* Set during an I2C block read, so we know how to handle data. */
39 bool in_i2c_block_read;
41 /* Used to work around a bug in AMIBIOS, see smb_transaction_start() */
42 bool start_transaction_on_status_read;
43 } PMSMBus;
45 void pm_smbus_init(DeviceState *parent, PMSMBus *smb, bool force_aux_blk);
48 * For backwards compatibility on migration, older versions don't have
49 * working migration for pm_smbus, this lets us ignore the migrations
50 * for older machine versions.
52 bool pm_smbus_vmstate_needed(void);
54 extern const VMStateDescription pmsmb_vmstate;
56 #endif /* PM_SMBUS_H */