hw/misc/mps2-fpgaio: Support AN547 DBGCTRL register
[qemu/ar7.git] / include / hw / i2c / bitbang_i2c.h
blob92334e9016a8a01acb3f182a60a65736f9081c30
1 #ifndef BITBANG_I2C_H
2 #define BITBANG_I2C_H
4 #include "hw/i2c/i2c.h"
6 typedef struct bitbang_i2c_interface bitbang_i2c_interface;
8 #define BITBANG_I2C_SDA 0
9 #define BITBANG_I2C_SCL 1
11 typedef enum bitbang_i2c_state {
12 STOPPED = 0,
13 SENDING_BIT7,
14 SENDING_BIT6,
15 SENDING_BIT5,
16 SENDING_BIT4,
17 SENDING_BIT3,
18 SENDING_BIT2,
19 SENDING_BIT1,
20 SENDING_BIT0,
21 WAITING_FOR_ACK,
22 RECEIVING_BIT7,
23 RECEIVING_BIT6,
24 RECEIVING_BIT5,
25 RECEIVING_BIT4,
26 RECEIVING_BIT3,
27 RECEIVING_BIT2,
28 RECEIVING_BIT1,
29 RECEIVING_BIT0,
30 SENDING_ACK,
31 SENT_NACK
32 } bitbang_i2c_state;
34 struct bitbang_i2c_interface {
35 I2CBus *bus;
36 bitbang_i2c_state state;
37 int last_data;
38 int last_clock;
39 int device_out;
40 uint8_t buffer;
41 int current_addr;
44 /**
45 * bitbang_i2c_init: in-place initialize the bitbang_i2c_interface struct
47 void bitbang_i2c_init(bitbang_i2c_interface *s, I2CBus *bus);
48 int bitbang_i2c_set(bitbang_i2c_interface *i2c, int line, int level);
50 #endif