4 * This library is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU Lesser General Public
6 * License as published by the Free Software Foundation; either
7 * version 2 of the License, or (at your option) any later version.
9 * This library is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12 * Lesser General Public License for more details.
14 * You should have received a copy of the GNU Lesser General Public
15 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
20 * Generate inline load/store functions for all MMU modes (typically
21 * at least _user and _kernel) as well as _data versions, for all data
24 * Used by target op helpers.
26 * The syntax for the accessors is:
28 * load: cpu_ld{sign}{size}_{mmusuffix}(env, ptr)
30 * store: cpu_st{sign}{size}_{mmusuffix}(env, ptr, val)
33 * (empty): for 32 and 64 bit sizes
43 * mmusuffix is one of the generic suffixes "data" or "code", or
44 * (for softmmu configs) a target-specific MMU mode suffix as defined
50 #if defined(CONFIG_USER_ONLY)
51 /* sparc32plus has 64bit long but 32bit space address
52 * this can make bad result with g2h() and h2g()
54 #if TARGET_VIRT_ADDR_SPACE_BITS <= 32
55 typedef uint32_t abi_ptr
;
56 #define TARGET_ABI_FMT_ptr "%x"
58 typedef uint64_t abi_ptr
;
59 #define TARGET_ABI_FMT_ptr "%"PRIx64
62 /* All direct uses of g2h and h2g need to go away for usermode softmmu. */
63 #define g2h(x) ((void *)((unsigned long)(abi_ptr)(x) + guest_base))
65 #if HOST_LONG_BITS <= TARGET_VIRT_ADDR_SPACE_BITS
66 #define guest_addr_valid(x) (1)
68 #define guest_addr_valid(x) ((x) <= GUEST_ADDR_MAX)
70 #define h2g_valid(x) guest_addr_valid((unsigned long)(x) - guest_base)
72 static inline int guest_range_valid(unsigned long start
, unsigned long len
)
74 return len
- 1 <= GUEST_ADDR_MAX
&& start
<= GUEST_ADDR_MAX
- len
+ 1;
77 #define h2g_nocheck(x) ({ \
78 unsigned long __ret = (unsigned long)(x) - guest_base; \
83 /* Check if given address fits target address space */ \
84 assert(h2g_valid(x)); \
88 typedef target_ulong abi_ptr
;
89 #define TARGET_ABI_FMT_ptr TARGET_ABI_FMT_lx
92 #if defined(CONFIG_USER_ONLY)
94 extern __thread
uintptr_t helper_retaddr
;
96 static inline void set_helper_retaddr(uintptr_t ra
)
100 * Ensure that this write is visible to the SIGSEGV handler that
101 * may be invoked due to a subsequent invalid memory operation.
106 static inline void clear_helper_retaddr(void)
109 * Ensure that previous memory operations have succeeded before
110 * removing the data visible to the signal handler.
116 /* In user-only mode we provide only the _code and _data accessors. */
118 #define MEMSUFFIX _data
120 #include "exec/cpu_ldst_useronly_template.h"
123 #include "exec/cpu_ldst_useronly_template.h"
126 #include "exec/cpu_ldst_useronly_template.h"
129 #include "exec/cpu_ldst_useronly_template.h"
133 * Code access is deprecated in favour of translator_ld* functions
134 * (see translator.h). However there are still users that need to
135 * converted so for now these stay.
137 #define MEMSUFFIX _code
140 #include "exec/cpu_ldst_useronly_template.h"
143 #include "exec/cpu_ldst_useronly_template.h"
146 #include "exec/cpu_ldst_useronly_template.h"
149 #include "exec/cpu_ldst_useronly_template.h"
155 /* The memory helpers for tcg-generated code need tcg_target_long etc. */
158 static inline target_ulong
tlb_addr_write(const CPUTLBEntry
*entry
)
160 #if TCG_OVERSIZED_GUEST
161 return entry
->addr_write
;
163 return atomic_read(&entry
->addr_write
);
167 /* Find the TLB index corresponding to the mmu_idx + address pair. */
168 static inline uintptr_t tlb_index(CPUArchState
*env
, uintptr_t mmu_idx
,
171 uintptr_t size_mask
= env_tlb(env
)->f
[mmu_idx
].mask
>> CPU_TLB_ENTRY_BITS
;
173 return (addr
>> TARGET_PAGE_BITS
) & size_mask
;
176 static inline size_t tlb_n_entries(CPUArchState
*env
, uintptr_t mmu_idx
)
178 return (env_tlb(env
)->f
[mmu_idx
].mask
>> CPU_TLB_ENTRY_BITS
) + 1;
181 /* Find the TLB entry corresponding to the mmu_idx + address pair. */
182 static inline CPUTLBEntry
*tlb_entry(CPUArchState
*env
, uintptr_t mmu_idx
,
185 return &env_tlb(env
)->f
[mmu_idx
].table
[tlb_index(env
, mmu_idx
, addr
)];
188 #ifdef MMU_MODE0_SUFFIX
189 #define CPU_MMU_INDEX 0
190 #define MEMSUFFIX MMU_MODE0_SUFFIX
192 #include "exec/cpu_ldst_template.h"
195 #include "exec/cpu_ldst_template.h"
198 #include "exec/cpu_ldst_template.h"
201 #include "exec/cpu_ldst_template.h"
206 #if (NB_MMU_MODES >= 2) && defined(MMU_MODE1_SUFFIX)
207 #define CPU_MMU_INDEX 1
208 #define MEMSUFFIX MMU_MODE1_SUFFIX
210 #include "exec/cpu_ldst_template.h"
213 #include "exec/cpu_ldst_template.h"
216 #include "exec/cpu_ldst_template.h"
219 #include "exec/cpu_ldst_template.h"
224 #if (NB_MMU_MODES >= 3) && defined(MMU_MODE2_SUFFIX)
226 #define CPU_MMU_INDEX 2
227 #define MEMSUFFIX MMU_MODE2_SUFFIX
229 #include "exec/cpu_ldst_template.h"
232 #include "exec/cpu_ldst_template.h"
235 #include "exec/cpu_ldst_template.h"
238 #include "exec/cpu_ldst_template.h"
241 #endif /* (NB_MMU_MODES >= 3) */
243 #if (NB_MMU_MODES >= 4) && defined(MMU_MODE3_SUFFIX)
245 #define CPU_MMU_INDEX 3
246 #define MEMSUFFIX MMU_MODE3_SUFFIX
248 #include "exec/cpu_ldst_template.h"
251 #include "exec/cpu_ldst_template.h"
254 #include "exec/cpu_ldst_template.h"
257 #include "exec/cpu_ldst_template.h"
260 #endif /* (NB_MMU_MODES >= 4) */
262 #if (NB_MMU_MODES >= 5) && defined(MMU_MODE4_SUFFIX)
264 #define CPU_MMU_INDEX 4
265 #define MEMSUFFIX MMU_MODE4_SUFFIX
267 #include "exec/cpu_ldst_template.h"
270 #include "exec/cpu_ldst_template.h"
273 #include "exec/cpu_ldst_template.h"
276 #include "exec/cpu_ldst_template.h"
279 #endif /* (NB_MMU_MODES >= 5) */
281 #if (NB_MMU_MODES >= 6) && defined(MMU_MODE5_SUFFIX)
283 #define CPU_MMU_INDEX 5
284 #define MEMSUFFIX MMU_MODE5_SUFFIX
286 #include "exec/cpu_ldst_template.h"
289 #include "exec/cpu_ldst_template.h"
292 #include "exec/cpu_ldst_template.h"
295 #include "exec/cpu_ldst_template.h"
298 #endif /* (NB_MMU_MODES >= 6) */
300 #if (NB_MMU_MODES >= 7) && defined(MMU_MODE6_SUFFIX)
302 #define CPU_MMU_INDEX 6
303 #define MEMSUFFIX MMU_MODE6_SUFFIX
305 #include "exec/cpu_ldst_template.h"
308 #include "exec/cpu_ldst_template.h"
311 #include "exec/cpu_ldst_template.h"
314 #include "exec/cpu_ldst_template.h"
317 #endif /* (NB_MMU_MODES >= 7) */
319 #if (NB_MMU_MODES >= 8) && defined(MMU_MODE7_SUFFIX)
321 #define CPU_MMU_INDEX 7
322 #define MEMSUFFIX MMU_MODE7_SUFFIX
324 #include "exec/cpu_ldst_template.h"
327 #include "exec/cpu_ldst_template.h"
330 #include "exec/cpu_ldst_template.h"
333 #include "exec/cpu_ldst_template.h"
336 #endif /* (NB_MMU_MODES >= 8) */
338 #if (NB_MMU_MODES >= 9) && defined(MMU_MODE8_SUFFIX)
340 #define CPU_MMU_INDEX 8
341 #define MEMSUFFIX MMU_MODE8_SUFFIX
343 #include "exec/cpu_ldst_template.h"
346 #include "exec/cpu_ldst_template.h"
349 #include "exec/cpu_ldst_template.h"
352 #include "exec/cpu_ldst_template.h"
355 #endif /* (NB_MMU_MODES >= 9) */
357 #if (NB_MMU_MODES >= 10) && defined(MMU_MODE9_SUFFIX)
359 #define CPU_MMU_INDEX 9
360 #define MEMSUFFIX MMU_MODE9_SUFFIX
362 #include "exec/cpu_ldst_template.h"
365 #include "exec/cpu_ldst_template.h"
368 #include "exec/cpu_ldst_template.h"
371 #include "exec/cpu_ldst_template.h"
374 #endif /* (NB_MMU_MODES >= 10) */
376 #if (NB_MMU_MODES >= 11) && defined(MMU_MODE10_SUFFIX)
378 #define CPU_MMU_INDEX 10
379 #define MEMSUFFIX MMU_MODE10_SUFFIX
381 #include "exec/cpu_ldst_template.h"
384 #include "exec/cpu_ldst_template.h"
387 #include "exec/cpu_ldst_template.h"
390 #include "exec/cpu_ldst_template.h"
393 #endif /* (NB_MMU_MODES >= 11) */
395 #if (NB_MMU_MODES >= 12) && defined(MMU_MODE11_SUFFIX)
397 #define CPU_MMU_INDEX 11
398 #define MEMSUFFIX MMU_MODE11_SUFFIX
400 #include "exec/cpu_ldst_template.h"
403 #include "exec/cpu_ldst_template.h"
406 #include "exec/cpu_ldst_template.h"
409 #include "exec/cpu_ldst_template.h"
412 #endif /* (NB_MMU_MODES >= 12) */
414 #if (NB_MMU_MODES > 12)
415 #error "NB_MMU_MODES > 12 is not supported for now"
416 #endif /* (NB_MMU_MODES > 12) */
418 /* these access are slower, they must be as rare as possible */
419 #define CPU_MMU_INDEX (cpu_mmu_index(env, false))
420 #define MEMSUFFIX _data
422 #include "exec/cpu_ldst_template.h"
425 #include "exec/cpu_ldst_template.h"
428 #include "exec/cpu_ldst_template.h"
431 #include "exec/cpu_ldst_template.h"
436 * Code access is deprecated in favour of translator_ld* functions
437 * (see translator.h). However there are still users that need to
438 * converted so for now these stay.
441 #define CPU_MMU_INDEX (cpu_mmu_index(env, true))
442 #define MEMSUFFIX _code
443 #define SOFTMMU_CODE_ACCESS
446 #include "exec/cpu_ldst_template.h"
449 #include "exec/cpu_ldst_template.h"
452 #include "exec/cpu_ldst_template.h"
455 #include "exec/cpu_ldst_template.h"
459 #undef SOFTMMU_CODE_ACCESS
461 #endif /* defined(CONFIG_USER_ONLY) */
466 * @addr: guest virtual address to look up
467 * @access_type: 0 for read, 1 for write, 2 for execute
468 * @mmu_idx: MMU index to use for lookup
470 * Look up the specified guest virtual index in the TCG softmmu TLB.
471 * If we can translate a host virtual address suitable for direct RAM
472 * access, without causing a guest exception, then return it.
473 * Otherwise (TLB entry is for an I/O access, guest software
474 * TLB fill required, etc) return NULL.
476 #ifdef CONFIG_USER_ONLY
477 static inline void *tlb_vaddr_to_host(CPUArchState
*env
, abi_ptr addr
,
478 MMUAccessType access_type
, int mmu_idx
)
483 void *tlb_vaddr_to_host(CPUArchState
*env
, abi_ptr addr
,
484 MMUAccessType access_type
, int mmu_idx
);
487 #endif /* CPU_LDST_H */