tests/i440fx-test.c

   1 /*
   2  * qtest I440FX test case
   3  *
   4  * Copyright IBM, Corp. 2012-2013
   5  * Copyright Red Hat, Inc. 2013
   6  *
   7  * Authors:
   8  *  Anthony Liguori   <aliguori@us.ibm.com>
   9  *  Laszlo Ersek      <lersek@redhat.com>
  10  *
  11  * This work is licensed under the terms of the GNU GPL, version 2 or later.
  12  * See the COPYING file in the top-level directory.
  13  */
  14
  15 #include "qemu/osdep.h"
  16 #include <sys/mman.h>
  17
  18 #include "libqtest.h"
  19 #include "libqos/pci.h"
  20 #include "libqos/pci-pc.h"
  21 #include "hw/pci/pci_regs.h"
  22
  23 #define BROKEN 1
  24
  25 typedef struct TestData
  26 {
  27     int num_cpus;
  28 } TestData;
  29
  30 typedef struct FirmwareTestFixture {
  31     /* decides whether we're testing -bios or -pflash */
  32     bool is_bios;
  33 } FirmwareTestFixture;
  34
  35 static QPCIBus *test_start_get_bus(const TestData *s)
  36 {
  37     char *cmdline;
  38
  39     cmdline = g_strdup_printf("-smp %d", s->num_cpus);
  40     qtest_start(cmdline);
  41     g_free(cmdline);
  42     return qpci_init_pc();
  43 }
  44
  45 static void test_i440fx_defaults(gconstpointer opaque)
  46 {
  47     const TestData *s = opaque;
  48     QPCIBus *bus;
  49     QPCIDevice *dev;
  50     uint32_t value;
  51
  52     bus = test_start_get_bus(s);
  53     dev = qpci_device_find(bus, QPCI_DEVFN(0, 0));
  54     g_assert(dev != NULL);
  55
  56     /* 3.2.2 */
  57     g_assert_cmpint(qpci_config_readw(dev, PCI_VENDOR_ID), ==, 0x8086);
  58     /* 3.2.3 */
  59     g_assert_cmpint(qpci_config_readw(dev, PCI_DEVICE_ID), ==, 0x1237);
  60 #ifndef BROKEN
  61     /* 3.2.4 */
  62     g_assert_cmpint(qpci_config_readw(dev, PCI_COMMAND), ==, 0x0006);
  63     /* 3.2.5 */
  64     g_assert_cmpint(qpci_config_readw(dev, PCI_STATUS), ==, 0x0280);
  65 #endif
  66     /* 3.2.7 */
  67     g_assert_cmpint(qpci_config_readb(dev, PCI_CLASS_PROG), ==, 0x00);
  68     g_assert_cmpint(qpci_config_readw(dev, PCI_CLASS_DEVICE), ==, 0x0600);
  69     /* 3.2.8 */
  70     g_assert_cmpint(qpci_config_readb(dev, PCI_LATENCY_TIMER), ==, 0x00);
  71     /* 3.2.9 */
  72     g_assert_cmpint(qpci_config_readb(dev, PCI_HEADER_TYPE), ==, 0x00);
  73     /* 3.2.10 */
  74     g_assert_cmpint(qpci_config_readb(dev, PCI_BIST), ==, 0x00);
  75
  76     /* 3.2.11 */
  77     value = qpci_config_readw(dev, 0x50); /* PMCCFG */
  78     if (s->num_cpus == 1) { /* WPE */
  79         g_assert(!(value & (1 << 15)));
  80     } else {
  81         g_assert((value & (1 << 15)));
  82     }
  83
  84     g_assert(!(value & (1 << 6))); /* EPTE */
  85
  86     /* 3.2.12 */
  87     g_assert_cmpint(qpci_config_readb(dev, 0x52), ==, 0x00); /* DETURBO */
  88     /* 3.2.13 */
  89 #ifndef BROKEN
  90     g_assert_cmpint(qpci_config_readb(dev, 0x53), ==, 0x80); /* DBC */
  91 #endif
  92     /* 3.2.14 */
  93     g_assert_cmpint(qpci_config_readb(dev, 0x54), ==, 0x00); /* AXC */
  94     /* 3.2.15 */
  95     g_assert_cmpint(qpci_config_readw(dev, 0x55), ==, 0x0000); /* DRT */
  96 #ifndef BROKEN
  97     /* 3.2.16 */
  98     g_assert_cmpint(qpci_config_readb(dev, 0x57), ==, 0x01); /* DRAMC */
  99     /* 3.2.17 */
 100     g_assert_cmpint(qpci_config_readb(dev, 0x58), ==, 0x10); /* DRAMT */
 101 #endif
 102     /* 3.2.18 */
 103     g_assert_cmpint(qpci_config_readb(dev, 0x59), ==, 0x00); /* PAM0 */
 104     g_assert_cmpint(qpci_config_readb(dev, 0x5A), ==, 0x00); /* PAM1 */
 105     g_assert_cmpint(qpci_config_readb(dev, 0x5B), ==, 0x00); /* PAM2 */
 106     g_assert_cmpint(qpci_config_readb(dev, 0x5C), ==, 0x00); /* PAM3 */
 107     g_assert_cmpint(qpci_config_readb(dev, 0x5D), ==, 0x00); /* PAM4 */
 108     g_assert_cmpint(qpci_config_readb(dev, 0x5E), ==, 0x00); /* PAM5 */
 109     g_assert_cmpint(qpci_config_readb(dev, 0x5F), ==, 0x00); /* PAM6 */
 110 #ifndef BROKEN
 111     /* 3.2.19 */
 112     g_assert_cmpint(qpci_config_readb(dev, 0x60), ==, 0x01); /* DRB0 */
 113     g_assert_cmpint(qpci_config_readb(dev, 0x61), ==, 0x01); /* DRB1 */
 114     g_assert_cmpint(qpci_config_readb(dev, 0x62), ==, 0x01); /* DRB2 */
 115     g_assert_cmpint(qpci_config_readb(dev, 0x63), ==, 0x01); /* DRB3 */
 116     g_assert_cmpint(qpci_config_readb(dev, 0x64), ==, 0x01); /* DRB4 */
 117     g_assert_cmpint(qpci_config_readb(dev, 0x65), ==, 0x01); /* DRB5 */
 118     g_assert_cmpint(qpci_config_readb(dev, 0x66), ==, 0x01); /* DRB6 */
 119     g_assert_cmpint(qpci_config_readb(dev, 0x67), ==, 0x01); /* DRB7 */
 120 #endif
 121     /* 3.2.20 */
 122     g_assert_cmpint(qpci_config_readb(dev, 0x68), ==, 0x00); /* FDHC */
 123     /* 3.2.21 */
 124     g_assert_cmpint(qpci_config_readb(dev, 0x70), ==, 0x00); /* MTT */
 125 #ifndef BROKEN
 126     /* 3.2.22 */
 127     g_assert_cmpint(qpci_config_readb(dev, 0x71), ==, 0x10); /* CLT */
 128 #endif
 129     /* 3.2.23 */
 130     g_assert_cmpint(qpci_config_readb(dev, 0x72), ==, 0x02); /* SMRAM */
 131     /* 3.2.24 */
 132     g_assert_cmpint(qpci_config_readb(dev, 0x90), ==, 0x00); /* ERRCMD */
 133     /* 3.2.25 */
 134     g_assert_cmpint(qpci_config_readb(dev, 0x91), ==, 0x00); /* ERRSTS */
 135     /* 3.2.26 */
 136     g_assert_cmpint(qpci_config_readb(dev, 0x93), ==, 0x00); /* TRC */
 137
 138     qtest_end();
 139 }
 140
 141 #define PAM_RE 1
 142 #define PAM_WE 2
 143
 144 static void pam_set(QPCIDevice *dev, int index, int flags)
 145 {
 146     int regno = 0x59 + (index / 2);
 147     uint8_t reg;
 148
 149     reg = qpci_config_readb(dev, regno);
 150     if (index & 1) {
 151         reg = (reg & 0x0F) | (flags << 4);
 152     } else {
 153         reg = (reg & 0xF0) | flags;
 154     }
 155     qpci_config_writeb(dev, regno, reg);
 156 }
 157
 158 static gboolean verify_area(uint32_t start, uint32_t end, uint8_t value)
 159 {
 160     uint32_t size = end - start + 1;
 161     gboolean ret = TRUE;
 162     uint8_t *data;
 163     int i;
 164
 165     data = g_malloc0(size);
 166     memread(start, data, size);
 167
 168     g_test_message("verify_area: data[0] = 0x%x", data[0]);
 169
 170     for (i = 0; i < size; i++) {
 171         if (data[i] != value) {
 172             ret = FALSE;
 173             break;
 174         }
 175     }
 176
 177     g_free(data);
 178
 179     return ret;
 180 }
 181
 182 static void write_area(uint32_t start, uint32_t end, uint8_t value)
 183 {
 184     uint32_t size = end - start + 1;
 185     uint8_t *data;
 186
 187     data = g_malloc(size);
 188     memset(data, value, size);
 189     memwrite(start, data, size);
 190
 191     g_free(data);
 192 }
 193
 194 static void test_i440fx_pam(gconstpointer opaque)
 195 {
 196     const TestData *s = opaque;
 197     QPCIBus *bus;
 198     QPCIDevice *dev;
 199     int i;
 200     static struct {
 201         uint32_t start;
 202         uint32_t end;
 203     } pam_area[] = {
 204         { 0, 0 },             /* Reserved */
 205         { 0xF0000, 0xFFFFF }, /* BIOS Area */
 206         { 0xC0000, 0xC3FFF }, /* Option ROM */
 207         { 0xC4000, 0xC7FFF }, /* Option ROM */
 208         { 0xC8000, 0xCBFFF }, /* Option ROM */
 209         { 0xCC000, 0xCFFFF }, /* Option ROM */
 210         { 0xD0000, 0xD3FFF }, /* Option ROM */
 211         { 0xD4000, 0xD7FFF }, /* Option ROM */
 212         { 0xD8000, 0xDBFFF }, /* Option ROM */
 213         { 0xDC000, 0xDFFFF }, /* Option ROM */
 214         { 0xE0000, 0xE3FFF }, /* BIOS Extension */
 215         { 0xE4000, 0xE7FFF }, /* BIOS Extension */
 216         { 0xE8000, 0xEBFFF }, /* BIOS Extension */
 217         { 0xEC000, 0xEFFFF }, /* BIOS Extension */
 218     };
 219
 220     bus = test_start_get_bus(s);
 221     dev = qpci_device_find(bus, QPCI_DEVFN(0, 0));
 222     g_assert(dev != NULL);
 223
 224     for (i = 0; i < ARRAY_SIZE(pam_area); i++) {
 225         if (pam_area[i].start == pam_area[i].end) {
 226             continue;
 227         }
 228
 229         g_test_message("Checking area 0x%05x..0x%05x",
 230                        pam_area[i].start, pam_area[i].end);
 231         /* Switch to RE for the area */
 232         pam_set(dev, i, PAM_RE);
 233         /* Verify the RAM is all zeros */
 234         g_assert(verify_area(pam_area[i].start, pam_area[i].end, 0));
 235
 236         /* Switch to WE for the area */
 237         pam_set(dev, i, PAM_RE | PAM_WE);
 238         /* Write out a non-zero mask to the full area */
 239         write_area(pam_area[i].start, pam_area[i].end, 0x42);
 240
 241 #ifndef BROKEN
 242         /* QEMU only supports a limited form of PAM */
 243
 244         /* Switch to !RE for the area */
 245         pam_set(dev, i, PAM_WE);
 246         /* Verify the area is not our mask */
 247         g_assert(!verify_area(pam_area[i].start, pam_area[i].end, 0x42));
 248 #endif
 249
 250         /* Verify the area is our new mask */
 251         g_assert(verify_area(pam_area[i].start, pam_area[i].end, 0x42));
 252
 253         /* Write out a new mask */
 254         write_area(pam_area[i].start, pam_area[i].end, 0x82);
 255
 256 #ifndef BROKEN
 257         /* QEMU only supports a limited form of PAM */
 258
 259         /* Verify the area is not our mask */
 260         g_assert(!verify_area(pam_area[i].start, pam_area[i].end, 0x82));
 261
 262         /* Switch to RE for the area */
 263         pam_set(dev, i, PAM_RE | PAM_WE);
 264 #endif
 265         /* Verify the area is our new mask */
 266         g_assert(verify_area(pam_area[i].start, pam_area[i].end, 0x82));
 267
 268         /* Reset area */
 269         pam_set(dev, i, 0);
 270
 271         /* Verify the area is not our new mask */
 272         g_assert(!verify_area(pam_area[i].start, pam_area[i].end, 0x82));
 273     }
 274     qtest_end();
 275 }
 276
 277 #define BLOB_SIZE ((size_t)65536)
 278 #define ISA_BIOS_MAXSZ ((size_t)(128 * 1024))
 279
 280 /* Create a blob file, and return its absolute pathname as a dynamically
 281  * allocated string.
 282  * The file is closed before the function returns.
 283  * In case of error, NULL is returned. The function prints the error message.
 284  */
 285 static char *create_blob_file(void)
 286 {
 287     int ret, fd;
 288     char *pathname;
 289     GError *error = NULL;
 290
 291     ret = -1;
 292     fd = g_file_open_tmp("blob_XXXXXX", &pathname, &error);
 293     if (fd == -1) {
 294         fprintf(stderr, "unable to create blob file: %s\n", error->message);
 295         g_error_free(error);
 296     } else {
 297         if (ftruncate(fd, BLOB_SIZE) == -1) {
 298             fprintf(stderr, "ftruncate(\"%s\", %zu): %s\n", pathname,
 299                     BLOB_SIZE, strerror(errno));
 300         } else {
 301             void *buf;
 302
 303             buf = mmap(NULL, BLOB_SIZE, PROT_WRITE, MAP_SHARED, fd, 0);
 304             if (buf == MAP_FAILED) {
 305                 fprintf(stderr, "mmap(\"%s\", %zu): %s\n", pathname, BLOB_SIZE,
 306                         strerror(errno));
 307             } else {
 308                 size_t i;
 309
 310                 for (i = 0; i < BLOB_SIZE; ++i) {
 311                     ((uint8_t *)buf)[i] = i;
 312                 }
 313                 munmap(buf, BLOB_SIZE);
 314                 ret = 0;
 315             }
 316         }
 317         close(fd);
 318         if (ret == -1) {
 319             unlink(pathname);
 320             g_free(pathname);
 321         }
 322     }
 323
 324     return ret == -1 ? NULL : pathname;
 325 }
 326
 327 static void test_i440fx_firmware(FirmwareTestFixture *fixture,
 328                                  gconstpointer user_data)
 329 {
 330     char *fw_pathname, *cmdline;
 331     uint8_t *buf;
 332     size_t i, isa_bios_size;
 333
 334     fw_pathname = create_blob_file();
 335     g_assert(fw_pathname != NULL);
 336
 337     /* Better hope the user didn't put metacharacters in TMPDIR and co. */
 338     cmdline = g_strdup_printf("-S %s%s", fixture->is_bios
 339                                          ? "-bios "
 340                                          : "-drive if=pflash,format=raw,file=",
 341                               fw_pathname);
 342     g_test_message("qemu cmdline: %s", cmdline);
 343     qtest_start(cmdline);
 344     g_free(cmdline);
 345
 346     /* QEMU has loaded the firmware (because qtest_start() only returns after
 347      * the QMP handshake completes). We must unlink the firmware blob right
 348      * here, because any assertion firing below would leak it in the
 349      * filesystem. This is also the reason why we recreate the blob every time
 350      * this function is invoked.
 351      */
 352     unlink(fw_pathname);
 353     g_free(fw_pathname);
 354
 355     /* check below 4G */
 356     buf = g_malloc0(BLOB_SIZE);
 357     memread(0x100000000ULL - BLOB_SIZE, buf, BLOB_SIZE);
 358     for (i = 0; i < BLOB_SIZE; ++i) {
 359         g_assert_cmphex(buf[i], ==, (uint8_t)i);
 360     }
 361
 362     /* check in ISA space too */
 363     memset(buf, 0, BLOB_SIZE);
 364     isa_bios_size = ISA_BIOS_MAXSZ < BLOB_SIZE ? ISA_BIOS_MAXSZ : BLOB_SIZE;
 365     memread(0x100000 - isa_bios_size, buf, isa_bios_size);
 366     for (i = 0; i < isa_bios_size; ++i) {
 367         g_assert_cmphex(buf[i], ==,
 368                         (uint8_t)((BLOB_SIZE - isa_bios_size) + i));
 369     }
 370
 371     g_free(buf);
 372     qtest_end();
 373 }
 374
 375 static void add_firmware_test(const char *testpath,
 376                               void (*setup_fixture)(FirmwareTestFixture *f,
 377                                                     gconstpointer test_data))
 378 {
 379     qtest_add(testpath, FirmwareTestFixture, NULL, setup_fixture,
 380               test_i440fx_firmware, NULL);
 381 }
 382
 383 static void request_bios(FirmwareTestFixture *fixture,
 384                          gconstpointer user_data)
 385 {
 386     fixture->is_bios = true;
 387 }
 388
 389 static void request_pflash(FirmwareTestFixture *fixture,
 390                            gconstpointer user_data)
 391 {
 392     fixture->is_bios = false;
 393 }
 394
 395 int main(int argc, char **argv)
 396 {
 397     TestData data;
 398     int ret;
 399
 400     g_test_init(&argc, &argv, NULL);
 401
 402     data.num_cpus = 1;
 403
 404     qtest_add_data_func("i440fx/defaults", &data, test_i440fx_defaults);
 405     qtest_add_data_func("i440fx/pam", &data, test_i440fx_pam);
 406     add_firmware_test("i440fx/firmware/bios", request_bios);
 407     add_firmware_test("i440fx/firmware/pflash", request_pflash);
 408
 409     ret = g_test_run();
 410     return ret;
 411 }