vfio: enable 8-byte reads/writes to vfio
[qemu/ar7.git] / linux-headers / asm-x86 / kvm_para.h
blob3a5397988e6e611218dbc0960d5e43157b73c336
1 #ifndef _ASM_X86_KVM_PARA_H
2 #define _ASM_X86_KVM_PARA_H
4 #include <linux/types.h>
5 #include <asm/hyperv.h>
7 /* This CPUID returns the signature 'KVMKVMKVM' in ebx, ecx, and edx. It
8 * should be used to determine that a VM is running under KVM.
9 */
10 #define KVM_CPUID_SIGNATURE 0x40000000
12 /* This CPUID returns a feature bitmap in eax. Before enabling a particular
13 * paravirtualization, the appropriate feature bit should be checked.
15 #define KVM_CPUID_FEATURES 0x40000001
16 #define KVM_FEATURE_CLOCKSOURCE 0
17 #define KVM_FEATURE_NOP_IO_DELAY 1
18 #define KVM_FEATURE_MMU_OP 2
19 /* This indicates that the new set of kvmclock msrs
20 * are available. The use of 0x11 and 0x12 is deprecated
22 #define KVM_FEATURE_CLOCKSOURCE2 3
23 #define KVM_FEATURE_ASYNC_PF 4
24 #define KVM_FEATURE_STEAL_TIME 5
25 #define KVM_FEATURE_PV_EOI 6
26 #define KVM_FEATURE_PV_UNHALT 7
28 /* The last 8 bits are used to indicate how to interpret the flags field
29 * in pvclock structure. If no bits are set, all flags are ignored.
31 #define KVM_FEATURE_CLOCKSOURCE_STABLE_BIT 24
33 #define MSR_KVM_WALL_CLOCK 0x11
34 #define MSR_KVM_SYSTEM_TIME 0x12
36 #define KVM_MSR_ENABLED 1
37 /* Custom MSRs falls in the range 0x4b564d00-0x4b564dff */
38 #define MSR_KVM_WALL_CLOCK_NEW 0x4b564d00
39 #define MSR_KVM_SYSTEM_TIME_NEW 0x4b564d01
40 #define MSR_KVM_ASYNC_PF_EN 0x4b564d02
41 #define MSR_KVM_STEAL_TIME 0x4b564d03
42 #define MSR_KVM_PV_EOI_EN 0x4b564d04
44 struct kvm_steal_time {
45 __u64 steal;
46 __u32 version;
47 __u32 flags;
48 __u8 preempted;
49 __u8 u8_pad[3];
50 __u32 pad[11];
53 #define KVM_CLOCK_PAIRING_WALLCLOCK 0
54 struct kvm_clock_pairing {
55 __s64 sec;
56 __s64 nsec;
57 __u64 tsc;
58 __u32 flags;
59 __u32 pad[9];
62 #define KVM_STEAL_ALIGNMENT_BITS 5
63 #define KVM_STEAL_VALID_BITS ((-1ULL << (KVM_STEAL_ALIGNMENT_BITS + 1)))
64 #define KVM_STEAL_RESERVED_MASK (((1 << KVM_STEAL_ALIGNMENT_BITS) - 1 ) << 1)
66 #define KVM_MAX_MMU_OP_BATCH 32
68 #define KVM_ASYNC_PF_ENABLED (1 << 0)
69 #define KVM_ASYNC_PF_SEND_ALWAYS (1 << 1)
71 /* Operations for KVM_HC_MMU_OP */
72 #define KVM_MMU_OP_WRITE_PTE 1
73 #define KVM_MMU_OP_FLUSH_TLB 2
74 #define KVM_MMU_OP_RELEASE_PT 3
76 /* Payload for KVM_HC_MMU_OP */
77 struct kvm_mmu_op_header {
78 __u32 op;
79 __u32 pad;
82 struct kvm_mmu_op_write_pte {
83 struct kvm_mmu_op_header header;
84 __u64 pte_phys;
85 __u64 pte_val;
88 struct kvm_mmu_op_flush_tlb {
89 struct kvm_mmu_op_header header;
92 struct kvm_mmu_op_release_pt {
93 struct kvm_mmu_op_header header;
94 __u64 pt_phys;
97 #define KVM_PV_REASON_PAGE_NOT_PRESENT 1
98 #define KVM_PV_REASON_PAGE_READY 2
100 struct kvm_vcpu_pv_apf_data {
101 __u32 reason;
102 __u8 pad[60];
103 __u32 enabled;
106 #define KVM_PV_EOI_BIT 0
107 #define KVM_PV_EOI_MASK (0x1 << KVM_PV_EOI_BIT)
108 #define KVM_PV_EOI_ENABLED KVM_PV_EOI_MASK
109 #define KVM_PV_EOI_DISABLED 0x0
112 #endif /* _ASM_X86_KVM_PARA_H */