tcg/tcg-op.h

   1 /*
   2  * Tiny Code Generator for QEMU
   3  *
   4  * Copyright (c) 2008 Fabrice Bellard
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a copy
   7  * of this software and associated documentation files (the "Software"), to deal
   8  * in the Software without restriction, including without limitation the rights
   9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10  * copies of the Software, and to permit persons to whom the Software is
  11  * furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22  * THE SOFTWARE.
  23  */
  24
  25 #include "tcg.h"
  26 #include "exec/helper-proto.h"
  27 #include "exec/helper-gen.h"
  28
  29 /* Basic output routines.  Not for general consumption.  */
  30
  31 void tcg_gen_op1(TCGOpcode, TCGArg);
  32 void tcg_gen_op2(TCGOpcode, TCGArg, TCGArg);
  33 void tcg_gen_op3(TCGOpcode, TCGArg, TCGArg, TCGArg);
  34 void tcg_gen_op4(TCGOpcode, TCGArg, TCGArg, TCGArg, TCGArg);
  35 void tcg_gen_op5(TCGOpcode, TCGArg, TCGArg, TCGArg, TCGArg, TCGArg);
  36 void tcg_gen_op6(TCGOpcode, TCGArg, TCGArg, TCGArg, TCGArg, TCGArg, TCGArg);
  37
  38 static inline void tcg_gen_op1_i32(TCGOpcode opc, TCGv_i32 a1)
  39 {
  40     tcg_gen_op1(opc, tcgv_i32_arg(a1));
  41 }
  42
  43 static inline void tcg_gen_op1_i64(TCGOpcode opc, TCGv_i64 a1)
  44 {
  45     tcg_gen_op1(opc, tcgv_i64_arg(a1));
  46 }
  47
  48 static inline void tcg_gen_op1i(TCGOpcode opc, TCGArg a1)
  49 {
  50     tcg_gen_op1(opc, a1);
  51 }
  52
  53 static inline void tcg_gen_op2_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2)
  54 {
  55     tcg_gen_op2(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2));
  56 }
  57
  58 static inline void tcg_gen_op2_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2)
  59 {
  60     tcg_gen_op2(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2));
  61 }
  62
  63 static inline void tcg_gen_op2i_i32(TCGOpcode opc, TCGv_i32 a1, TCGArg a2)
  64 {
  65     tcg_gen_op2(opc, tcgv_i32_arg(a1), a2);
  66 }
  67
  68 static inline void tcg_gen_op2i_i64(TCGOpcode opc, TCGv_i64 a1, TCGArg a2)
  69 {
  70     tcg_gen_op2(opc, tcgv_i64_arg(a1), a2);
  71 }
  72
  73 static inline void tcg_gen_op2ii(TCGOpcode opc, TCGArg a1, TCGArg a2)
  74 {
  75     tcg_gen_op2(opc, a1, a2);
  76 }
  77
  78 static inline void tcg_gen_op3_i32(TCGOpcode opc, TCGv_i32 a1,
  79                                    TCGv_i32 a2, TCGv_i32 a3)
  80 {
  81     tcg_gen_op3(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2), tcgv_i32_arg(a3));
  82 }
  83
  84 static inline void tcg_gen_op3_i64(TCGOpcode opc, TCGv_i64 a1,
  85                                    TCGv_i64 a2, TCGv_i64 a3)
  86 {
  87     tcg_gen_op3(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2), tcgv_i64_arg(a3));
  88 }
  89
  90 static inline void tcg_gen_op3i_i32(TCGOpcode opc, TCGv_i32 a1,
  91                                     TCGv_i32 a2, TCGArg a3)
  92 {
  93     tcg_gen_op3(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2), a3);
  94 }
  95
  96 static inline void tcg_gen_op3i_i64(TCGOpcode opc, TCGv_i64 a1,
  97                                     TCGv_i64 a2, TCGArg a3)
  98 {
  99     tcg_gen_op3(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2), a3);
 100 }
 101
 102 static inline void tcg_gen_ldst_op_i32(TCGOpcode opc, TCGv_i32 val,
 103                                        TCGv_ptr base, TCGArg offset)
 104 {
 105     tcg_gen_op3(opc, tcgv_i32_arg(val), tcgv_ptr_arg(base), offset);
 106 }
 107
 108 static inline void tcg_gen_ldst_op_i64(TCGOpcode opc, TCGv_i64 val,
 109                                        TCGv_ptr base, TCGArg offset)
 110 {
 111     tcg_gen_op3(opc, tcgv_i64_arg(val), tcgv_ptr_arg(base), offset);
 112 }
 113
 114 static inline void tcg_gen_op4_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
 115                                    TCGv_i32 a3, TCGv_i32 a4)
 116 {
 117     tcg_gen_op4(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2),
 118                 tcgv_i32_arg(a3), tcgv_i32_arg(a4));
 119 }
 120
 121 static inline void tcg_gen_op4_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
 122                                    TCGv_i64 a3, TCGv_i64 a4)
 123 {
 124     tcg_gen_op4(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2),
 125                 tcgv_i64_arg(a3), tcgv_i64_arg(a4));
 126 }
 127
 128 static inline void tcg_gen_op4i_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
 129                                     TCGv_i32 a3, TCGArg a4)
 130 {
 131     tcg_gen_op4(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2),
 132                 tcgv_i32_arg(a3), a4);
 133 }
 134
 135 static inline void tcg_gen_op4i_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
 136                                     TCGv_i64 a3, TCGArg a4)
 137 {
 138     tcg_gen_op4(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2),
 139                 tcgv_i64_arg(a3), a4);
 140 }
 141
 142 static inline void tcg_gen_op4ii_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
 143                                      TCGArg a3, TCGArg a4)
 144 {
 145     tcg_gen_op4(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2), a3, a4);
 146 }
 147
 148 static inline void tcg_gen_op4ii_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
 149                                      TCGArg a3, TCGArg a4)
 150 {
 151     tcg_gen_op4(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2), a3, a4);
 152 }
 153
 154 static inline void tcg_gen_op5_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
 155                                    TCGv_i32 a3, TCGv_i32 a4, TCGv_i32 a5)
 156 {
 157     tcg_gen_op5(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2),
 158                 tcgv_i32_arg(a3), tcgv_i32_arg(a4), tcgv_i32_arg(a5));
 159 }
 160
 161 static inline void tcg_gen_op5_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
 162                                    TCGv_i64 a3, TCGv_i64 a4, TCGv_i64 a5)
 163 {
 164     tcg_gen_op5(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2),
 165                 tcgv_i64_arg(a3), tcgv_i64_arg(a4), tcgv_i64_arg(a5));
 166 }
 167
 168 static inline void tcg_gen_op5i_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
 169                                     TCGv_i32 a3, TCGv_i32 a4, TCGArg a5)
 170 {
 171     tcg_gen_op5(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2),
 172                 tcgv_i32_arg(a3), tcgv_i32_arg(a4), a5);
 173 }
 174
 175 static inline void tcg_gen_op5i_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
 176                                     TCGv_i64 a3, TCGv_i64 a4, TCGArg a5)
 177 {
 178     tcg_gen_op5(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2),
 179                 tcgv_i64_arg(a3), tcgv_i64_arg(a4), a5);
 180 }
 181
 182 static inline void tcg_gen_op5ii_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
 183                                      TCGv_i32 a3, TCGArg a4, TCGArg a5)
 184 {
 185     tcg_gen_op5(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2),
 186                 tcgv_i32_arg(a3), a4, a5);
 187 }
 188
 189 static inline void tcg_gen_op5ii_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
 190                                      TCGv_i64 a3, TCGArg a4, TCGArg a5)
 191 {
 192     tcg_gen_op5(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2),
 193                 tcgv_i64_arg(a3), a4, a5);
 194 }
 195
 196 static inline void tcg_gen_op6_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
 197                                    TCGv_i32 a3, TCGv_i32 a4,
 198                                    TCGv_i32 a5, TCGv_i32 a6)
 199 {
 200     tcg_gen_op6(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2),
 201                 tcgv_i32_arg(a3), tcgv_i32_arg(a4), tcgv_i32_arg(a5),
 202                 tcgv_i32_arg(a6));
 203 }
 204
 205 static inline void tcg_gen_op6_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
 206                                    TCGv_i64 a3, TCGv_i64 a4,
 207                                    TCGv_i64 a5, TCGv_i64 a6)
 208 {
 209     tcg_gen_op6(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2),
 210                 tcgv_i64_arg(a3), tcgv_i64_arg(a4), tcgv_i64_arg(a5),
 211                 tcgv_i64_arg(a6));
 212 }
 213
 214 static inline void tcg_gen_op6i_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
 215                                     TCGv_i32 a3, TCGv_i32 a4,
 216                                     TCGv_i32 a5, TCGArg a6)
 217 {
 218     tcg_gen_op6(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2),
 219                 tcgv_i32_arg(a3), tcgv_i32_arg(a4), tcgv_i32_arg(a5), a6);
 220 }
 221
 222 static inline void tcg_gen_op6i_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
 223                                     TCGv_i64 a3, TCGv_i64 a4,
 224                                     TCGv_i64 a5, TCGArg a6)
 225 {
 226     tcg_gen_op6(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2),
 227                 tcgv_i64_arg(a3), tcgv_i64_arg(a4), tcgv_i64_arg(a5), a6);
 228 }
 229
 230 static inline void tcg_gen_op6ii_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
 231                                      TCGv_i32 a3, TCGv_i32 a4,
 232                                      TCGArg a5, TCGArg a6)
 233 {
 234     tcg_gen_op6(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2),
 235                 tcgv_i32_arg(a3), tcgv_i32_arg(a4), a5, a6);
 236 }
 237
 238 static inline void tcg_gen_op6ii_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
 239                                      TCGv_i64 a3, TCGv_i64 a4,
 240                                      TCGArg a5, TCGArg a6)
 241 {
 242     tcg_gen_op6(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2),
 243                 tcgv_i64_arg(a3), tcgv_i64_arg(a4), a5, a6);
 244 }
 245
 246
 247 /* Generic ops.  */
 248
 249 static inline void gen_set_label(TCGLabel *l)
 250 {
 251     tcg_gen_op1(INDEX_op_set_label, label_arg(l));
 252 }
 253
 254 static inline void tcg_gen_br(TCGLabel *l)
 255 {
 256     tcg_gen_op1(INDEX_op_br, label_arg(l));
 257 }
 258
 259 void tcg_gen_mb(TCGBar);
 260
 261 /* Helper calls. */
 262
 263 /* 32 bit ops */
 264
 265 void tcg_gen_addi_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
 266 void tcg_gen_subfi_i32(TCGv_i32 ret, int32_t arg1, TCGv_i32 arg2);
 267 void tcg_gen_subi_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
 268 void tcg_gen_andi_i32(TCGv_i32 ret, TCGv_i32 arg1, uint32_t arg2);
 269 void tcg_gen_ori_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
 270 void tcg_gen_xori_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
 271 void tcg_gen_shli_i32(TCGv_i32 ret, TCGv_i32 arg1, unsigned arg2);
 272 void tcg_gen_shri_i32(TCGv_i32 ret, TCGv_i32 arg1, unsigned arg2);
 273 void tcg_gen_sari_i32(TCGv_i32 ret, TCGv_i32 arg1, unsigned arg2);
 274 void tcg_gen_muli_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
 275 void tcg_gen_div_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
 276 void tcg_gen_rem_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
 277 void tcg_gen_divu_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
 278 void tcg_gen_remu_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
 279 void tcg_gen_andc_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
 280 void tcg_gen_eqv_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
 281 void tcg_gen_nand_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
 282 void tcg_gen_nor_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
 283 void tcg_gen_orc_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
 284 void tcg_gen_clz_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
 285 void tcg_gen_ctz_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
 286 void tcg_gen_clzi_i32(TCGv_i32 ret, TCGv_i32 arg1, uint32_t arg2);
 287 void tcg_gen_ctzi_i32(TCGv_i32 ret, TCGv_i32 arg1, uint32_t arg2);
 288 void tcg_gen_clrsb_i32(TCGv_i32 ret, TCGv_i32 arg);
 289 void tcg_gen_ctpop_i32(TCGv_i32 a1, TCGv_i32 a2);
 290 void tcg_gen_rotl_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
 291 void tcg_gen_rotli_i32(TCGv_i32 ret, TCGv_i32 arg1, unsigned arg2);
 292 void tcg_gen_rotr_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
 293 void tcg_gen_rotri_i32(TCGv_i32 ret, TCGv_i32 arg1, unsigned arg2);
 294 void tcg_gen_deposit_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2,
 295                          unsigned int ofs, unsigned int len);
 296 void tcg_gen_deposit_z_i32(TCGv_i32 ret, TCGv_i32 arg,
 297                            unsigned int ofs, unsigned int len);
 298 void tcg_gen_extract_i32(TCGv_i32 ret, TCGv_i32 arg,
 299                          unsigned int ofs, unsigned int len);
 300 void tcg_gen_sextract_i32(TCGv_i32 ret, TCGv_i32 arg,
 301                           unsigned int ofs, unsigned int len);
 302 void tcg_gen_brcond_i32(TCGCond cond, TCGv_i32 arg1, TCGv_i32 arg2, TCGLabel *);
 303 void tcg_gen_brcondi_i32(TCGCond cond, TCGv_i32 arg1, int32_t arg2, TCGLabel *);
 304 void tcg_gen_setcond_i32(TCGCond cond, TCGv_i32 ret,
 305                          TCGv_i32 arg1, TCGv_i32 arg2);
 306 void tcg_gen_setcondi_i32(TCGCond cond, TCGv_i32 ret,
 307                           TCGv_i32 arg1, int32_t arg2);
 308 void tcg_gen_movcond_i32(TCGCond cond, TCGv_i32 ret, TCGv_i32 c1,
 309                          TCGv_i32 c2, TCGv_i32 v1, TCGv_i32 v2);
 310 void tcg_gen_add2_i32(TCGv_i32 rl, TCGv_i32 rh, TCGv_i32 al,
 311                       TCGv_i32 ah, TCGv_i32 bl, TCGv_i32 bh);
 312 void tcg_gen_sub2_i32(TCGv_i32 rl, TCGv_i32 rh, TCGv_i32 al,
 313                       TCGv_i32 ah, TCGv_i32 bl, TCGv_i32 bh);
 314 void tcg_gen_mulu2_i32(TCGv_i32 rl, TCGv_i32 rh, TCGv_i32 arg1, TCGv_i32 arg2);
 315 void tcg_gen_muls2_i32(TCGv_i32 rl, TCGv_i32 rh, TCGv_i32 arg1, TCGv_i32 arg2);
 316 void tcg_gen_mulsu2_i32(TCGv_i32 rl, TCGv_i32 rh, TCGv_i32 arg1, TCGv_i32 arg2);
 317 void tcg_gen_ext8s_i32(TCGv_i32 ret, TCGv_i32 arg);
 318 void tcg_gen_ext16s_i32(TCGv_i32 ret, TCGv_i32 arg);
 319 void tcg_gen_ext8u_i32(TCGv_i32 ret, TCGv_i32 arg);
 320 void tcg_gen_ext16u_i32(TCGv_i32 ret, TCGv_i32 arg);
 321 void tcg_gen_bswap16_i32(TCGv_i32 ret, TCGv_i32 arg);
 322 void tcg_gen_bswap32_i32(TCGv_i32 ret, TCGv_i32 arg);
 323
 324 static inline void tcg_gen_discard_i32(TCGv_i32 arg)
 325 {
 326     tcg_gen_op1_i32(INDEX_op_discard, arg);
 327 }
 328
 329 static inline void tcg_gen_mov_i32(TCGv_i32 ret, TCGv_i32 arg)
 330 {
 331     if (ret != arg) {
 332         tcg_gen_op2_i32(INDEX_op_mov_i32, ret, arg);
 333     }
 334 }
 335
 336 static inline void tcg_gen_movi_i32(TCGv_i32 ret, int32_t arg)
 337 {
 338     tcg_gen_op2i_i32(INDEX_op_movi_i32, ret, arg);
 339 }
 340
 341 static inline void tcg_gen_ld8u_i32(TCGv_i32 ret, TCGv_ptr arg2,
 342                                     tcg_target_long offset)
 343 {
 344     tcg_gen_ldst_op_i32(INDEX_op_ld8u_i32, ret, arg2, offset);
 345 }
 346
 347 static inline void tcg_gen_ld8s_i32(TCGv_i32 ret, TCGv_ptr arg2,
 348                                     tcg_target_long offset)
 349 {
 350     tcg_gen_ldst_op_i32(INDEX_op_ld8s_i32, ret, arg2, offset);
 351 }
 352
 353 static inline void tcg_gen_ld16u_i32(TCGv_i32 ret, TCGv_ptr arg2,
 354                                      tcg_target_long offset)
 355 {
 356     tcg_gen_ldst_op_i32(INDEX_op_ld16u_i32, ret, arg2, offset);
 357 }
 358
 359 static inline void tcg_gen_ld16s_i32(TCGv_i32 ret, TCGv_ptr arg2,
 360                                      tcg_target_long offset)
 361 {
 362     tcg_gen_ldst_op_i32(INDEX_op_ld16s_i32, ret, arg2, offset);
 363 }
 364
 365 static inline void tcg_gen_ld_i32(TCGv_i32 ret, TCGv_ptr arg2,
 366                                   tcg_target_long offset)
 367 {
 368     tcg_gen_ldst_op_i32(INDEX_op_ld_i32, ret, arg2, offset);
 369 }
 370
 371 static inline void tcg_gen_st8_i32(TCGv_i32 arg1, TCGv_ptr arg2,
 372                                    tcg_target_long offset)
 373 {
 374     tcg_gen_ldst_op_i32(INDEX_op_st8_i32, arg1, arg2, offset);
 375 }
 376
 377 static inline void tcg_gen_st16_i32(TCGv_i32 arg1, TCGv_ptr arg2,
 378                                     tcg_target_long offset)
 379 {
 380     tcg_gen_ldst_op_i32(INDEX_op_st16_i32, arg1, arg2, offset);
 381 }
 382
 383 static inline void tcg_gen_st_i32(TCGv_i32 arg1, TCGv_ptr arg2,
 384                                   tcg_target_long offset)
 385 {
 386     tcg_gen_ldst_op_i32(INDEX_op_st_i32, arg1, arg2, offset);
 387 }
 388
 389 static inline void tcg_gen_add_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
 390 {
 391     tcg_gen_op3_i32(INDEX_op_add_i32, ret, arg1, arg2);
 392 }
 393
 394 static inline void tcg_gen_sub_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
 395 {
 396     tcg_gen_op3_i32(INDEX_op_sub_i32, ret, arg1, arg2);
 397 }
 398
 399 static inline void tcg_gen_and_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
 400 {
 401     tcg_gen_op3_i32(INDEX_op_and_i32, ret, arg1, arg2);
 402 }
 403
 404 static inline void tcg_gen_or_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
 405 {
 406     tcg_gen_op3_i32(INDEX_op_or_i32, ret, arg1, arg2);
 407 }
 408
 409 static inline void tcg_gen_xor_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
 410 {
 411     tcg_gen_op3_i32(INDEX_op_xor_i32, ret, arg1, arg2);
 412 }
 413
 414 static inline void tcg_gen_shl_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
 415 {
 416     tcg_gen_op3_i32(INDEX_op_shl_i32, ret, arg1, arg2);
 417 }
 418
 419 static inline void tcg_gen_shr_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
 420 {
 421     tcg_gen_op3_i32(INDEX_op_shr_i32, ret, arg1, arg2);
 422 }
 423
 424 static inline void tcg_gen_sar_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
 425 {
 426     tcg_gen_op3_i32(INDEX_op_sar_i32, ret, arg1, arg2);
 427 }
 428
 429 static inline void tcg_gen_mul_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
 430 {
 431     tcg_gen_op3_i32(INDEX_op_mul_i32, ret, arg1, arg2);
 432 }
 433
 434 static inline void tcg_gen_neg_i32(TCGv_i32 ret, TCGv_i32 arg)
 435 {
 436     if (TCG_TARGET_HAS_neg_i32) {
 437         tcg_gen_op2_i32(INDEX_op_neg_i32, ret, arg);
 438     } else {
 439         tcg_gen_subfi_i32(ret, 0, arg);
 440     }
 441 }
 442
 443 static inline void tcg_gen_not_i32(TCGv_i32 ret, TCGv_i32 arg)
 444 {
 445     if (TCG_TARGET_HAS_not_i32) {
 446         tcg_gen_op2_i32(INDEX_op_not_i32, ret, arg);
 447     } else {
 448         tcg_gen_xori_i32(ret, arg, -1);
 449     }
 450 }
 451
 452 /* 64 bit ops */
 453
 454 void tcg_gen_addi_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
 455 void tcg_gen_subfi_i64(TCGv_i64 ret, int64_t arg1, TCGv_i64 arg2);
 456 void tcg_gen_subi_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
 457 void tcg_gen_andi_i64(TCGv_i64 ret, TCGv_i64 arg1, uint64_t arg2);
 458 void tcg_gen_ori_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
 459 void tcg_gen_xori_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
 460 void tcg_gen_shli_i64(TCGv_i64 ret, TCGv_i64 arg1, unsigned arg2);
 461 void tcg_gen_shri_i64(TCGv_i64 ret, TCGv_i64 arg1, unsigned arg2);
 462 void tcg_gen_sari_i64(TCGv_i64 ret, TCGv_i64 arg1, unsigned arg2);
 463 void tcg_gen_muli_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
 464 void tcg_gen_div_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 465 void tcg_gen_rem_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 466 void tcg_gen_divu_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 467 void tcg_gen_remu_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 468 void tcg_gen_andc_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 469 void tcg_gen_eqv_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 470 void tcg_gen_nand_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 471 void tcg_gen_nor_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 472 void tcg_gen_orc_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 473 void tcg_gen_clz_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 474 void tcg_gen_ctz_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 475 void tcg_gen_clzi_i64(TCGv_i64 ret, TCGv_i64 arg1, uint64_t arg2);
 476 void tcg_gen_ctzi_i64(TCGv_i64 ret, TCGv_i64 arg1, uint64_t arg2);
 477 void tcg_gen_clrsb_i64(TCGv_i64 ret, TCGv_i64 arg);
 478 void tcg_gen_ctpop_i64(TCGv_i64 a1, TCGv_i64 a2);
 479 void tcg_gen_rotl_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 480 void tcg_gen_rotli_i64(TCGv_i64 ret, TCGv_i64 arg1, unsigned arg2);
 481 void tcg_gen_rotr_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 482 void tcg_gen_rotri_i64(TCGv_i64 ret, TCGv_i64 arg1, unsigned arg2);
 483 void tcg_gen_deposit_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2,
 484                          unsigned int ofs, unsigned int len);
 485 void tcg_gen_deposit_z_i64(TCGv_i64 ret, TCGv_i64 arg,
 486                            unsigned int ofs, unsigned int len);
 487 void tcg_gen_extract_i64(TCGv_i64 ret, TCGv_i64 arg,
 488                          unsigned int ofs, unsigned int len);
 489 void tcg_gen_sextract_i64(TCGv_i64 ret, TCGv_i64 arg,
 490                           unsigned int ofs, unsigned int len);
 491 void tcg_gen_brcond_i64(TCGCond cond, TCGv_i64 arg1, TCGv_i64 arg2, TCGLabel *);
 492 void tcg_gen_brcondi_i64(TCGCond cond, TCGv_i64 arg1, int64_t arg2, TCGLabel *);
 493 void tcg_gen_setcond_i64(TCGCond cond, TCGv_i64 ret,
 494                          TCGv_i64 arg1, TCGv_i64 arg2);
 495 void tcg_gen_setcondi_i64(TCGCond cond, TCGv_i64 ret,
 496                           TCGv_i64 arg1, int64_t arg2);
 497 void tcg_gen_movcond_i64(TCGCond cond, TCGv_i64 ret, TCGv_i64 c1,
 498                          TCGv_i64 c2, TCGv_i64 v1, TCGv_i64 v2);
 499 void tcg_gen_add2_i64(TCGv_i64 rl, TCGv_i64 rh, TCGv_i64 al,
 500                       TCGv_i64 ah, TCGv_i64 bl, TCGv_i64 bh);
 501 void tcg_gen_sub2_i64(TCGv_i64 rl, TCGv_i64 rh, TCGv_i64 al,
 502                       TCGv_i64 ah, TCGv_i64 bl, TCGv_i64 bh);
 503 void tcg_gen_mulu2_i64(TCGv_i64 rl, TCGv_i64 rh, TCGv_i64 arg1, TCGv_i64 arg2);
 504 void tcg_gen_muls2_i64(TCGv_i64 rl, TCGv_i64 rh, TCGv_i64 arg1, TCGv_i64 arg2);
 505 void tcg_gen_mulsu2_i64(TCGv_i64 rl, TCGv_i64 rh, TCGv_i64 arg1, TCGv_i64 arg2);
 506 void tcg_gen_not_i64(TCGv_i64 ret, TCGv_i64 arg);
 507 void tcg_gen_ext8s_i64(TCGv_i64 ret, TCGv_i64 arg);
 508 void tcg_gen_ext16s_i64(TCGv_i64 ret, TCGv_i64 arg);
 509 void tcg_gen_ext32s_i64(TCGv_i64 ret, TCGv_i64 arg);
 510 void tcg_gen_ext8u_i64(TCGv_i64 ret, TCGv_i64 arg);
 511 void tcg_gen_ext16u_i64(TCGv_i64 ret, TCGv_i64 arg);
 512 void tcg_gen_ext32u_i64(TCGv_i64 ret, TCGv_i64 arg);
 513 void tcg_gen_bswap16_i64(TCGv_i64 ret, TCGv_i64 arg);
 514 void tcg_gen_bswap32_i64(TCGv_i64 ret, TCGv_i64 arg);
 515 void tcg_gen_bswap64_i64(TCGv_i64 ret, TCGv_i64 arg);
 516
 517 #if TCG_TARGET_REG_BITS == 64
 518 static inline void tcg_gen_discard_i64(TCGv_i64 arg)
 519 {
 520     tcg_gen_op1_i64(INDEX_op_discard, arg);
 521 }
 522
 523 static inline void tcg_gen_mov_i64(TCGv_i64 ret, TCGv_i64 arg)
 524 {
 525     if (ret != arg) {
 526         tcg_gen_op2_i64(INDEX_op_mov_i64, ret, arg);
 527     }
 528 }
 529
 530 static inline void tcg_gen_movi_i64(TCGv_i64 ret, int64_t arg)
 531 {
 532     tcg_gen_op2i_i64(INDEX_op_movi_i64, ret, arg);
 533 }
 534
 535 static inline void tcg_gen_ld8u_i64(TCGv_i64 ret, TCGv_ptr arg2,
 536                                     tcg_target_long offset)
 537 {
 538     tcg_gen_ldst_op_i64(INDEX_op_ld8u_i64, ret, arg2, offset);
 539 }
 540
 541 static inline void tcg_gen_ld8s_i64(TCGv_i64 ret, TCGv_ptr arg2,
 542                                     tcg_target_long offset)
 543 {
 544     tcg_gen_ldst_op_i64(INDEX_op_ld8s_i64, ret, arg2, offset);
 545 }
 546
 547 static inline void tcg_gen_ld16u_i64(TCGv_i64 ret, TCGv_ptr arg2,
 548                                      tcg_target_long offset)
 549 {
 550     tcg_gen_ldst_op_i64(INDEX_op_ld16u_i64, ret, arg2, offset);
 551 }
 552
 553 static inline void tcg_gen_ld16s_i64(TCGv_i64 ret, TCGv_ptr arg2,
 554                                      tcg_target_long offset)
 555 {
 556     tcg_gen_ldst_op_i64(INDEX_op_ld16s_i64, ret, arg2, offset);
 557 }
 558
 559 static inline void tcg_gen_ld32u_i64(TCGv_i64 ret, TCGv_ptr arg2,
 560                                      tcg_target_long offset)
 561 {
 562     tcg_gen_ldst_op_i64(INDEX_op_ld32u_i64, ret, arg2, offset);
 563 }
 564
 565 static inline void tcg_gen_ld32s_i64(TCGv_i64 ret, TCGv_ptr arg2,
 566                                      tcg_target_long offset)
 567 {
 568     tcg_gen_ldst_op_i64(INDEX_op_ld32s_i64, ret, arg2, offset);
 569 }
 570
 571 static inline void tcg_gen_ld_i64(TCGv_i64 ret, TCGv_ptr arg2,
 572                                   tcg_target_long offset)
 573 {
 574     tcg_gen_ldst_op_i64(INDEX_op_ld_i64, ret, arg2, offset);
 575 }
 576
 577 static inline void tcg_gen_st8_i64(TCGv_i64 arg1, TCGv_ptr arg2,
 578                                    tcg_target_long offset)
 579 {
 580     tcg_gen_ldst_op_i64(INDEX_op_st8_i64, arg1, arg2, offset);
 581 }
 582
 583 static inline void tcg_gen_st16_i64(TCGv_i64 arg1, TCGv_ptr arg2,
 584                                     tcg_target_long offset)
 585 {
 586     tcg_gen_ldst_op_i64(INDEX_op_st16_i64, arg1, arg2, offset);
 587 }
 588
 589 static inline void tcg_gen_st32_i64(TCGv_i64 arg1, TCGv_ptr arg2,
 590                                     tcg_target_long offset)
 591 {
 592     tcg_gen_ldst_op_i64(INDEX_op_st32_i64, arg1, arg2, offset);
 593 }
 594
 595 static inline void tcg_gen_st_i64(TCGv_i64 arg1, TCGv_ptr arg2,
 596                                   tcg_target_long offset)
 597 {
 598     tcg_gen_ldst_op_i64(INDEX_op_st_i64, arg1, arg2, offset);
 599 }
 600
 601 static inline void tcg_gen_add_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
 602 {
 603     tcg_gen_op3_i64(INDEX_op_add_i64, ret, arg1, arg2);
 604 }
 605
 606 static inline void tcg_gen_sub_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
 607 {
 608     tcg_gen_op3_i64(INDEX_op_sub_i64, ret, arg1, arg2);
 609 }
 610
 611 static inline void tcg_gen_and_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
 612 {
 613     tcg_gen_op3_i64(INDEX_op_and_i64, ret, arg1, arg2);
 614 }
 615
 616 static inline void tcg_gen_or_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
 617 {
 618     tcg_gen_op3_i64(INDEX_op_or_i64, ret, arg1, arg2);
 619 }
 620
 621 static inline void tcg_gen_xor_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
 622 {
 623     tcg_gen_op3_i64(INDEX_op_xor_i64, ret, arg1, arg2);
 624 }
 625
 626 static inline void tcg_gen_shl_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
 627 {
 628     tcg_gen_op3_i64(INDEX_op_shl_i64, ret, arg1, arg2);
 629 }
 630
 631 static inline void tcg_gen_shr_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
 632 {
 633     tcg_gen_op3_i64(INDEX_op_shr_i64, ret, arg1, arg2);
 634 }
 635
 636 static inline void tcg_gen_sar_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
 637 {
 638     tcg_gen_op3_i64(INDEX_op_sar_i64, ret, arg1, arg2);
 639 }
 640
 641 static inline void tcg_gen_mul_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
 642 {
 643     tcg_gen_op3_i64(INDEX_op_mul_i64, ret, arg1, arg2);
 644 }
 645 #else /* TCG_TARGET_REG_BITS == 32 */
 646 static inline void tcg_gen_st8_i64(TCGv_i64 arg1, TCGv_ptr arg2,
 647                                    tcg_target_long offset)
 648 {
 649     tcg_gen_st8_i32(TCGV_LOW(arg1), arg2, offset);
 650 }
 651
 652 static inline void tcg_gen_st16_i64(TCGv_i64 arg1, TCGv_ptr arg2,
 653                                     tcg_target_long offset)
 654 {
 655     tcg_gen_st16_i32(TCGV_LOW(arg1), arg2, offset);
 656 }
 657
 658 static inline void tcg_gen_st32_i64(TCGv_i64 arg1, TCGv_ptr arg2,
 659                                     tcg_target_long offset)
 660 {
 661     tcg_gen_st_i32(TCGV_LOW(arg1), arg2, offset);
 662 }
 663
 664 static inline void tcg_gen_add_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
 665 {
 666     tcg_gen_add2_i32(TCGV_LOW(ret), TCGV_HIGH(ret), TCGV_LOW(arg1),
 667                      TCGV_HIGH(arg1), TCGV_LOW(arg2), TCGV_HIGH(arg2));
 668 }
 669
 670 static inline void tcg_gen_sub_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
 671 {
 672     tcg_gen_sub2_i32(TCGV_LOW(ret), TCGV_HIGH(ret), TCGV_LOW(arg1),
 673                      TCGV_HIGH(arg1), TCGV_LOW(arg2), TCGV_HIGH(arg2));
 674 }
 675
 676 void tcg_gen_discard_i64(TCGv_i64 arg);
 677 void tcg_gen_mov_i64(TCGv_i64 ret, TCGv_i64 arg);
 678 void tcg_gen_movi_i64(TCGv_i64 ret, int64_t arg);
 679 void tcg_gen_ld8u_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset);
 680 void tcg_gen_ld8s_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset);
 681 void tcg_gen_ld16u_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset);
 682 void tcg_gen_ld16s_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset);
 683 void tcg_gen_ld32u_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset);
 684 void tcg_gen_ld32s_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset);
 685 void tcg_gen_ld_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset);
 686 void tcg_gen_st_i64(TCGv_i64 arg1, TCGv_ptr arg2, tcg_target_long offset);
 687 void tcg_gen_and_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 688 void tcg_gen_or_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 689 void tcg_gen_xor_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 690 void tcg_gen_shl_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 691 void tcg_gen_shr_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 692 void tcg_gen_sar_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 693 void tcg_gen_mul_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 694 #endif /* TCG_TARGET_REG_BITS */
 695
 696 static inline void tcg_gen_neg_i64(TCGv_i64 ret, TCGv_i64 arg)
 697 {
 698     if (TCG_TARGET_HAS_neg_i64) {
 699         tcg_gen_op2_i64(INDEX_op_neg_i64, ret, arg);
 700     } else {
 701         tcg_gen_subfi_i64(ret, 0, arg);
 702     }
 703 }
 704
 705 /* Size changing operations.  */
 706
 707 void tcg_gen_extu_i32_i64(TCGv_i64 ret, TCGv_i32 arg);
 708 void tcg_gen_ext_i32_i64(TCGv_i64 ret, TCGv_i32 arg);
 709 void tcg_gen_concat_i32_i64(TCGv_i64 dest, TCGv_i32 low, TCGv_i32 high);
 710 void tcg_gen_extrl_i64_i32(TCGv_i32 ret, TCGv_i64 arg);
 711 void tcg_gen_extrh_i64_i32(TCGv_i32 ret, TCGv_i64 arg);
 712 void tcg_gen_extr_i64_i32(TCGv_i32 lo, TCGv_i32 hi, TCGv_i64 arg);
 713 void tcg_gen_extr32_i64(TCGv_i64 lo, TCGv_i64 hi, TCGv_i64 arg);
 714
 715 static inline void tcg_gen_concat32_i64(TCGv_i64 ret, TCGv_i64 lo, TCGv_i64 hi)
 716 {
 717     tcg_gen_deposit_i64(ret, lo, hi, 32, 32);
 718 }
 719
 720 /* QEMU specific operations.  */
 721
 722 #ifndef TARGET_LONG_BITS
 723 #error must include QEMU headers
 724 #endif
 725
 726 #if TARGET_INSN_START_WORDS == 1
 727 # if TARGET_LONG_BITS <= TCG_TARGET_REG_BITS
 728 static inline void tcg_gen_insn_start(target_ulong pc)
 729 {
 730     tcg_gen_op1(INDEX_op_insn_start, pc);
 731 }
 732 # else
 733 static inline void tcg_gen_insn_start(target_ulong pc)
 734 {
 735     tcg_gen_op2(INDEX_op_insn_start, (uint32_t)pc, (uint32_t)(pc >> 32));
 736 }
 737 # endif
 738 #elif TARGET_INSN_START_WORDS == 2
 739 # if TARGET_LONG_BITS <= TCG_TARGET_REG_BITS
 740 static inline void tcg_gen_insn_start(target_ulong pc, target_ulong a1)
 741 {
 742     tcg_gen_op2(INDEX_op_insn_start, pc, a1);
 743 }
 744 # else
 745 static inline void tcg_gen_insn_start(target_ulong pc, target_ulong a1)
 746 {
 747     tcg_gen_op4(INDEX_op_insn_start,
 748                 (uint32_t)pc, (uint32_t)(pc >> 32),
 749                 (uint32_t)a1, (uint32_t)(a1 >> 32));
 750 }
 751 # endif
 752 #elif TARGET_INSN_START_WORDS == 3
 753 # if TARGET_LONG_BITS <= TCG_TARGET_REG_BITS
 754 static inline void tcg_gen_insn_start(target_ulong pc, target_ulong a1,
 755                                       target_ulong a2)
 756 {
 757     tcg_gen_op3(INDEX_op_insn_start, pc, a1, a2);
 758 }
 759 # else
 760 static inline void tcg_gen_insn_start(target_ulong pc, target_ulong a1,
 761                                       target_ulong a2)
 762 {
 763     tcg_gen_op6(INDEX_op_insn_start,
 764                 (uint32_t)pc, (uint32_t)(pc >> 32),
 765                 (uint32_t)a1, (uint32_t)(a1 >> 32),
 766                 (uint32_t)a2, (uint32_t)(a2 >> 32));
 767 }
 768 # endif
 769 #else
 770 # error "Unhandled number of operands to insn_start"
 771 #endif
 772
 773 static inline void tcg_gen_exit_tb(uintptr_t val)
 774 {
 775     tcg_gen_op1i(INDEX_op_exit_tb, val);
 776 }
 777
 778 /**
 779  * tcg_gen_goto_tb() - output goto_tb TCG operation
 780  * @idx: Direct jump slot index (0 or 1)
 781  *
 782  * See tcg/README for more info about this TCG operation.
 783  *
 784  * NOTE: In softmmu emulation, direct jumps with goto_tb are only safe within
 785  * the pages this TB resides in because we don't take care of direct jumps when
 786  * address mapping changes, e.g. in tlb_flush(). In user mode, there's only a
 787  * static address translation, so the destination address is always valid, TBs
 788  * are always invalidated properly, and direct jumps are reset when mapping
 789  * changes.
 790  */
 791 void tcg_gen_goto_tb(unsigned idx);
 792
 793 /**
 794  * tcg_gen_lookup_and_goto_ptr() - look up the current TB, jump to it if valid
 795  * @addr: Guest address of the target TB
 796  *
 797  * If the TB is not valid, jump to the epilogue.
 798  *
 799  * This operation is optional. If the TCG backend does not implement goto_ptr,
 800  * this op is equivalent to calling tcg_gen_exit_tb() with 0 as the argument.
 801  */
 802 void tcg_gen_lookup_and_goto_ptr(void);
 803
 804 #if TARGET_LONG_BITS == 32
 805 #define tcg_temp_new() tcg_temp_new_i32()
 806 #define tcg_global_reg_new tcg_global_reg_new_i32
 807 #define tcg_global_mem_new tcg_global_mem_new_i32
 808 #define tcg_temp_local_new() tcg_temp_local_new_i32()
 809 #define tcg_temp_free tcg_temp_free_i32
 810 #define tcg_gen_qemu_ld_tl tcg_gen_qemu_ld_i32
 811 #define tcg_gen_qemu_st_tl tcg_gen_qemu_st_i32
 812 #else
 813 #define tcg_temp_new() tcg_temp_new_i64()
 814 #define tcg_global_reg_new tcg_global_reg_new_i64
 815 #define tcg_global_mem_new tcg_global_mem_new_i64
 816 #define tcg_temp_local_new() tcg_temp_local_new_i64()
 817 #define tcg_temp_free tcg_temp_free_i64
 818 #define tcg_gen_qemu_ld_tl tcg_gen_qemu_ld_i64
 819 #define tcg_gen_qemu_st_tl tcg_gen_qemu_st_i64
 820 #endif
 821
 822 void tcg_gen_qemu_ld_i32(TCGv_i32, TCGv, TCGArg, TCGMemOp);
 823 void tcg_gen_qemu_st_i32(TCGv_i32, TCGv, TCGArg, TCGMemOp);
 824 void tcg_gen_qemu_ld_i64(TCGv_i64, TCGv, TCGArg, TCGMemOp);
 825 void tcg_gen_qemu_st_i64(TCGv_i64, TCGv, TCGArg, TCGMemOp);
 826
 827 static inline void tcg_gen_qemu_ld8u(TCGv ret, TCGv addr, int mem_index)
 828 {
 829     tcg_gen_qemu_ld_tl(ret, addr, mem_index, MO_UB);
 830 }
 831
 832 static inline void tcg_gen_qemu_ld8s(TCGv ret, TCGv addr, int mem_index)
 833 {
 834     tcg_gen_qemu_ld_tl(ret, addr, mem_index, MO_SB);
 835 }
 836
 837 static inline void tcg_gen_qemu_ld16u(TCGv ret, TCGv addr, int mem_index)
 838 {
 839     tcg_gen_qemu_ld_tl(ret, addr, mem_index, MO_TEUW);
 840 }
 841
 842 static inline void tcg_gen_qemu_ld16s(TCGv ret, TCGv addr, int mem_index)
 843 {
 844     tcg_gen_qemu_ld_tl(ret, addr, mem_index, MO_TESW);
 845 }
 846
 847 static inline void tcg_gen_qemu_ld32u(TCGv ret, TCGv addr, int mem_index)
 848 {
 849     tcg_gen_qemu_ld_tl(ret, addr, mem_index, MO_TEUL);
 850 }
 851
 852 static inline void tcg_gen_qemu_ld32s(TCGv ret, TCGv addr, int mem_index)
 853 {
 854     tcg_gen_qemu_ld_tl(ret, addr, mem_index, MO_TESL);
 855 }
 856
 857 static inline void tcg_gen_qemu_ld64(TCGv_i64 ret, TCGv addr, int mem_index)
 858 {
 859     tcg_gen_qemu_ld_i64(ret, addr, mem_index, MO_TEQ);
 860 }
 861
 862 static inline void tcg_gen_qemu_st8(TCGv arg, TCGv addr, int mem_index)
 863 {
 864     tcg_gen_qemu_st_tl(arg, addr, mem_index, MO_UB);
 865 }
 866
 867 static inline void tcg_gen_qemu_st16(TCGv arg, TCGv addr, int mem_index)
 868 {
 869     tcg_gen_qemu_st_tl(arg, addr, mem_index, MO_TEUW);
 870 }
 871
 872 static inline void tcg_gen_qemu_st32(TCGv arg, TCGv addr, int mem_index)
 873 {
 874     tcg_gen_qemu_st_tl(arg, addr, mem_index, MO_TEUL);
 875 }
 876
 877 static inline void tcg_gen_qemu_st64(TCGv_i64 arg, TCGv addr, int mem_index)
 878 {
 879     tcg_gen_qemu_st_i64(arg, addr, mem_index, MO_TEQ);
 880 }
 881
 882 void tcg_gen_atomic_cmpxchg_i32(TCGv_i32, TCGv, TCGv_i32, TCGv_i32,
 883                                 TCGArg, TCGMemOp);
 884 void tcg_gen_atomic_cmpxchg_i64(TCGv_i64, TCGv, TCGv_i64, TCGv_i64,
 885                                 TCGArg, TCGMemOp);
 886
 887 void tcg_gen_atomic_xchg_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
 888 void tcg_gen_atomic_xchg_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
 889 void tcg_gen_atomic_fetch_add_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
 890 void tcg_gen_atomic_fetch_add_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
 891 void tcg_gen_atomic_fetch_and_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
 892 void tcg_gen_atomic_fetch_and_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
 893 void tcg_gen_atomic_fetch_or_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
 894 void tcg_gen_atomic_fetch_or_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
 895 void tcg_gen_atomic_fetch_xor_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
 896 void tcg_gen_atomic_fetch_xor_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
 897 void tcg_gen_atomic_add_fetch_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
 898 void tcg_gen_atomic_add_fetch_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
 899 void tcg_gen_atomic_and_fetch_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
 900 void tcg_gen_atomic_and_fetch_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
 901 void tcg_gen_atomic_or_fetch_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
 902 void tcg_gen_atomic_or_fetch_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
 903 void tcg_gen_atomic_xor_fetch_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
 904 void tcg_gen_atomic_xor_fetch_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
 905
 906 #if TARGET_LONG_BITS == 64
 907 #define tcg_gen_movi_tl tcg_gen_movi_i64
 908 #define tcg_gen_mov_tl tcg_gen_mov_i64
 909 #define tcg_gen_ld8u_tl tcg_gen_ld8u_i64
 910 #define tcg_gen_ld8s_tl tcg_gen_ld8s_i64
 911 #define tcg_gen_ld16u_tl tcg_gen_ld16u_i64
 912 #define tcg_gen_ld16s_tl tcg_gen_ld16s_i64
 913 #define tcg_gen_ld32u_tl tcg_gen_ld32u_i64
 914 #define tcg_gen_ld32s_tl tcg_gen_ld32s_i64
 915 #define tcg_gen_ld_tl tcg_gen_ld_i64
 916 #define tcg_gen_st8_tl tcg_gen_st8_i64
 917 #define tcg_gen_st16_tl tcg_gen_st16_i64
 918 #define tcg_gen_st32_tl tcg_gen_st32_i64
 919 #define tcg_gen_st_tl tcg_gen_st_i64
 920 #define tcg_gen_add_tl tcg_gen_add_i64
 921 #define tcg_gen_addi_tl tcg_gen_addi_i64
 922 #define tcg_gen_sub_tl tcg_gen_sub_i64
 923 #define tcg_gen_neg_tl tcg_gen_neg_i64
 924 #define tcg_gen_subfi_tl tcg_gen_subfi_i64
 925 #define tcg_gen_subi_tl tcg_gen_subi_i64
 926 #define tcg_gen_and_tl tcg_gen_and_i64
 927 #define tcg_gen_andi_tl tcg_gen_andi_i64
 928 #define tcg_gen_or_tl tcg_gen_or_i64
 929 #define tcg_gen_ori_tl tcg_gen_ori_i64
 930 #define tcg_gen_xor_tl tcg_gen_xor_i64
 931 #define tcg_gen_xori_tl tcg_gen_xori_i64
 932 #define tcg_gen_not_tl tcg_gen_not_i64
 933 #define tcg_gen_shl_tl tcg_gen_shl_i64
 934 #define tcg_gen_shli_tl tcg_gen_shli_i64
 935 #define tcg_gen_shr_tl tcg_gen_shr_i64
 936 #define tcg_gen_shri_tl tcg_gen_shri_i64
 937 #define tcg_gen_sar_tl tcg_gen_sar_i64
 938 #define tcg_gen_sari_tl tcg_gen_sari_i64
 939 #define tcg_gen_brcond_tl tcg_gen_brcond_i64
 940 #define tcg_gen_brcondi_tl tcg_gen_brcondi_i64
 941 #define tcg_gen_setcond_tl tcg_gen_setcond_i64
 942 #define tcg_gen_setcondi_tl tcg_gen_setcondi_i64
 943 #define tcg_gen_mul_tl tcg_gen_mul_i64
 944 #define tcg_gen_muli_tl tcg_gen_muli_i64
 945 #define tcg_gen_div_tl tcg_gen_div_i64
 946 #define tcg_gen_rem_tl tcg_gen_rem_i64
 947 #define tcg_gen_divu_tl tcg_gen_divu_i64
 948 #define tcg_gen_remu_tl tcg_gen_remu_i64
 949 #define tcg_gen_discard_tl tcg_gen_discard_i64
 950 #define tcg_gen_trunc_tl_i32 tcg_gen_extrl_i64_i32
 951 #define tcg_gen_trunc_i64_tl tcg_gen_mov_i64
 952 #define tcg_gen_extu_i32_tl tcg_gen_extu_i32_i64
 953 #define tcg_gen_ext_i32_tl tcg_gen_ext_i32_i64
 954 #define tcg_gen_extu_tl_i64 tcg_gen_mov_i64
 955 #define tcg_gen_ext_tl_i64 tcg_gen_mov_i64
 956 #define tcg_gen_ext8u_tl tcg_gen_ext8u_i64
 957 #define tcg_gen_ext8s_tl tcg_gen_ext8s_i64
 958 #define tcg_gen_ext16u_tl tcg_gen_ext16u_i64
 959 #define tcg_gen_ext16s_tl tcg_gen_ext16s_i64
 960 #define tcg_gen_ext32u_tl tcg_gen_ext32u_i64
 961 #define tcg_gen_ext32s_tl tcg_gen_ext32s_i64
 962 #define tcg_gen_bswap16_tl tcg_gen_bswap16_i64
 963 #define tcg_gen_bswap32_tl tcg_gen_bswap32_i64
 964 #define tcg_gen_bswap64_tl tcg_gen_bswap64_i64
 965 #define tcg_gen_concat_tl_i64 tcg_gen_concat32_i64
 966 #define tcg_gen_extr_i64_tl tcg_gen_extr32_i64
 967 #define tcg_gen_andc_tl tcg_gen_andc_i64
 968 #define tcg_gen_eqv_tl tcg_gen_eqv_i64
 969 #define tcg_gen_nand_tl tcg_gen_nand_i64
 970 #define tcg_gen_nor_tl tcg_gen_nor_i64
 971 #define tcg_gen_orc_tl tcg_gen_orc_i64
 972 #define tcg_gen_clz_tl tcg_gen_clz_i64
 973 #define tcg_gen_ctz_tl tcg_gen_ctz_i64
 974 #define tcg_gen_clzi_tl tcg_gen_clzi_i64
 975 #define tcg_gen_ctzi_tl tcg_gen_ctzi_i64
 976 #define tcg_gen_clrsb_tl tcg_gen_clrsb_i64
 977 #define tcg_gen_ctpop_tl tcg_gen_ctpop_i64
 978 #define tcg_gen_rotl_tl tcg_gen_rotl_i64
 979 #define tcg_gen_rotli_tl tcg_gen_rotli_i64
 980 #define tcg_gen_rotr_tl tcg_gen_rotr_i64
 981 #define tcg_gen_rotri_tl tcg_gen_rotri_i64
 982 #define tcg_gen_deposit_tl tcg_gen_deposit_i64
 983 #define tcg_gen_deposit_z_tl tcg_gen_deposit_z_i64
 984 #define tcg_gen_extract_tl tcg_gen_extract_i64
 985 #define tcg_gen_sextract_tl tcg_gen_sextract_i64
 986 #define tcg_const_tl tcg_const_i64
 987 #define tcg_const_local_tl tcg_const_local_i64
 988 #define tcg_gen_movcond_tl tcg_gen_movcond_i64
 989 #define tcg_gen_add2_tl tcg_gen_add2_i64
 990 #define tcg_gen_sub2_tl tcg_gen_sub2_i64
 991 #define tcg_gen_mulu2_tl tcg_gen_mulu2_i64
 992 #define tcg_gen_muls2_tl tcg_gen_muls2_i64
 993 #define tcg_gen_mulsu2_tl tcg_gen_mulsu2_i64
 994 #define tcg_gen_atomic_cmpxchg_tl tcg_gen_atomic_cmpxchg_i64
 995 #define tcg_gen_atomic_xchg_tl tcg_gen_atomic_xchg_i64
 996 #define tcg_gen_atomic_fetch_add_tl tcg_gen_atomic_fetch_add_i64
 997 #define tcg_gen_atomic_fetch_and_tl tcg_gen_atomic_fetch_and_i64
 998 #define tcg_gen_atomic_fetch_or_tl tcg_gen_atomic_fetch_or_i64
 999 #define tcg_gen_atomic_fetch_xor_tl tcg_gen_atomic_fetch_xor_i64
1000 #define tcg_gen_atomic_add_fetch_tl tcg_gen_atomic_add_fetch_i64
1001 #define tcg_gen_atomic_and_fetch_tl tcg_gen_atomic_and_fetch_i64
1002 #define tcg_gen_atomic_or_fetch_tl tcg_gen_atomic_or_fetch_i64
1003 #define tcg_gen_atomic_xor_fetch_tl tcg_gen_atomic_xor_fetch_i64
1004 #else
1005 #define tcg_gen_movi_tl tcg_gen_movi_i32
1006 #define tcg_gen_mov_tl tcg_gen_mov_i32
1007 #define tcg_gen_ld8u_tl tcg_gen_ld8u_i32
1008 #define tcg_gen_ld8s_tl tcg_gen_ld8s_i32
1009 #define tcg_gen_ld16u_tl tcg_gen_ld16u_i32
1010 #define tcg_gen_ld16s_tl tcg_gen_ld16s_i32
1011 #define tcg_gen_ld32u_tl tcg_gen_ld_i32
1012 #define tcg_gen_ld32s_tl tcg_gen_ld_i32
1013 #define tcg_gen_ld_tl tcg_gen_ld_i32
1014 #define tcg_gen_st8_tl tcg_gen_st8_i32
1015 #define tcg_gen_st16_tl tcg_gen_st16_i32
1016 #define tcg_gen_st32_tl tcg_gen_st_i32
1017 #define tcg_gen_st_tl tcg_gen_st_i32
1018 #define tcg_gen_add_tl tcg_gen_add_i32
1019 #define tcg_gen_addi_tl tcg_gen_addi_i32
1020 #define tcg_gen_sub_tl tcg_gen_sub_i32
1021 #define tcg_gen_neg_tl tcg_gen_neg_i32
1022 #define tcg_gen_subfi_tl tcg_gen_subfi_i32
1023 #define tcg_gen_subi_tl tcg_gen_subi_i32
1024 #define tcg_gen_and_tl tcg_gen_and_i32
1025 #define tcg_gen_andi_tl tcg_gen_andi_i32
1026 #define tcg_gen_or_tl tcg_gen_or_i32
1027 #define tcg_gen_ori_tl tcg_gen_ori_i32
1028 #define tcg_gen_xor_tl tcg_gen_xor_i32
1029 #define tcg_gen_xori_tl tcg_gen_xori_i32
1030 #define tcg_gen_not_tl tcg_gen_not_i32
1031 #define tcg_gen_shl_tl tcg_gen_shl_i32
1032 #define tcg_gen_shli_tl tcg_gen_shli_i32
1033 #define tcg_gen_shr_tl tcg_gen_shr_i32
1034 #define tcg_gen_shri_tl tcg_gen_shri_i32
1035 #define tcg_gen_sar_tl tcg_gen_sar_i32
1036 #define tcg_gen_sari_tl tcg_gen_sari_i32
1037 #define tcg_gen_brcond_tl tcg_gen_brcond_i32
1038 #define tcg_gen_brcondi_tl tcg_gen_brcondi_i32
1039 #define tcg_gen_setcond_tl tcg_gen_setcond_i32
1040 #define tcg_gen_setcondi_tl tcg_gen_setcondi_i32
1041 #define tcg_gen_mul_tl tcg_gen_mul_i32
1042 #define tcg_gen_muli_tl tcg_gen_muli_i32
1043 #define tcg_gen_div_tl tcg_gen_div_i32
1044 #define tcg_gen_rem_tl tcg_gen_rem_i32
1045 #define tcg_gen_divu_tl tcg_gen_divu_i32
1046 #define tcg_gen_remu_tl tcg_gen_remu_i32
1047 #define tcg_gen_discard_tl tcg_gen_discard_i32
1048 #define tcg_gen_trunc_tl_i32 tcg_gen_mov_i32
1049 #define tcg_gen_trunc_i64_tl tcg_gen_extrl_i64_i32
1050 #define tcg_gen_extu_i32_tl tcg_gen_mov_i32
1051 #define tcg_gen_ext_i32_tl tcg_gen_mov_i32
1052 #define tcg_gen_extu_tl_i64 tcg_gen_extu_i32_i64
1053 #define tcg_gen_ext_tl_i64 tcg_gen_ext_i32_i64
1054 #define tcg_gen_ext8u_tl tcg_gen_ext8u_i32
1055 #define tcg_gen_ext8s_tl tcg_gen_ext8s_i32
1056 #define tcg_gen_ext16u_tl tcg_gen_ext16u_i32
1057 #define tcg_gen_ext16s_tl tcg_gen_ext16s_i32
1058 #define tcg_gen_ext32u_tl tcg_gen_mov_i32
1059 #define tcg_gen_ext32s_tl tcg_gen_mov_i32
1060 #define tcg_gen_bswap16_tl tcg_gen_bswap16_i32
1061 #define tcg_gen_bswap32_tl tcg_gen_bswap32_i32
1062 #define tcg_gen_concat_tl_i64 tcg_gen_concat_i32_i64
1063 #define tcg_gen_extr_i64_tl tcg_gen_extr_i64_i32
1064 #define tcg_gen_andc_tl tcg_gen_andc_i32
1065 #define tcg_gen_eqv_tl tcg_gen_eqv_i32
1066 #define tcg_gen_nand_tl tcg_gen_nand_i32
1067 #define tcg_gen_nor_tl tcg_gen_nor_i32
1068 #define tcg_gen_orc_tl tcg_gen_orc_i32
1069 #define tcg_gen_clz_tl tcg_gen_clz_i32
1070 #define tcg_gen_ctz_tl tcg_gen_ctz_i32
1071 #define tcg_gen_clzi_tl tcg_gen_clzi_i32
1072 #define tcg_gen_ctzi_tl tcg_gen_ctzi_i32
1073 #define tcg_gen_clrsb_tl tcg_gen_clrsb_i32
1074 #define tcg_gen_ctpop_tl tcg_gen_ctpop_i32
1075 #define tcg_gen_rotl_tl tcg_gen_rotl_i32
1076 #define tcg_gen_rotli_tl tcg_gen_rotli_i32
1077 #define tcg_gen_rotr_tl tcg_gen_rotr_i32
1078 #define tcg_gen_rotri_tl tcg_gen_rotri_i32
1079 #define tcg_gen_deposit_tl tcg_gen_deposit_i32
1080 #define tcg_gen_deposit_z_tl tcg_gen_deposit_z_i32
1081 #define tcg_gen_extract_tl tcg_gen_extract_i32
1082 #define tcg_gen_sextract_tl tcg_gen_sextract_i32
1083 #define tcg_const_tl tcg_const_i32
1084 #define tcg_const_local_tl tcg_const_local_i32
1085 #define tcg_gen_movcond_tl tcg_gen_movcond_i32
1086 #define tcg_gen_add2_tl tcg_gen_add2_i32
1087 #define tcg_gen_sub2_tl tcg_gen_sub2_i32
1088 #define tcg_gen_mulu2_tl tcg_gen_mulu2_i32
1089 #define tcg_gen_muls2_tl tcg_gen_muls2_i32
1090 #define tcg_gen_mulsu2_tl tcg_gen_mulsu2_i32
1091 #define tcg_gen_atomic_cmpxchg_tl tcg_gen_atomic_cmpxchg_i32
1092 #define tcg_gen_atomic_xchg_tl tcg_gen_atomic_xchg_i32
1093 #define tcg_gen_atomic_fetch_add_tl tcg_gen_atomic_fetch_add_i32
1094 #define tcg_gen_atomic_fetch_and_tl tcg_gen_atomic_fetch_and_i32
1095 #define tcg_gen_atomic_fetch_or_tl tcg_gen_atomic_fetch_or_i32
1096 #define tcg_gen_atomic_fetch_xor_tl tcg_gen_atomic_fetch_xor_i32
1097 #define tcg_gen_atomic_add_fetch_tl tcg_gen_atomic_add_fetch_i32
1098 #define tcg_gen_atomic_and_fetch_tl tcg_gen_atomic_and_fetch_i32
1099 #define tcg_gen_atomic_or_fetch_tl tcg_gen_atomic_or_fetch_i32
1100 #define tcg_gen_atomic_xor_fetch_tl tcg_gen_atomic_xor_fetch_i32
1101 #endif
1102
1103 #if UINTPTR_MAX == UINT32_MAX
1104 # define tcg_gen_ld_ptr(R, A, O) \
1105     tcg_gen_ld_i32(TCGV_PTR_TO_NAT(R), (A), (O))
1106 # define tcg_gen_discard_ptr(A) \
1107     tcg_gen_discard_i32(TCGV_PTR_TO_NAT(A))
1108 # define tcg_gen_add_ptr(R, A, B) \
1109     tcg_gen_add_i32(TCGV_PTR_TO_NAT(R), TCGV_PTR_TO_NAT(A), TCGV_PTR_TO_NAT(B))
1110 # define tcg_gen_addi_ptr(R, A, B) \
1111     tcg_gen_addi_i32(TCGV_PTR_TO_NAT(R), TCGV_PTR_TO_NAT(A), (B))
1112 # define tcg_gen_ext_i32_ptr(R, A) \
1113     tcg_gen_mov_i32(TCGV_PTR_TO_NAT(R), (A))
1114 #else
1115 # define tcg_gen_ld_ptr(R, A, O) \
1116     tcg_gen_ld_i64(TCGV_PTR_TO_NAT(R), (A), (O))
1117 # define tcg_gen_discard_ptr(A) \
1118     tcg_gen_discard_i64(TCGV_PTR_TO_NAT(A))
1119 # define tcg_gen_add_ptr(R, A, B) \
1120     tcg_gen_add_i64(TCGV_PTR_TO_NAT(R), TCGV_PTR_TO_NAT(A), TCGV_PTR_TO_NAT(B))
1121 # define tcg_gen_addi_ptr(R, A, B) \
1122     tcg_gen_addi_i64(TCGV_PTR_TO_NAT(R), TCGV_PTR_TO_NAT(A), (B))
1123 # define tcg_gen_ext_i32_ptr(R, A) \
1124     tcg_gen_ext_i32_i64(TCGV_PTR_TO_NAT(R), (A))
1125 #endif /* UINTPTR_MAX == UINT32_MAX */