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console: move chardev declarations to sysemu/char.h
[qemu/ar7.git] / memory.c
blobb91a60a921ce5453a16d1b7187eeb803e4506fc7
1 /*
2 * Physical memory management
3 *
4 * Copyright 2011 Red Hat, Inc. and/or its affiliates
5 *
6 * Authors:
7 * Avi Kivity <avi@redhat.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
11 *
12 * Contributions after 2012-01-13 are licensed under the terms of the
13 * GNU GPL, version 2 or (at your option) any later version.
14 */
15
16 #include "exec/memory.h"
17 #include "exec/address-spaces.h"
18 #include "exec/ioport.h"
19 #include "qemu/bitops.h"
20 #include "qom/object.h"
21 #include "trace.h"
22 #include <assert.h>
23
24 #include "exec/memory-internal.h"
25 #include "exec/ram_addr.h"
26 #include "sysemu/sysemu.h"
27
28 //#define DEBUG_UNASSIGNED
29
30 static unsigned memory_region_transaction_depth;
31 static bool memory_region_update_pending;
32 static bool ioeventfd_update_pending;
33 static bool global_dirty_log = false;
34
35 /* flat_view_mutex is taken around reading as->current_map; the critical
36 * section is extremely short, so I'm using a single mutex for every AS.
37 * We could also RCU for the read-side.
38 *
39 * The BQL is taken around transaction commits, hence both locks are taken
40 * while writing to as->current_map (with the BQL taken outside).
41 */
42 static QemuMutex flat_view_mutex;
43
44 static QTAILQ_HEAD(memory_listeners, MemoryListener) memory_listeners
45 = QTAILQ_HEAD_INITIALIZER(memory_listeners);
46
47 static QTAILQ_HEAD(, AddressSpace) address_spaces
48 = QTAILQ_HEAD_INITIALIZER(address_spaces);
49
50 static void memory_init(void)
51 {
52 qemu_mutex_init(&flat_view_mutex);
53 }
54
55 typedef struct AddrRange AddrRange;
56
57 /*
58 * Note using signed integers limits us to physical addresses at most
59 * 63 bits wide. They are needed for negative offsetting in aliases
60 * (large MemoryRegion::alias_offset).
61 */
62 struct AddrRange {
63 Int128 start;
64 Int128 size;
65 };
66
67 static AddrRange addrrange_make(Int128 start, Int128 size)
68 {
69 return (AddrRange) { start, size };
70 }
71
72 static bool addrrange_equal(AddrRange r1, AddrRange r2)
73 {
74 return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
75 }
76
77 static Int128 addrrange_end(AddrRange r)
78 {
79 return int128_add(r.start, r.size);
80 }
81
82 static AddrRange addrrange_shift(AddrRange range, Int128 delta)
83 {
84 int128_addto(&range.start, delta);
85 return range;
86 }
87
88 static bool addrrange_contains(AddrRange range, Int128 addr)
89 {
90 return int128_ge(addr, range.start)
91 && int128_lt(addr, addrrange_end(range));
92 }
93
94 static bool addrrange_intersects(AddrRange r1, AddrRange r2)
95 {
96 return addrrange_contains(r1, r2.start)
97 || addrrange_contains(r2, r1.start);
98 }
99
100 static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
101 {
102 Int128 start = int128_max(r1.start, r2.start);
103 Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
104 return addrrange_make(start, int128_sub(end, start));
105 }
106
107 enum ListenerDirection { Forward, Reverse };
108
109 static bool memory_listener_match(MemoryListener *listener,
110 MemoryRegionSection *section)
111 {
112 return !listener->address_space_filter
113 || listener->address_space_filter == section->address_space;
114 }
115
116 #define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \
117 do { \
118 MemoryListener *_listener; \
119 \
120 switch (_direction) { \
121 case Forward: \
122 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
123 if (_listener->_callback) { \
124 _listener->_callback(_listener, ##_args); \
125 } \
126 } \
127 break; \
128 case Reverse: \
129 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
130 memory_listeners, link) { \
131 if (_listener->_callback) { \
132 _listener->_callback(_listener, ##_args); \
133 } \
134 } \
135 break; \
136 default: \
137 abort(); \
138 } \
139 } while (0)
140
141 #define MEMORY_LISTENER_CALL(_callback, _direction, _section, _args...) \
142 do { \
143 MemoryListener *_listener; \
144 \
145 switch (_direction) { \
146 case Forward: \
147 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
148 if (_listener->_callback \
149 && memory_listener_match(_listener, _section)) { \
150 _listener->_callback(_listener, _section, ##_args); \
151 } \
152 } \
153 break; \
154 case Reverse: \
155 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
156 memory_listeners, link) { \
157 if (_listener->_callback \
158 && memory_listener_match(_listener, _section)) { \
159 _listener->_callback(_listener, _section, ##_args); \
160 } \
161 } \
162 break; \
163 default: \
164 abort(); \
165 } \
166 } while (0)
167
168 /* No need to ref/unref .mr, the FlatRange keeps it alive. */
169 #define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback) \
170 MEMORY_LISTENER_CALL(callback, dir, (&(MemoryRegionSection) { \
171 .mr = (fr)->mr, \
172 .address_space = (as), \
173 .offset_within_region = (fr)->offset_in_region, \
174 .size = (fr)->addr.size, \
175 .offset_within_address_space = int128_get64((fr)->addr.start), \
176 .readonly = (fr)->readonly, \
177 }))
178
179 struct CoalescedMemoryRange {
180 AddrRange addr;
181 QTAILQ_ENTRY(CoalescedMemoryRange) link;
182 };
183
184 struct MemoryRegionIoeventfd {
185 AddrRange addr;
186 bool match_data;
187 uint64_t data;
188 EventNotifier *e;
189 };
190
191 static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a,
192 MemoryRegionIoeventfd b)
193 {
194 if (int128_lt(a.addr.start, b.addr.start)) {
195 return true;
196 } else if (int128_gt(a.addr.start, b.addr.start)) {
197 return false;
198 } else if (int128_lt(a.addr.size, b.addr.size)) {
199 return true;
200 } else if (int128_gt(a.addr.size, b.addr.size)) {
201 return false;
202 } else if (a.match_data < b.match_data) {
203 return true;
204 } else if (a.match_data > b.match_data) {
205 return false;
206 } else if (a.match_data) {
207 if (a.data < b.data) {
208 return true;
209 } else if (a.data > b.data) {
210 return false;
211 }
212 }
213 if (a.e < b.e) {
214 return true;
215 } else if (a.e > b.e) {
216 return false;
217 }
218 return false;
219 }
220
221 static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a,
222 MemoryRegionIoeventfd b)
223 {
224 return !memory_region_ioeventfd_before(a, b)
225 && !memory_region_ioeventfd_before(b, a);
226 }
227
228 typedef struct FlatRange FlatRange;
229 typedef struct FlatView FlatView;
230
231 /* Range of memory in the global map. Addresses are absolute. */
232 struct FlatRange {
233 MemoryRegion *mr;
234 hwaddr offset_in_region;
235 AddrRange addr;
236 uint8_t dirty_log_mask;
237 bool romd_mode;
238 bool readonly;
239 };
240
241 /* Flattened global view of current active memory hierarchy. Kept in sorted
242 * order.
243 */
244 struct FlatView {
245 unsigned ref;
246 FlatRange *ranges;
247 unsigned nr;
248 unsigned nr_allocated;
249 };
250
251 typedef struct AddressSpaceOps AddressSpaceOps;
252
253 #define FOR_EACH_FLAT_RANGE(var, view) \
254 for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
255
256 static bool flatrange_equal(FlatRange *a, FlatRange *b)
257 {
258 return a->mr == b->mr
259 && addrrange_equal(a->addr, b->addr)
260 && a->offset_in_region == b->offset_in_region
261 && a->romd_mode == b->romd_mode
262 && a->readonly == b->readonly;
263 }
264
265 static void flatview_init(FlatView *view)
266 {
267 view->ref = 1;
268 view->ranges = NULL;
269 view->nr = 0;
270 view->nr_allocated = 0;
271 }
272
273 /* Insert a range into a given position. Caller is responsible for maintaining
274 * sorting order.
275 */
276 static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
277 {
278 if (view->nr == view->nr_allocated) {
279 view->nr_allocated = MAX(2 * view->nr, 10);
280 view->ranges = g_realloc(view->ranges,
281 view->nr_allocated * sizeof(*view->ranges));
282 }
283 memmove(view->ranges + pos + 1, view->ranges + pos,
284 (view->nr - pos) * sizeof(FlatRange));
285 view->ranges[pos] = *range;
286 memory_region_ref(range->mr);
287 ++view->nr;
288 }
289
290 static void flatview_destroy(FlatView *view)
291 {
292 int i;
293
294 for (i = 0; i < view->nr; i++) {
295 memory_region_unref(view->ranges[i].mr);
296 }
297 g_free(view->ranges);
298 g_free(view);
299 }
300
301 static void flatview_ref(FlatView *view)
302 {
303 atomic_inc(&view->ref);
304 }
305
306 static void flatview_unref(FlatView *view)
307 {
308 if (atomic_fetch_dec(&view->ref) == 1) {
309 flatview_destroy(view);
310 }
311 }
312
313 static bool can_merge(FlatRange *r1, FlatRange *r2)
314 {
315 return int128_eq(addrrange_end(r1->addr), r2->addr.start)
316 && r1->mr == r2->mr
317 && int128_eq(int128_add(int128_make64(r1->offset_in_region),
318 r1->addr.size),
319 int128_make64(r2->offset_in_region))
320 && r1->dirty_log_mask == r2->dirty_log_mask
321 && r1->romd_mode == r2->romd_mode
322 && r1->readonly == r2->readonly;
323 }
324
325 /* Attempt to simplify a view by merging adjacent ranges */
326 static void flatview_simplify(FlatView *view)
327 {
328 unsigned i, j;
329
330 i = 0;
331 while (i < view->nr) {
332 j = i + 1;
333 while (j < view->nr
334 && can_merge(&view->ranges[j-1], &view->ranges[j])) {
335 int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
336 ++j;
337 }
338 ++i;
339 memmove(&view->ranges[i], &view->ranges[j],
340 (view->nr - j) * sizeof(view->ranges[j]));
341 view->nr -= j - i;
342 }
343 }
344
345 static bool memory_region_big_endian(MemoryRegion *mr)
346 {
347 #ifdef TARGET_WORDS_BIGENDIAN
348 return mr->ops->endianness != DEVICE_LITTLE_ENDIAN;
349 #else
350 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
351 #endif
352 }
353
354 static bool memory_region_wrong_endianness(MemoryRegion *mr)
355 {
356 #ifdef TARGET_WORDS_BIGENDIAN
357 return mr->ops->endianness == DEVICE_LITTLE_ENDIAN;
358 #else
359 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
360 #endif
361 }
362
363 static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size)
364 {
365 if (memory_region_wrong_endianness(mr)) {
366 switch (size) {
367 case 1:
368 break;
369 case 2:
370 *data = bswap16(*data);
371 break;
372 case 4:
373 *data = bswap32(*data);
374 break;
375 case 8:
376 *data = bswap64(*data);
377 break;
378 default:
379 abort();
380 }
381 }
382 }
383
384 static void memory_region_oldmmio_read_accessor(MemoryRegion *mr,
385 hwaddr addr,
386 uint64_t *value,
387 unsigned size,
388 unsigned shift,
389 uint64_t mask)
390 {
391 uint64_t tmp;
392
393 tmp = mr->ops->old_mmio.read[ctz32(size)](mr->opaque, addr);
394 trace_memory_region_ops_read(mr, addr, tmp, size);
395 *value |= (tmp & mask) << shift;
396 }
397
398 static void memory_region_read_accessor(MemoryRegion *mr,
399 hwaddr addr,
400 uint64_t *value,
401 unsigned size,
402 unsigned shift,
403 uint64_t mask)
404 {
405 uint64_t tmp;
406
407 if (mr->flush_coalesced_mmio) {
408 qemu_flush_coalesced_mmio_buffer();
409 }
410 tmp = mr->ops->read(mr->opaque, addr, size);
411 trace_memory_region_ops_read(mr, addr, tmp, size);
412 *value |= (tmp & mask) << shift;
413 }
414
415 static void memory_region_oldmmio_write_accessor(MemoryRegion *mr,
416 hwaddr addr,
417 uint64_t *value,
418 unsigned size,
419 unsigned shift,
420 uint64_t mask)
421 {
422 uint64_t tmp;
423
424 tmp = (*value >> shift) & mask;
425 trace_memory_region_ops_write(mr, addr, tmp, size);
426 mr->ops->old_mmio.write[ctz32(size)](mr->opaque, addr, tmp);
427 }
428
429 static void memory_region_write_accessor(MemoryRegion *mr,
430 hwaddr addr,
431 uint64_t *value,
432 unsigned size,
433 unsigned shift,
434 uint64_t mask)
435 {
436 uint64_t tmp;
437
438 if (mr->flush_coalesced_mmio) {
439 qemu_flush_coalesced_mmio_buffer();
440 }
441 tmp = (*value >> shift) & mask;
442 trace_memory_region_ops_write(mr, addr, tmp, size);
443 mr->ops->write(mr->opaque, addr, tmp, size);
444 }
445
446 static void access_with_adjusted_size(hwaddr addr,
447 uint64_t *value,
448 unsigned size,
449 unsigned access_size_min,
450 unsigned access_size_max,
451 void (*access)(MemoryRegion *mr,
452 hwaddr addr,
453 uint64_t *value,
454 unsigned size,
455 unsigned shift,
456 uint64_t mask),
457 MemoryRegion *mr)
458 {
459 uint64_t access_mask;
460 unsigned access_size;
461 unsigned i;
462
463 if (!access_size_min) {
464 access_size_min = 1;
465 }
466 if (!access_size_max) {
467 access_size_max = 4;
468 }
469
470 /* FIXME: support unaligned access? */
471 access_size = MAX(MIN(size, access_size_max), access_size_min);
472 access_mask = -1ULL >> (64 - access_size * 8);
473 if (memory_region_big_endian(mr)) {
474 for (i = 0; i < size; i += access_size) {
475 access(mr, addr + i, value, access_size,
476 (size - access_size - i) * 8, access_mask);
477 }
478 } else {
479 for (i = 0; i < size; i += access_size) {
480 access(mr, addr + i, value, access_size, i * 8, access_mask);
481 }
482 }
483 }
484
485 static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
486 {
487 AddressSpace *as;
488
489 while (mr->container) {
490 mr = mr->container;
491 }
492 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
493 if (mr == as->root) {
494 return as;
495 }
496 }
497 return NULL;
498 }
499
500 /* Render a memory region into the global view. Ranges in @view obscure
501 * ranges in @mr.
502 */
503 static void render_memory_region(FlatView *view,
504 MemoryRegion *mr,
505 Int128 base,
506 AddrRange clip,
507 bool readonly)
508 {
509 MemoryRegion *subregion;
510 unsigned i;
511 hwaddr offset_in_region;
512 Int128 remain;
513 Int128 now;
514 FlatRange fr;
515 AddrRange tmp;
516
517 if (!mr->enabled) {
518 return;
519 }
520
521 int128_addto(&base, int128_make64(mr->addr));
522 readonly |= mr->readonly;
523
524 tmp = addrrange_make(base, mr->size);
525
526 if (!addrrange_intersects(tmp, clip)) {
527 return;
528 }
529
530 clip = addrrange_intersection(tmp, clip);
531
532 if (mr->alias) {
533 int128_subfrom(&base, int128_make64(mr->alias->addr));
534 int128_subfrom(&base, int128_make64(mr->alias_offset));
535 render_memory_region(view, mr->alias, base, clip, readonly);
536 return;
537 }
538
539 /* Render subregions in priority order. */
540 QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
541 render_memory_region(view, subregion, base, clip, readonly);
542 }
543
544 if (!mr->terminates) {
545 return;
546 }
547
548 offset_in_region = int128_get64(int128_sub(clip.start, base));
549 base = clip.start;
550 remain = clip.size;
551
552 fr.mr = mr;
553 fr.dirty_log_mask = mr->dirty_log_mask;
554 fr.romd_mode = mr->romd_mode;
555 fr.readonly = readonly;
556
557 /* Render the region itself into any gaps left by the current view. */
558 for (i = 0; i < view->nr && int128_nz(remain); ++i) {
559 if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
560 continue;
561 }
562 if (int128_lt(base, view->ranges[i].addr.start)) {
563 now = int128_min(remain,
564 int128_sub(view->ranges[i].addr.start, base));
565 fr.offset_in_region = offset_in_region;
566 fr.addr = addrrange_make(base, now);
567 flatview_insert(view, i, &fr);
568 ++i;
569 int128_addto(&base, now);
570 offset_in_region += int128_get64(now);
571 int128_subfrom(&remain, now);
572 }
573 now = int128_sub(int128_min(int128_add(base, remain),
574 addrrange_end(view->ranges[i].addr)),
575 base);
576 int128_addto(&base, now);
577 offset_in_region += int128_get64(now);
578 int128_subfrom(&remain, now);
579 }
580 if (int128_nz(remain)) {
581 fr.offset_in_region = offset_in_region;
582 fr.addr = addrrange_make(base, remain);
583 flatview_insert(view, i, &fr);
584 }
585 }
586
587 /* Render a memory topology into a list of disjoint absolute ranges. */
588 static FlatView *generate_memory_topology(MemoryRegion *mr)
589 {
590 FlatView *view;
591
592 view = g_new(FlatView, 1);
593 flatview_init(view);
594
595 if (mr) {
596 render_memory_region(view, mr, int128_zero(),
597 addrrange_make(int128_zero(), int128_2_64()), false);
598 }
599 flatview_simplify(view);
600
601 return view;
602 }
603
604 static void address_space_add_del_ioeventfds(AddressSpace *as,
605 MemoryRegionIoeventfd *fds_new,
606 unsigned fds_new_nb,
607 MemoryRegionIoeventfd *fds_old,
608 unsigned fds_old_nb)
609 {
610 unsigned iold, inew;
611 MemoryRegionIoeventfd *fd;
612 MemoryRegionSection section;
613
614 /* Generate a symmetric difference of the old and new fd sets, adding
615 * and deleting as necessary.
616 */
617
618 iold = inew = 0;
619 while (iold < fds_old_nb || inew < fds_new_nb) {
620 if (iold < fds_old_nb
621 && (inew == fds_new_nb
622 || memory_region_ioeventfd_before(fds_old[iold],
623 fds_new[inew]))) {
624 fd = &fds_old[iold];
625 section = (MemoryRegionSection) {
626 .address_space = as,
627 .offset_within_address_space = int128_get64(fd->addr.start),
628 .size = fd->addr.size,
629 };
630 MEMORY_LISTENER_CALL(eventfd_del, Forward, &section,
631 fd->match_data, fd->data, fd->e);
632 ++iold;
633 } else if (inew < fds_new_nb
634 && (iold == fds_old_nb
635 || memory_region_ioeventfd_before(fds_new[inew],
636 fds_old[iold]))) {
637 fd = &fds_new[inew];
638 section = (MemoryRegionSection) {
639 .address_space = as,
640 .offset_within_address_space = int128_get64(fd->addr.start),
641 .size = fd->addr.size,
642 };
643 MEMORY_LISTENER_CALL(eventfd_add, Reverse, &section,
644 fd->match_data, fd->data, fd->e);
645 ++inew;
646 } else {
647 ++iold;
648 ++inew;
649 }
650 }
651 }
652
653 static FlatView *address_space_get_flatview(AddressSpace *as)
654 {
655 FlatView *view;
656
657 qemu_mutex_lock(&flat_view_mutex);
658 view = as->current_map;
659 flatview_ref(view);
660 qemu_mutex_unlock(&flat_view_mutex);
661 return view;
662 }
663
664 static void address_space_update_ioeventfds(AddressSpace *as)
665 {
666 FlatView *view;
667 FlatRange *fr;
668 unsigned ioeventfd_nb = 0;
669 MemoryRegionIoeventfd *ioeventfds = NULL;
670 AddrRange tmp;
671 unsigned i;
672
673 view = address_space_get_flatview(as);
674 FOR_EACH_FLAT_RANGE(fr, view) {
675 for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
676 tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
677 int128_sub(fr->addr.start,
678 int128_make64(fr->offset_in_region)));
679 if (addrrange_intersects(fr->addr, tmp)) {
680 ++ioeventfd_nb;
681 ioeventfds = g_realloc(ioeventfds,
682 ioeventfd_nb * sizeof(*ioeventfds));
683 ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
684 ioeventfds[ioeventfd_nb-1].addr = tmp;
685 }
686 }
687 }
688
689 address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
690 as->ioeventfds, as->ioeventfd_nb);
691
692 g_free(as->ioeventfds);
693 as->ioeventfds = ioeventfds;
694 as->ioeventfd_nb = ioeventfd_nb;
695 flatview_unref(view);
696 }
697
698 static void address_space_update_topology_pass(AddressSpace *as,
699 const FlatView *old_view,
700 const FlatView *new_view,
701 bool adding)
702 {
703 unsigned iold, inew;
704 FlatRange *frold, *frnew;
705
706 /* Generate a symmetric difference of the old and new memory maps.
707 * Kill ranges in the old map, and instantiate ranges in the new map.
708 */
709 iold = inew = 0;
710 while (iold < old_view->nr || inew < new_view->nr) {
711 if (iold < old_view->nr) {
712 frold = &old_view->ranges[iold];
713 } else {
714 frold = NULL;
715 }
716 if (inew < new_view->nr) {
717 frnew = &new_view->ranges[inew];
718 } else {
719 frnew = NULL;
720 }
721
722 if (frold
723 && (!frnew
724 || int128_lt(frold->addr.start, frnew->addr.start)
725 || (int128_eq(frold->addr.start, frnew->addr.start)
726 && !flatrange_equal(frold, frnew)))) {
727 /* In old but not in new, or in both but attributes changed. */
728
729 if (!adding) {
730 MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del);
731 }
732
733 ++iold;
734 } else if (frold && frnew && flatrange_equal(frold, frnew)) {
735 /* In both and unchanged (except logging may have changed) */
736
737 if (adding) {
738 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop);
739 if (frold->dirty_log_mask && !frnew->dirty_log_mask) {
740 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop);
741 } else if (frnew->dirty_log_mask && !frold->dirty_log_mask) {
742 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start);
743 }
744 }
745
746 ++iold;
747 ++inew;
748 } else {
749 /* In new */
750
751 if (adding) {
752 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add);
753 }
754
755 ++inew;
756 }
757 }
758 }
759
760
761 static void address_space_update_topology(AddressSpace *as)
762 {
763 FlatView *old_view = address_space_get_flatview(as);
764 FlatView *new_view = generate_memory_topology(as->root);
765
766 address_space_update_topology_pass(as, old_view, new_view, false);
767 address_space_update_topology_pass(as, old_view, new_view, true);
768
769 qemu_mutex_lock(&flat_view_mutex);
770 flatview_unref(as->current_map);
771 as->current_map = new_view;
772 qemu_mutex_unlock(&flat_view_mutex);
773
774 /* Note that all the old MemoryRegions are still alive up to this
775 * point. This relieves most MemoryListeners from the need to
776 * ref/unref the MemoryRegions they get---unless they use them
777 * outside the iothread mutex, in which case precise reference
778 * counting is necessary.
779 */
780 flatview_unref(old_view);
781
782 address_space_update_ioeventfds(as);
783 }
784
785 void memory_region_transaction_begin(void)
786 {
787 qemu_flush_coalesced_mmio_buffer();
788 ++memory_region_transaction_depth;
789 }
790
791 static void memory_region_clear_pending(void)
792 {
793 memory_region_update_pending = false;
794 ioeventfd_update_pending = false;
795 }
796
797 void memory_region_transaction_commit(void)
798 {
799 AddressSpace *as;
800
801 assert(memory_region_transaction_depth);
802 --memory_region_transaction_depth;
803 if (!memory_region_transaction_depth) {
804 if (memory_region_update_pending) {
805 MEMORY_LISTENER_CALL_GLOBAL(begin, Forward);
806
807 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
808 address_space_update_topology(as);
809 }
810
811 MEMORY_LISTENER_CALL_GLOBAL(commit, Forward);
812 } else if (ioeventfd_update_pending) {
813 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
814 address_space_update_ioeventfds(as);
815 }
816 }
817 memory_region_clear_pending();
818 }
819 }
820
821 static void memory_region_destructor_none(MemoryRegion *mr)
822 {
823 }
824
825 static void memory_region_destructor_ram(MemoryRegion *mr)
826 {
827 qemu_ram_free(mr->ram_addr);
828 }
829
830 static void memory_region_destructor_alias(MemoryRegion *mr)
831 {
832 memory_region_unref(mr->alias);
833 }
834
835 static void memory_region_destructor_ram_from_ptr(MemoryRegion *mr)
836 {
837 qemu_ram_free_from_ptr(mr->ram_addr);
838 }
839
840 static void memory_region_destructor_rom_device(MemoryRegion *mr)
841 {
842 qemu_ram_free(mr->ram_addr & TARGET_PAGE_MASK);
843 }
844
845 void memory_region_init(MemoryRegion *mr,
846 Object *owner,
847 const char *name,
848 uint64_t size)
849 {
850 mr->ops = &unassigned_mem_ops;
851 mr->opaque = NULL;
852 mr->owner = owner;
853 mr->iommu_ops = NULL;
854 mr->container = NULL;
855 mr->size = int128_make64(size);
856 if (size == UINT64_MAX) {
857 mr->size = int128_2_64();
858 }
859 mr->addr = 0;
860 mr->subpage = false;
861 mr->enabled = true;
862 mr->terminates = false;
863 mr->ram = false;
864 mr->romd_mode = true;
865 mr->readonly = false;
866 mr->rom_device = false;
867 mr->destructor = memory_region_destructor_none;
868 mr->priority = 0;
869 mr->may_overlap = false;
870 mr->alias = NULL;
871 QTAILQ_INIT(&mr->subregions);
872 memset(&mr->subregions_link, 0, sizeof mr->subregions_link);
873 QTAILQ_INIT(&mr->coalesced);
874 mr->name = g_strdup(name);
875 mr->dirty_log_mask = 0;
876 mr->ioeventfd_nb = 0;
877 mr->ioeventfds = NULL;
878 mr->flush_coalesced_mmio = false;
879 }
880
881 static uint64_t unassigned_mem_read(void *opaque, hwaddr addr,
882 unsigned size)
883 {
884 #ifdef DEBUG_UNASSIGNED
885 printf("Unassigned mem read " TARGET_FMT_plx "\n", addr);
886 #endif
887 if (current_cpu != NULL) {
888 cpu_unassigned_access(current_cpu, addr, false, false, 0, size);
889 }
890 return 0;
891 }
892
893 static void unassigned_mem_write(void *opaque, hwaddr addr,
894 uint64_t val, unsigned size)
895 {
896 #ifdef DEBUG_UNASSIGNED
897 printf("Unassigned mem write " TARGET_FMT_plx " = 0x%"PRIx64"\n", addr, val);
898 #endif
899 if (current_cpu != NULL) {
900 cpu_unassigned_access(current_cpu, addr, true, false, 0, size);
901 }
902 }
903
904 static bool unassigned_mem_accepts(void *opaque, hwaddr addr,
905 unsigned size, bool is_write)
906 {
907 return false;
908 }
909
910 const MemoryRegionOps unassigned_mem_ops = {
911 .valid.accepts = unassigned_mem_accepts,
912 .endianness = DEVICE_NATIVE_ENDIAN,
913 };
914
915 bool memory_region_access_valid(MemoryRegion *mr,
916 hwaddr addr,
917 unsigned size,
918 bool is_write)
919 {
920 int access_size_min, access_size_max;
921 int access_size, i;
922
923 if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
924 return false;
925 }
926
927 if (!mr->ops->valid.accepts) {
928 return true;
929 }
930
931 access_size_min = mr->ops->valid.min_access_size;
932 if (!mr->ops->valid.min_access_size) {
933 access_size_min = 1;
934 }
935
936 access_size_max = mr->ops->valid.max_access_size;
937 if (!mr->ops->valid.max_access_size) {
938 access_size_max = 4;
939 }
940
941 access_size = MAX(MIN(size, access_size_max), access_size_min);
942 for (i = 0; i < size; i += access_size) {
943 if (!mr->ops->valid.accepts(mr->opaque, addr + i, access_size,
944 is_write)) {
945 return false;
946 }
947 }
948
949 return true;
950 }
951
952 static uint64_t memory_region_dispatch_read1(MemoryRegion *mr,
953 hwaddr addr,
954 unsigned size)
955 {
956 uint64_t data = 0;
957
958 if (mr->ops->read) {
959 access_with_adjusted_size(addr, &data, size,
960 mr->ops->impl.min_access_size,
961 mr->ops->impl.max_access_size,
962 memory_region_read_accessor, mr);
963 } else {
964 access_with_adjusted_size(addr, &data, size, 1, 4,
965 memory_region_oldmmio_read_accessor, mr);
966 }
967
968 return data;
969 }
970
971 static bool memory_region_dispatch_read(MemoryRegion *mr,
972 hwaddr addr,
973 uint64_t *pval,
974 unsigned size)
975 {
976 if (!memory_region_access_valid(mr, addr, size, false)) {
977 *pval = unassigned_mem_read(mr, addr, size);
978 return true;
979 }
980
981 *pval = memory_region_dispatch_read1(mr, addr, size);
982 adjust_endianness(mr, pval, size);
983 return false;
984 }
985
986 static bool memory_region_dispatch_write(MemoryRegion *mr,
987 hwaddr addr,
988 uint64_t data,
989 unsigned size)
990 {
991 if (!memory_region_access_valid(mr, addr, size, true)) {
992 unassigned_mem_write(mr, addr, data, size);
993 return true;
994 }
995
996 adjust_endianness(mr, &data, size);
997
998 if (mr->ops->write) {
999 access_with_adjusted_size(addr, &data, size,
1000 mr->ops->impl.min_access_size,
1001 mr->ops->impl.max_access_size,
1002 memory_region_write_accessor, mr);
1003 } else {
1004 access_with_adjusted_size(addr, &data, size, 1, 4,
1005 memory_region_oldmmio_write_accessor, mr);
1006 }
1007 return false;
1008 }
1009
1010 void memory_region_init_io(MemoryRegion *mr,
1011 Object *owner,
1012 const MemoryRegionOps *ops,
1013 void *opaque,
1014 const char *name,
1015 uint64_t size)
1016 {
1017 memory_region_init(mr, owner, name, size);
1018 mr->ops = ops;
1019 mr->opaque = opaque;
1020 mr->terminates = true;
1021 mr->ram_addr = ~(ram_addr_t)0;
1022 }
1023
1024 void memory_region_init_ram(MemoryRegion *mr,
1025 Object *owner,
1026 const char *name,
1027 uint64_t size)
1028 {
1029 memory_region_init(mr, owner, name, size);
1030 mr->ram = true;
1031 mr->terminates = true;
1032 mr->destructor = memory_region_destructor_ram;
1033 mr->ram_addr = qemu_ram_alloc(size, mr);
1034 }
1035
1036 #ifdef __linux__
1037 void memory_region_init_ram_from_file(MemoryRegion *mr,
1038 struct Object *owner,
1039 const char *name,
1040 uint64_t size,
1041 bool share,
1042 const char *path,
1043 Error **errp)
1044 {
1045 memory_region_init(mr, owner, name, size);
1046 mr->ram = true;
1047 mr->terminates = true;
1048 mr->destructor = memory_region_destructor_ram;
1049 mr->ram_addr = qemu_ram_alloc_from_file(size, mr, share, path, errp);
1050 }
1051 #endif
1052
1053 void memory_region_init_ram_ptr(MemoryRegion *mr,
1054 Object *owner,
1055 const char *name,
1056 uint64_t size,
1057 void *ptr)
1058 {
1059 memory_region_init(mr, owner, name, size);
1060 mr->ram = true;
1061 mr->terminates = true;
1062 mr->destructor = memory_region_destructor_ram_from_ptr;
1063 mr->ram_addr = qemu_ram_alloc_from_ptr(size, ptr, mr);
1064 }
1065
1066 void memory_region_init_alias(MemoryRegion *mr,
1067 Object *owner,
1068 const char *name,
1069 MemoryRegion *orig,
1070 hwaddr offset,
1071 uint64_t size)
1072 {
1073 memory_region_init(mr, owner, name, size);
1074 memory_region_ref(orig);
1075 mr->destructor = memory_region_destructor_alias;
1076 mr->alias = orig;
1077 mr->alias_offset = offset;
1078 }
1079
1080 void memory_region_init_rom_device(MemoryRegion *mr,
1081 Object *owner,
1082 const MemoryRegionOps *ops,
1083 void *opaque,
1084 const char *name,
1085 uint64_t size)
1086 {
1087 memory_region_init(mr, owner, name, size);
1088 mr->ops = ops;
1089 mr->opaque = opaque;
1090 mr->terminates = true;
1091 mr->rom_device = true;
1092 mr->destructor = memory_region_destructor_rom_device;
1093 mr->ram_addr = qemu_ram_alloc(size, mr);
1094 }
1095
1096 void memory_region_init_iommu(MemoryRegion *mr,
1097 Object *owner,
1098 const MemoryRegionIOMMUOps *ops,
1099 const char *name,
1100 uint64_t size)
1101 {
1102 memory_region_init(mr, owner, name, size);
1103 mr->iommu_ops = ops,
1104 mr->terminates = true; /* then re-forwards */
1105 notifier_list_init(&mr->iommu_notify);
1106 }
1107
1108 void memory_region_init_reservation(MemoryRegion *mr,
1109 Object *owner,
1110 const char *name,
1111 uint64_t size)
1112 {
1113 memory_region_init_io(mr, owner, &unassigned_mem_ops, mr, name, size);
1114 }
1115
1116 void memory_region_destroy(MemoryRegion *mr)
1117 {
1118 assert(QTAILQ_EMPTY(&mr->subregions));
1119 assert(memory_region_transaction_depth == 0);
1120 mr->destructor(mr);
1121 memory_region_clear_coalescing(mr);
1122 g_free((char *)mr->name);
1123 g_free(mr->ioeventfds);
1124 }
1125
1126 Object *memory_region_owner(MemoryRegion *mr)
1127 {
1128 return mr->owner;
1129 }
1130
1131 void memory_region_ref(MemoryRegion *mr)
1132 {
1133 if (mr && mr->owner) {
1134 object_ref(mr->owner);
1135 }
1136 }
1137
1138 void memory_region_unref(MemoryRegion *mr)
1139 {
1140 if (mr && mr->owner) {
1141 object_unref(mr->owner);
1142 }
1143 }
1144
1145 uint64_t memory_region_size(MemoryRegion *mr)
1146 {
1147 if (int128_eq(mr->size, int128_2_64())) {
1148 return UINT64_MAX;
1149 }
1150 return int128_get64(mr->size);
1151 }
1152
1153 const char *memory_region_name(MemoryRegion *mr)
1154 {
1155 return mr->name;
1156 }
1157
1158 bool memory_region_is_ram(MemoryRegion *mr)
1159 {
1160 return mr->ram;
1161 }
1162
1163 bool memory_region_is_logging(MemoryRegion *mr)
1164 {
1165 return mr->dirty_log_mask;
1166 }
1167
1168 bool memory_region_is_rom(MemoryRegion *mr)
1169 {
1170 return mr->ram && mr->readonly;
1171 }
1172
1173 bool memory_region_is_iommu(MemoryRegion *mr)
1174 {
1175 return mr->iommu_ops;
1176 }
1177
1178 void memory_region_register_iommu_notifier(MemoryRegion *mr, Notifier *n)
1179 {
1180 notifier_list_add(&mr->iommu_notify, n);
1181 }
1182
1183 void memory_region_unregister_iommu_notifier(Notifier *n)
1184 {
1185 notifier_remove(n);
1186 }
1187
1188 void memory_region_notify_iommu(MemoryRegion *mr,
1189 IOMMUTLBEntry entry)
1190 {
1191 assert(memory_region_is_iommu(mr));
1192 notifier_list_notify(&mr->iommu_notify, &entry);
1193 }
1194
1195 void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
1196 {
1197 uint8_t mask = 1 << client;
1198
1199 memory_region_transaction_begin();
1200 mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
1201 memory_region_update_pending |= mr->enabled;
1202 memory_region_transaction_commit();
1203 }
1204
1205 bool memory_region_get_dirty(MemoryRegion *mr, hwaddr addr,
1206 hwaddr size, unsigned client)
1207 {
1208 assert(mr->terminates);
1209 return cpu_physical_memory_get_dirty(mr->ram_addr + addr, size, client);
1210 }
1211
1212 void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr,
1213 hwaddr size)
1214 {
1215 assert(mr->terminates);
1216 cpu_physical_memory_set_dirty_range(mr->ram_addr + addr, size);
1217 }
1218
1219 bool memory_region_test_and_clear_dirty(MemoryRegion *mr, hwaddr addr,
1220 hwaddr size, unsigned client)
1221 {
1222 bool ret;
1223 assert(mr->terminates);
1224 ret = cpu_physical_memory_get_dirty(mr->ram_addr + addr, size, client);
1225 if (ret) {
1226 cpu_physical_memory_reset_dirty(mr->ram_addr + addr, size, client);
1227 }
1228 return ret;
1229 }
1230
1231
1232 void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
1233 {
1234 AddressSpace *as;
1235 FlatRange *fr;
1236
1237 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1238 FlatView *view = address_space_get_flatview(as);
1239 FOR_EACH_FLAT_RANGE(fr, view) {
1240 if (fr->mr == mr) {
1241 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
1242 }
1243 }
1244 flatview_unref(view);
1245 }
1246 }
1247
1248 void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
1249 {
1250 if (mr->readonly != readonly) {
1251 memory_region_transaction_begin();
1252 mr->readonly = readonly;
1253 memory_region_update_pending |= mr->enabled;
1254 memory_region_transaction_commit();
1255 }
1256 }
1257
1258 void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode)
1259 {
1260 if (mr->romd_mode != romd_mode) {
1261 memory_region_transaction_begin();
1262 mr->romd_mode = romd_mode;
1263 memory_region_update_pending |= mr->enabled;
1264 memory_region_transaction_commit();
1265 }
1266 }
1267
1268 void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr,
1269 hwaddr size, unsigned client)
1270 {
1271 assert(mr->terminates);
1272 cpu_physical_memory_reset_dirty(mr->ram_addr + addr, size, client);
1273 }
1274
1275 int memory_region_get_fd(MemoryRegion *mr)
1276 {
1277 if (mr->alias) {
1278 return memory_region_get_fd(mr->alias);
1279 }
1280
1281 assert(mr->terminates);
1282
1283 return qemu_get_ram_fd(mr->ram_addr & TARGET_PAGE_MASK);
1284 }
1285
1286 void *memory_region_get_ram_ptr(MemoryRegion *mr)
1287 {
1288 if (mr->alias) {
1289 return memory_region_get_ram_ptr(mr->alias) + mr->alias_offset;
1290 }
1291
1292 assert(mr->terminates);
1293
1294 return qemu_get_ram_ptr(mr->ram_addr & TARGET_PAGE_MASK);
1295 }
1296
1297 static void memory_region_update_coalesced_range_as(MemoryRegion *mr, AddressSpace *as)
1298 {
1299 FlatView *view;
1300 FlatRange *fr;
1301 CoalescedMemoryRange *cmr;
1302 AddrRange tmp;
1303 MemoryRegionSection section;
1304
1305 view = address_space_get_flatview(as);
1306 FOR_EACH_FLAT_RANGE(fr, view) {
1307 if (fr->mr == mr) {
1308 section = (MemoryRegionSection) {
1309 .address_space = as,
1310 .offset_within_address_space = int128_get64(fr->addr.start),
1311 .size = fr->addr.size,
1312 };
1313
1314 MEMORY_LISTENER_CALL(coalesced_mmio_del, Reverse, &section,
1315 int128_get64(fr->addr.start),
1316 int128_get64(fr->addr.size));
1317 QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
1318 tmp = addrrange_shift(cmr->addr,
1319 int128_sub(fr->addr.start,
1320 int128_make64(fr->offset_in_region)));
1321 if (!addrrange_intersects(tmp, fr->addr)) {
1322 continue;
1323 }
1324 tmp = addrrange_intersection(tmp, fr->addr);
1325 MEMORY_LISTENER_CALL(coalesced_mmio_add, Forward, &section,
1326 int128_get64(tmp.start),
1327 int128_get64(tmp.size));
1328 }
1329 }
1330 }
1331 flatview_unref(view);
1332 }
1333
1334 static void memory_region_update_coalesced_range(MemoryRegion *mr)
1335 {
1336 AddressSpace *as;
1337
1338 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1339 memory_region_update_coalesced_range_as(mr, as);
1340 }
1341 }
1342
1343 void memory_region_set_coalescing(MemoryRegion *mr)
1344 {
1345 memory_region_clear_coalescing(mr);
1346 memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
1347 }
1348
1349 void memory_region_add_coalescing(MemoryRegion *mr,
1350 hwaddr offset,
1351 uint64_t size)
1352 {
1353 CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
1354
1355 cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
1356 QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
1357 memory_region_update_coalesced_range(mr);
1358 memory_region_set_flush_coalesced(mr);
1359 }
1360
1361 void memory_region_clear_coalescing(MemoryRegion *mr)
1362 {
1363 CoalescedMemoryRange *cmr;
1364 bool updated = false;
1365
1366 qemu_flush_coalesced_mmio_buffer();
1367 mr->flush_coalesced_mmio = false;
1368
1369 while (!QTAILQ_EMPTY(&mr->coalesced)) {
1370 cmr = QTAILQ_FIRST(&mr->coalesced);
1371 QTAILQ_REMOVE(&mr->coalesced, cmr, link);
1372 g_free(cmr);
1373 updated = true;
1374 }
1375
1376 if (updated) {
1377 memory_region_update_coalesced_range(mr);
1378 }
1379 }
1380
1381 void memory_region_set_flush_coalesced(MemoryRegion *mr)
1382 {
1383 mr->flush_coalesced_mmio = true;
1384 }
1385
1386 void memory_region_clear_flush_coalesced(MemoryRegion *mr)
1387 {
1388 qemu_flush_coalesced_mmio_buffer();
1389 if (QTAILQ_EMPTY(&mr->coalesced)) {
1390 mr->flush_coalesced_mmio = false;
1391 }
1392 }
1393
1394 void memory_region_add_eventfd(MemoryRegion *mr,
1395 hwaddr addr,
1396 unsigned size,
1397 bool match_data,
1398 uint64_t data,
1399 EventNotifier *e)
1400 {
1401 MemoryRegionIoeventfd mrfd = {
1402 .addr.start = int128_make64(addr),
1403 .addr.size = int128_make64(size),
1404 .match_data = match_data,
1405 .data = data,
1406 .e = e,
1407 };
1408 unsigned i;
1409
1410 adjust_endianness(mr, &mrfd.data, size);
1411 memory_region_transaction_begin();
1412 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1413 if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) {
1414 break;
1415 }
1416 }
1417 ++mr->ioeventfd_nb;
1418 mr->ioeventfds = g_realloc(mr->ioeventfds,
1419 sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
1420 memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
1421 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
1422 mr->ioeventfds[i] = mrfd;
1423 ioeventfd_update_pending |= mr->enabled;
1424 memory_region_transaction_commit();
1425 }
1426
1427 void memory_region_del_eventfd(MemoryRegion *mr,
1428 hwaddr addr,
1429 unsigned size,
1430 bool match_data,
1431 uint64_t data,
1432 EventNotifier *e)
1433 {
1434 MemoryRegionIoeventfd mrfd = {
1435 .addr.start = int128_make64(addr),
1436 .addr.size = int128_make64(size),
1437 .match_data = match_data,
1438 .data = data,
1439 .e = e,
1440 };
1441 unsigned i;
1442
1443 adjust_endianness(mr, &mrfd.data, size);
1444 memory_region_transaction_begin();
1445 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1446 if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) {
1447 break;
1448 }
1449 }
1450 assert(i != mr->ioeventfd_nb);
1451 memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
1452 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
1453 --mr->ioeventfd_nb;
1454 mr->ioeventfds = g_realloc(mr->ioeventfds,
1455 sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
1456 ioeventfd_update_pending |= mr->enabled;
1457 memory_region_transaction_commit();
1458 }
1459
1460 static void memory_region_update_container_subregions(MemoryRegion *subregion)
1461 {
1462 hwaddr offset = subregion->addr;
1463 MemoryRegion *mr = subregion->container;
1464 MemoryRegion *other;
1465
1466 memory_region_transaction_begin();
1467
1468 memory_region_ref(subregion);
1469 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1470 if (subregion->may_overlap || other->may_overlap) {
1471 continue;
1472 }
1473 if (int128_ge(int128_make64(offset),
1474 int128_add(int128_make64(other->addr), other->size))
1475 || int128_le(int128_add(int128_make64(offset), subregion->size),
1476 int128_make64(other->addr))) {
1477 continue;
1478 }
1479 #if 0
1480 printf("warning: subregion collision %llx/%llx (%s) "
1481 "vs %llx/%llx (%s)\n",
1482 (unsigned long long)offset,
1483 (unsigned long long)int128_get64(subregion->size),
1484 subregion->name,
1485 (unsigned long long)other->addr,
1486 (unsigned long long)int128_get64(other->size),
1487 other->name);
1488 #endif
1489 }
1490 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1491 if (subregion->priority >= other->priority) {
1492 QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
1493 goto done;
1494 }
1495 }
1496 QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
1497 done:
1498 memory_region_update_pending |= mr->enabled && subregion->enabled;
1499 memory_region_transaction_commit();
1500 }
1501
1502 static void memory_region_add_subregion_common(MemoryRegion *mr,
1503 hwaddr offset,
1504 MemoryRegion *subregion)
1505 {
1506 assert(!subregion->container);
1507 subregion->container = mr;
1508 subregion->addr = offset;
1509 memory_region_update_container_subregions(subregion);
1510 }
1511
1512 void memory_region_add_subregion(MemoryRegion *mr,
1513 hwaddr offset,
1514 MemoryRegion *subregion)
1515 {
1516 subregion->may_overlap = false;
1517 subregion->priority = 0;
1518 memory_region_add_subregion_common(mr, offset, subregion);
1519 }
1520
1521 void memory_region_add_subregion_overlap(MemoryRegion *mr,
1522 hwaddr offset,
1523 MemoryRegion *subregion,
1524 int priority)
1525 {
1526 subregion->may_overlap = true;
1527 subregion->priority = priority;
1528 memory_region_add_subregion_common(mr, offset, subregion);
1529 }
1530
1531 void memory_region_del_subregion(MemoryRegion *mr,
1532 MemoryRegion *subregion)
1533 {
1534 memory_region_transaction_begin();
1535 assert(subregion->container == mr);
1536 subregion->container = NULL;
1537 QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
1538 memory_region_unref(subregion);
1539 memory_region_update_pending |= mr->enabled && subregion->enabled;
1540 memory_region_transaction_commit();
1541 }
1542
1543 void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
1544 {
1545 if (enabled == mr->enabled) {
1546 return;
1547 }
1548 memory_region_transaction_begin();
1549 mr->enabled = enabled;
1550 memory_region_update_pending = true;
1551 memory_region_transaction_commit();
1552 }
1553
1554 static void memory_region_readd_subregion(MemoryRegion *mr)
1555 {
1556 MemoryRegion *container = mr->container;
1557
1558 if (container) {
1559 memory_region_transaction_begin();
1560 memory_region_ref(mr);
1561 memory_region_del_subregion(container, mr);
1562 mr->container = container;
1563 memory_region_update_container_subregions(mr);
1564 memory_region_unref(mr);
1565 memory_region_transaction_commit();
1566 }
1567 }
1568
1569 void memory_region_set_address(MemoryRegion *mr, hwaddr addr)
1570 {
1571 if (addr != mr->addr) {
1572 mr->addr = addr;
1573 memory_region_readd_subregion(mr);
1574 }
1575 }
1576
1577 void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset)
1578 {
1579 assert(mr->alias);
1580
1581 if (offset == mr->alias_offset) {
1582 return;
1583 }
1584
1585 memory_region_transaction_begin();
1586 mr->alias_offset = offset;
1587 memory_region_update_pending |= mr->enabled;
1588 memory_region_transaction_commit();
1589 }
1590
1591 ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr)
1592 {
1593 return mr->ram_addr;
1594 }
1595
1596 static int cmp_flatrange_addr(const void *addr_, const void *fr_)
1597 {
1598 const AddrRange *addr = addr_;
1599 const FlatRange *fr = fr_;
1600
1601 if (int128_le(addrrange_end(*addr), fr->addr.start)) {
1602 return -1;
1603 } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
1604 return 1;
1605 }
1606 return 0;
1607 }
1608
1609 static FlatRange *flatview_lookup(FlatView *view, AddrRange addr)
1610 {
1611 return bsearch(&addr, view->ranges, view->nr,
1612 sizeof(FlatRange), cmp_flatrange_addr);
1613 }
1614
1615 bool memory_region_present(MemoryRegion *container, hwaddr addr)
1616 {
1617 MemoryRegion *mr = memory_region_find(container, addr, 1).mr;
1618 if (!mr || (mr == container)) {
1619 return false;
1620 }
1621 memory_region_unref(mr);
1622 return true;
1623 }
1624
1625 bool memory_region_is_mapped(MemoryRegion *mr)
1626 {
1627 return mr->container ? true : false;
1628 }
1629
1630 MemoryRegionSection memory_region_find(MemoryRegion *mr,
1631 hwaddr addr, uint64_t size)
1632 {
1633 MemoryRegionSection ret = { .mr = NULL };
1634 MemoryRegion *root;
1635 AddressSpace *as;
1636 AddrRange range;
1637 FlatView *view;
1638 FlatRange *fr;
1639
1640 addr += mr->addr;
1641 for (root = mr; root->container; ) {
1642 root = root->container;
1643 addr += root->addr;
1644 }
1645
1646 as = memory_region_to_address_space(root);
1647 if (!as) {
1648 return ret;
1649 }
1650 range = addrrange_make(int128_make64(addr), int128_make64(size));
1651
1652 view = address_space_get_flatview(as);
1653 fr = flatview_lookup(view, range);
1654 if (!fr) {
1655 flatview_unref(view);
1656 return ret;
1657 }
1658
1659 while (fr > view->ranges && addrrange_intersects(fr[-1].addr, range)) {
1660 --fr;
1661 }
1662
1663 ret.mr = fr->mr;
1664 ret.address_space = as;
1665 range = addrrange_intersection(range, fr->addr);
1666 ret.offset_within_region = fr->offset_in_region;
1667 ret.offset_within_region += int128_get64(int128_sub(range.start,
1668 fr->addr.start));
1669 ret.size = range.size;
1670 ret.offset_within_address_space = int128_get64(range.start);
1671 ret.readonly = fr->readonly;
1672 memory_region_ref(ret.mr);
1673
1674 flatview_unref(view);
1675 return ret;
1676 }
1677
1678 void address_space_sync_dirty_bitmap(AddressSpace *as)
1679 {
1680 FlatView *view;
1681 FlatRange *fr;
1682
1683 view = address_space_get_flatview(as);
1684 FOR_EACH_FLAT_RANGE(fr, view) {
1685 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
1686 }
1687 flatview_unref(view);
1688 }
1689
1690 void memory_global_dirty_log_start(void)
1691 {
1692 global_dirty_log = true;
1693 MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward);
1694 }
1695
1696 void memory_global_dirty_log_stop(void)
1697 {
1698 global_dirty_log = false;
1699 MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse);
1700 }
1701
1702 static void listener_add_address_space(MemoryListener *listener,
1703 AddressSpace *as)
1704 {
1705 FlatView *view;
1706 FlatRange *fr;
1707
1708 if (listener->address_space_filter
1709 && listener->address_space_filter != as) {
1710 return;
1711 }
1712
1713 if (global_dirty_log) {
1714 if (listener->log_global_start) {
1715 listener->log_global_start(listener);
1716 }
1717 }
1718
1719 view = address_space_get_flatview(as);
1720 FOR_EACH_FLAT_RANGE(fr, view) {
1721 MemoryRegionSection section = {
1722 .mr = fr->mr,
1723 .address_space = as,
1724 .offset_within_region = fr->offset_in_region,
1725 .size = fr->addr.size,
1726 .offset_within_address_space = int128_get64(fr->addr.start),
1727 .readonly = fr->readonly,
1728 };
1729 if (listener->region_add) {
1730 listener->region_add(listener, &section);
1731 }
1732 }
1733 flatview_unref(view);
1734 }
1735
1736 void memory_listener_register(MemoryListener *listener, AddressSpace *filter)
1737 {
1738 MemoryListener *other = NULL;
1739 AddressSpace *as;
1740
1741 listener->address_space_filter = filter;
1742 if (QTAILQ_EMPTY(&memory_listeners)
1743 || listener->priority >= QTAILQ_LAST(&memory_listeners,
1744 memory_listeners)->priority) {
1745 QTAILQ_INSERT_TAIL(&memory_listeners, listener, link);
1746 } else {
1747 QTAILQ_FOREACH(other, &memory_listeners, link) {
1748 if (listener->priority < other->priority) {
1749 break;
1750 }
1751 }
1752 QTAILQ_INSERT_BEFORE(other, listener, link);
1753 }
1754
1755 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1756 listener_add_address_space(listener, as);
1757 }
1758 }
1759
1760 void memory_listener_unregister(MemoryListener *listener)
1761 {
1762 QTAILQ_REMOVE(&memory_listeners, listener, link);
1763 }
1764
1765 void address_space_init(AddressSpace *as, MemoryRegion *root, const char *name)
1766 {
1767 if (QTAILQ_EMPTY(&address_spaces)) {
1768 memory_init();
1769 }
1770
1771 memory_region_transaction_begin();
1772 as->root = root;
1773 as->current_map = g_new(FlatView, 1);
1774 flatview_init(as->current_map);
1775 as->ioeventfd_nb = 0;
1776 as->ioeventfds = NULL;
1777 QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link);
1778 as->name = g_strdup(name ? name : "anonymous");
1779 address_space_init_dispatch(as);
1780 memory_region_update_pending |= root->enabled;
1781 memory_region_transaction_commit();
1782 }
1783
1784 void address_space_destroy(AddressSpace *as)
1785 {
1786 MemoryListener *listener;
1787
1788 /* Flush out anything from MemoryListeners listening in on this */
1789 memory_region_transaction_begin();
1790 as->root = NULL;
1791 memory_region_transaction_commit();
1792 QTAILQ_REMOVE(&address_spaces, as, address_spaces_link);
1793 address_space_destroy_dispatch(as);
1794
1795 QTAILQ_FOREACH(listener, &memory_listeners, link) {
1796 assert(listener->address_space_filter != as);
1797 }
1798
1799 flatview_unref(as->current_map);
1800 g_free(as->name);
1801 g_free(as->ioeventfds);
1802 }
1803
1804 bool io_mem_read(MemoryRegion *mr, hwaddr addr, uint64_t *pval, unsigned size)
1805 {
1806 return memory_region_dispatch_read(mr, addr, pval, size);
1807 }
1808
1809 bool io_mem_write(MemoryRegion *mr, hwaddr addr,
1810 uint64_t val, unsigned size)
1811 {
1812 return memory_region_dispatch_write(mr, addr, val, size);
1813 }
1814
1815 typedef struct MemoryRegionList MemoryRegionList;
1816
1817 struct MemoryRegionList {
1818 const MemoryRegion *mr;
1819 bool printed;
1820 QTAILQ_ENTRY(MemoryRegionList) queue;
1821 };
1822
1823 typedef QTAILQ_HEAD(queue, MemoryRegionList) MemoryRegionListHead;
1824
1825 static void mtree_print_mr(fprintf_function mon_printf, void *f,
1826 const MemoryRegion *mr, unsigned int level,
1827 hwaddr base,
1828 MemoryRegionListHead *alias_print_queue)
1829 {
1830 MemoryRegionList *new_ml, *ml, *next_ml;
1831 MemoryRegionListHead submr_print_queue;
1832 const MemoryRegion *submr;
1833 unsigned int i;
1834
1835 if (!mr || !mr->enabled) {
1836 return;
1837 }
1838
1839 for (i = 0; i < level; i++) {
1840 mon_printf(f, " ");
1841 }
1842
1843 if (mr->alias) {
1844 MemoryRegionList *ml;
1845 bool found = false;
1846
1847 /* check if the alias is already in the queue */
1848 QTAILQ_FOREACH(ml, alias_print_queue, queue) {
1849 if (ml->mr == mr->alias && !ml->printed) {
1850 found = true;
1851 }
1852 }
1853
1854 if (!found) {
1855 ml = g_new(MemoryRegionList, 1);
1856 ml->mr = mr->alias;
1857 ml->printed = false;
1858 QTAILQ_INSERT_TAIL(alias_print_queue, ml, queue);
1859 }
1860 mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx
1861 " (prio %d, %c%c): alias %s @%s " TARGET_FMT_plx
1862 "-" TARGET_FMT_plx "\n",
1863 base + mr->addr,
1864 base + mr->addr
1865 + (int128_nz(mr->size) ?
1866 (hwaddr)int128_get64(int128_sub(mr->size,
1867 int128_one())) : 0),
1868 mr->priority,
1869 mr->romd_mode ? 'R' : '-',
1870 !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
1871 : '-',
1872 mr->name,
1873 mr->alias->name,
1874 mr->alias_offset,
1875 mr->alias_offset
1876 + (int128_nz(mr->size) ?
1877 (hwaddr)int128_get64(int128_sub(mr->size,
1878 int128_one())) : 0));
1879 } else {
1880 mon_printf(f,
1881 TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d, %c%c): %s\n",
1882 base + mr->addr,
1883 base + mr->addr
1884 + (int128_nz(mr->size) ?
1885 (hwaddr)int128_get64(int128_sub(mr->size,
1886 int128_one())) : 0),
1887 mr->priority,
1888 mr->romd_mode ? 'R' : '-',
1889 !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
1890 : '-',
1891 mr->name);
1892 }
1893
1894 QTAILQ_INIT(&submr_print_queue);
1895
1896 QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
1897 new_ml = g_new(MemoryRegionList, 1);
1898 new_ml->mr = submr;
1899 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
1900 if (new_ml->mr->addr < ml->mr->addr ||
1901 (new_ml->mr->addr == ml->mr->addr &&
1902 new_ml->mr->priority > ml->mr->priority)) {
1903 QTAILQ_INSERT_BEFORE(ml, new_ml, queue);
1904 new_ml = NULL;
1905 break;
1906 }
1907 }
1908 if (new_ml) {
1909 QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, queue);
1910 }
1911 }
1912
1913 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
1914 mtree_print_mr(mon_printf, f, ml->mr, level + 1, base + mr->addr,
1915 alias_print_queue);
1916 }
1917
1918 QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, queue, next_ml) {
1919 g_free(ml);
1920 }
1921 }
1922
1923 void mtree_info(fprintf_function mon_printf, void *f)
1924 {
1925 MemoryRegionListHead ml_head;
1926 MemoryRegionList *ml, *ml2;
1927 AddressSpace *as;
1928
1929 QTAILQ_INIT(&ml_head);
1930
1931 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1932 mon_printf(f, "%s\n", as->name);
1933 mtree_print_mr(mon_printf, f, as->root, 0, 0, &ml_head);
1934 }
1935
1936 mon_printf(f, "aliases\n");
1937 /* print aliased regions */
1938 QTAILQ_FOREACH(ml, &ml_head, queue) {
1939 if (!ml->printed) {
1940 mon_printf(f, "%s\n", ml->mr->name);
1941 mtree_print_mr(mon_printf, f, ml->mr, 0, 0, &ml_head);
1942 }
1943 }
1944
1945 QTAILQ_FOREACH_SAFE(ml, &ml_head, queue, ml2) {
1946 g_free(ml);
1947 }
1948 }
AR7 emulation for QEMU