hw/microblaze/petalogix_s3adsp1800_mmu.c

   1 /*
   2  * Model of Petalogix linux reference design targeting Xilinx Spartan 3ADSP-1800
   3  * boards.
   4  *
   5  * Copyright (c) 2009 Edgar E. Iglesias.
   6  *
   7  * Permission is hereby granted, free of charge, to any person obtaining a copy
   8  * of this software and associated documentation files (the "Software"), to deal
   9  * in the Software without restriction, including without limitation the rights
  10  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  11  * copies of the Software, and to permit persons to whom the Software is
  12  * furnished to do so, subject to the following conditions:
  13  *
  14  * The above copyright notice and this permission notice shall be included in
  15  * all copies or substantial portions of the Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  22  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  23  * THE SOFTWARE.
  24  */
  25
  26 #include "qemu/osdep.h"
  27 #include "qemu/units.h"
  28 #include "qapi/error.h"
  29 #include "cpu.h"
  30 #include "hw/sysbus.h"
  31 #include "hw/hw.h"
  32 #include "net/net.h"
  33 #include "hw/block/flash.h"
  34 #include "sysemu/sysemu.h"
  35 #include "hw/boards.h"
  36 #include "hw/misc/unimp.h"
  37 #include "exec/address-spaces.h"
  38 #include "hw/char/xilinx_uartlite.h"
  39
  40 #include "boot.h"
  41
  42 #define LMB_BRAM_SIZE  (128 * KiB)
  43 #define FLASH_SIZE     (16 * MiB)
  44
  45 #define BINARY_DEVICE_TREE_FILE "petalogix-s3adsp1800.dtb"
  46
  47 #define MEMORY_BASEADDR 0x90000000
  48 #define FLASH_BASEADDR 0xa0000000
  49 #define GPIO_BASEADDR 0x81400000
  50 #define INTC_BASEADDR 0x81800000
  51 #define TIMER_BASEADDR 0x83c00000
  52 #define UARTLITE_BASEADDR 0x84000000
  53 #define ETHLITE_BASEADDR 0x81000000
  54
  55 #define TIMER_IRQ           0
  56 #define ETHLITE_IRQ         1
  57 #define UARTLITE_IRQ        3
  58
  59 static void
  60 petalogix_s3adsp1800_init(MachineState *machine)
  61 {
  62     ram_addr_t ram_size = machine->ram_size;
  63     DeviceState *dev;
  64     MicroBlazeCPU *cpu;
  65     DriveInfo *dinfo;
  66     int i;
  67     hwaddr ddr_base = MEMORY_BASEADDR;
  68     MemoryRegion *phys_lmb_bram = g_new(MemoryRegion, 1);
  69     MemoryRegion *phys_ram = g_new(MemoryRegion, 1);
  70     qemu_irq irq[32];
  71     MemoryRegion *sysmem = get_system_memory();
  72
  73     cpu = MICROBLAZE_CPU(object_new(TYPE_MICROBLAZE_CPU));
  74     object_property_set_str(OBJECT(cpu), "7.10.d", "version", &error_abort);
  75     object_property_set_bool(OBJECT(cpu), true, "realized", &error_abort);
  76
  77     /* Attach emulated BRAM through the LMB.  */
  78     memory_region_init_ram(phys_lmb_bram, NULL,
  79                            "petalogix_s3adsp1800.lmb_bram", LMB_BRAM_SIZE,
  80                            &error_fatal);
  81     memory_region_add_subregion(sysmem, 0x00000000, phys_lmb_bram);
  82
  83     memory_region_init_ram(phys_ram, NULL, "petalogix_s3adsp1800.ram",
  84                            ram_size, &error_fatal);
  85     memory_region_add_subregion(sysmem, ddr_base, phys_ram);
  86
  87     dinfo = drive_get(IF_PFLASH, 0, 0);
  88     pflash_cfi01_register(FLASH_BASEADDR,
  89                           "petalogix_s3adsp1800.flash", FLASH_SIZE,
  90                           dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
  91                           64 * KiB, 1, 0x89, 0x18, 0x0000, 0x0, 1);
  92
  93     dev = qdev_create(NULL, "xlnx.xps-intc");
  94     qdev_prop_set_uint32(dev, "kind-of-intr",
  95                          1 << ETHLITE_IRQ | 1 << UARTLITE_IRQ);
  96     qdev_init_nofail(dev);
  97     sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, INTC_BASEADDR);
  98     sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0,
  99                        qdev_get_gpio_in(DEVICE(cpu), MB_CPU_IRQ));
 100     for (i = 0; i < 32; i++) {
 101         irq[i] = qdev_get_gpio_in(dev, i);
 102     }
 103
 104     xilinx_uartlite_create(UARTLITE_BASEADDR, irq[UARTLITE_IRQ],
 105                            serial_hd(0));
 106
 107     /* 2 timers at irq 2 @ 62 Mhz.  */
 108     dev = qdev_create(NULL, "xlnx.xps-timer");
 109     qdev_prop_set_uint32(dev, "one-timer-only", 0);
 110     qdev_prop_set_uint32(dev, "clock-frequency", 62 * 1000000);
 111     qdev_init_nofail(dev);
 112     sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, TIMER_BASEADDR);
 113     sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq[TIMER_IRQ]);
 114
 115     qemu_check_nic_model(&nd_table[0], "xlnx.xps-ethernetlite");
 116     dev = qdev_create(NULL, "xlnx.xps-ethernetlite");
 117     qdev_set_nic_properties(dev, &nd_table[0]);
 118     qdev_prop_set_uint32(dev, "tx-ping-pong", 0);
 119     qdev_prop_set_uint32(dev, "rx-ping-pong", 0);
 120     qdev_init_nofail(dev);
 121     sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, ETHLITE_BASEADDR);
 122     sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq[ETHLITE_IRQ]);
 123
 124     create_unimplemented_device("gpio", GPIO_BASEADDR, 0x10000);
 125
 126     microblaze_load_kernel(cpu, ddr_base, ram_size,
 127                            machine->initrd_filename,
 128                            BINARY_DEVICE_TREE_FILE,
 129                            NULL);
 130 }
 131
 132 static void petalogix_s3adsp1800_machine_init(MachineClass *mc)
 133 {
 134     mc->desc = "PetaLogix linux refdesign for xilinx Spartan 3ADSP1800";
 135     mc->init = petalogix_s3adsp1800_init;
 136     mc->is_default = 1;
 137 }
 138
 139 DEFINE_MACHINE("petalogix-s3adsp1800", petalogix_s3adsp1800_machine_init)