2 * QEMU Floppy disk emulator (Intel 82078)
4 * Copyright (c) 2003, 2007 Jocelyn Mayer
5 * Copyright (c) 2008 Hervé Poussineau
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
26 * The controller is used in Sun4m systems in a slightly different
27 * way. There are changes in DOR register and DMA is not available.
30 #include "qemu/osdep.h"
32 #include "hw/block/fdc.h"
33 #include "qapi/error.h"
34 #include "qemu/error-report.h"
35 #include "qemu/timer.h"
36 #include "hw/isa/isa.h"
37 #include "hw/sysbus.h"
38 #include "sysemu/block-backend.h"
39 #include "sysemu/blockdev.h"
40 #include "sysemu/sysemu.h"
43 /********************************************************/
44 /* debug Floppy devices */
46 #define DEBUG_FLOPPY 0
48 #define FLOPPY_DPRINTF(fmt, ...) \
51 fprintf(stderr, "FLOPPY: " fmt , ## __VA_ARGS__); \
55 /********************************************************/
56 /* Floppy drive emulation */
58 typedef enum FDriveRate
{
59 FDRIVE_RATE_500K
= 0x00, /* 500 Kbps */
60 FDRIVE_RATE_300K
= 0x01, /* 300 Kbps */
61 FDRIVE_RATE_250K
= 0x02, /* 250 Kbps */
62 FDRIVE_RATE_1M
= 0x03, /* 1 Mbps */
65 typedef enum FDriveSize
{
71 typedef struct FDFormat
{
72 FloppyDriveType drive
;
79 /* In many cases, the total sector size of a format is enough to uniquely
80 * identify it. However, there are some total sector collisions between
81 * formats of different physical size, and these are noted below by
82 * highlighting the total sector size for entries with collisions. */
83 static const FDFormat fd_formats
[] = {
84 /* First entry is default format */
85 /* 1.44 MB 3"1/2 floppy disks */
86 { FLOPPY_DRIVE_TYPE_144
, 18, 80, 1, FDRIVE_RATE_500K
, }, /* 3.5" 2880 */
87 { FLOPPY_DRIVE_TYPE_144
, 20, 80, 1, FDRIVE_RATE_500K
, }, /* 3.5" 3200 */
88 { FLOPPY_DRIVE_TYPE_144
, 21, 80, 1, FDRIVE_RATE_500K
, },
89 { FLOPPY_DRIVE_TYPE_144
, 21, 82, 1, FDRIVE_RATE_500K
, },
90 { FLOPPY_DRIVE_TYPE_144
, 21, 83, 1, FDRIVE_RATE_500K
, },
91 { FLOPPY_DRIVE_TYPE_144
, 22, 80, 1, FDRIVE_RATE_500K
, },
92 { FLOPPY_DRIVE_TYPE_144
, 23, 80, 1, FDRIVE_RATE_500K
, },
93 { FLOPPY_DRIVE_TYPE_144
, 24, 80, 1, FDRIVE_RATE_500K
, },
94 /* 2.88 MB 3"1/2 floppy disks */
95 { FLOPPY_DRIVE_TYPE_288
, 36, 80, 1, FDRIVE_RATE_1M
, },
96 { FLOPPY_DRIVE_TYPE_288
, 39, 80, 1, FDRIVE_RATE_1M
, },
97 { FLOPPY_DRIVE_TYPE_288
, 40, 80, 1, FDRIVE_RATE_1M
, },
98 { FLOPPY_DRIVE_TYPE_288
, 44, 80, 1, FDRIVE_RATE_1M
, },
99 { FLOPPY_DRIVE_TYPE_288
, 48, 80, 1, FDRIVE_RATE_1M
, },
100 /* 720 kB 3"1/2 floppy disks */
101 { FLOPPY_DRIVE_TYPE_144
, 9, 80, 1, FDRIVE_RATE_250K
, }, /* 3.5" 1440 */
102 { FLOPPY_DRIVE_TYPE_144
, 10, 80, 1, FDRIVE_RATE_250K
, },
103 { FLOPPY_DRIVE_TYPE_144
, 10, 82, 1, FDRIVE_RATE_250K
, },
104 { FLOPPY_DRIVE_TYPE_144
, 10, 83, 1, FDRIVE_RATE_250K
, },
105 { FLOPPY_DRIVE_TYPE_144
, 13, 80, 1, FDRIVE_RATE_250K
, },
106 { FLOPPY_DRIVE_TYPE_144
, 14, 80, 1, FDRIVE_RATE_250K
, },
107 /* 1.2 MB 5"1/4 floppy disks */
108 { FLOPPY_DRIVE_TYPE_120
, 15, 80, 1, FDRIVE_RATE_500K
, },
109 { FLOPPY_DRIVE_TYPE_120
, 18, 80, 1, FDRIVE_RATE_500K
, }, /* 5.25" 2880 */
110 { FLOPPY_DRIVE_TYPE_120
, 18, 82, 1, FDRIVE_RATE_500K
, },
111 { FLOPPY_DRIVE_TYPE_120
, 18, 83, 1, FDRIVE_RATE_500K
, },
112 { FLOPPY_DRIVE_TYPE_120
, 20, 80, 1, FDRIVE_RATE_500K
, }, /* 5.25" 3200 */
113 /* 720 kB 5"1/4 floppy disks */
114 { FLOPPY_DRIVE_TYPE_120
, 9, 80, 1, FDRIVE_RATE_250K
, }, /* 5.25" 1440 */
115 { FLOPPY_DRIVE_TYPE_120
, 11, 80, 1, FDRIVE_RATE_250K
, },
116 /* 360 kB 5"1/4 floppy disks */
117 { FLOPPY_DRIVE_TYPE_120
, 9, 40, 1, FDRIVE_RATE_300K
, }, /* 5.25" 720 */
118 { FLOPPY_DRIVE_TYPE_120
, 9, 40, 0, FDRIVE_RATE_300K
, },
119 { FLOPPY_DRIVE_TYPE_120
, 10, 41, 1, FDRIVE_RATE_300K
, },
120 { FLOPPY_DRIVE_TYPE_120
, 10, 42, 1, FDRIVE_RATE_300K
, },
121 /* 320 kB 5"1/4 floppy disks */
122 { FLOPPY_DRIVE_TYPE_120
, 8, 40, 1, FDRIVE_RATE_250K
, },
123 { FLOPPY_DRIVE_TYPE_120
, 8, 40, 0, FDRIVE_RATE_250K
, },
124 /* 360 kB must match 5"1/4 better than 3"1/2... */
125 { FLOPPY_DRIVE_TYPE_144
, 9, 80, 0, FDRIVE_RATE_250K
, }, /* 3.5" 720 */
127 { FLOPPY_DRIVE_TYPE_NONE
, -1, -1, 0, 0, },
130 static FDriveSize
drive_size(FloppyDriveType drive
)
133 case FLOPPY_DRIVE_TYPE_120
:
134 return FDRIVE_SIZE_525
;
135 case FLOPPY_DRIVE_TYPE_144
:
136 case FLOPPY_DRIVE_TYPE_288
:
137 return FDRIVE_SIZE_350
;
139 return FDRIVE_SIZE_UNKNOWN
;
143 #define GET_CUR_DRV(fdctrl) ((fdctrl)->cur_drv)
144 #define SET_CUR_DRV(fdctrl, drive) ((fdctrl)->cur_drv = (drive))
146 /* Will always be a fixed parameter for us */
147 #define FD_SECTOR_LEN 512
148 #define FD_SECTOR_SC 2 /* Sector size code */
149 #define FD_RESET_SENSEI_COUNT 4 /* Number of sense interrupts on RESET */
151 typedef struct FDCtrl FDCtrl
;
153 /* Floppy disk drive emulation */
154 typedef enum FDiskFlags
{
155 FDISK_DBL_SIDES
= 0x01,
158 typedef struct FDrive
{
162 FloppyDriveType drive
; /* CMOS drive type */
163 uint8_t perpendicular
; /* 2.88 MB access mode */
169 FloppyDriveType disk
; /* Current disk type */
171 uint8_t last_sect
; /* Nb sector per track */
172 uint8_t max_track
; /* Nb of tracks */
173 uint16_t bps
; /* Bytes per sector */
174 uint8_t ro
; /* Is read-only */
175 uint8_t media_changed
; /* Is media changed */
176 uint8_t media_rate
; /* Data rate of medium */
178 bool media_validated
; /* Have we validated the media? */
182 static FloppyDriveType
get_fallback_drive_type(FDrive
*drv
);
184 /* Hack: FD_SEEK is expected to work on empty drives. However, QEMU
185 * currently goes through some pains to keep seeks within the bounds
186 * established by last_sect and max_track. Correcting this is difficult,
187 * as refactoring FDC code tends to expose nasty bugs in the Linux kernel.
189 * For now: allow empty drives to have large bounds so we can seek around,
190 * with the understanding that when a diskette is inserted, the bounds will
191 * properly tighten to match the geometry of that inserted medium.
193 static void fd_empty_seek_hack(FDrive
*drv
)
195 drv
->last_sect
= 0xFF;
196 drv
->max_track
= 0xFF;
199 static void fd_init(FDrive
*drv
)
202 drv
->perpendicular
= 0;
204 drv
->disk
= FLOPPY_DRIVE_TYPE_NONE
;
208 drv
->media_changed
= 1;
211 #define NUM_SIDES(drv) ((drv)->flags & FDISK_DBL_SIDES ? 2 : 1)
213 static int fd_sector_calc(uint8_t head
, uint8_t track
, uint8_t sect
,
214 uint8_t last_sect
, uint8_t num_sides
)
216 return (((track
* num_sides
) + head
) * last_sect
) + sect
- 1;
219 /* Returns current position, in sectors, for given drive */
220 static int fd_sector(FDrive
*drv
)
222 return fd_sector_calc(drv
->head
, drv
->track
, drv
->sect
, drv
->last_sect
,
226 /* Returns current position, in bytes, for given drive */
227 static int fd_offset(FDrive
*drv
)
229 g_assert(fd_sector(drv
) < INT_MAX
>> BDRV_SECTOR_BITS
);
230 return fd_sector(drv
) << BDRV_SECTOR_BITS
;
233 /* Seek to a new position:
234 * returns 0 if already on right track
235 * returns 1 if track changed
236 * returns 2 if track is invalid
237 * returns 3 if sector is invalid
238 * returns 4 if seek is disabled
240 static int fd_seek(FDrive
*drv
, uint8_t head
, uint8_t track
, uint8_t sect
,
246 if (track
> drv
->max_track
||
247 (head
!= 0 && (drv
->flags
& FDISK_DBL_SIDES
) == 0)) {
248 FLOPPY_DPRINTF("try to read %d %02x %02x (max=%d %d %02x %02x)\n",
249 head
, track
, sect
, 1,
250 (drv
->flags
& FDISK_DBL_SIDES
) == 0 ? 0 : 1,
251 drv
->max_track
, drv
->last_sect
);
254 if (sect
> drv
->last_sect
) {
255 FLOPPY_DPRINTF("try to read %d %02x %02x (max=%d %d %02x %02x)\n",
256 head
, track
, sect
, 1,
257 (drv
->flags
& FDISK_DBL_SIDES
) == 0 ? 0 : 1,
258 drv
->max_track
, drv
->last_sect
);
261 sector
= fd_sector_calc(head
, track
, sect
, drv
->last_sect
, NUM_SIDES(drv
));
263 if (sector
!= fd_sector(drv
)) {
266 FLOPPY_DPRINTF("error: no implicit seek %d %02x %02x"
267 " (max=%d %02x %02x)\n",
268 head
, track
, sect
, 1, drv
->max_track
,
274 if (drv
->track
!= track
) {
275 if (drv
->blk
!= NULL
&& blk_is_inserted(drv
->blk
)) {
276 drv
->media_changed
= 0;
284 if (drv
->blk
== NULL
|| !blk_is_inserted(drv
->blk
)) {
291 /* Set drive back to track 0 */
292 static void fd_recalibrate(FDrive
*drv
)
294 FLOPPY_DPRINTF("recalibrate\n");
295 fd_seek(drv
, 0, 0, 1, 1);
299 * Determine geometry based on inserted diskette.
300 * Will not operate on an empty drive.
302 * @return: 0 on success, -1 if the drive is empty.
304 static int pick_geometry(FDrive
*drv
)
306 BlockBackend
*blk
= drv
->blk
;
307 const FDFormat
*parse
;
308 uint64_t nb_sectors
, size
;
310 int match
, size_match
, type_match
;
311 bool magic
= drv
->drive
== FLOPPY_DRIVE_TYPE_AUTO
;
313 /* We can only pick a geometry if we have a diskette. */
314 if (!drv
->blk
|| !blk_is_inserted(drv
->blk
) ||
315 drv
->drive
== FLOPPY_DRIVE_TYPE_NONE
)
320 /* We need to determine the likely geometry of the inserted medium.
321 * In order of preference, we look for:
322 * (1) The same drive type and number of sectors,
323 * (2) The same diskette size and number of sectors,
324 * (3) The same drive type.
326 * In all cases, matches that occur higher in the drive table will take
327 * precedence over matches that occur later in the table.
329 blk_get_geometry(blk
, &nb_sectors
);
330 match
= size_match
= type_match
= -1;
332 parse
= &fd_formats
[i
];
333 if (parse
->drive
== FLOPPY_DRIVE_TYPE_NONE
) {
336 size
= (parse
->max_head
+ 1) * parse
->max_track
* parse
->last_sect
;
337 if (nb_sectors
== size
) {
338 if (magic
|| parse
->drive
== drv
->drive
) {
339 /* (1) perfect match -- nb_sectors and drive type */
341 } else if (drive_size(parse
->drive
) == drive_size(drv
->drive
)) {
342 /* (2) size match -- nb_sectors and physical medium size */
343 match
= (match
== -1) ? i
: match
;
345 /* This is suspicious -- Did the user misconfigure? */
346 size_match
= (size_match
== -1) ? i
: size_match
;
348 } else if (type_match
== -1) {
349 if ((parse
->drive
== drv
->drive
) ||
350 (magic
&& (parse
->drive
== get_fallback_drive_type(drv
)))) {
351 /* (3) type match -- nb_sectors mismatch, but matches the type
352 * specified explicitly by the user, or matches the fallback
353 * default type when using the drive autodetect mechanism */
359 /* No exact match found */
361 if (size_match
!= -1) {
362 parse
= &fd_formats
[size_match
];
363 FLOPPY_DPRINTF("User requested floppy drive type '%s', "
364 "but inserted medium appears to be a "
365 "%"PRId64
" sector '%s' type\n",
366 FloppyDriveType_lookup
[drv
->drive
],
368 FloppyDriveType_lookup
[parse
->drive
]);
373 /* No match of any kind found -- fd_format is misconfigured, abort. */
375 error_setg(&error_abort
, "No candidate geometries present in table "
376 " for floppy drive type '%s'",
377 FloppyDriveType_lookup
[drv
->drive
]);
380 parse
= &(fd_formats
[match
]);
383 if (parse
->max_head
== 0) {
384 drv
->flags
&= ~FDISK_DBL_SIDES
;
386 drv
->flags
|= FDISK_DBL_SIDES
;
388 drv
->max_track
= parse
->max_track
;
389 drv
->last_sect
= parse
->last_sect
;
390 drv
->disk
= parse
->drive
;
391 drv
->media_rate
= parse
->rate
;
395 static void pick_drive_type(FDrive
*drv
)
397 if (drv
->drive
!= FLOPPY_DRIVE_TYPE_AUTO
) {
401 if (pick_geometry(drv
) == 0) {
402 drv
->drive
= drv
->disk
;
404 drv
->drive
= get_fallback_drive_type(drv
);
407 g_assert(drv
->drive
!= FLOPPY_DRIVE_TYPE_AUTO
);
410 /* Revalidate a disk drive after a disk change */
411 static void fd_revalidate(FDrive
*drv
)
415 FLOPPY_DPRINTF("revalidate\n");
416 if (drv
->blk
!= NULL
) {
417 drv
->ro
= blk_is_read_only(drv
->blk
);
418 if (!blk_is_inserted(drv
->blk
)) {
419 FLOPPY_DPRINTF("No disk in drive\n");
420 drv
->disk
= FLOPPY_DRIVE_TYPE_NONE
;
421 fd_empty_seek_hack(drv
);
422 } else if (!drv
->media_validated
) {
423 rc
= pick_geometry(drv
);
425 FLOPPY_DPRINTF("Could not validate floppy drive media");
427 drv
->media_validated
= true;
428 FLOPPY_DPRINTF("Floppy disk (%d h %d t %d s) %s\n",
429 (drv
->flags
& FDISK_DBL_SIDES
) ? 2 : 1,
430 drv
->max_track
, drv
->last_sect
,
431 drv
->ro
? "ro" : "rw");
435 FLOPPY_DPRINTF("No drive connected\n");
438 drv
->flags
&= ~FDISK_DBL_SIDES
;
439 drv
->drive
= FLOPPY_DRIVE_TYPE_NONE
;
440 drv
->disk
= FLOPPY_DRIVE_TYPE_NONE
;
444 /********************************************************/
445 /* Intel 82078 floppy disk controller emulation */
447 static void fdctrl_reset(FDCtrl
*fdctrl
, int do_irq
);
448 static void fdctrl_to_command_phase(FDCtrl
*fdctrl
);
449 static int fdctrl_transfer_handler (void *opaque
, int nchan
,
450 int dma_pos
, int dma_len
);
451 static void fdctrl_raise_irq(FDCtrl
*fdctrl
);
452 static FDrive
*get_cur_drv(FDCtrl
*fdctrl
);
454 static uint32_t fdctrl_read_statusA(FDCtrl
*fdctrl
);
455 static uint32_t fdctrl_read_statusB(FDCtrl
*fdctrl
);
456 static uint32_t fdctrl_read_dor(FDCtrl
*fdctrl
);
457 static void fdctrl_write_dor(FDCtrl
*fdctrl
, uint32_t value
);
458 static uint32_t fdctrl_read_tape(FDCtrl
*fdctrl
);
459 static void fdctrl_write_tape(FDCtrl
*fdctrl
, uint32_t value
);
460 static uint32_t fdctrl_read_main_status(FDCtrl
*fdctrl
);
461 static void fdctrl_write_rate(FDCtrl
*fdctrl
, uint32_t value
);
462 static uint32_t fdctrl_read_data(FDCtrl
*fdctrl
);
463 static void fdctrl_write_data(FDCtrl
*fdctrl
, uint32_t value
);
464 static uint32_t fdctrl_read_dir(FDCtrl
*fdctrl
);
465 static void fdctrl_write_ccr(FDCtrl
*fdctrl
, uint32_t value
);
477 FD_STATE_MULTI
= 0x01, /* multi track flag */
478 FD_STATE_FORMAT
= 0x02, /* format flag */
494 FD_CMD_READ_TRACK
= 0x02,
495 FD_CMD_SPECIFY
= 0x03,
496 FD_CMD_SENSE_DRIVE_STATUS
= 0x04,
499 FD_CMD_RECALIBRATE
= 0x07,
500 FD_CMD_SENSE_INTERRUPT_STATUS
= 0x08,
501 FD_CMD_WRITE_DELETED
= 0x09,
502 FD_CMD_READ_ID
= 0x0a,
503 FD_CMD_READ_DELETED
= 0x0c,
504 FD_CMD_FORMAT_TRACK
= 0x0d,
505 FD_CMD_DUMPREG
= 0x0e,
507 FD_CMD_VERSION
= 0x10,
508 FD_CMD_SCAN_EQUAL
= 0x11,
509 FD_CMD_PERPENDICULAR_MODE
= 0x12,
510 FD_CMD_CONFIGURE
= 0x13,
512 FD_CMD_VERIFY
= 0x16,
513 FD_CMD_POWERDOWN_MODE
= 0x17,
514 FD_CMD_PART_ID
= 0x18,
515 FD_CMD_SCAN_LOW_OR_EQUAL
= 0x19,
516 FD_CMD_SCAN_HIGH_OR_EQUAL
= 0x1d,
518 FD_CMD_OPTION
= 0x33,
519 FD_CMD_RESTORE
= 0x4e,
520 FD_CMD_DRIVE_SPECIFICATION_COMMAND
= 0x8e,
521 FD_CMD_RELATIVE_SEEK_OUT
= 0x8f,
522 FD_CMD_FORMAT_AND_WRITE
= 0xcd,
523 FD_CMD_RELATIVE_SEEK_IN
= 0xcf,
527 FD_CONFIG_PRETRK
= 0xff, /* Pre-compensation set to track 0 */
528 FD_CONFIG_FIFOTHR
= 0x0f, /* FIFO threshold set to 1 byte */
529 FD_CONFIG_POLL
= 0x10, /* Poll enabled */
530 FD_CONFIG_EFIFO
= 0x20, /* FIFO disabled */
531 FD_CONFIG_EIS
= 0x40, /* No implied seeks */
540 FD_SR0_ABNTERM
= 0x40,
541 FD_SR0_INVCMD
= 0x80,
542 FD_SR0_RDYCHG
= 0xc0,
546 FD_SR1_MA
= 0x01, /* Missing address mark */
547 FD_SR1_NW
= 0x02, /* Not writable */
548 FD_SR1_EC
= 0x80, /* End of cylinder */
552 FD_SR2_SNS
= 0x04, /* Scan not satisfied */
553 FD_SR2_SEH
= 0x08, /* Scan equal hit */
564 FD_SRA_INTPEND
= 0x80,
578 FD_DOR_SELMASK
= 0x03,
580 FD_DOR_SELMASK
= 0x01,
582 FD_DOR_nRESET
= 0x04,
584 FD_DOR_MOTEN0
= 0x10,
585 FD_DOR_MOTEN1
= 0x20,
586 FD_DOR_MOTEN2
= 0x40,
587 FD_DOR_MOTEN3
= 0x80,
592 FD_TDR_BOOTSEL
= 0x0c,
594 FD_TDR_BOOTSEL
= 0x04,
599 FD_DSR_DRATEMASK
= 0x03,
600 FD_DSR_PWRDOWN
= 0x40,
601 FD_DSR_SWRESET
= 0x80,
605 FD_MSR_DRV0BUSY
= 0x01,
606 FD_MSR_DRV1BUSY
= 0x02,
607 FD_MSR_DRV2BUSY
= 0x04,
608 FD_MSR_DRV3BUSY
= 0x08,
609 FD_MSR_CMDBUSY
= 0x10,
610 FD_MSR_NONDMA
= 0x20,
616 FD_DIR_DSKCHG
= 0x80,
620 * See chapter 5.0 "Controller phases" of the spec:
623 * The host writes a command and its parameters into the FIFO. The command
624 * phase is completed when all parameters for the command have been supplied,
625 * and execution phase is entered.
628 * Data transfers, either DMA or non-DMA. For non-DMA transfers, the FIFO
629 * contains the payload now, otherwise it's unused. When all bytes of the
630 * required data have been transferred, the state is switched to either result
631 * phase (if the command produces status bytes) or directly back into the
632 * command phase for the next command.
635 * The host reads out the FIFO, which contains one or more result bytes now.
638 /* Only for migration: reconstruct phase from registers like qemu 2.3 */
639 FD_PHASE_RECONSTRUCT
= 0,
641 FD_PHASE_COMMAND
= 1,
642 FD_PHASE_EXECUTION
= 2,
646 #define FD_MULTI_TRACK(state) ((state) & FD_STATE_MULTI)
647 #define FD_FORMAT_CMD(state) ((state) & FD_STATE_FORMAT)
652 /* Controller state */
653 QEMUTimer
*result_timer
;
657 /* Controller's identification */
663 uint8_t dor_vmstate
; /* only used as temp during vmstate */
678 uint8_t eot
; /* last wanted sector */
679 /* States kept only to be returned back */
680 /* precompensation */
684 /* Power down config (also with status regB access mode */
687 uint8_t num_floppies
;
688 FDrive drives
[MAX_FD
];
690 uint32_t check_media_rate
;
691 FloppyDriveType fallback
; /* type=auto failure fallback */
697 static FloppyDriveType
get_fallback_drive_type(FDrive
*drv
)
699 return drv
->fdctrl
->fallback
;
702 #define TYPE_SYSBUS_FDC "base-sysbus-fdc"
703 #define SYSBUS_FDC(obj) OBJECT_CHECK(FDCtrlSysBus, (obj), TYPE_SYSBUS_FDC)
705 typedef struct FDCtrlSysBus
{
707 SysBusDevice parent_obj
;
713 #define ISA_FDC(obj) OBJECT_CHECK(FDCtrlISABus, (obj), TYPE_ISA_FDC)
715 typedef struct FDCtrlISABus
{
716 ISADevice parent_obj
;
726 static uint32_t fdctrl_read (void *opaque
, uint32_t reg
)
728 FDCtrl
*fdctrl
= opaque
;
734 retval
= fdctrl_read_statusA(fdctrl
);
737 retval
= fdctrl_read_statusB(fdctrl
);
740 retval
= fdctrl_read_dor(fdctrl
);
743 retval
= fdctrl_read_tape(fdctrl
);
746 retval
= fdctrl_read_main_status(fdctrl
);
749 retval
= fdctrl_read_data(fdctrl
);
752 retval
= fdctrl_read_dir(fdctrl
);
755 retval
= (uint32_t)(-1);
758 FLOPPY_DPRINTF("read reg%d: 0x%02x\n", reg
& 7, retval
);
763 static void fdctrl_write (void *opaque
, uint32_t reg
, uint32_t value
)
765 FDCtrl
*fdctrl
= opaque
;
767 FLOPPY_DPRINTF("write reg%d: 0x%02x\n", reg
& 7, value
);
772 fdctrl_write_dor(fdctrl
, value
);
775 fdctrl_write_tape(fdctrl
, value
);
778 fdctrl_write_rate(fdctrl
, value
);
781 fdctrl_write_data(fdctrl
, value
);
784 fdctrl_write_ccr(fdctrl
, value
);
791 static uint64_t fdctrl_read_mem (void *opaque
, hwaddr reg
,
794 return fdctrl_read(opaque
, (uint32_t)reg
);
797 static void fdctrl_write_mem (void *opaque
, hwaddr reg
,
798 uint64_t value
, unsigned size
)
800 fdctrl_write(opaque
, (uint32_t)reg
, value
);
803 static const MemoryRegionOps fdctrl_mem_ops
= {
804 .read
= fdctrl_read_mem
,
805 .write
= fdctrl_write_mem
,
806 .endianness
= DEVICE_NATIVE_ENDIAN
,
809 static const MemoryRegionOps fdctrl_mem_strict_ops
= {
810 .read
= fdctrl_read_mem
,
811 .write
= fdctrl_write_mem
,
812 .endianness
= DEVICE_NATIVE_ENDIAN
,
814 .min_access_size
= 1,
815 .max_access_size
= 1,
819 static bool fdrive_media_changed_needed(void *opaque
)
821 FDrive
*drive
= opaque
;
823 return (drive
->blk
!= NULL
&& drive
->media_changed
!= 1);
826 static const VMStateDescription vmstate_fdrive_media_changed
= {
827 .name
= "fdrive/media_changed",
829 .minimum_version_id
= 1,
830 .needed
= fdrive_media_changed_needed
,
831 .fields
= (VMStateField
[]) {
832 VMSTATE_UINT8(media_changed
, FDrive
),
833 VMSTATE_END_OF_LIST()
837 static bool fdrive_media_rate_needed(void *opaque
)
839 FDrive
*drive
= opaque
;
841 return drive
->fdctrl
->check_media_rate
;
844 static const VMStateDescription vmstate_fdrive_media_rate
= {
845 .name
= "fdrive/media_rate",
847 .minimum_version_id
= 1,
848 .needed
= fdrive_media_rate_needed
,
849 .fields
= (VMStateField
[]) {
850 VMSTATE_UINT8(media_rate
, FDrive
),
851 VMSTATE_END_OF_LIST()
855 static bool fdrive_perpendicular_needed(void *opaque
)
857 FDrive
*drive
= opaque
;
859 return drive
->perpendicular
!= 0;
862 static const VMStateDescription vmstate_fdrive_perpendicular
= {
863 .name
= "fdrive/perpendicular",
865 .minimum_version_id
= 1,
866 .needed
= fdrive_perpendicular_needed
,
867 .fields
= (VMStateField
[]) {
868 VMSTATE_UINT8(perpendicular
, FDrive
),
869 VMSTATE_END_OF_LIST()
873 static int fdrive_post_load(void *opaque
, int version_id
)
875 fd_revalidate(opaque
);
879 static const VMStateDescription vmstate_fdrive
= {
882 .minimum_version_id
= 1,
883 .post_load
= fdrive_post_load
,
884 .fields
= (VMStateField
[]) {
885 VMSTATE_UINT8(head
, FDrive
),
886 VMSTATE_UINT8(track
, FDrive
),
887 VMSTATE_UINT8(sect
, FDrive
),
888 VMSTATE_END_OF_LIST()
890 .subsections
= (const VMStateDescription
*[]) {
891 &vmstate_fdrive_media_changed
,
892 &vmstate_fdrive_media_rate
,
893 &vmstate_fdrive_perpendicular
,
899 * Reconstructs the phase from register values according to the logic that was
900 * implemented in qemu 2.3. This is the default value that is used if the phase
901 * subsection is not present on migration.
903 * Don't change this function to reflect newer qemu versions, it is part of
906 static int reconstruct_phase(FDCtrl
*fdctrl
)
908 if (fdctrl
->msr
& FD_MSR_NONDMA
) {
909 return FD_PHASE_EXECUTION
;
910 } else if ((fdctrl
->msr
& FD_MSR_RQM
) == 0) {
911 /* qemu 2.3 disabled RQM only during DMA transfers */
912 return FD_PHASE_EXECUTION
;
913 } else if (fdctrl
->msr
& FD_MSR_DIO
) {
914 return FD_PHASE_RESULT
;
916 return FD_PHASE_COMMAND
;
920 static void fdc_pre_save(void *opaque
)
924 s
->dor_vmstate
= s
->dor
| GET_CUR_DRV(s
);
927 static int fdc_pre_load(void *opaque
)
930 s
->phase
= FD_PHASE_RECONSTRUCT
;
934 static int fdc_post_load(void *opaque
, int version_id
)
938 SET_CUR_DRV(s
, s
->dor_vmstate
& FD_DOR_SELMASK
);
939 s
->dor
= s
->dor_vmstate
& ~FD_DOR_SELMASK
;
941 if (s
->phase
== FD_PHASE_RECONSTRUCT
) {
942 s
->phase
= reconstruct_phase(s
);
948 static bool fdc_reset_sensei_needed(void *opaque
)
952 return s
->reset_sensei
!= 0;
955 static const VMStateDescription vmstate_fdc_reset_sensei
= {
956 .name
= "fdc/reset_sensei",
958 .minimum_version_id
= 1,
959 .needed
= fdc_reset_sensei_needed
,
960 .fields
= (VMStateField
[]) {
961 VMSTATE_INT32(reset_sensei
, FDCtrl
),
962 VMSTATE_END_OF_LIST()
966 static bool fdc_result_timer_needed(void *opaque
)
970 return timer_pending(s
->result_timer
);
973 static const VMStateDescription vmstate_fdc_result_timer
= {
974 .name
= "fdc/result_timer",
976 .minimum_version_id
= 1,
977 .needed
= fdc_result_timer_needed
,
978 .fields
= (VMStateField
[]) {
979 VMSTATE_TIMER_PTR(result_timer
, FDCtrl
),
980 VMSTATE_END_OF_LIST()
984 static bool fdc_phase_needed(void *opaque
)
986 FDCtrl
*fdctrl
= opaque
;
988 return reconstruct_phase(fdctrl
) != fdctrl
->phase
;
991 static const VMStateDescription vmstate_fdc_phase
= {
994 .minimum_version_id
= 1,
995 .needed
= fdc_phase_needed
,
996 .fields
= (VMStateField
[]) {
997 VMSTATE_UINT8(phase
, FDCtrl
),
998 VMSTATE_END_OF_LIST()
1002 static const VMStateDescription vmstate_fdc
= {
1005 .minimum_version_id
= 2,
1006 .pre_save
= fdc_pre_save
,
1007 .pre_load
= fdc_pre_load
,
1008 .post_load
= fdc_post_load
,
1009 .fields
= (VMStateField
[]) {
1010 /* Controller State */
1011 VMSTATE_UINT8(sra
, FDCtrl
),
1012 VMSTATE_UINT8(srb
, FDCtrl
),
1013 VMSTATE_UINT8(dor_vmstate
, FDCtrl
),
1014 VMSTATE_UINT8(tdr
, FDCtrl
),
1015 VMSTATE_UINT8(dsr
, FDCtrl
),
1016 VMSTATE_UINT8(msr
, FDCtrl
),
1017 VMSTATE_UINT8(status0
, FDCtrl
),
1018 VMSTATE_UINT8(status1
, FDCtrl
),
1019 VMSTATE_UINT8(status2
, FDCtrl
),
1021 VMSTATE_VARRAY_INT32(fifo
, FDCtrl
, fifo_size
, 0, vmstate_info_uint8
,
1023 VMSTATE_UINT32(data_pos
, FDCtrl
),
1024 VMSTATE_UINT32(data_len
, FDCtrl
),
1025 VMSTATE_UINT8(data_state
, FDCtrl
),
1026 VMSTATE_UINT8(data_dir
, FDCtrl
),
1027 VMSTATE_UINT8(eot
, FDCtrl
),
1028 /* States kept only to be returned back */
1029 VMSTATE_UINT8(timer0
, FDCtrl
),
1030 VMSTATE_UINT8(timer1
, FDCtrl
),
1031 VMSTATE_UINT8(precomp_trk
, FDCtrl
),
1032 VMSTATE_UINT8(config
, FDCtrl
),
1033 VMSTATE_UINT8(lock
, FDCtrl
),
1034 VMSTATE_UINT8(pwrd
, FDCtrl
),
1035 VMSTATE_UINT8_EQUAL(num_floppies
, FDCtrl
),
1036 VMSTATE_STRUCT_ARRAY(drives
, FDCtrl
, MAX_FD
, 1,
1037 vmstate_fdrive
, FDrive
),
1038 VMSTATE_END_OF_LIST()
1040 .subsections
= (const VMStateDescription
*[]) {
1041 &vmstate_fdc_reset_sensei
,
1042 &vmstate_fdc_result_timer
,
1048 static void fdctrl_external_reset_sysbus(DeviceState
*d
)
1050 FDCtrlSysBus
*sys
= SYSBUS_FDC(d
);
1051 FDCtrl
*s
= &sys
->state
;
1056 static void fdctrl_external_reset_isa(DeviceState
*d
)
1058 FDCtrlISABus
*isa
= ISA_FDC(d
);
1059 FDCtrl
*s
= &isa
->state
;
1064 static void fdctrl_handle_tc(void *opaque
, int irq
, int level
)
1066 //FDCtrl *s = opaque;
1070 FLOPPY_DPRINTF("TC pulsed\n");
1074 /* Change IRQ state */
1075 static void fdctrl_reset_irq(FDCtrl
*fdctrl
)
1077 fdctrl
->status0
= 0;
1078 if (!(fdctrl
->sra
& FD_SRA_INTPEND
))
1080 FLOPPY_DPRINTF("Reset interrupt\n");
1081 qemu_set_irq(fdctrl
->irq
, 0);
1082 fdctrl
->sra
&= ~FD_SRA_INTPEND
;
1085 static void fdctrl_raise_irq(FDCtrl
*fdctrl
)
1087 if (!(fdctrl
->sra
& FD_SRA_INTPEND
)) {
1088 qemu_set_irq(fdctrl
->irq
, 1);
1089 fdctrl
->sra
|= FD_SRA_INTPEND
;
1092 fdctrl
->reset_sensei
= 0;
1093 FLOPPY_DPRINTF("Set interrupt status to 0x%02x\n", fdctrl
->status0
);
1096 /* Reset controller */
1097 static void fdctrl_reset(FDCtrl
*fdctrl
, int do_irq
)
1101 FLOPPY_DPRINTF("reset controller\n");
1102 fdctrl_reset_irq(fdctrl
);
1103 /* Initialise controller */
1106 if (!fdctrl
->drives
[1].blk
) {
1107 fdctrl
->sra
|= FD_SRA_nDRV2
;
1109 fdctrl
->cur_drv
= 0;
1110 fdctrl
->dor
= FD_DOR_nRESET
;
1111 fdctrl
->dor
|= (fdctrl
->dma_chann
!= -1) ? FD_DOR_DMAEN
: 0;
1112 fdctrl
->msr
= FD_MSR_RQM
;
1113 fdctrl
->reset_sensei
= 0;
1114 timer_del(fdctrl
->result_timer
);
1116 fdctrl
->data_pos
= 0;
1117 fdctrl
->data_len
= 0;
1118 fdctrl
->data_state
= 0;
1119 fdctrl
->data_dir
= FD_DIR_WRITE
;
1120 for (i
= 0; i
< MAX_FD
; i
++)
1121 fd_recalibrate(&fdctrl
->drives
[i
]);
1122 fdctrl_to_command_phase(fdctrl
);
1124 fdctrl
->status0
|= FD_SR0_RDYCHG
;
1125 fdctrl_raise_irq(fdctrl
);
1126 fdctrl
->reset_sensei
= FD_RESET_SENSEI_COUNT
;
1130 static inline FDrive
*drv0(FDCtrl
*fdctrl
)
1132 return &fdctrl
->drives
[(fdctrl
->tdr
& FD_TDR_BOOTSEL
) >> 2];
1135 static inline FDrive
*drv1(FDCtrl
*fdctrl
)
1137 if ((fdctrl
->tdr
& FD_TDR_BOOTSEL
) < (1 << 2))
1138 return &fdctrl
->drives
[1];
1140 return &fdctrl
->drives
[0];
1144 static inline FDrive
*drv2(FDCtrl
*fdctrl
)
1146 if ((fdctrl
->tdr
& FD_TDR_BOOTSEL
) < (2 << 2))
1147 return &fdctrl
->drives
[2];
1149 return &fdctrl
->drives
[1];
1152 static inline FDrive
*drv3(FDCtrl
*fdctrl
)
1154 if ((fdctrl
->tdr
& FD_TDR_BOOTSEL
) < (3 << 2))
1155 return &fdctrl
->drives
[3];
1157 return &fdctrl
->drives
[2];
1161 static FDrive
*get_cur_drv(FDCtrl
*fdctrl
)
1163 switch (fdctrl
->cur_drv
) {
1164 case 0: return drv0(fdctrl
);
1165 case 1: return drv1(fdctrl
);
1167 case 2: return drv2(fdctrl
);
1168 case 3: return drv3(fdctrl
);
1170 default: return NULL
;
1174 /* Status A register : 0x00 (read-only) */
1175 static uint32_t fdctrl_read_statusA(FDCtrl
*fdctrl
)
1177 uint32_t retval
= fdctrl
->sra
;
1179 FLOPPY_DPRINTF("status register A: 0x%02x\n", retval
);
1184 /* Status B register : 0x01 (read-only) */
1185 static uint32_t fdctrl_read_statusB(FDCtrl
*fdctrl
)
1187 uint32_t retval
= fdctrl
->srb
;
1189 FLOPPY_DPRINTF("status register B: 0x%02x\n", retval
);
1194 /* Digital output register : 0x02 */
1195 static uint32_t fdctrl_read_dor(FDCtrl
*fdctrl
)
1197 uint32_t retval
= fdctrl
->dor
;
1199 /* Selected drive */
1200 retval
|= fdctrl
->cur_drv
;
1201 FLOPPY_DPRINTF("digital output register: 0x%02x\n", retval
);
1206 static void fdctrl_write_dor(FDCtrl
*fdctrl
, uint32_t value
)
1208 FLOPPY_DPRINTF("digital output register set to 0x%02x\n", value
);
1211 if (value
& FD_DOR_MOTEN0
)
1212 fdctrl
->srb
|= FD_SRB_MTR0
;
1214 fdctrl
->srb
&= ~FD_SRB_MTR0
;
1215 if (value
& FD_DOR_MOTEN1
)
1216 fdctrl
->srb
|= FD_SRB_MTR1
;
1218 fdctrl
->srb
&= ~FD_SRB_MTR1
;
1222 fdctrl
->srb
|= FD_SRB_DR0
;
1224 fdctrl
->srb
&= ~FD_SRB_DR0
;
1227 if (!(value
& FD_DOR_nRESET
)) {
1228 if (fdctrl
->dor
& FD_DOR_nRESET
) {
1229 FLOPPY_DPRINTF("controller enter RESET state\n");
1232 if (!(fdctrl
->dor
& FD_DOR_nRESET
)) {
1233 FLOPPY_DPRINTF("controller out of RESET state\n");
1234 fdctrl_reset(fdctrl
, 1);
1235 fdctrl
->dsr
&= ~FD_DSR_PWRDOWN
;
1238 /* Selected drive */
1239 fdctrl
->cur_drv
= value
& FD_DOR_SELMASK
;
1241 fdctrl
->dor
= value
;
1244 /* Tape drive register : 0x03 */
1245 static uint32_t fdctrl_read_tape(FDCtrl
*fdctrl
)
1247 uint32_t retval
= fdctrl
->tdr
;
1249 FLOPPY_DPRINTF("tape drive register: 0x%02x\n", retval
);
1254 static void fdctrl_write_tape(FDCtrl
*fdctrl
, uint32_t value
)
1257 if (!(fdctrl
->dor
& FD_DOR_nRESET
)) {
1258 FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
1261 FLOPPY_DPRINTF("tape drive register set to 0x%02x\n", value
);
1262 /* Disk boot selection indicator */
1263 fdctrl
->tdr
= value
& FD_TDR_BOOTSEL
;
1264 /* Tape indicators: never allow */
1267 /* Main status register : 0x04 (read) */
1268 static uint32_t fdctrl_read_main_status(FDCtrl
*fdctrl
)
1270 uint32_t retval
= fdctrl
->msr
;
1272 fdctrl
->dsr
&= ~FD_DSR_PWRDOWN
;
1273 fdctrl
->dor
|= FD_DOR_nRESET
;
1275 FLOPPY_DPRINTF("main status register: 0x%02x\n", retval
);
1280 /* Data select rate register : 0x04 (write) */
1281 static void fdctrl_write_rate(FDCtrl
*fdctrl
, uint32_t value
)
1284 if (!(fdctrl
->dor
& FD_DOR_nRESET
)) {
1285 FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
1288 FLOPPY_DPRINTF("select rate register set to 0x%02x\n", value
);
1289 /* Reset: autoclear */
1290 if (value
& FD_DSR_SWRESET
) {
1291 fdctrl
->dor
&= ~FD_DOR_nRESET
;
1292 fdctrl_reset(fdctrl
, 1);
1293 fdctrl
->dor
|= FD_DOR_nRESET
;
1295 if (value
& FD_DSR_PWRDOWN
) {
1296 fdctrl_reset(fdctrl
, 1);
1298 fdctrl
->dsr
= value
;
1301 /* Configuration control register: 0x07 (write) */
1302 static void fdctrl_write_ccr(FDCtrl
*fdctrl
, uint32_t value
)
1305 if (!(fdctrl
->dor
& FD_DOR_nRESET
)) {
1306 FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
1309 FLOPPY_DPRINTF("configuration control register set to 0x%02x\n", value
);
1311 /* Only the rate selection bits used in AT mode, and we
1312 * store those in the DSR.
1314 fdctrl
->dsr
= (fdctrl
->dsr
& ~FD_DSR_DRATEMASK
) |
1315 (value
& FD_DSR_DRATEMASK
);
1318 static int fdctrl_media_changed(FDrive
*drv
)
1320 return drv
->media_changed
;
1323 /* Digital input register : 0x07 (read-only) */
1324 static uint32_t fdctrl_read_dir(FDCtrl
*fdctrl
)
1326 uint32_t retval
= 0;
1328 if (fdctrl_media_changed(get_cur_drv(fdctrl
))) {
1329 retval
|= FD_DIR_DSKCHG
;
1332 FLOPPY_DPRINTF("Floppy digital input register: 0x%02x\n", retval
);
1338 /* Clear the FIFO and update the state for receiving the next command */
1339 static void fdctrl_to_command_phase(FDCtrl
*fdctrl
)
1341 fdctrl
->phase
= FD_PHASE_COMMAND
;
1342 fdctrl
->data_dir
= FD_DIR_WRITE
;
1343 fdctrl
->data_pos
= 0;
1344 fdctrl
->data_len
= 1; /* Accept command byte, adjust for params later */
1345 fdctrl
->msr
&= ~(FD_MSR_CMDBUSY
| FD_MSR_DIO
);
1346 fdctrl
->msr
|= FD_MSR_RQM
;
1349 /* Update the state to allow the guest to read out the command status.
1350 * @fifo_len is the number of result bytes to be read out. */
1351 static void fdctrl_to_result_phase(FDCtrl
*fdctrl
, int fifo_len
)
1353 fdctrl
->phase
= FD_PHASE_RESULT
;
1354 fdctrl
->data_dir
= FD_DIR_READ
;
1355 fdctrl
->data_len
= fifo_len
;
1356 fdctrl
->data_pos
= 0;
1357 fdctrl
->msr
|= FD_MSR_CMDBUSY
| FD_MSR_RQM
| FD_MSR_DIO
;
1360 /* Set an error: unimplemented/unknown command */
1361 static void fdctrl_unimplemented(FDCtrl
*fdctrl
, int direction
)
1363 qemu_log_mask(LOG_UNIMP
, "fdc: unimplemented command 0x%02x\n",
1365 fdctrl
->fifo
[0] = FD_SR0_INVCMD
;
1366 fdctrl_to_result_phase(fdctrl
, 1);
1369 /* Seek to next sector
1370 * returns 0 when end of track reached (for DBL_SIDES on head 1)
1371 * otherwise returns 1
1373 static int fdctrl_seek_to_next_sect(FDCtrl
*fdctrl
, FDrive
*cur_drv
)
1375 FLOPPY_DPRINTF("seek to next sector (%d %02x %02x => %d)\n",
1376 cur_drv
->head
, cur_drv
->track
, cur_drv
->sect
,
1377 fd_sector(cur_drv
));
1378 /* XXX: cur_drv->sect >= cur_drv->last_sect should be an
1380 uint8_t new_head
= cur_drv
->head
;
1381 uint8_t new_track
= cur_drv
->track
;
1382 uint8_t new_sect
= cur_drv
->sect
;
1386 if (new_sect
>= cur_drv
->last_sect
||
1387 new_sect
== fdctrl
->eot
) {
1389 if (FD_MULTI_TRACK(fdctrl
->data_state
)) {
1390 if (new_head
== 0 &&
1391 (cur_drv
->flags
& FDISK_DBL_SIDES
) != 0) {
1396 fdctrl
->status0
|= FD_SR0_SEEK
;
1397 if ((cur_drv
->flags
& FDISK_DBL_SIDES
) == 0) {
1402 fdctrl
->status0
|= FD_SR0_SEEK
;
1407 FLOPPY_DPRINTF("seek to next track (%d %02x %02x => %d)\n",
1408 new_head
, new_track
, new_sect
, fd_sector(cur_drv
));
1413 fd_seek(cur_drv
, new_head
, new_track
, new_sect
, 1);
1417 /* Callback for transfer end (stop or abort) */
1418 static void fdctrl_stop_transfer(FDCtrl
*fdctrl
, uint8_t status0
,
1419 uint8_t status1
, uint8_t status2
)
1422 cur_drv
= get_cur_drv(fdctrl
);
1424 fdctrl
->status0
&= ~(FD_SR0_DS0
| FD_SR0_DS1
| FD_SR0_HEAD
);
1425 fdctrl
->status0
|= GET_CUR_DRV(fdctrl
);
1426 if (cur_drv
->head
) {
1427 fdctrl
->status0
|= FD_SR0_HEAD
;
1429 fdctrl
->status0
|= status0
;
1431 FLOPPY_DPRINTF("transfer status: %02x %02x %02x (%02x)\n",
1432 status0
, status1
, status2
, fdctrl
->status0
);
1433 fdctrl
->fifo
[0] = fdctrl
->status0
;
1434 fdctrl
->fifo
[1] = status1
;
1435 fdctrl
->fifo
[2] = status2
;
1436 fdctrl
->fifo
[3] = cur_drv
->track
;
1437 fdctrl
->fifo
[4] = cur_drv
->head
;
1438 fdctrl
->fifo
[5] = cur_drv
->sect
;
1439 fdctrl
->fifo
[6] = FD_SECTOR_SC
;
1440 fdctrl
->data_dir
= FD_DIR_READ
;
1441 if (!(fdctrl
->msr
& FD_MSR_NONDMA
)) {
1442 IsaDmaClass
*k
= ISADMA_GET_CLASS(fdctrl
->dma
);
1443 k
->release_DREQ(fdctrl
->dma
, fdctrl
->dma_chann
);
1445 fdctrl
->msr
|= FD_MSR_RQM
| FD_MSR_DIO
;
1446 fdctrl
->msr
&= ~FD_MSR_NONDMA
;
1448 fdctrl_to_result_phase(fdctrl
, 7);
1449 fdctrl_raise_irq(fdctrl
);
1452 /* Prepare a data transfer (either DMA or FIFO) */
1453 static void fdctrl_start_transfer(FDCtrl
*fdctrl
, int direction
)
1458 SET_CUR_DRV(fdctrl
, fdctrl
->fifo
[1] & FD_DOR_SELMASK
);
1459 cur_drv
= get_cur_drv(fdctrl
);
1460 kt
= fdctrl
->fifo
[2];
1461 kh
= fdctrl
->fifo
[3];
1462 ks
= fdctrl
->fifo
[4];
1463 FLOPPY_DPRINTF("Start transfer at %d %d %02x %02x (%d)\n",
1464 GET_CUR_DRV(fdctrl
), kh
, kt
, ks
,
1465 fd_sector_calc(kh
, kt
, ks
, cur_drv
->last_sect
,
1466 NUM_SIDES(cur_drv
)));
1467 switch (fd_seek(cur_drv
, kh
, kt
, ks
, fdctrl
->config
& FD_CONFIG_EIS
)) {
1470 fdctrl_stop_transfer(fdctrl
, FD_SR0_ABNTERM
, 0x00, 0x00);
1471 fdctrl
->fifo
[3] = kt
;
1472 fdctrl
->fifo
[4] = kh
;
1473 fdctrl
->fifo
[5] = ks
;
1477 fdctrl_stop_transfer(fdctrl
, FD_SR0_ABNTERM
, FD_SR1_EC
, 0x00);
1478 fdctrl
->fifo
[3] = kt
;
1479 fdctrl
->fifo
[4] = kh
;
1480 fdctrl
->fifo
[5] = ks
;
1483 /* No seek enabled */
1484 fdctrl_stop_transfer(fdctrl
, FD_SR0_ABNTERM
, 0x00, 0x00);
1485 fdctrl
->fifo
[3] = kt
;
1486 fdctrl
->fifo
[4] = kh
;
1487 fdctrl
->fifo
[5] = ks
;
1490 fdctrl
->status0
|= FD_SR0_SEEK
;
1496 /* Check the data rate. If the programmed data rate does not match
1497 * the currently inserted medium, the operation has to fail. */
1498 if (fdctrl
->check_media_rate
&&
1499 (fdctrl
->dsr
& FD_DSR_DRATEMASK
) != cur_drv
->media_rate
) {
1500 FLOPPY_DPRINTF("data rate mismatch (fdc=%d, media=%d)\n",
1501 fdctrl
->dsr
& FD_DSR_DRATEMASK
, cur_drv
->media_rate
);
1502 fdctrl_stop_transfer(fdctrl
, FD_SR0_ABNTERM
, FD_SR1_MA
, 0x00);
1503 fdctrl
->fifo
[3] = kt
;
1504 fdctrl
->fifo
[4] = kh
;
1505 fdctrl
->fifo
[5] = ks
;
1509 /* Set the FIFO state */
1510 fdctrl
->data_dir
= direction
;
1511 fdctrl
->data_pos
= 0;
1512 assert(fdctrl
->msr
& FD_MSR_CMDBUSY
);
1513 if (fdctrl
->fifo
[0] & 0x80)
1514 fdctrl
->data_state
|= FD_STATE_MULTI
;
1516 fdctrl
->data_state
&= ~FD_STATE_MULTI
;
1517 if (fdctrl
->fifo
[5] == 0) {
1518 fdctrl
->data_len
= fdctrl
->fifo
[8];
1521 fdctrl
->data_len
= 128 << (fdctrl
->fifo
[5] > 7 ? 7 : fdctrl
->fifo
[5]);
1522 tmp
= (fdctrl
->fifo
[6] - ks
+ 1);
1523 if (fdctrl
->fifo
[0] & 0x80)
1524 tmp
+= fdctrl
->fifo
[6];
1525 fdctrl
->data_len
*= tmp
;
1527 fdctrl
->eot
= fdctrl
->fifo
[6];
1528 if (fdctrl
->dor
& FD_DOR_DMAEN
) {
1529 IsaDmaTransferMode dma_mode
;
1530 IsaDmaClass
*k
= ISADMA_GET_CLASS(fdctrl
->dma
);
1532 /* DMA transfer are enabled. Check if DMA channel is well programmed */
1533 dma_mode
= k
->get_transfer_mode(fdctrl
->dma
, fdctrl
->dma_chann
);
1534 FLOPPY_DPRINTF("dma_mode=%d direction=%d (%d - %d)\n",
1535 dma_mode
, direction
,
1536 (128 << fdctrl
->fifo
[5]) *
1537 (cur_drv
->last_sect
- ks
+ 1), fdctrl
->data_len
);
1538 switch (direction
) {
1542 dma_mode_ok
= (dma_mode
== ISADMA_TRANSFER_VERIFY
);
1545 dma_mode_ok
= (dma_mode
== ISADMA_TRANSFER_WRITE
);
1548 dma_mode_ok
= (dma_mode
== ISADMA_TRANSFER_READ
);
1554 dma_mode_ok
= false;
1558 /* No access is allowed until DMA transfer has completed */
1559 fdctrl
->msr
&= ~FD_MSR_RQM
;
1560 if (direction
!= FD_DIR_VERIFY
) {
1561 /* Now, we just have to wait for the DMA controller to
1564 k
->hold_DREQ(fdctrl
->dma
, fdctrl
->dma_chann
);
1565 k
->schedule(fdctrl
->dma
);
1567 /* Start transfer */
1568 fdctrl_transfer_handler(fdctrl
, fdctrl
->dma_chann
, 0,
1573 FLOPPY_DPRINTF("bad dma_mode=%d direction=%d\n", dma_mode
,
1577 FLOPPY_DPRINTF("start non-DMA transfer\n");
1578 fdctrl
->msr
|= FD_MSR_NONDMA
| FD_MSR_RQM
;
1579 if (direction
!= FD_DIR_WRITE
)
1580 fdctrl
->msr
|= FD_MSR_DIO
;
1581 /* IO based transfer: calculate len */
1582 fdctrl_raise_irq(fdctrl
);
1585 /* Prepare a transfer of deleted data */
1586 static void fdctrl_start_transfer_del(FDCtrl
*fdctrl
, int direction
)
1588 qemu_log_mask(LOG_UNIMP
, "fdctrl_start_transfer_del() unimplemented\n");
1590 /* We don't handle deleted data,
1591 * so we don't return *ANYTHING*
1593 fdctrl_stop_transfer(fdctrl
, FD_SR0_ABNTERM
| FD_SR0_SEEK
, 0x00, 0x00);
1596 /* handlers for DMA transfers */
1597 static int fdctrl_transfer_handler (void *opaque
, int nchan
,
1598 int dma_pos
, int dma_len
)
1602 int len
, start_pos
, rel_pos
;
1603 uint8_t status0
= 0x00, status1
= 0x00, status2
= 0x00;
1607 if (fdctrl
->msr
& FD_MSR_RQM
) {
1608 FLOPPY_DPRINTF("Not in DMA transfer mode !\n");
1611 k
= ISADMA_GET_CLASS(fdctrl
->dma
);
1612 cur_drv
= get_cur_drv(fdctrl
);
1613 if (fdctrl
->data_dir
== FD_DIR_SCANE
|| fdctrl
->data_dir
== FD_DIR_SCANL
||
1614 fdctrl
->data_dir
== FD_DIR_SCANH
)
1615 status2
= FD_SR2_SNS
;
1616 if (dma_len
> fdctrl
->data_len
)
1617 dma_len
= fdctrl
->data_len
;
1618 if (cur_drv
->blk
== NULL
) {
1619 if (fdctrl
->data_dir
== FD_DIR_WRITE
)
1620 fdctrl_stop_transfer(fdctrl
, FD_SR0_ABNTERM
| FD_SR0_SEEK
, 0x00, 0x00);
1622 fdctrl_stop_transfer(fdctrl
, FD_SR0_ABNTERM
, 0x00, 0x00);
1624 goto transfer_error
;
1626 rel_pos
= fdctrl
->data_pos
% FD_SECTOR_LEN
;
1627 for (start_pos
= fdctrl
->data_pos
; fdctrl
->data_pos
< dma_len
;) {
1628 len
= dma_len
- fdctrl
->data_pos
;
1629 if (len
+ rel_pos
> FD_SECTOR_LEN
)
1630 len
= FD_SECTOR_LEN
- rel_pos
;
1631 FLOPPY_DPRINTF("copy %d bytes (%d %d %d) %d pos %d %02x "
1632 "(%d-0x%08x 0x%08x)\n", len
, dma_len
, fdctrl
->data_pos
,
1633 fdctrl
->data_len
, GET_CUR_DRV(fdctrl
), cur_drv
->head
,
1634 cur_drv
->track
, cur_drv
->sect
, fd_sector(cur_drv
),
1635 fd_sector(cur_drv
) * FD_SECTOR_LEN
);
1636 if (fdctrl
->data_dir
!= FD_DIR_WRITE
||
1637 len
< FD_SECTOR_LEN
|| rel_pos
!= 0) {
1638 /* READ & SCAN commands and realign to a sector for WRITE */
1639 if (blk_pread(cur_drv
->blk
, fd_offset(cur_drv
),
1640 fdctrl
->fifo
, BDRV_SECTOR_SIZE
) < 0) {
1641 FLOPPY_DPRINTF("Floppy: error getting sector %d\n",
1642 fd_sector(cur_drv
));
1643 /* Sure, image size is too small... */
1644 memset(fdctrl
->fifo
, 0, FD_SECTOR_LEN
);
1647 switch (fdctrl
->data_dir
) {
1650 k
->write_memory(fdctrl
->dma
, nchan
, fdctrl
->fifo
+ rel_pos
,
1651 fdctrl
->data_pos
, len
);
1654 /* WRITE commands */
1656 /* Handle readonly medium early, no need to do DMA, touch the
1657 * LED or attempt any writes. A real floppy doesn't attempt
1658 * to write to readonly media either. */
1659 fdctrl_stop_transfer(fdctrl
,
1660 FD_SR0_ABNTERM
| FD_SR0_SEEK
, FD_SR1_NW
,
1662 goto transfer_error
;
1665 k
->read_memory(fdctrl
->dma
, nchan
, fdctrl
->fifo
+ rel_pos
,
1666 fdctrl
->data_pos
, len
);
1667 if (blk_pwrite(cur_drv
->blk
, fd_offset(cur_drv
),
1668 fdctrl
->fifo
, BDRV_SECTOR_SIZE
, 0) < 0) {
1669 FLOPPY_DPRINTF("error writing sector %d\n",
1670 fd_sector(cur_drv
));
1671 fdctrl_stop_transfer(fdctrl
, FD_SR0_ABNTERM
| FD_SR0_SEEK
, 0x00, 0x00);
1672 goto transfer_error
;
1676 /* VERIFY commands */
1681 uint8_t tmpbuf
[FD_SECTOR_LEN
];
1683 k
->read_memory(fdctrl
->dma
, nchan
, tmpbuf
, fdctrl
->data_pos
,
1685 ret
= memcmp(tmpbuf
, fdctrl
->fifo
+ rel_pos
, len
);
1687 status2
= FD_SR2_SEH
;
1690 if ((ret
< 0 && fdctrl
->data_dir
== FD_DIR_SCANL
) ||
1691 (ret
> 0 && fdctrl
->data_dir
== FD_DIR_SCANH
)) {
1698 fdctrl
->data_pos
+= len
;
1699 rel_pos
= fdctrl
->data_pos
% FD_SECTOR_LEN
;
1701 /* Seek to next sector */
1702 if (!fdctrl_seek_to_next_sect(fdctrl
, cur_drv
))
1707 len
= fdctrl
->data_pos
- start_pos
;
1708 FLOPPY_DPRINTF("end transfer %d %d %d\n",
1709 fdctrl
->data_pos
, len
, fdctrl
->data_len
);
1710 if (fdctrl
->data_dir
== FD_DIR_SCANE
||
1711 fdctrl
->data_dir
== FD_DIR_SCANL
||
1712 fdctrl
->data_dir
== FD_DIR_SCANH
)
1713 status2
= FD_SR2_SEH
;
1714 fdctrl
->data_len
-= len
;
1715 fdctrl_stop_transfer(fdctrl
, status0
, status1
, status2
);
1721 /* Data register : 0x05 */
1722 static uint32_t fdctrl_read_data(FDCtrl
*fdctrl
)
1725 uint32_t retval
= 0;
1728 cur_drv
= get_cur_drv(fdctrl
);
1729 fdctrl
->dsr
&= ~FD_DSR_PWRDOWN
;
1730 if (!(fdctrl
->msr
& FD_MSR_RQM
) || !(fdctrl
->msr
& FD_MSR_DIO
)) {
1731 FLOPPY_DPRINTF("error: controller not ready for reading\n");
1735 /* If data_len spans multiple sectors, the current position in the FIFO
1736 * wraps around while fdctrl->data_pos is the real position in the whole
1738 pos
= fdctrl
->data_pos
;
1739 pos
%= FD_SECTOR_LEN
;
1741 switch (fdctrl
->phase
) {
1742 case FD_PHASE_EXECUTION
:
1743 assert(fdctrl
->msr
& FD_MSR_NONDMA
);
1745 if (fdctrl
->data_pos
!= 0)
1746 if (!fdctrl_seek_to_next_sect(fdctrl
, cur_drv
)) {
1747 FLOPPY_DPRINTF("error seeking to next sector %d\n",
1748 fd_sector(cur_drv
));
1751 if (blk_pread(cur_drv
->blk
, fd_offset(cur_drv
), fdctrl
->fifo
,
1754 FLOPPY_DPRINTF("error getting sector %d\n",
1755 fd_sector(cur_drv
));
1756 /* Sure, image size is too small... */
1757 memset(fdctrl
->fifo
, 0, FD_SECTOR_LEN
);
1761 if (++fdctrl
->data_pos
== fdctrl
->data_len
) {
1762 fdctrl
->msr
&= ~FD_MSR_RQM
;
1763 fdctrl_stop_transfer(fdctrl
, 0x00, 0x00, 0x00);
1767 case FD_PHASE_RESULT
:
1768 assert(!(fdctrl
->msr
& FD_MSR_NONDMA
));
1769 if (++fdctrl
->data_pos
== fdctrl
->data_len
) {
1770 fdctrl
->msr
&= ~FD_MSR_RQM
;
1771 fdctrl_to_command_phase(fdctrl
);
1772 fdctrl_reset_irq(fdctrl
);
1776 case FD_PHASE_COMMAND
:
1781 retval
= fdctrl
->fifo
[pos
];
1782 FLOPPY_DPRINTF("data register: 0x%02x\n", retval
);
1787 static void fdctrl_format_sector(FDCtrl
*fdctrl
)
1792 SET_CUR_DRV(fdctrl
, fdctrl
->fifo
[1] & FD_DOR_SELMASK
);
1793 cur_drv
= get_cur_drv(fdctrl
);
1794 kt
= fdctrl
->fifo
[6];
1795 kh
= fdctrl
->fifo
[7];
1796 ks
= fdctrl
->fifo
[8];
1797 FLOPPY_DPRINTF("format sector at %d %d %02x %02x (%d)\n",
1798 GET_CUR_DRV(fdctrl
), kh
, kt
, ks
,
1799 fd_sector_calc(kh
, kt
, ks
, cur_drv
->last_sect
,
1800 NUM_SIDES(cur_drv
)));
1801 switch (fd_seek(cur_drv
, kh
, kt
, ks
, fdctrl
->config
& FD_CONFIG_EIS
)) {
1804 fdctrl_stop_transfer(fdctrl
, FD_SR0_ABNTERM
, 0x00, 0x00);
1805 fdctrl
->fifo
[3] = kt
;
1806 fdctrl
->fifo
[4] = kh
;
1807 fdctrl
->fifo
[5] = ks
;
1811 fdctrl_stop_transfer(fdctrl
, FD_SR0_ABNTERM
, FD_SR1_EC
, 0x00);
1812 fdctrl
->fifo
[3] = kt
;
1813 fdctrl
->fifo
[4] = kh
;
1814 fdctrl
->fifo
[5] = ks
;
1817 /* No seek enabled */
1818 fdctrl_stop_transfer(fdctrl
, FD_SR0_ABNTERM
, 0x00, 0x00);
1819 fdctrl
->fifo
[3] = kt
;
1820 fdctrl
->fifo
[4] = kh
;
1821 fdctrl
->fifo
[5] = ks
;
1824 fdctrl
->status0
|= FD_SR0_SEEK
;
1829 memset(fdctrl
->fifo
, 0, FD_SECTOR_LEN
);
1830 if (cur_drv
->blk
== NULL
||
1831 blk_pwrite(cur_drv
->blk
, fd_offset(cur_drv
), fdctrl
->fifo
,
1832 BDRV_SECTOR_SIZE
, 0) < 0) {
1833 FLOPPY_DPRINTF("error formatting sector %d\n", fd_sector(cur_drv
));
1834 fdctrl_stop_transfer(fdctrl
, FD_SR0_ABNTERM
| FD_SR0_SEEK
, 0x00, 0x00);
1836 if (cur_drv
->sect
== cur_drv
->last_sect
) {
1837 fdctrl
->data_state
&= ~FD_STATE_FORMAT
;
1838 /* Last sector done */
1839 fdctrl_stop_transfer(fdctrl
, 0x00, 0x00, 0x00);
1842 fdctrl
->data_pos
= 0;
1843 fdctrl
->data_len
= 4;
1848 static void fdctrl_handle_lock(FDCtrl
*fdctrl
, int direction
)
1850 fdctrl
->lock
= (fdctrl
->fifo
[0] & 0x80) ? 1 : 0;
1851 fdctrl
->fifo
[0] = fdctrl
->lock
<< 4;
1852 fdctrl_to_result_phase(fdctrl
, 1);
1855 static void fdctrl_handle_dumpreg(FDCtrl
*fdctrl
, int direction
)
1857 FDrive
*cur_drv
= get_cur_drv(fdctrl
);
1859 /* Drives position */
1860 fdctrl
->fifo
[0] = drv0(fdctrl
)->track
;
1861 fdctrl
->fifo
[1] = drv1(fdctrl
)->track
;
1863 fdctrl
->fifo
[2] = drv2(fdctrl
)->track
;
1864 fdctrl
->fifo
[3] = drv3(fdctrl
)->track
;
1866 fdctrl
->fifo
[2] = 0;
1867 fdctrl
->fifo
[3] = 0;
1870 fdctrl
->fifo
[4] = fdctrl
->timer0
;
1871 fdctrl
->fifo
[5] = (fdctrl
->timer1
<< 1) | (fdctrl
->dor
& FD_DOR_DMAEN
? 1 : 0);
1872 fdctrl
->fifo
[6] = cur_drv
->last_sect
;
1873 fdctrl
->fifo
[7] = (fdctrl
->lock
<< 7) |
1874 (cur_drv
->perpendicular
<< 2);
1875 fdctrl
->fifo
[8] = fdctrl
->config
;
1876 fdctrl
->fifo
[9] = fdctrl
->precomp_trk
;
1877 fdctrl_to_result_phase(fdctrl
, 10);
1880 static void fdctrl_handle_version(FDCtrl
*fdctrl
, int direction
)
1882 /* Controller's version */
1883 fdctrl
->fifo
[0] = fdctrl
->version
;
1884 fdctrl_to_result_phase(fdctrl
, 1);
1887 static void fdctrl_handle_partid(FDCtrl
*fdctrl
, int direction
)
1889 fdctrl
->fifo
[0] = 0x41; /* Stepping 1 */
1890 fdctrl_to_result_phase(fdctrl
, 1);
1893 static void fdctrl_handle_restore(FDCtrl
*fdctrl
, int direction
)
1895 FDrive
*cur_drv
= get_cur_drv(fdctrl
);
1897 /* Drives position */
1898 drv0(fdctrl
)->track
= fdctrl
->fifo
[3];
1899 drv1(fdctrl
)->track
= fdctrl
->fifo
[4];
1901 drv2(fdctrl
)->track
= fdctrl
->fifo
[5];
1902 drv3(fdctrl
)->track
= fdctrl
->fifo
[6];
1905 fdctrl
->timer0
= fdctrl
->fifo
[7];
1906 fdctrl
->timer1
= fdctrl
->fifo
[8];
1907 cur_drv
->last_sect
= fdctrl
->fifo
[9];
1908 fdctrl
->lock
= fdctrl
->fifo
[10] >> 7;
1909 cur_drv
->perpendicular
= (fdctrl
->fifo
[10] >> 2) & 0xF;
1910 fdctrl
->config
= fdctrl
->fifo
[11];
1911 fdctrl
->precomp_trk
= fdctrl
->fifo
[12];
1912 fdctrl
->pwrd
= fdctrl
->fifo
[13];
1913 fdctrl_to_command_phase(fdctrl
);
1916 static void fdctrl_handle_save(FDCtrl
*fdctrl
, int direction
)
1918 FDrive
*cur_drv
= get_cur_drv(fdctrl
);
1920 fdctrl
->fifo
[0] = 0;
1921 fdctrl
->fifo
[1] = 0;
1922 /* Drives position */
1923 fdctrl
->fifo
[2] = drv0(fdctrl
)->track
;
1924 fdctrl
->fifo
[3] = drv1(fdctrl
)->track
;
1926 fdctrl
->fifo
[4] = drv2(fdctrl
)->track
;
1927 fdctrl
->fifo
[5] = drv3(fdctrl
)->track
;
1929 fdctrl
->fifo
[4] = 0;
1930 fdctrl
->fifo
[5] = 0;
1933 fdctrl
->fifo
[6] = fdctrl
->timer0
;
1934 fdctrl
->fifo
[7] = fdctrl
->timer1
;
1935 fdctrl
->fifo
[8] = cur_drv
->last_sect
;
1936 fdctrl
->fifo
[9] = (fdctrl
->lock
<< 7) |
1937 (cur_drv
->perpendicular
<< 2);
1938 fdctrl
->fifo
[10] = fdctrl
->config
;
1939 fdctrl
->fifo
[11] = fdctrl
->precomp_trk
;
1940 fdctrl
->fifo
[12] = fdctrl
->pwrd
;
1941 fdctrl
->fifo
[13] = 0;
1942 fdctrl
->fifo
[14] = 0;
1943 fdctrl_to_result_phase(fdctrl
, 15);
1946 static void fdctrl_handle_readid(FDCtrl
*fdctrl
, int direction
)
1948 FDrive
*cur_drv
= get_cur_drv(fdctrl
);
1950 cur_drv
->head
= (fdctrl
->fifo
[1] >> 2) & 1;
1951 timer_mod(fdctrl
->result_timer
, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL
) +
1952 (NANOSECONDS_PER_SECOND
/ 50));
1955 static void fdctrl_handle_format_track(FDCtrl
*fdctrl
, int direction
)
1959 SET_CUR_DRV(fdctrl
, fdctrl
->fifo
[1] & FD_DOR_SELMASK
);
1960 cur_drv
= get_cur_drv(fdctrl
);
1961 fdctrl
->data_state
|= FD_STATE_FORMAT
;
1962 if (fdctrl
->fifo
[0] & 0x80)
1963 fdctrl
->data_state
|= FD_STATE_MULTI
;
1965 fdctrl
->data_state
&= ~FD_STATE_MULTI
;
1967 fdctrl
->fifo
[2] > 7 ? 16384 : 128 << fdctrl
->fifo
[2];
1969 cur_drv
->last_sect
=
1970 cur_drv
->flags
& FDISK_DBL_SIDES
? fdctrl
->fifo
[3] :
1971 fdctrl
->fifo
[3] / 2;
1973 cur_drv
->last_sect
= fdctrl
->fifo
[3];
1975 /* TODO: implement format using DMA expected by the Bochs BIOS
1976 * and Linux fdformat (read 3 bytes per sector via DMA and fill
1977 * the sector with the specified fill byte
1979 fdctrl
->data_state
&= ~FD_STATE_FORMAT
;
1980 fdctrl_stop_transfer(fdctrl
, 0x00, 0x00, 0x00);
1983 static void fdctrl_handle_specify(FDCtrl
*fdctrl
, int direction
)
1985 fdctrl
->timer0
= (fdctrl
->fifo
[1] >> 4) & 0xF;
1986 fdctrl
->timer1
= fdctrl
->fifo
[2] >> 1;
1987 if (fdctrl
->fifo
[2] & 1)
1988 fdctrl
->dor
&= ~FD_DOR_DMAEN
;
1990 fdctrl
->dor
|= FD_DOR_DMAEN
;
1991 /* No result back */
1992 fdctrl_to_command_phase(fdctrl
);
1995 static void fdctrl_handle_sense_drive_status(FDCtrl
*fdctrl
, int direction
)
1999 SET_CUR_DRV(fdctrl
, fdctrl
->fifo
[1] & FD_DOR_SELMASK
);
2000 cur_drv
= get_cur_drv(fdctrl
);
2001 cur_drv
->head
= (fdctrl
->fifo
[1] >> 2) & 1;
2002 /* 1 Byte status back */
2003 fdctrl
->fifo
[0] = (cur_drv
->ro
<< 6) |
2004 (cur_drv
->track
== 0 ? 0x10 : 0x00) |
2005 (cur_drv
->head
<< 2) |
2006 GET_CUR_DRV(fdctrl
) |
2008 fdctrl_to_result_phase(fdctrl
, 1);
2011 static void fdctrl_handle_recalibrate(FDCtrl
*fdctrl
, int direction
)
2015 SET_CUR_DRV(fdctrl
, fdctrl
->fifo
[1] & FD_DOR_SELMASK
);
2016 cur_drv
= get_cur_drv(fdctrl
);
2017 fd_recalibrate(cur_drv
);
2018 fdctrl_to_command_phase(fdctrl
);
2019 /* Raise Interrupt */
2020 fdctrl
->status0
|= FD_SR0_SEEK
;
2021 fdctrl_raise_irq(fdctrl
);
2024 static void fdctrl_handle_sense_interrupt_status(FDCtrl
*fdctrl
, int direction
)
2026 FDrive
*cur_drv
= get_cur_drv(fdctrl
);
2028 if (fdctrl
->reset_sensei
> 0) {
2030 FD_SR0_RDYCHG
+ FD_RESET_SENSEI_COUNT
- fdctrl
->reset_sensei
;
2031 fdctrl
->reset_sensei
--;
2032 } else if (!(fdctrl
->sra
& FD_SRA_INTPEND
)) {
2033 fdctrl
->fifo
[0] = FD_SR0_INVCMD
;
2034 fdctrl_to_result_phase(fdctrl
, 1);
2038 (fdctrl
->status0
& ~(FD_SR0_HEAD
| FD_SR0_DS1
| FD_SR0_DS0
))
2039 | GET_CUR_DRV(fdctrl
);
2042 fdctrl
->fifo
[1] = cur_drv
->track
;
2043 fdctrl_to_result_phase(fdctrl
, 2);
2044 fdctrl_reset_irq(fdctrl
);
2045 fdctrl
->status0
= FD_SR0_RDYCHG
;
2048 static void fdctrl_handle_seek(FDCtrl
*fdctrl
, int direction
)
2052 SET_CUR_DRV(fdctrl
, fdctrl
->fifo
[1] & FD_DOR_SELMASK
);
2053 cur_drv
= get_cur_drv(fdctrl
);
2054 fdctrl_to_command_phase(fdctrl
);
2055 /* The seek command just sends step pulses to the drive and doesn't care if
2056 * there is a medium inserted of if it's banging the head against the drive.
2058 fd_seek(cur_drv
, cur_drv
->head
, fdctrl
->fifo
[2], cur_drv
->sect
, 1);
2059 /* Raise Interrupt */
2060 fdctrl
->status0
|= FD_SR0_SEEK
;
2061 fdctrl_raise_irq(fdctrl
);
2064 static void fdctrl_handle_perpendicular_mode(FDCtrl
*fdctrl
, int direction
)
2066 FDrive
*cur_drv
= get_cur_drv(fdctrl
);
2068 if (fdctrl
->fifo
[1] & 0x80)
2069 cur_drv
->perpendicular
= fdctrl
->fifo
[1] & 0x7;
2070 /* No result back */
2071 fdctrl_to_command_phase(fdctrl
);
2074 static void fdctrl_handle_configure(FDCtrl
*fdctrl
, int direction
)
2076 fdctrl
->config
= fdctrl
->fifo
[2];
2077 fdctrl
->precomp_trk
= fdctrl
->fifo
[3];
2078 /* No result back */
2079 fdctrl_to_command_phase(fdctrl
);
2082 static void fdctrl_handle_powerdown_mode(FDCtrl
*fdctrl
, int direction
)
2084 fdctrl
->pwrd
= fdctrl
->fifo
[1];
2085 fdctrl
->fifo
[0] = fdctrl
->fifo
[1];
2086 fdctrl_to_result_phase(fdctrl
, 1);
2089 static void fdctrl_handle_option(FDCtrl
*fdctrl
, int direction
)
2091 /* No result back */
2092 fdctrl_to_command_phase(fdctrl
);
2095 static void fdctrl_handle_drive_specification_command(FDCtrl
*fdctrl
, int direction
)
2097 FDrive
*cur_drv
= get_cur_drv(fdctrl
);
2100 pos
= fdctrl
->data_pos
- 1;
2101 pos
%= FD_SECTOR_LEN
;
2102 if (fdctrl
->fifo
[pos
] & 0x80) {
2103 /* Command parameters done */
2104 if (fdctrl
->fifo
[pos
] & 0x40) {
2105 fdctrl
->fifo
[0] = fdctrl
->fifo
[1];
2106 fdctrl
->fifo
[2] = 0;
2107 fdctrl
->fifo
[3] = 0;
2108 fdctrl_to_result_phase(fdctrl
, 4);
2110 fdctrl_to_command_phase(fdctrl
);
2112 } else if (fdctrl
->data_len
> 7) {
2114 fdctrl
->fifo
[0] = 0x80 |
2115 (cur_drv
->head
<< 2) | GET_CUR_DRV(fdctrl
);
2116 fdctrl_to_result_phase(fdctrl
, 1);
2120 static void fdctrl_handle_relative_seek_in(FDCtrl
*fdctrl
, int direction
)
2124 SET_CUR_DRV(fdctrl
, fdctrl
->fifo
[1] & FD_DOR_SELMASK
);
2125 cur_drv
= get_cur_drv(fdctrl
);
2126 if (fdctrl
->fifo
[2] + cur_drv
->track
>= cur_drv
->max_track
) {
2127 fd_seek(cur_drv
, cur_drv
->head
, cur_drv
->max_track
- 1,
2130 fd_seek(cur_drv
, cur_drv
->head
,
2131 cur_drv
->track
+ fdctrl
->fifo
[2], cur_drv
->sect
, 1);
2133 fdctrl_to_command_phase(fdctrl
);
2134 /* Raise Interrupt */
2135 fdctrl
->status0
|= FD_SR0_SEEK
;
2136 fdctrl_raise_irq(fdctrl
);
2139 static void fdctrl_handle_relative_seek_out(FDCtrl
*fdctrl
, int direction
)
2143 SET_CUR_DRV(fdctrl
, fdctrl
->fifo
[1] & FD_DOR_SELMASK
);
2144 cur_drv
= get_cur_drv(fdctrl
);
2145 if (fdctrl
->fifo
[2] > cur_drv
->track
) {
2146 fd_seek(cur_drv
, cur_drv
->head
, 0, cur_drv
->sect
, 1);
2148 fd_seek(cur_drv
, cur_drv
->head
,
2149 cur_drv
->track
- fdctrl
->fifo
[2], cur_drv
->sect
, 1);
2151 fdctrl_to_command_phase(fdctrl
);
2152 /* Raise Interrupt */
2153 fdctrl
->status0
|= FD_SR0_SEEK
;
2154 fdctrl_raise_irq(fdctrl
);
2158 * Handlers for the execution phase of each command
2160 typedef struct FDCtrlCommand
{
2165 void (*handler
)(FDCtrl
*fdctrl
, int direction
);
2169 static const FDCtrlCommand handlers
[] = {
2170 { FD_CMD_READ
, 0x1f, "READ", 8, fdctrl_start_transfer
, FD_DIR_READ
},
2171 { FD_CMD_WRITE
, 0x3f, "WRITE", 8, fdctrl_start_transfer
, FD_DIR_WRITE
},
2172 { FD_CMD_SEEK
, 0xff, "SEEK", 2, fdctrl_handle_seek
},
2173 { FD_CMD_SENSE_INTERRUPT_STATUS
, 0xff, "SENSE INTERRUPT STATUS", 0, fdctrl_handle_sense_interrupt_status
},
2174 { FD_CMD_RECALIBRATE
, 0xff, "RECALIBRATE", 1, fdctrl_handle_recalibrate
},
2175 { FD_CMD_FORMAT_TRACK
, 0xbf, "FORMAT TRACK", 5, fdctrl_handle_format_track
},
2176 { FD_CMD_READ_TRACK
, 0xbf, "READ TRACK", 8, fdctrl_start_transfer
, FD_DIR_READ
},
2177 { FD_CMD_RESTORE
, 0xff, "RESTORE", 17, fdctrl_handle_restore
}, /* part of READ DELETED DATA */
2178 { FD_CMD_SAVE
, 0xff, "SAVE", 0, fdctrl_handle_save
}, /* part of READ DELETED DATA */
2179 { FD_CMD_READ_DELETED
, 0x1f, "READ DELETED DATA", 8, fdctrl_start_transfer_del
, FD_DIR_READ
},
2180 { FD_CMD_SCAN_EQUAL
, 0x1f, "SCAN EQUAL", 8, fdctrl_start_transfer
, FD_DIR_SCANE
},
2181 { FD_CMD_VERIFY
, 0x1f, "VERIFY", 8, fdctrl_start_transfer
, FD_DIR_VERIFY
},
2182 { FD_CMD_SCAN_LOW_OR_EQUAL
, 0x1f, "SCAN LOW OR EQUAL", 8, fdctrl_start_transfer
, FD_DIR_SCANL
},
2183 { FD_CMD_SCAN_HIGH_OR_EQUAL
, 0x1f, "SCAN HIGH OR EQUAL", 8, fdctrl_start_transfer
, FD_DIR_SCANH
},
2184 { FD_CMD_WRITE_DELETED
, 0x3f, "WRITE DELETED DATA", 8, fdctrl_start_transfer_del
, FD_DIR_WRITE
},
2185 { FD_CMD_READ_ID
, 0xbf, "READ ID", 1, fdctrl_handle_readid
},
2186 { FD_CMD_SPECIFY
, 0xff, "SPECIFY", 2, fdctrl_handle_specify
},
2187 { FD_CMD_SENSE_DRIVE_STATUS
, 0xff, "SENSE DRIVE STATUS", 1, fdctrl_handle_sense_drive_status
},
2188 { FD_CMD_PERPENDICULAR_MODE
, 0xff, "PERPENDICULAR MODE", 1, fdctrl_handle_perpendicular_mode
},
2189 { FD_CMD_CONFIGURE
, 0xff, "CONFIGURE", 3, fdctrl_handle_configure
},
2190 { FD_CMD_POWERDOWN_MODE
, 0xff, "POWERDOWN MODE", 2, fdctrl_handle_powerdown_mode
},
2191 { FD_CMD_OPTION
, 0xff, "OPTION", 1, fdctrl_handle_option
},
2192 { FD_CMD_DRIVE_SPECIFICATION_COMMAND
, 0xff, "DRIVE SPECIFICATION COMMAND", 5, fdctrl_handle_drive_specification_command
},
2193 { FD_CMD_RELATIVE_SEEK_OUT
, 0xff, "RELATIVE SEEK OUT", 2, fdctrl_handle_relative_seek_out
},
2194 { FD_CMD_FORMAT_AND_WRITE
, 0xff, "FORMAT AND WRITE", 10, fdctrl_unimplemented
},
2195 { FD_CMD_RELATIVE_SEEK_IN
, 0xff, "RELATIVE SEEK IN", 2, fdctrl_handle_relative_seek_in
},
2196 { FD_CMD_LOCK
, 0x7f, "LOCK", 0, fdctrl_handle_lock
},
2197 { FD_CMD_DUMPREG
, 0xff, "DUMPREG", 0, fdctrl_handle_dumpreg
},
2198 { FD_CMD_VERSION
, 0xff, "VERSION", 0, fdctrl_handle_version
},
2199 { FD_CMD_PART_ID
, 0xff, "PART ID", 0, fdctrl_handle_partid
},
2200 { FD_CMD_WRITE
, 0x1f, "WRITE (BeOS)", 8, fdctrl_start_transfer
, FD_DIR_WRITE
}, /* not in specification ; BeOS 4.5 bug */
2201 { 0, 0, "unknown", 0, fdctrl_unimplemented
}, /* default handler */
2203 /* Associate command to an index in the 'handlers' array */
2204 static uint8_t command_to_handler
[256];
2206 static const FDCtrlCommand
*get_command(uint8_t cmd
)
2210 idx
= command_to_handler
[cmd
];
2211 FLOPPY_DPRINTF("%s command\n", handlers
[idx
].name
);
2212 return &handlers
[idx
];
2215 static void fdctrl_write_data(FDCtrl
*fdctrl
, uint32_t value
)
2218 const FDCtrlCommand
*cmd
;
2222 if (!(fdctrl
->dor
& FD_DOR_nRESET
)) {
2223 FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
2226 if (!(fdctrl
->msr
& FD_MSR_RQM
) || (fdctrl
->msr
& FD_MSR_DIO
)) {
2227 FLOPPY_DPRINTF("error: controller not ready for writing\n");
2230 fdctrl
->dsr
&= ~FD_DSR_PWRDOWN
;
2232 FLOPPY_DPRINTF("%s: %02x\n", __func__
, value
);
2234 /* If data_len spans multiple sectors, the current position in the FIFO
2235 * wraps around while fdctrl->data_pos is the real position in the whole
2237 pos
= fdctrl
->data_pos
++;
2238 pos
%= FD_SECTOR_LEN
;
2239 fdctrl
->fifo
[pos
] = value
;
2241 if (fdctrl
->data_pos
== fdctrl
->data_len
) {
2242 fdctrl
->msr
&= ~FD_MSR_RQM
;
2245 switch (fdctrl
->phase
) {
2246 case FD_PHASE_EXECUTION
:
2247 /* For DMA requests, RQM should be cleared during execution phase, so
2248 * we would have errored out above. */
2249 assert(fdctrl
->msr
& FD_MSR_NONDMA
);
2251 /* FIFO data write */
2252 if (pos
== FD_SECTOR_LEN
- 1 ||
2253 fdctrl
->data_pos
== fdctrl
->data_len
) {
2254 cur_drv
= get_cur_drv(fdctrl
);
2255 if (blk_pwrite(cur_drv
->blk
, fd_offset(cur_drv
), fdctrl
->fifo
,
2256 BDRV_SECTOR_SIZE
, 0) < 0) {
2257 FLOPPY_DPRINTF("error writing sector %d\n",
2258 fd_sector(cur_drv
));
2261 if (!fdctrl_seek_to_next_sect(fdctrl
, cur_drv
)) {
2262 FLOPPY_DPRINTF("error seeking to next sector %d\n",
2263 fd_sector(cur_drv
));
2268 /* Switch to result phase when done with the transfer */
2269 if (fdctrl
->data_pos
== fdctrl
->data_len
) {
2270 fdctrl_stop_transfer(fdctrl
, 0x00, 0x00, 0x00);
2274 case FD_PHASE_COMMAND
:
2275 assert(!(fdctrl
->msr
& FD_MSR_NONDMA
));
2276 assert(fdctrl
->data_pos
< FD_SECTOR_LEN
);
2279 /* The first byte specifies the command. Now we start reading
2280 * as many parameters as this command requires. */
2281 cmd
= get_command(value
);
2282 fdctrl
->data_len
= cmd
->parameters
+ 1;
2283 if (cmd
->parameters
) {
2284 fdctrl
->msr
|= FD_MSR_RQM
;
2286 fdctrl
->msr
|= FD_MSR_CMDBUSY
;
2289 if (fdctrl
->data_pos
== fdctrl
->data_len
) {
2290 /* We have all parameters now, execute the command */
2291 fdctrl
->phase
= FD_PHASE_EXECUTION
;
2293 if (fdctrl
->data_state
& FD_STATE_FORMAT
) {
2294 fdctrl_format_sector(fdctrl
);
2298 cmd
= get_command(fdctrl
->fifo
[0]);
2299 FLOPPY_DPRINTF("Calling handler for '%s'\n", cmd
->name
);
2300 cmd
->handler(fdctrl
, cmd
->direction
);
2304 case FD_PHASE_RESULT
:
2310 static void fdctrl_result_timer(void *opaque
)
2312 FDCtrl
*fdctrl
= opaque
;
2313 FDrive
*cur_drv
= get_cur_drv(fdctrl
);
2315 /* Pretend we are spinning.
2316 * This is needed for Coherent, which uses READ ID to check for
2317 * sector interleaving.
2319 if (cur_drv
->last_sect
!= 0) {
2320 cur_drv
->sect
= (cur_drv
->sect
% cur_drv
->last_sect
) + 1;
2322 /* READ_ID can't automatically succeed! */
2323 if (fdctrl
->check_media_rate
&&
2324 (fdctrl
->dsr
& FD_DSR_DRATEMASK
) != cur_drv
->media_rate
) {
2325 FLOPPY_DPRINTF("read id rate mismatch (fdc=%d, media=%d)\n",
2326 fdctrl
->dsr
& FD_DSR_DRATEMASK
, cur_drv
->media_rate
);
2327 fdctrl_stop_transfer(fdctrl
, FD_SR0_ABNTERM
, FD_SR1_MA
, 0x00);
2329 fdctrl_stop_transfer(fdctrl
, 0x00, 0x00, 0x00);
2333 static void fdctrl_change_cb(void *opaque
, bool load
)
2335 FDrive
*drive
= opaque
;
2337 drive
->media_changed
= 1;
2338 drive
->media_validated
= false;
2339 fd_revalidate(drive
);
2342 static const BlockDevOps fdctrl_block_ops
= {
2343 .change_media_cb
= fdctrl_change_cb
,
2346 /* Init functions */
2347 static void fdctrl_connect_drives(FDCtrl
*fdctrl
, Error
**errp
)
2352 for (i
= 0; i
< MAX_FD
; i
++) {
2353 drive
= &fdctrl
->drives
[i
];
2354 drive
->fdctrl
= fdctrl
;
2357 if (blk_get_on_error(drive
->blk
, 0) != BLOCKDEV_ON_ERROR_ENOSPC
) {
2358 error_setg(errp
, "fdc doesn't support drive option werror");
2361 if (blk_get_on_error(drive
->blk
, 1) != BLOCKDEV_ON_ERROR_REPORT
) {
2362 error_setg(errp
, "fdc doesn't support drive option rerror");
2369 blk_set_dev_ops(drive
->blk
, &fdctrl_block_ops
, drive
);
2370 pick_drive_type(drive
);
2372 fd_revalidate(drive
);
2376 ISADevice
*fdctrl_init_isa(ISABus
*bus
, DriveInfo
**fds
)
2381 isadev
= isa_try_create(bus
, TYPE_ISA_FDC
);
2385 dev
= DEVICE(isadev
);
2388 qdev_prop_set_drive(dev
, "driveA", blk_by_legacy_dinfo(fds
[0]),
2392 qdev_prop_set_drive(dev
, "driveB", blk_by_legacy_dinfo(fds
[1]),
2395 qdev_init_nofail(dev
);
2400 void fdctrl_init_sysbus(qemu_irq irq
, int dma_chann
,
2401 hwaddr mmio_base
, DriveInfo
**fds
)
2408 dev
= qdev_create(NULL
, "sysbus-fdc");
2409 sys
= SYSBUS_FDC(dev
);
2410 fdctrl
= &sys
->state
;
2411 fdctrl
->dma_chann
= dma_chann
; /* FIXME */
2413 qdev_prop_set_drive(dev
, "driveA", blk_by_legacy_dinfo(fds
[0]),
2417 qdev_prop_set_drive(dev
, "driveB", blk_by_legacy_dinfo(fds
[1]),
2420 qdev_init_nofail(dev
);
2421 sbd
= SYS_BUS_DEVICE(dev
);
2422 sysbus_connect_irq(sbd
, 0, irq
);
2423 sysbus_mmio_map(sbd
, 0, mmio_base
);
2426 void sun4m_fdctrl_init(qemu_irq irq
, hwaddr io_base
,
2427 DriveInfo
**fds
, qemu_irq
*fdc_tc
)
2432 dev
= qdev_create(NULL
, "SUNW,fdtwo");
2434 qdev_prop_set_drive(dev
, "drive", blk_by_legacy_dinfo(fds
[0]),
2437 qdev_init_nofail(dev
);
2438 sys
= SYSBUS_FDC(dev
);
2439 sysbus_connect_irq(SYS_BUS_DEVICE(sys
), 0, irq
);
2440 sysbus_mmio_map(SYS_BUS_DEVICE(sys
), 0, io_base
);
2441 *fdc_tc
= qdev_get_gpio_in(dev
, 0);
2444 static void fdctrl_realize_common(FDCtrl
*fdctrl
, Error
**errp
)
2447 static int command_tables_inited
= 0;
2449 if (fdctrl
->fallback
== FLOPPY_DRIVE_TYPE_AUTO
) {
2450 error_setg(errp
, "Cannot choose a fallback FDrive type of 'auto'");
2453 /* Fill 'command_to_handler' lookup table */
2454 if (!command_tables_inited
) {
2455 command_tables_inited
= 1;
2456 for (i
= ARRAY_SIZE(handlers
) - 1; i
>= 0; i
--) {
2457 for (j
= 0; j
< sizeof(command_to_handler
); j
++) {
2458 if ((j
& handlers
[i
].mask
) == handlers
[i
].value
) {
2459 command_to_handler
[j
] = i
;
2465 FLOPPY_DPRINTF("init controller\n");
2466 fdctrl
->fifo
= qemu_memalign(512, FD_SECTOR_LEN
);
2467 fdctrl
->fifo_size
= 512;
2468 fdctrl
->result_timer
= timer_new_ns(QEMU_CLOCK_VIRTUAL
,
2469 fdctrl_result_timer
, fdctrl
);
2471 fdctrl
->version
= 0x90; /* Intel 82078 controller */
2472 fdctrl
->config
= FD_CONFIG_EIS
| FD_CONFIG_EFIFO
; /* Implicit seek, polling & FIFO enabled */
2473 fdctrl
->num_floppies
= MAX_FD
;
2475 if (fdctrl
->dma_chann
!= -1) {
2477 assert(fdctrl
->dma
);
2478 k
= ISADMA_GET_CLASS(fdctrl
->dma
);
2479 k
->register_channel(fdctrl
->dma
, fdctrl
->dma_chann
,
2480 &fdctrl_transfer_handler
, fdctrl
);
2482 fdctrl_connect_drives(fdctrl
, errp
);
2485 static const MemoryRegionPortio fdc_portio_list
[] = {
2486 { 1, 5, 1, .read
= fdctrl_read
, .write
= fdctrl_write
},
2487 { 7, 1, 1, .read
= fdctrl_read
, .write
= fdctrl_write
},
2488 PORTIO_END_OF_LIST(),
2491 static void isabus_fdc_realize(DeviceState
*dev
, Error
**errp
)
2493 ISADevice
*isadev
= ISA_DEVICE(dev
);
2494 FDCtrlISABus
*isa
= ISA_FDC(dev
);
2495 FDCtrl
*fdctrl
= &isa
->state
;
2498 isa_register_portio_list(isadev
, isa
->iobase
, fdc_portio_list
, fdctrl
,
2501 isa_init_irq(isadev
, &fdctrl
->irq
, isa
->irq
);
2502 fdctrl
->dma_chann
= isa
->dma
;
2503 if (fdctrl
->dma_chann
!= -1) {
2504 fdctrl
->dma
= isa_get_dma(isa_bus_from_device(isadev
), isa
->dma
);
2505 assert(fdctrl
->dma
);
2508 qdev_set_legacy_instance_id(dev
, isa
->iobase
, 2);
2509 fdctrl_realize_common(fdctrl
, &err
);
2511 error_propagate(errp
, err
);
2516 static void sysbus_fdc_initfn(Object
*obj
)
2518 SysBusDevice
*sbd
= SYS_BUS_DEVICE(obj
);
2519 FDCtrlSysBus
*sys
= SYSBUS_FDC(obj
);
2520 FDCtrl
*fdctrl
= &sys
->state
;
2522 fdctrl
->dma_chann
= -1;
2524 memory_region_init_io(&fdctrl
->iomem
, obj
, &fdctrl_mem_ops
, fdctrl
,
2526 sysbus_init_mmio(sbd
, &fdctrl
->iomem
);
2529 static void sun4m_fdc_initfn(Object
*obj
)
2531 SysBusDevice
*sbd
= SYS_BUS_DEVICE(obj
);
2532 FDCtrlSysBus
*sys
= SYSBUS_FDC(obj
);
2533 FDCtrl
*fdctrl
= &sys
->state
;
2535 fdctrl
->dma_chann
= -1;
2537 memory_region_init_io(&fdctrl
->iomem
, obj
, &fdctrl_mem_strict_ops
,
2538 fdctrl
, "fdctrl", 0x08);
2539 sysbus_init_mmio(sbd
, &fdctrl
->iomem
);
2542 static void sysbus_fdc_common_initfn(Object
*obj
)
2544 DeviceState
*dev
= DEVICE(obj
);
2545 SysBusDevice
*sbd
= SYS_BUS_DEVICE(dev
);
2546 FDCtrlSysBus
*sys
= SYSBUS_FDC(obj
);
2547 FDCtrl
*fdctrl
= &sys
->state
;
2549 qdev_set_legacy_instance_id(dev
, 0 /* io */, 2); /* FIXME */
2551 sysbus_init_irq(sbd
, &fdctrl
->irq
);
2552 qdev_init_gpio_in(dev
, fdctrl_handle_tc
, 1);
2555 static void sysbus_fdc_common_realize(DeviceState
*dev
, Error
**errp
)
2557 FDCtrlSysBus
*sys
= SYSBUS_FDC(dev
);
2558 FDCtrl
*fdctrl
= &sys
->state
;
2560 fdctrl_realize_common(fdctrl
, errp
);
2563 FloppyDriveType
isa_fdc_get_drive_type(ISADevice
*fdc
, int i
)
2565 FDCtrlISABus
*isa
= ISA_FDC(fdc
);
2567 return isa
->state
.drives
[i
].drive
;
2570 void isa_fdc_get_drive_max_chs(FloppyDriveType type
,
2571 uint8_t *maxc
, uint8_t *maxh
, uint8_t *maxs
)
2573 const FDFormat
*fdf
;
2575 *maxc
= *maxh
= *maxs
= 0;
2576 for (fdf
= fd_formats
; fdf
->drive
!= FLOPPY_DRIVE_TYPE_NONE
; fdf
++) {
2577 if (fdf
->drive
!= type
) {
2580 if (*maxc
< fdf
->max_track
) {
2581 *maxc
= fdf
->max_track
;
2583 if (*maxh
< fdf
->max_head
) {
2584 *maxh
= fdf
->max_head
;
2586 if (*maxs
< fdf
->last_sect
) {
2587 *maxs
= fdf
->last_sect
;
2593 static const VMStateDescription vmstate_isa_fdc
={
2596 .minimum_version_id
= 2,
2597 .fields
= (VMStateField
[]) {
2598 VMSTATE_STRUCT(state
, FDCtrlISABus
, 0, vmstate_fdc
, FDCtrl
),
2599 VMSTATE_END_OF_LIST()
2603 static Property isa_fdc_properties
[] = {
2604 DEFINE_PROP_UINT32("iobase", FDCtrlISABus
, iobase
, 0x3f0),
2605 DEFINE_PROP_UINT32("irq", FDCtrlISABus
, irq
, 6),
2606 DEFINE_PROP_UINT32("dma", FDCtrlISABus
, dma
, 2),
2607 DEFINE_PROP_DRIVE("driveA", FDCtrlISABus
, state
.drives
[0].blk
),
2608 DEFINE_PROP_DRIVE("driveB", FDCtrlISABus
, state
.drives
[1].blk
),
2609 DEFINE_PROP_BIT("check_media_rate", FDCtrlISABus
, state
.check_media_rate
,
2611 DEFINE_PROP_DEFAULT("fdtypeA", FDCtrlISABus
, state
.drives
[0].drive
,
2612 FLOPPY_DRIVE_TYPE_AUTO
, qdev_prop_fdc_drive_type
,
2614 DEFINE_PROP_DEFAULT("fdtypeB", FDCtrlISABus
, state
.drives
[1].drive
,
2615 FLOPPY_DRIVE_TYPE_AUTO
, qdev_prop_fdc_drive_type
,
2617 DEFINE_PROP_DEFAULT("fallback", FDCtrlISABus
, state
.fallback
,
2618 FLOPPY_DRIVE_TYPE_288
, qdev_prop_fdc_drive_type
,
2620 DEFINE_PROP_END_OF_LIST(),
2623 static void isabus_fdc_class_init(ObjectClass
*klass
, void *data
)
2625 DeviceClass
*dc
= DEVICE_CLASS(klass
);
2627 dc
->realize
= isabus_fdc_realize
;
2628 dc
->fw_name
= "fdc";
2629 dc
->reset
= fdctrl_external_reset_isa
;
2630 dc
->vmsd
= &vmstate_isa_fdc
;
2631 dc
->props
= isa_fdc_properties
;
2632 set_bit(DEVICE_CATEGORY_STORAGE
, dc
->categories
);
2635 static void isabus_fdc_instance_init(Object
*obj
)
2637 FDCtrlISABus
*isa
= ISA_FDC(obj
);
2639 device_add_bootindex_property(obj
, &isa
->bootindexA
,
2640 "bootindexA", "/floppy@0",
2642 device_add_bootindex_property(obj
, &isa
->bootindexB
,
2643 "bootindexB", "/floppy@1",
2647 static const TypeInfo isa_fdc_info
= {
2648 .name
= TYPE_ISA_FDC
,
2649 .parent
= TYPE_ISA_DEVICE
,
2650 .instance_size
= sizeof(FDCtrlISABus
),
2651 .class_init
= isabus_fdc_class_init
,
2652 .instance_init
= isabus_fdc_instance_init
,
2655 static const VMStateDescription vmstate_sysbus_fdc
={
2658 .minimum_version_id
= 2,
2659 .fields
= (VMStateField
[]) {
2660 VMSTATE_STRUCT(state
, FDCtrlSysBus
, 0, vmstate_fdc
, FDCtrl
),
2661 VMSTATE_END_OF_LIST()
2665 static Property sysbus_fdc_properties
[] = {
2666 DEFINE_PROP_DRIVE("driveA", FDCtrlSysBus
, state
.drives
[0].blk
),
2667 DEFINE_PROP_DRIVE("driveB", FDCtrlSysBus
, state
.drives
[1].blk
),
2668 DEFINE_PROP_DEFAULT("fdtypeA", FDCtrlSysBus
, state
.drives
[0].drive
,
2669 FLOPPY_DRIVE_TYPE_AUTO
, qdev_prop_fdc_drive_type
,
2671 DEFINE_PROP_DEFAULT("fdtypeB", FDCtrlSysBus
, state
.drives
[1].drive
,
2672 FLOPPY_DRIVE_TYPE_AUTO
, qdev_prop_fdc_drive_type
,
2674 DEFINE_PROP_DEFAULT("fallback", FDCtrlISABus
, state
.fallback
,
2675 FLOPPY_DRIVE_TYPE_144
, qdev_prop_fdc_drive_type
,
2677 DEFINE_PROP_END_OF_LIST(),
2680 static void sysbus_fdc_class_init(ObjectClass
*klass
, void *data
)
2682 DeviceClass
*dc
= DEVICE_CLASS(klass
);
2684 dc
->props
= sysbus_fdc_properties
;
2685 set_bit(DEVICE_CATEGORY_STORAGE
, dc
->categories
);
2688 static const TypeInfo sysbus_fdc_info
= {
2689 .name
= "sysbus-fdc",
2690 .parent
= TYPE_SYSBUS_FDC
,
2691 .instance_init
= sysbus_fdc_initfn
,
2692 .class_init
= sysbus_fdc_class_init
,
2695 static Property sun4m_fdc_properties
[] = {
2696 DEFINE_PROP_DRIVE("drive", FDCtrlSysBus
, state
.drives
[0].blk
),
2697 DEFINE_PROP_DEFAULT("fdtype", FDCtrlSysBus
, state
.drives
[0].drive
,
2698 FLOPPY_DRIVE_TYPE_AUTO
, qdev_prop_fdc_drive_type
,
2700 DEFINE_PROP_DEFAULT("fallback", FDCtrlISABus
, state
.fallback
,
2701 FLOPPY_DRIVE_TYPE_144
, qdev_prop_fdc_drive_type
,
2703 DEFINE_PROP_END_OF_LIST(),
2706 static void sun4m_fdc_class_init(ObjectClass
*klass
, void *data
)
2708 DeviceClass
*dc
= DEVICE_CLASS(klass
);
2710 dc
->props
= sun4m_fdc_properties
;
2711 set_bit(DEVICE_CATEGORY_STORAGE
, dc
->categories
);
2714 static const TypeInfo sun4m_fdc_info
= {
2715 .name
= "SUNW,fdtwo",
2716 .parent
= TYPE_SYSBUS_FDC
,
2717 .instance_init
= sun4m_fdc_initfn
,
2718 .class_init
= sun4m_fdc_class_init
,
2721 static void sysbus_fdc_common_class_init(ObjectClass
*klass
, void *data
)
2723 DeviceClass
*dc
= DEVICE_CLASS(klass
);
2725 dc
->realize
= sysbus_fdc_common_realize
;
2726 dc
->reset
= fdctrl_external_reset_sysbus
;
2727 dc
->vmsd
= &vmstate_sysbus_fdc
;
2730 static const TypeInfo sysbus_fdc_type_info
= {
2731 .name
= TYPE_SYSBUS_FDC
,
2732 .parent
= TYPE_SYS_BUS_DEVICE
,
2733 .instance_size
= sizeof(FDCtrlSysBus
),
2734 .instance_init
= sysbus_fdc_common_initfn
,
2736 .class_init
= sysbus_fdc_common_class_init
,
2739 static void fdc_register_types(void)
2741 type_register_static(&isa_fdc_info
);
2742 type_register_static(&sysbus_fdc_type_info
);
2743 type_register_static(&sysbus_fdc_info
);
2744 type_register_static(&sun4m_fdc_info
);
2747 type_init(fdc_register_types
)